z Memory Management: there are various memory-management algorithms we

have discussed including: contiguous allocation, paging, segmentation or

combination of paging and segmentation. They differ in many aspects:

„ Logical vs. physical addresses: logical address is relevant only to a

particular process generated by CPU, while the physical address is the
corresponding (actual) memory location seen by memory management unit.
The translation is done by hardware support, which can be either simple
base register and limit register or page/segmentation tables or TLBs.
„ Performance: logical to physical address translation is time-consuming if
the mapping tables (page or segmentation table) are in memory. Fast registers
(such as TLB) helps to improve this based on locality in memory access.
„ Fragmentation: fragmentation results in memory waste. Fixed allocations
such as paging suffer from internal fragmentation while variable-sized
allocations such as segmentation suffer from external fragmentation
„ Relocation: Compaction needs to move a program to a new memory location,
transparently to the program (process. This requires the logical address be
relocated dynamically, at execution time. If the addresses are relocated only
at load time, compaction is not feasible.
„ Swapping: This can be applied to any program in which the processes are
copied from main memory to a backing storage (e.g., disk) and later are
copied back into the main memory. This scheme allows more processes to be
executed than the main memory can accommodate at one time.
„ Sharing: This generally requires either paging or segmentation so to provide
pages or segments to be shared among different processes. Some protection
mechanism must be in place to ensure proper access rights (read-only,
execute-only, read-write) to shared code or data.

z Paging Scheme
„ The main memory is divided into fixed-size blocks called frames and logical
space divided into the same fixed-size blocks called pages. The OS needs to
track all the free frames in the main memory
„ The address translation is done through a page table, which maps the page
number of a process to a corresponding frame number.
„ The page table is stored inside main memory, pointed by a register called
page-table base register (PTBR). Each memory access thus requires two
memory accesses (one for page table and one for the data or code). The
performance can be improved by storing page table entries in a special
fast-lookup hardware called translation look-aside buffers (TLB). The
improvement depends on the hit ratio in the TLB (like caching scheme).
„ Paging scheme suffers from internal fragmentation, in which on average half
a page can be wasted.
„ Large logical address can result in excessively large page table, in which case
 a page table is required to be stored in multiple frames (pages). Hierarchical
paging scheme such as two-level paging can help to deal with this problem,
in which it usually tries to keep each (smaller) page table to fit within one
page (frame) (See Slide 8.25).

z Segmentation
„ The memory allocation to each process is a collection of segments, which are
variable-sized blocks and are the users’ views of the memory (i.e., main
program, procedure, function, method, variables and etc).
„ The logical addresses explicitly specify both the segment number and the
offset within the segment. This is in contract to the paging scheme in that
user has one single address and the OS partitions the address into a page
number and an offset (invisible to users).
„ Segmentation table is stored inside main memory pointed by a segmentation
table base register (STBR) and a segmentation-table length register (STLR).
„ Each entry in the segmentation table specifies a segment base (i.e., the
starting physical address where the segment resides in memory) and a
segment limit specifying the length of the segment.
„ Segmentation scheme suffers external fragmentation problem, similar to
contiguous memory allocation (Slide 8.9-8.13). But the problem is less
severe since each segment is usually much smaller than the total memory
required for each process.
„ Sharing a segment among different processes makes more sense than sharing
a page since each segment is a logical entity (i.e., a subroutine).
„ Each segment can be further handled by a paging scheme (Slide 8.35).