Datasheet For mXT224

Features
• maXTouch™ Touchscreen
– True 12-bit multi-touch with independent XY tracking for up to 10 concurrent
touches in real time with touch size reporting
– Up to 4.3 inch diagonal screen size supported with 10 mm “pinch” separation
– Up to 10.1 inch support with correspondingly wider “pinch”
• Number of Channels
– Up to 224 (subject to other configuration limitations)
– Electrode grid configurations up to 20 X by 10 Y lines supported (subject to 30
total pins and a maximum of 14 Y lines) maXTouch™
• maXTouch Touch Key Support
– Up to 32 channels can be allocated as fixed keys (subject to other configurations) 224-channel
• Zero Additional Part Count
– 16 X by 14 Y matrix (224 channels) implementable with power bypass capacitors only
Touchscreen
• Signal Processing
– Advanced digital filtering using both hardware engine and firmware
Sensor IC
– Self-calibration
– Auto drift compensation
– Adjacent Key Suppression® (AKS™) technology mXT224
– Grip and face suppression
– Reports one-touch and two-touch gestures
– Down-scaling and clipping support to match LCD resolution
– Ultra-fast start-up and calibration for best user experience
•
– Supports axis flipping and axis switch-over for portrait and landscape modes
Scan Speed
Summary
– Maximum single touch >250Hz, subject to configuration
– Configurable to allow power/speed optimization
– Programmable timeout for automatic transition from active to idle states
• Response Times
– Initial latency <10 ms for first touch from idle, subject to configuration
• Sensors
– Works with PET or glass sensors
– Works with all proprietary sensor patterns recommended by Atmel®
– Works with passive stylus
• Panel Thickness
– Glass up to 3 mm, screen size dependent
– Plastic up to 1.5 mm, screen size dependent
• Interface
– I2C-compatible slave mode 400 kHz
• Dual-rail Power
– Interface 1.8V to 3.3V nominal, analog 2.7V to 3.3V nominal
• Power Consumption Note: This is a summary document.
– Idle 80Hz: <1.8 mW, subject to configuration A complete document is available
– One Touch Active 80Hz: 3.9 mW, subject to configuration under NDA. For more information
contact www.atmel.com/touchscreen.
– Sleep: 4.5 µW
• Package
– 49-ball UFBGA 5 x 5 x 0.6 mm, 0.65 ball pitch
– 49-ball VFBGA 5 x 5 x 1 mm, 0.65 ball pitch
– 48-pin QFN 6 x 6 x 0.6 mm, 0.4 mm pin pitch
9530BS–AT42–10/09
1. Pinout and Schematic
1.1 Pinout Configuration
1.1.1 49-ball UFBGA/VFBGA
Top View Bottom View

1 2 3 4 5 6 7 7 6 5 4 3 2 1
A A
B B
C C
mXT224
D QT602240 D
E E
F F
G G
1.1.2 48-pin QFN

Y10
Y12
Y11
Y7
Y4
Y3
Y8
Y6
Y5
Y9
Y2
Y1
48 47 46 45 44 43 42 41 40 39 38 37
Y13 1 36 Y0
GND 2 35 GND
AVDD 3 34 AVDD
X8 4 33 X7
X9 5 32 X6
X10 6 31 X5
mXT224
X11 7 30 X4
X12 8 29 X3
X13 9 28 X2
X14 10 27 X1
X15 11 26 X0
GND 12 25 GND
13 14 15 16 17 18 19 20 21 22 23 24
VDD
RESET
N/C
SDA
SCL
GPIO0/SYNC
GPIO1
VDD
GPIO2/SCK
GPIO3/MOSI
ADDR_SEL
CHG
2 mXT224
9530BS–AT42–10/09
mXT224
1.2 Pinout Descriptions
Table 1-1. Pin Listing

Ball Name Type Comments If Unused, Connect To...
A1 AVDD P Analog power –
A2 Y12 I/O Y line connection or X line in extended mode Leave open
A3 Y10 I/O Y line connection or X line in extended mode Leave open
A4 Y8 I Y line connection Leave open
B1 X8 O X matrix drive line Leave open
B2 GND P Ground –
B3 Y11 I/O Y line connection or X line in extended mode Leave open
B4 Y9 I Y line connection Leave open
C1 X10 O X matrix drive line Leave open
C2 X9 O X matrix drive line Leave open
C3 Y13 I/O Y line connection or X line in extended mode Leave open
C4 Y7 I Y line connection Leave open
C5 Y3 I Y line connection Leave open
C6 GND P Ground –
C7 AVDD P Analog power –
D1 X12 O X matrix drive line Leave open
D4 GND P Ground –
E1 X14 O X matrix drive line Leave open
E3 RESET I Reset low; has internal 30 k: to 60 k: pull-up resistor Leave open or Vdd
Input: GND
E4 GPIO1 I/O General purpose I/O
Output: leave open
3
9530BS–AT42–10/09
Table 1-1. Pin Listing (Continued)
Ball Name Type Comments If Unused, Connect To...
F1 VDD P Digital power –
F2 GND P Ground –
F3 SCL OD Serial Interface Clock –
GPIO3/ General purpose I/O / Input: GND
F4 I/O
MOSI Debug data Output: leave open
F5 GND P Ground –
F6 CHG OD State change interrupt –
F7 X2 O X matrix drive line Leave open
G1 N/C – No connection Leave open
G2 SDA OD Serial Interface Data –
GPIO0/ General purpose I/O Input: GND
G3 I/O
SYNC External synchronization Output: leave open
G4 I/O
SCK Debug clock Output: leave open
G5 VDD P Digital power –
2
G6 ADDR_SEL I I C-compatible address select –
G7 X0 O X matrix drive line Leave open
I Input only I/O Input and output

O Output only, push-pull OD Open drain output
P Ground or power
4 mXT224
9530BS–AT42–10/09
mXT224
1.2.2 48-pin QFN
Table 1-2. Pin Listing

Pin Name Type Comments If Unused, Connect To...
1 Y13 I/O Y line connection or X line in extended mode Leave open
2 GND P Ground –
3 AVDD P Analog power –
4 X8 O X matrix drive line Leave open
12 GND P Ground –
13 VDD P Digital power –
14 RESET I Reset low; has internal 30 k: to 60 k: pull-up resistor Leave open or Vdd
15 N/C – No connection Leave open
16 SDA OD Serial Interface Data –
17 SCL OD Serial Interface Clock –
GPIO0/ General purpose I/O Input: GND
18 I/O
SYNC External synchronization Output: leave open
Input: GND
19 GPIO1 I/O General purpose I/O
Output: leave open
20 VDD P Digital power –
21 I/O
SCK Debug clock Output: leave open
22 I/O
MOSI Debug data Output: leave open
23 ADDR_SEL I I2C-compatible address select –
24 CHG OD State change interrupt –
25 GND P Ground –
5
9530BS–AT42–10/09
Table 1-2. Pin Listing (Continued)
Pin Name Type Comments If Unused, Connect To...
34 AVDD P Analog power –
35 GND P Ground –
36 Y0 I Y line connection Leave open
I Input only I/O Input and output

O Output only, push-pull OD Open drain output
P Ground or power
6 mXT224
9530BS–AT42–10/09
mXT224
1.3 Schematic
Regulated Regulated NOTE: Bypass capacitors must be X7R or

VDD AVDD X5R and placed <5 mm away from chip.
100 nF 1 !F 100 nF 1 !F
G5
C7
A1
F1
G7
VDD
VDD
AVDD
AVDD
X0
E5
X1
F7
E4 X2
GPIO1 E6
X3
G4 E7
GPIO2/SCK X4
MATRIX X DRIVE
F4 D6
VDD GPIO3/MOSI X5
D7
X6
D5
X7
B1
X8
Rp Rp QT602240
mXT224
X9
C2
C1
X10
D3
G2 X11
SDA SDA D1
2
I C-COMPATIBLE F3
X12
SCL SCL D2
X13
E1
G1 X14
N/C X15
E2
VDD E3
RESET C3
X16/Y13
Y OR X*
MATRIX
A2
G3 X17/Y12
GPIO0/SYNC B3
X18/Y11
Rc A3
X19/Y10
F6
CHG B4
CHG Y9
A4
MATRIX Y SCAN IN
2
I C-COMPATIBLE G6 Y8
ADDR_SEL Y7
C4
ADDRESS SELECT
B2 A5
GND Y6
B5
C6 Y5
GND Y4
A6
D4 C5
GND Y3
A7
F2 Y2
GND B6
Y1
F5 B7
GND Y0
* NOTE: Y10 to Y13 scan lines may be

used as additional X drive lines in
extended mode (a 100" resistor must
be added to each additional line).
7
9530BS–AT42–10/09
1.3.2 48-pin QFN
Regulated Regulated NOTE: Bypass capacitors must be X7R or

VDD AVDD X5R and placed <5 mm away from chip.
100 nF 1 !F 100 nF 1 !F
13
20
34
3
26
VDD
VDD
AVDD
AVDD
X0
27
X1
28
19 X2
GPIO1 29
X3
21 30
GPIO2/SCK X4
MATRIX X DRIVE
22 31
VDD GPIO3/MOSI X5
32
X6
33
X7
4
X8
Rp Rp QT602240
mXT224
X9
5
6
X10
7
16 X11
SDA SDA 8
2
I C-COMPATIBLE 17
X12
SCL SCL 9
X13
10
15 X14
N/C X15
11
VDD 14
RESET 1
X16/Y13
Y OR X*
MATRIX
48
18 X17/Y12
GPIO0/SYNC 47
X18/Y11
Rc 46
X19/Y10
24
CHG 45
CHG Y9
44
MATRIX Y SCAN IN
2
I C-COMPATIBLE 23 Y8
ADDR_SEL Y7
43
ADDRESS SELECT
42
Y6
41
2 Y5
GND Y4
40
12 39
GND Y3
38
25 Y2
GND 37
Y1
35 36
GND Y0
* NOTE: Y10 to Y13 scan lines may be

used as additional X drive lines in
extended mode (a 100" resistor must
be added to each additional line).
8 mXT224
9530BS–AT42–10/09
mXT224
2. Overview of the mXT224
2.1 Introduction
The mXT224 (AT42QT602240) uses a unique charge-transfer acquisition engine to implement
the QMatrix™ capacitive sensing method patented by Atmel®. This allows the measurement of
up to 224 mutual capacitance nodes in under 1 ms. Coupled with a state-of-the-art XMEGA™
CPU, the entire touchscreen sensing solution can measure, classify and track a single finger
touch every 4 ms if required.
The acquisition engine uses an optimal measurement approach to ensure almost complete
immunity from parasitic capacitance on the receiver inputs (Y lines). The engine includes
sufficient dynamic range to cope with touchscreen mutual capacitances spanning 0.5 pF to 5 pF,
allowing great flexibility for use with Atmel’s proprietary ITO pattern designs. One and two layer
ITO sensors are possible using glass or PET substrates.
The main AVR ® XMEGA CPU has, under its control, two powerful, yet low power,
microsequencer coprocessors. These combine to allow the signal acquisition, preprocessing,
postprocessing and housekeeping to be partitioned in an efficient and flexible way. This gives
ample scope for sensing algorithms, touch tracking or advanced shape-based filtering. An
in-circuit reflash can be performed over the chip’s hardware-driven two-wire interface
(I2C-compatible).
Overall, the mXT224 represents a step improvement over competing technologies, providing a
near optimal mix of low power, small size and low part count, while offering unrivalled true
multitouch performance.
9
9530BS–AT42–10/09
Revision History
Revision Number History

Revision AS – September 2009 Initial release for chip revision 1.4
Revision BS – October 2009 QFN package details added
10 mXT224
9530BS–AT42–10/09
mXT224
Notes
11
9530BS–AT42–10/09
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Product Contact
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www.atmel.com touch@atmel.com www.atmel.com/contacts
Literature Requests
www.atmel.com/literature
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© 2009 Atmel Corporation. All rights reserved. Atmel®, Atmel logo and combinations thereof, AVR ®, Adjacent Key Suppression ® and others are
registered trademarks, maXTouch™, AKS ™, QMatrix ™, XMEGA ™ and others are trademarks of Atmel Corporation or its subsidiaries. Other terms
and product names may be registered trademarks or trademarks of others.
9530BS–AT42–10/09

Datasheet For mXT224

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Datasheet For mXT224

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Features

1.1 Pinout Configuration

1.1.1 49-ball UFBGA/VFBGA

Top View Bottom View

1.1.2 48-pin QFN

1.2 Pinout Descriptions

1.2.1 49-ball UFBGA/VFBGA

Table 1-1. Pin Listing

I Input only I/O Input and output

1.2.2 48-pin QFN

Table 1-2. Pin Listing

I Input only I/O Input and output

1.3.1 49-ball UFBGA/VFBGA

Regulated Regulated NOTE: Bypass capacitors must be X7R or

* NOTE: Y10 to Y13 scan lines may be

Regulated Regulated NOTE: Bypass capacitors must be X7R or

* NOTE: Y10 to Y13 scan lines may be

2. Overview of the mXT224

Revision Number History

Atmel Corporation Atmel Asia Atmel Europe Atmel Japan

Touch Technology Division

Web Site Technical Support Sales Contact

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