P-Ni electroless deposits are used as a finish on many substrates. A clear, thin, dark line was observed to be developing at the interface between the Ni and Ni-Sn IMC layers. This interface is usually not very easily distinguishable initially after soldering to Ni deposits.
P-Ni electroless deposits are used as a finish on many substrates. A clear, thin, dark line was observed to be developing at the interface between the Ni and Ni-Sn IMC layers. This interface is usually not very easily distinguishable initially after soldering to Ni deposits.
P-Ni electroless deposits are used as a finish on many substrates. A clear, thin, dark line was observed to be developing at the interface between the Ni and Ni-Sn IMC layers. This interface is usually not very easily distinguishable initially after soldering to Ni deposits.
Attached is a partial copy of some work we conducted at Alpha as a result of a large
number of failure analyses we determined were related to electroless Ni deposits. Over the past few years we have seen many failures that appeared to indicate a relationship of the failures to P-Ni electroless deposits used as a finish on many substrates. It was my initial hypothesis that the P was accumulating at the interface between the electroless P-Ni and the Ni-Sn intermetallic compound (IMC) layer being formed with the Sn in the solder. My reasoning being that since the P in the Ni deposit was not taking part in the reaction with the solder, it would be accumulating somewhere in the microstructure of the solder connection. After looking at hundreds of metallographically prepared cross-sections of failures where P-Ni was involved, I began to see some clues that supported the proposed hypothesis. All of the failures observed were taking place at the interface between the Ni and Ni-Sn IMC layers. A clear, thin, dark line was observed to be developing at the interface between the Ni and Ni-Sn IMC. This interface is usually not very easily distinguishable initially after soldering to Ni deposits, especially the electrolytic Ni deposits which do not possess occluded P. As our knowledge base grew, we saw more of the same evidence in our investigations of other failures of this type. In several instances we were fortunate to have very severe widespread failures on many assemblies submitted by particular sources. In these instances, we were able to observe failures at almost every stage of development. We saw interfaces with no distinct interfacial darkening that I was relating to the P build-up. We also observed various stages of darkening where the interface between the Ni and Ni-Sn IMC was becoming distinctly clear. And finally, we observed the various stages of separation along with complete failure of the connections. Subsequently, we examined several samples using an SEM with X-ray analysi s capabilities and were able to confirm our hypothesis. We were also fortunate to have some complete assemblies with a good number of BGA components that were failing electrical testing. The motherboard to which the BGA's were attached was coated with electroless P-Ni and immersion Au. Metallographically prepared cross-sections of various BGA's on this assembly revealed the various conditions that I've described in the previous text herein. All stages of the failure development were observed, from no indication of interfacial darkening that we suspected to be P, to complete separation and total failure of the connections. To confirm our P buildup hypothesis, we took a portion of the assembly that had not been used for metallographic analyses and carefully and deliberately lifted a couple of BGA components from the motherboard by mechanical means to examine the failure surfaces. In particular, we were interested in the failures at the Ni interface on the motherboard where the P-Ni coating was present. We then took the two (2) mating BGA parts (BGA components and their Motherboard attachment sites) and conducted analyses of a number of failed surfaces on both sides. The P readings on the board side failure surfaces were discovered to be much higher than those on the detached solder ball failure surfaces. Therefore, we began to survey a large number of board side failure surfaces and compared the P values to the values determined by our analyses of the P-Ni layers taken on the metallographic cross-sections. We discovered that the average value of all the P measurements taken on the board side failed surfaces were ~44%P. The average value of the measurements taken on the P-Ni cross-sections was ~13%. The selected acceleration potential of the incident beam used to make these determinations was 10keV. We determined this, by experimentation, to produce reasonable surface readings with a minimal effect of the underlying P-Ni coating. The anlayses, on the whole, indicate P is definitely present at the failure surfaces, primarily adherent to the P-Ni surface, with lower levels on the Ni-Sn IMC surface on the detached solder balls. It is a fact that P-Ni coatings are usually more solderable than electrolytically applied coatings, as claimed by the suppliers of plating solutions and react more quickly with the solders to form IMC layers at their interfaces. Unfortunately, this beneficial characteristic becomes one that is detrimental to reliability when the assemblies are subjected to multiple soldering operations and other thermal excursions in service. When this occurs, the continued diffusion between the Sn in the solder and the P-Ni coating results in a weakened bond between the P-Ni and the Ni-Sn IMC reaction layer as the P concentration becomes elevated at this interface. We usually recommend that the P level of the deposit be kept as low as possible without too badly impairing the beneficial properties imparted by its presence in the Ni deposit. If the P level is too low, there is a risk of corrosion when applying the immersion Au coating over the P-Ni. If it is too high, the risk of premature P buildup and failures is increased. There are always trade-offs. Control of the P levels is usually accomplished by adjusting and controlling some of the critical plating solution parameters. I have attached some photomicrographs that illustrate many of the observations we've made over the course of the last few years relative to this topic. I hope this background and the associated photomicrographs are some help to you. If any questions and/or comments arise as you consider these findings, please feel free to contact me so that we may address them together.
Laser Assisted Transfer of Solder Material From A Solid - State Solder Layer For Mask-Less Formation of Micro Solder Depots On Cu-Pillars and ENIG Pad Structures