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Introduction

Thank you for purchasing a SYSMAC CP-series CP1E Programmable Controller.


This manual contains information required to use the CP1E. Read this manual completely and be sure
you understand the contents before attempting to use the CP1E.

Intended Audience
This manual is intended for the following personnel, who must also have knowledge of electrical sys-
tems (an electrical engineer or the equivalent).
Personnel in charge of installing FA systems
Personnel in charge of designing FA systems
Personnel in charge of managing FA systems and facilities

Applicable Products

z Definition of the CP Series


The CP Series is centered around the CP1H, CP1L, and CP1E CPU Units and is designed with the
same basic architecture as the CS and CJ Series.
Always use CP-series Expansion Units and CP-series Expansion I/O Units when expanding I/O
capacity. I/O words are allocated in the same way as for the CPM1A/CPM2A PLCs, i.e., using fixed
areas for inputs and outputs.

CS/CJ/CP Series

CS Series CJ Series CP Series

CS1-H CPU Units CJ1-H CPU Units


CP1H CPU Units
CS1H-CPUH CJ1H-CPUH
CS1G-CPUH CJ1G-CPUH CP1H-X-
CJ1G-CPUP CP1H-XA-
CS1 CPU Units (Loop CPU Unit) CP1H-Y-

CS1H-CPU(-V1) CJ-series Special I/O Units


CS1G-CPU(-V1) CJ1M CPU Unit
CJ-series CPU Bus Units
CJ1M-CPU
CS1D CPU Units
CS1D CPU Units for CP1L CPU Units
Duplex-CPU System CJ1 CPU Unit
CS1D-CPUH
CP1L-L10D-
CJ1G-CPU CP1L-L14D-
CS1D CPU Units for
CP1L-L20D-
Single-CPU System
CP1L-M30D-
CS1D-CPUS
CP1L-M40D-
CS1D Process CPU Units CP1L-M60D-

CS1D-CPUP

CPM1A-series Expansion I/O Units

CS-series Basic I/O Units CJ-series Basic I/O Units CPM1A-series Expansion Units

CS-series Special I/O Units CJ-series Special I/O Units


CP1E CPU Units
CS-series CPU Bus Units CJ-series CPU Bus Units
CP1E-ED-A
CS-series Power Supply Units CJ-series Power Supply Units CP1E-ND-A
Note: Products specifically for the CS1D
Series are required to use CS1D
CP-series Expansion I/O Units*

CP-series Expansion Units*

* Expansion I/O Units and Expansion Units cannot be connected to CP1E CPU Units with 20 I/O Points.

CP1E CPU Unit Software Users Manual(W480) 1


CP1E CPU Unit Manuals
Information on the CP1E CPU Units is provided in the following manuals.
Refer to the appropriate manual for the information that is required.

This Manual
CP1E Hardware Users CP1E Software Users CP1E Instructions Reference
Manual(Cat. No. W479) Manual(Cat. No. W480) Manual(Cat. No. W483)
Mounting and
1 Setting Hardware
Names and specifications of the parts of all Units
Basic system configuration for each CPU Unit
Connection methods for Expansion I/O Units
and Expansion Units

2 Wiring

Wiring methods for the power supply


Wiring methods between external I/O devices
and Expansion I/O Units or Expansion Units
Connecting
3 Online to the PLC

Connecting Cables for CX-Programmer for Procedures for connecting the


ULC Support Software CX-Programmer for ULC Support Software

4 Software Setup
Software setting methods for the CPU
Units (PLC Setup)

5 Creating the Program


Program types and basic information Detailed information on
CPU Unit operation programming instructions
Internal memory
Built-in CPU functions
Settings

Checking and
6 Debugging Operation
Checking I/O wiring, setting the Auxiliary Area
settings, and performing trial operation
Monitoring and debugging with the
Maintenance and CX-Programmer
7 Troubleshooting

Error codes and remedies if a problem occurs

2 CP1E CPU Unit Software Users Manual(W480)


Manual Configuration
The CP1E CPU manuals are organized in the sections listed in the following tables. Refer to the appro-
priate section in the manuals as required.

CP1E Software Users Manual (Cat. No. W480) (This Manual)


Section Contents
Section 1 Overview and SYSMAC This section gives an overview of the CP1E, describes its features and
Features application procedures, and describes the features of SYSMAC PLCs.
Section 2 CPU Unit Memory This section describes the internal memory in a CP1E CPU Unit.
Section 3 CPU Unit Operation This section describes the operation of a CP1E CPU Unit.
Section 4 Initial Settings for CPU This section describes the initial settings required for a CP1E CPU Unit.
Unit
Section 5 Programming Concepts This section provides basic information on designing ladder programs
for the CP1E.
Section 6 I/O Memory This section describes the I/O memory areas in a CP1E CPU Unit.
Section 7 File Operations File operations cannot be used with the CP1E.
Section 8 I/O Allocation This section describes I/O allocation in a CP1E CPU Unit.
Section 9 PLC Setup This section describes the PLC Setup of a CP1E CPU Unit.
Section 10 Overview and Allocation This section lists the built-in functions and describes the overall applica-
of Built-in Functions tion flow and the allocation of the functions.
Section 11 Quick-response Inputs This section describes the quick-response inputs that can be used to
read signals that are shorter than the cycle time.
Section 12 Interrupts This section describes the interrupts that can be used with CP1E PLCs,
including input interrupts and scheduled interrupts.
Section 13 High-speed Counters This section describes the high-speed counter inputs, high-speed
counter interrupts, and the frequency measurement function.
Section 14 Pulse Outputs This section describes positioning functions such as trapezoidal control,
jogging, and origin searches.
Section 15 PWM Outputs This section describes the variable-duty-factor (PWM) pulse outputs.
Section 16 Serial Communications This section describes communications with Programmable Terminals
(PTs) without using communications programming, no-protocol commu-
nications with general components, and connections with a Modbus-
RTU Easy Master, Serial PLC Link, and host computer.
Section 17 Built-in Functions This section describes PID temperature control, analog adjusters, the
minimum cycle time, clock functions, memory management, security
functions, debugging, and other functions.
Section 18 Operating the Program- This section describes basic functions of the CX-Programmer for CP1E,
ming Device such as using the CX-Programmer for CP1E to write ladder programs to
control the CP1E, to transfer the programs to the CP1E, and to debug
the programs.
Section 19 CPU Unit Cycle Time This section describes the cycle time of a CP1E CPU Unit.
Appendices The appendices provide lists of programming instructions, the Auxiliary
Area, instruction execution times, sample ladder programming, and a
comparison with the CP1L.

CP1E CPU Unit Software Users Manual(W480) 3


CP1E Hardware Users Manual (Cat. No. W479)
Section Contents
Section 1 Overview and Specifica- This section gives an overview of the CP1E, describes its features, and
tions provides its specifications.
Section 2 Basic System Configura- This section describes the basic system configuration and Unit models.
tion and Devices
Section 3 Part Names and Functions This section provides the names and the parts of the CPU Unit, Expan-
sion I/O Units, and Expansion Units in a CP1E PLC and describes
CP1E functions.
Section 4 Programming Device This section describes the features of the CX-Programmer for CP1E
used for programming and debugging PLCs, as well as how to connect
the PLC with the Programming Device.
Section 5 Installation and Wiring This section describes how to install and wire CP1E Units.
Section 6 Troubleshooting This section describes how to troubleshoot problems that may occur
with a CP1E PLC, including the error indications provided by the CP1E
Units.
Section 7 Maintenance and Inspec- This section describes periodic inspections, the service life of the Bat-
tion tery, and how to replace the Battery.
Section 8 Backup Operations The easy backup function and the PLC Backup Tool cannot be used
with the CP1E.
Section 9 Using Expansion Units This section describes application methods for Expansion Units.
and Expansion I/O Units
Appendices The appendices provide information on model numbers, dimensions,
wiring diagrams, and wiring serial communications.

4 CP1E CPU Unit Software Users Manual(W480)


Manual Structure

Page Structure and Icons

The following page structure and icons are used in this manual.

5 Installation and wiring


Level 1 heading
Level 2 heading
Level 2 heading 5-2 Installation Level 3 heading
Gives the current
Level 3 heading 5-2-1 Installation Location
headings.

DIN Track Installation

Step in a procedure 1

5-2 Installation
Use a screwdriver to pull down the DIN Track mounting pins from the back of the Units to release
them, and mount the Units to the DIN Track.

Indicates a step in a
procedure.
DIN Track mounting pins
5 Page tab
Release Gives the number

5-2-1 Installation Location


2 Fit the back of the Units onto the DIN Track by catching the top of the Units on the Track and then of the section.
pressing in at the bottom of the Units, as shown below.

DIN Track

3 Press in all of the DIN Track mounting pins to securely lock the Units in place.

Special Information
(See below.)
Icons are used to indicate
precautions and
additional information. DIN Track mounting pins

Precautions for Correct Use


Tighten terminal block screws and cable screws to the following torques.
M4: 1.2 Nm
M3: 0.5 Nm

Manual name CP1E CPU Unit Hardware Users Manual(W479) 5-3

This illustration is provided only as a sample and may not literally appear in this manual.

Special Information
Special information in this manual is classified as follows:

Precautions for Safe Use


Precautions on what to do and what not to do to ensure using the product safely.

Precautions for Correct Use


Precautions on what to do and what not to do to ensure proper operation and performance.

Additional Information
Additional information to increase understanding or make operation easier.

References to the location of more detailed or related information.

CP1E CPU Unit Software Users Manual(W480) 5


Sections in this Manual

1 10

2 11
Overview and Overview of Built-in Functions
1 SYSMAC Features 10 and Allocations
3 12
Internal Memory in
2 the CPU Unit 11 Quick-response Inputs
4 13

3 CPU Unit Operation 12 Interrupts


5 14

CPU Unit
4 Initialization 13 High-speed Counters 6 15

Understanding 7 16
5 Programming 14 Pulse Outputs

8 17
6 I/O Memory 15 PWM Outputs

9 18
Serial
7 File Operations 16 Communications

8 I/O Allocation 17 Other Functions

9 PLC Setup 18

6 CP1E CPU Unit Software Users Manual(W480)


CONTENTS
Introduction............................................................................................................... 1

CP1E CPU Unit Manuals .......................................................................................... 2

Manual Structure ...................................................................................................... 5

Safety Precautions ................................................................................................. 16

Precautions for Safe Use ....................................................................................... 22

Operating Environment Precautions .................................................................... 25

Regulations and Standards ................................................................................... 26

Related Manuals ..................................................................................................... 28

Section 1 Overview and SYSMAC Features


1-1 CP1E Overview ........................................................................................................................ 1-2
1-1-1 Overview of Features.................................................................................................................. 1-2
1-1-2 Features...................................................................................................................................... 1-3
1-1-3 CP1E CPU Unit Types ................................................................................................................ 1-8
1-2 Basic Operating Procedure .................................................................................................... 1-9
1-3 SYSMAC PLC Operation and Programming Features ....................................................... 1-10
1-3-1 PLC Setup ................................................................................................................................ 1-10
1-3-2 Operating Mode at Startup: RUN Mode.................................................................................... 1-11
1-3-3 I/O Allocation and Notation ....................................................................................................... 1-12
1-3-4 Specifying I/O Memory Addresses ........................................................................................... 1-13
1-3-5 CP1E Data: Normally Hexadecimal.......................................................................................... 1-14
1-3-6 Condition Flags......................................................................................................................... 1-15
1-3-7 Control Data that Sets the Instruction Function ........................................................................ 1-16

Section 2 Internal Memory in the CPU Unit


2-1 Internal Memory in the CPU Unit............................................................................................ 2-2
2-1-1 CPU Unit Memory Backup.......................................................................................................... 2-2
2-1-2 Memory Areas and Stored Data ................................................................................................. 2-4
2-1-3 Transferring Data from a Programming Device to the Internal Memory in the CPU Unit............ 2-5

Section 3 CPU Unit Operation


3-1 CPU Unit Operation ................................................................................................................. 3-2
3-1-1 Overview of CPU Unit Operation ................................................................................................ 3-2
3-1-2 CPU Unit Operating Modes ........................................................................................................ 3-3
3-1-3 Load OFF Function..................................................................................................................... 3-6
3-1-4 Operation for Power Interruptions ............................................................................................... 3-7
3-2 Backing Up Memory .............................................................................................................. 3-10
3-2-1 CPU Unit Memory Configuration .............................................................................................. 3-10
3-2-2 Backing Up Ladder Programs and PLC Setup ......................................................................... 3-11
3-2-3 I/O Memory Backup during Power Interruptions....................................................................... 3-11

CP1E CPU Unit Software Users Manual(W480) 7


Section 4 CPU Unit Initialization
4-1 CPU Unit Initial Settings ......................................................................................................... 4-2
4-1-1 CPU Unit Initial Settings.............................................................................................................. 4-2
4-2 PLC Setup ................................................................................................................................ 4-4
4-2-1 PLC Setup Defaults..................................................................................................................... 4-4

Section 5 Understanding Programming


5-1 Programming ........................................................................................................................... 5-2
5-1-1 Programs..................................................................................................................................... 5-2
5-1-2 Program Capacity ....................................................................................................................... 5-3
5-1-3 Basics of Programming ............................................................................................................... 5-3
5-2 Tasks, Sections, and Symbols ............................................................................................... 5-7
5-2-1 Overview of Tasks ....................................................................................................................... 5-7
5-2-2 Overview of Sections .................................................................................................................. 5-7
5-2-3 Overview of Symbols .................................................................................................................. 5-7
5-3 Programming Instructions...................................................................................................... 5-9
5-3-1 Operands .................................................................................................................................... 5-9
5-3-2 Instruction Variations................................................................................................................. 5-10
5-3-3 Execution Conditions ................................................................................................................ 5-10
5-3-4 Specifying Data in Operands .................................................................................................... 5-13
5-3-5 Data Formats ............................................................................................................................ 5-14
5-3-6 I/O Refresh Timing .................................................................................................................... 5-16
5-4 Constants: &, #, +, -, and Numbers without Symbols ........................................................ 5-17
5-5 Specifying Offsets for Addresses ........................................................................................ 5-21
5-5-1 Overview ................................................................................................................................... 5-21
5-5-2 Application Examples for Address Offsets ................................................................................ 5-23
5-6 Checking Programs............................................................................................................... 5-25
5-6-1 Checking during Input Operations from the CX-Programmer ................................................... 5-25
5-6-2 Program Checks with the CX-Programmer for CP1E ............................................................... 5-25
5-6-3 Debugging with the Simulator ................................................................................................... 5-26
5-6-4 Program Execution Check......................................................................................................... 5-28
5-7 Ladder Programming Precautions....................................................................................... 5-31
5-7-1 Ladder Programming Precautions ............................................................................................ 5-31
5-7-2 Special Program Sections......................................................................................................... 5-35

Section 6 I/O Memory


6-1 Overview of I/O Memory Areas............................................................................................... 6-2
6-1-1 I/O Memory Areas....................................................................................................................... 6-2
6-1-2 I/O Memory Area Address Notation ............................................................................................ 6-5
6-1-3 I/O Memory Areas....................................................................................................................... 6-6
6-2 I/O Bits ..................................................................................................................................... 6-7
6-3 Work Area (W) .......................................................................................................................... 6-8
6-4 Holding Area (H) ...................................................................................................................... 6-9
6-5 Data Memory Area (D) ........................................................................................................... 6-11
6-6 TR Area (TR)........................................................................................................................... 6-13
6-7 Timer Area (T) ........................................................................................................................ 6-15
6-8 Counter Area (C) .................................................................................................................... 6-17
6-9 Auxiliary Area (A)................................................................................................................... 6-19
6-10 Condition Flags (P_).............................................................................................................. 6-21

8 CP1E CPU Unit Software Users Manual(W480)


6-11 Clock Pulses (P_) .................................................................................................................. 6-23

Section 7 File Operations

Section 8 I/O Allocation


8-1 Allocation of Input Bits and Output Bits ............................................................................... 8-2
8-1-1 I/O Allocation .............................................................................................................................. 8-2
8-1-2 I/O Allocation Concepts .............................................................................................................. 8-3
8-1-3 Allocations on the CPU Unit ....................................................................................................... 8-3
8-1-4 Allocations to Expansion Units and Expansion I/O Units............................................................ 8-4

Section 9 PLC Setup


9-1 Overview of the PLC Setup..................................................................................................... 9-2
9-2 PLC Setup Settings ................................................................................................................. 9-3
9-2-1 Startup and CPU Unit Settings ................................................................................................... 9-3
9-2-2 Timing, Interrupt, and Peripheral Servicing Settings .................................................................. 9-4
9-2-3 Input Constant Settings .............................................................................................................. 9-5
9-2-4 Serial Port 1 Settings (Built-in RS-232C Port for N-type CPU Units).......................................... 9-5
9-2-5 Serial Port 2 (N-type CP1E CPU Unit with 30 or 40 I/O Points) ................................................. 9-8
9-2-6 Built-in Inputs ............................................................................................................................ 9-12
9-2-7 Pulse Output 0 Settings ............................................................................................................ 9-14
9-2-8 Pulse Output 1 Settings ............................................................................................................ 9-16

Section 10 Overview of Built-in Functions and Allocations


10-1 Built-in Functions .................................................................................................................. 10-2
10-2 Overall Procedure for Using CP1E Built-in Functions ....................................................... 10-3
10-3 Allocations for Built-in Functions ........................................................................................ 10-4
10-3-1 Allocation of CPU Units Built-in I/O Terminals ......................................................................... 10-4
10-3-2 Specifying the Functions to Use ............................................................................................... 10-5
10-3-3 Selecting Functions in the PLC Setup ...................................................................................... 10-5
10-3-4 Allocating Built-in Inputs ........................................................................................................... 10-6
10-3-5 Allocating Built-in Output Temrinals .......................................................................................... 10-9

Section 11 Quick-response Inputs


11-1 Quick-response Inputs.......................................................................................................... 11-2
11-1-1 Overview................................................................................................................................... 11-2
11-1-2 Flow of Processing ................................................................................................................... 11-3

Section 12 Interrupts
12-1 Interrupts ................................................................................................................................ 12-2
12-1-1 CP1E Interrupts ........................................................................................................................ 12-2
12-2 Input Interrupts ...................................................................................................................... 12-3
12-2-1 Overview................................................................................................................................... 12-3
12-2-2 Flow of Operation ..................................................................................................................... 12-4
12-2-3 Application Example for Input Interrupts................................................................................... 12-8
12-3 Scheduled Interrupts........................................................................................................... 12-11
12-3-1 Overview................................................................................................................................. 12-11

CP1E CPU Unit Software Users Manual(W480) 9


12-3-2 Flow of Operation.................................................................................................................... 12-12
12-4 Precautions for Using Interrupts........................................................................................ 12-15
12-4-1 Interrupt Task Priority and Order of Execution ........................................................................ 12-15
12-4-2 Auxiliary Area Words and Bits Related to Interrupts ............................................................... 12-15
12-4-3 Duplicate Processing in Cyclic and Interrupt Tasks ................................................................ 12-15

Section 13 High-speed Counters


13-1 Overview and Flow of Processing ....................................................................................... 13-2
13-1-1 Overview ................................................................................................................................... 13-2
13-1-2 Flow of Processing.................................................................................................................... 13-3
13-1-3 Specifications ............................................................................................................................ 13-8
13-2 High-speed Counter Inputs................................................................................................... 13-9
13-2-1 Pulse Input Method (Input Setting)............................................................................................ 13-9
13-2-2 Counting Modes: Linear Mode and Ring Mode....................................................................... 13-10
13-2-3 Reset Methods ........................................................................................................................ 13-11
13-2-4 Reading the Present Value of a High-speed Counter ............................................................. 13-12
13-2-5 High-speed Counter Frequency Measurement ....................................................................... 13-12
13-3 High-speed Counter Interrupts........................................................................................... 13-14
13-3-1 Overview ................................................................................................................................. 13-14
13-3-2 Target Value Comaprison and Range Comparison................................................................. 13-17
13-4 Auxiliary Area Bits and Words Used with High-speed Counters .................................... 13-25
13-5 Application Example of High-speed Counter Interrupt.................................................... 13-26

Section 14 Pulse Outputs


14-1 Overview and Flow of Processing ....................................................................................... 14-3
14-1-1 Overview ................................................................................................................................... 14-3
14-1-2 Flow of Processing.................................................................................................................... 14-4
14-1-3 Pulse Output Specifications ...................................................................................................... 14-8
14-2 Trapezoidal Control ............................................................................................................... 14-9
14-2-1 Determine the Pulse Output Port, Output Method, and Output Waveform ............................... 14-9
14-2-2 Relative Pulse Outputs and Absolute Pulse Outputs ................................................................ 14-9
14-2-3 Operations Affecting the Origin Status (Defined/Undefined Status) ....................................... 14-11
14-2-4 Programming Example for Trapezoidal Control....................................................................... 14-11
14-3 Jogging................................................................................................................................. 14-13
14-3-1 Determine the Pulse Output Port and Pulse Output Method .................................................. 14-13
14-3-2 Pulse Waveform and Applicable Instructions .......................................................................... 14-13
14-3-3 Programming Example for Jogging ......................................................................................... 14-14
14-4 Performing Origin Searches ............................................................................................... 14-16
14-4-1 Origin Searches ...................................................................................................................... 14-16
14-4-2 Flow of Processing.................................................................................................................. 14-17
14-4-3 Setting the Pulse Output Port and Pulse Output Method........................................................ 14-17
14-4-4 Settings in PLC Setup ............................................................................................................. 14-20
14-4-5 Applicable Instructions ............................................................................................................ 14-22
14-4-6 Details on the Origin Search Function .................................................................................... 14-23
14-4-7 Origin Search Examples ......................................................................................................... 14-30
14-5 Returning to the Origin ....................................................................................................... 14-33
14-6 Changing/Reading the Pulse Output Present Value......................................................... 14-34
14-6-1 Changing the Present Value of the Pulse Output.................................................................... 14-34
14-6-2 Reading the Present Value of a Pulse Output......................................................................... 14-34
14-7 Auxiliary Area Bits and Words Used with Pulse Outputs ................................................ 14-36
14-8 Pulse Output Application Examples .................................................................................. 14-37
14-8-1 Example 1: Cutting Long Material Using Fixed Feeding ......................................................... 14-37
14-8-2 Example 2: Vertically Conveying PCBs (Multiple Progressive Positioning)............................. 14-40

10 CP1E CPU Unit Software Users Manual(W480)


14-8-3 Example 3: Feeding Wrapping Material: Interrupt Feeding .................................................... 14-45
14-9 Precautions When Using Pulse Outputs ........................................................................... 14-48
14-10Pulse Output Details ........................................................................................................... 14-53
14-10-1 Continuous Mode (Speed Control) ......................................................................................... 14-53
14-10-2 Independent Mode (Positioning) ............................................................................................. 14-55

Section 15 PWM Outputs


15-1 Variable-duty-factor Pulse Outputs (PWM Outputs)........................................................... 15-2
15-1-1 Overview................................................................................................................................... 15-2

Section 16 Serial Communications


16-1 Serial Communications......................................................................................................... 16-3
16-1-1 Types of CPU Units and Serial Ports ........................................................................................ 16-3
16-1-2 Overview of Serial Communications......................................................................................... 16-4
16-1-3 Built-in RS-232C Port for N-type CPU Units ............................................................................. 16-5
16-1-4 Optional Serial Communications Board for N-type CPU Units with 30 or 40 I/O Points ........... 16-6
16-2 Wiring for Serial Communications....................................................................................... 16-9
16-2-1 Recommended RS-232C Wiring Example ............................................................................... 16-9
16-2-2 Recommended RS-422A/485 Wiring Examples..................................................................... 16-10
16-2-3 Converting the Built-in RS-232C Port to RS-422A/485 .......................................................... 16-11
16-2-4 Reducing Electrical Noise for External Wiring ........................................................................ 16-14
16-3 Program-free Communications with Programmable Terminals ...................................... 16-15
16-3-1 OVERVIEW............................................................................................................................. 16-15
16-3-2 Flow of Processing ................................................................................................................. 16-16
16-3-3 PLC Setup and PT System Menu........................................................................................... 16-16
16-3-4 Wiring Examples for PTs ........................................................................................................ 16-17
16-4 No-protocol Communications with General Components............................................... 16-19
16-4-1 Overview................................................................................................................................. 16-19
16-4-2 Flow of Processing ................................................................................................................. 16-20
16-4-3 PLC Setup .............................................................................................................................. 16-20
16-4-4 Device Wiring Examples......................................................................................................... 16-21
16-4-5 Related Auxiliary Area Bits and Words................................................................................... 16-23
16-5 Modbus-RTU Easy Master Function .................................................................................. 16-24
16-5-1 Overview................................................................................................................................. 16-24
16-5-2 Flow of Processing ................................................................................................................. 16-24
16-5-3 DM Fixed Allocation Words for the Modbus-RTU Easy Master .............................................. 16-25
16-5-4 Programming Examples ......................................................................................................... 16-27
16-6 Serial PLC Links .................................................................................................................. 16-33
16-6-1 Overview................................................................................................................................. 16-33
16-6-2 Flow of Processing ................................................................................................................. 16-34
16-6-3 PLC Setup .............................................................................................................................. 16-34
16-6-4 Wiring Example for PLCs........................................................................................................ 16-35
16-6-5 Specifications.......................................................................................................................... 16-37
16-6-6 Example Application ............................................................................................................... 16-42
16-7 Connecting the Host Computer (Not Including Support Software) ................................ 16-44
16-7-1 Overview................................................................................................................................. 16-44
16-7-2 Flow of Processing ................................................................................................................. 16-44

Section 17 Other Functions


17-1 PID Temperature Control ...................................................................................................... 17-2
17-1-1 Overview................................................................................................................................... 17-2
17-1-2 Application Procedure for PID Temperature Control................................................................. 17-3

CP1E CPU Unit Software Users Manual(W480) 11


17-1-3 Ladder Programming Example ................................................................................................. 17-4
17-2 Analog Adjusters ................................................................................................................... 17-7
17-2-1 Overview ................................................................................................................................... 17-7
17-2-2 Application Example.................................................................................................................. 17-7
17-3 Minimum Cycle Time ............................................................................................................. 17-8
17-3-1 Overview ................................................................................................................................... 17-8
17-3-2 Setting the Minimum Cycle Time in PLC Setup ........................................................................ 17-8
17-4 Clock ....................................................................................................................................... 17-9
17-4-1 Overview ................................................................................................................................... 17-9
17-5 Startup Settings and Maintenance ...............................................17-11
17-5-1 Holding Settings for Operating Mode Changes and at Startup ............................................... 17-11
17-5-2 Setting the Power OFF Detection Time................................................................................... 17-13
17-5-3 Disabling Power Interruption Processing in the Program ........................................................ 17-14
17-6 ............................................................................................................................................... 17-15
17-6-1 ................................................................................................................................................ 17-15
17-7 Security Functions .............................................................................................................. 17-16
17-7-1 Ladder Program Protection ..................................................................................................... 17-16
17-8 Debugging ....................................................................17-19
17-8-1 Forced Set/Reset .................................................................................................................... 17-19
17-8-2 Online Editing.......................................................................................................................... 17-19
17-8-3 Storing the Stop Position at Errors.......................................................................................... 17-19
17-8-4 Failure Alarm Instructions ....................................................................................................... 17-20

Section 19 CPU Unit Cycle Time


19-1 Monitoring the Cycle Time.................................................................................................... 19-2
19-1-1 Monitoring the Cycle Time ........................................................................................................ 19-2
19-2 Computing the Cycle Time ................................................................................................... 19-3
19-2-1 CPU Unit Operation Flowchart.................................................................................................. 19-3
19-2-2 Cycle Time Overview ................................................................................................................ 19-4
19-2-3 Functions Related to the Cycle Time ........................................................................................ 19-5
19-2-4 I/O Refresh Times for PLC Units............................................................................................... 19-7
19-2-5 Cycle Time Calculation Example .............................................................................................. 19-8
19-2-6 Increase in Cycle Time for Online Editing ................................................................................. 19-8
19-2-7 I/O Response Time ................................................................................................................... 19-9
19-2-8 Interrupt Response Time ........................................................................................................ 19-11
19-2-9 Serial PLC Link Response Performance................................................................................. 19-13
19-2-10 Pulse Output Start Time.......................................................................................................... 19-13
19-2-11 Pulse Output Change Response Time.................................................................................... 19-14

Section A Appendices
A-1 Summary of Instructions ........................................................................................................A-2
A-2 .................................................................................................................................................A-12
A-3 CP1E CPU Unit Instruction Execution Times and Number of Steps ................................A-13
A-4 Ladder Programming Example ...................................................A-25
A-4-1 Shutter Control System .............................................................................................................A-25
A-5 Comparison with the CP1L ...................................................................................................A-29
A-5-1 Differences between CP1E and CP1L ......................................................................................A-29

12 CP1E CPU Unit Software Users Manual(W480)


Read and Understand this Manual
Please read and understand this manual before using the product. Please consult your OMRON representative
if you have any questions or comments.

Warranty and Limitations of Liability


WARRANTY
OMRONs exclusive warranty is that the products are free from defects in materials and workmanship for a
period of one year (or other period if specified) from date of sale by OMRON.

OMRON MAKES NO WARRANTY OR REPRESENTATION, EXPRESS OR IMPLIED, REGARDING NON-


INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR PARTICULAR PURPOSE OF THE
PRODUCTS. ANY BUYER OR USER ACKNOWLEDGES THAT THE BUYER OR USER ALONE HAS
DETERMINED THAT THE PRODUCTS WILL SUITABLY MEET THE REQUIREMENTS OF THEIR
INTENDED USE. OMRON DISCLAIMS ALL OTHER WARRANTIES, EXPRESS OR IMPLIED.

LIMITATIONS OF LIABILITY
OMRON SHALL NOT BE RESPONSIBLE FOR SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES,
LOSS OF PROFITS OR COMMERCIAL LOSS IN ANY WAY CONNECTED WITH THE PRODUCTS,
WHETHER SUCH CLAIM IS BASED ON CONTRACT, WARRANTY, NEGLIGENCE, OR STRICT
LIABILITY.

In no event shall the responsibility of OMRON for any act exceed the individual price of the product on which
liability is asserted.

IN NO EVENT SHALL OMRON BE RESPONSIBLE FOR WARRANTY, REPAIR, OR OTHER CLAIMS


REGARDING THE PRODUCTS UNLESS OMRONS ANALYSIS CONFIRMS THAT THE PRODUCTS
WERE PROPERLY HANDLED, STORED, INSTALLED, AND MAINTAINED AND NOT SUBJECT TO
CONTAMINATION, ABUSE, MISUSE, OR INAPPROPRIATE MODIFICATION OR REPAIR.

CP1E CPU Unit Software Users Manual(W480) 13


Application Considerations
SUITABILITY FOR USE
OMRON shall not be responsible for conformity with any standards, codes, or regulations that apply to the
combination of products in the customers application or use of the products.

At the customers request, OMRON will provide applicable third party certification documents identifying
ratings and limitations of use that apply to the products. This information by itself is not sufficient for a
complete determination of the suitability of the products in combination with the end product, machine,
system, or other application or use.

The following are some examples of applications for which particular attention must be given. This is not
intended to be an exhaustive list of all possible uses of the products, nor is it intended to imply that the uses
listed may be suitable for the products:

Outdoor use, uses involving potential chemical contamination or electrical interference, or conditions or
uses not described in this manual.
Nuclear energy control systems, combustion systems, railroad systems, aviation systems, medical
equipment, amusement machines, vehicles, safety equipment, and installations subject to separate
industry or government regulations.
Systems, machines, and equipment that could present a risk to life or property.

Please know and observe all prohibitions of use applicable to the products.

NEVER USE THE PRODUCTS FOR AN APPLICATION INVOLVING SERIOUS RISK TO LIFE OR
PROPERTY WITHOUT ENSURING THAT THE SYSTEM AS A WHOLE HAS BEEN DESIGNED TO
ADDRESS THE RISKS, AND THAT THE OMRON PRODUCTS ARE PROPERLY RATED AND INSTALLED
FOR THE INTENDED USE WITHIN THE OVERALL EQUIPMENT OR SYSTEM.

PROGRAMMABLE PRODUCTS
OMRON shall not be responsible for the users programming of a programmable product, or any
consequence thereof.

14 CP1E CPU Unit Software Users Manual(W480)


Disclaimers
CHANGE IN SPECIFICATIONS
Product specifications and accessories may be changed at any time based on improvements and other
reasons.

It is our practice to change model numbers when published ratings or features are changed, or when
significant construction changes are made. However, some specifications of the products may be changed
without any notice. When in doubt, special model numbers may be assigned to fix or establish key
specifications for your application on your request. Please consult with your OMRON representative at any
time to confirm actual specifications of purchased products.

DIMENSIONS AND WEIGHTS


Dimensions and weights are nominal and are not to be used for manufacturing purposes, even when
tolerances are shown.

PERFORMANCE DATA
Performance data given in this manual is provided as a guide for the user in determining suitability and does
not constitute a warranty. It may represent the result of OMRONs test conditions, and the users must
correlate it to actual application requirements. Actual performance is subject to the OMRON Warranty and
Limitations of Liability.

ERRORS AND OMISSIONS


The information in this manual has been carefully checked and is believed to be accurate; however, no
responsibility is assumed for clerical, typographical, or proofreading errors, or omissions.

CP1E CPU Unit Software Users Manual(W480) 15


Safety Precautions

Definition of Precautionary Information

The following notation is used in this manual to provide precautions required to ensure safe usage of a
CP-series PLC. The safety precautions that are provided are extremely important to safety. Always read
and heed the information provided in all safety precautions.

Indicates an imminently hazardous situation which,


WARNING if not avoided, will result in death or serious injury.
Additionally, there may be severe property damage.

Indicates a potentially hazardous situation which,


Caution if not avoided, may result in minor or moderate
injury, or property damage.

Precautions for Safe Use


Indicates precautions on what to do and what not to do to ensure using the product safely.

Precautions for Correct Use


Indicates precautions on what to do and what not to do to ensure proper operation
and performance.

16 CP1E CPU Unit Software Users Manual(W480)


Symbols
The triangle symbol indicates precautions (including
warnings). The specific operation is shown in the triangle
and explained in text. This example indicates a precau-
tion for electric shock.

The circle and slash symbol indicates operations that you


must not do. The specific operation is shown in the circle
and explained in text.

The filled circle symbol indicates operations that you


must do. The specific operation is shown in the circle and
explained in text. This example shows a general precau-
tion for something that you must do.

The triangle symbol indicates precautions (including


warnings). The specific operation is shown in the triangle
and explained in text. This example indicates a general
precaution.

The triangle symbol indicates precautions (including


warnings). The specific operation is shown in the triangle
and explained in text. This example indicates a precau-
tion for hot surfaces.

CP1E CPU Unit Software Users Manual(W480) 17


Caution

Do not attempt to take any Unit apart while the power is being supplied.
Doing so may result in electric shock.

Do not touch any of the terminals or terminal blocks while the power is being supplied.
Doing so may result in electric shock.

Provide safety measures in external circuits (i.e., not in the Programmable Control-
ler), including the following items, to ensure safety in the system if an abnormality
occurs due to malfunction of the PLC or another external factor affecting the PLC
operation. Not doing so may result in serious accidents.
Emergency stop circuits, interlock circuits, limit circuits, and similar safety mea-
sures must be provided in external control circuits.
The PLC will turn OFF all outputs when its self-diagnosis function detects any error
or when a severe failure alarm (FALS) instruction is executed. As a countermeasure
for such errors, external safety measures must be provided to ensure safety in the
system.
The PLC outputs may remain ON or OFF due to deposition or burning of the output
relays or destruction of the output transistors. As a countermeasure for such prob-
lems, external safety measures must be provided to ensure safety in the system.
When the 24-VDC output (service power supply to the PLC) is overloaded or short-
circuited, the voltage may drop and result in the outputs being turned OFF. As a
countermeasure for such problems, external safety measures must be provided to
ensure safety in the system.

Fail-safe measures must be taken by the customer to ensure safety in the event of
incorrect, missing, or abnormal signals caused by broken signal lines, momentary
power interruptions, or other causes. Serious accidents may result from abnormal
operation if proper measures are not provided.

Do not apply the voltage/current outside the specified range to this unit. It may cause
a malfunction or fire.

18 CP1E CPU Unit Software Users Manual(W480)


Caution

If the power supply is interrupted for longer than the backup time of the built-in capaci-
tor, the following areas will be cleared to all zeros and the Auxiliary Area (A) will be
cleared to its default values.
DM Area (D), Holding Area (H), Counter Completion Flags (C), and Counter
Present Values (C)
For an N-type CPU Unit, the internal clock will also be cleared.

These areas are backed up by the capacitor that is built into the CPU Unit. The backup
time of the capacitor built into the CP1E CPU Unit is 50 hours for an E-type CPU Unit
and 40 hours for an N-type CPU Unit at 25C.

Create a system and write the ladder programs so that problems will not occur in the
system if the data in these areas is cleared. Always mount a CP1W-BAT01 Battery
(sold separately) in an N-type CPU Unit. (This Battery cannot be mounted in an E-type
CPU Unit.)

Data may be lost and abnormal operation may occur if a power interruption lasts too
long, possibly resulting in serious accidents.
Backup time of built-in capacitor

50 hours
CP1E-ECPU Unit
40 hours
CP1E-NCPU Unit

25 hours
20 hours

9 hours
7 hours

25C 40C 60C


Ambient temperature

The data in the user programs, parameter area, and the backed up words of the DM
Area is backed up in built-in backup memory (EEPROM) and will not be lost even if the
backup time of the built-in capacitor is exceeded.

The data backed up in the CP1E CPU Units and the backup methods are listed in the
following table.
Holding Areas Data backup method
DM Area (D) Backed up by built-in capacitor.
Holding Area (H) (Data is cleared or initialized in these areas if a power
Counter Completion Flags/PVs (C) interruption lasts longer than the backup time of the
Auxiliary Area (A) built-in capacitor.)

User programs Backed up in built-in backup memory (EEPROM).


Parameter Area (PLC Setup) (Data is not cleared or initialized in these areas even if
Backed up words in DM Area a power interruption lasts longer than the backup time
of the built-in capacitor.)

CP1E CPU Unit Software Users Manual(W480) 19


Do not base external outputs from a ladder program on the status of data backed up
in the DM Area (D), Holding Area (H), or Counter Area (C, including Completion
Flags and Present Values) if the backup time of the built-in capacitor has been
exceeded. Use one of the following methods to turn OFF all external outputs.
Select the option in the PLC Setup to generate a memory error if I/O memory is
corrupted.
Or,
Use the I/O Memory Corrupted Flag (A509.15) to turn ON the Output OFF Bit
(A500.15).

A509.15
SET Turn ON the Output
I/O Memory Corrupted Flag A500.15 OFF Bit.

Execute online edit only after confirming that no adverse effects will be caused by
extending the cycle time. Otherwise, the input signals may not be readable.

Tighten the screws on the terminal block of the AC power supply section to the torque
specified in the users manual. The loose screws may result in burning or malfunction.

Do not touch the power supply section when power is being supplied or immediately
after the power supply is turned OFF. The power supply section and I/O terminal
blocks will be hot and you may be burned.

Pay careful attention to the polarities (+/-) when wiring the DC power supply. A wrong
connection may cause malfunction of the system.

20 CP1E CPU Unit Software Users Manual(W480)


When connecting the PLC to a computer or other peripheral device, either ground the
0-V side of the external power supply or do not ground the external power supply at
all. Otherwise the external power supply may be shorted depending on the connec-
tion methods of the peripheral device. DO NOT ground the 24 V-side of the external
power supply, as shown in the following diagram.
Non-insulated DC
24V power supply
USB cable or other
communications
cable
0V 0V 0V
FG

FG CPU Unit FG Peripheral device FG


(e.g., personal computer)

CP1E CPU Unit Software Users Manual(W480) 21


Precautions for Safe Use
Observe the following precautions when using a CP-series PLC.

z Power Supply
Always use the power supply voltages specified in the users manuals. An incorrect voltage may
result in malfunction or burning.
Take appropriate measures to ensure that the specified power with the rated voltage and fre-
quency is supplied. Be particularly careful in places where the power supply is unstable. An incor-
rect power supply may result in malfunction.
Double-check all wiring and switch settings before turning ON the power supply. Incorrect wiring
may result in burning.
Always turn OFF the power supply to the PLC before attempting any of the following. Not turning
OFF the power supply may result in malfunction or electric shock.
Mounting or dismounting Expansion Units or Expansion I/O Units
Mounting or dismounting Option Boards
Setting rotary switches
Connecting cables or wiring the system
Connecting or disconnecting the connectors

z Installation
Before touching a Unit, be sure to first touch a grounded metallic object in order to discharge any
static build-up. Not doing so may result in malfunction or damage.
Be sure that the terminal blocks, connectors, Option Boards, and other items with locking devices
are properly locked into place. Improper locking may result in malfunction.

z Wiring
Wire correctly according to specified procedures in this manual.
AWG22-18 (0.32~0.82mm2)Always use the following size wire when connecting I/O terminals:
AWG22 to AWG18 (0.32 to 0.82 mm2).
Install external breakers and take other safety measures against short-circuiting in external wiring.
Insufficient safety measures against short-circuiting may result in burning.
Always connect to a ground of 100 or less when installing the Units. Not connecting to a ground
of 100 or less may result in electric shock.
Leave the label attached to the top of the Unit when wiring to prevent the entry of foreign matter.
Removing the label may result in malfunction if foreign matter enters the Unit.
Remove the label after the completion of wiring to ensure proper heat dissipation. Leaving the
label attached may result in malfunction.
Use crimp terminals for wiring. Do not connect bare stranded wires directly to terminals. Connec-
tion of bare stranded wires may result in burning.
Do not apply voltages to the input terminals in excess of the rated input voltage. Excess voltages
may result in burning.
Do not apply voltages or connect loads to the output terminals in excess of the maximum switch-
ing capacity. Excess voltage or loads may result in burning.
Disconnect the functional ground terminal when performing withstand voltage tests. Not discon-
necting the functional ground terminal may result in burning.

22 CP1E CPU Unit Software Users Manual(W480)


Be sure that all the PLC terminal screws and cable connector screws are tightened to the torque
specified in the relevant manuals. The tightening torque for the terminals on the CP1W-
CIF11/CIF12 terminal block is 0.28 Nm Incorrect tightening torque may result in malfunction.
Do not connect pin 6 (+5V) on the built-in RS-232C port on the CPU Unit or the RS-232C Option
Board (CP1W-CIF01) mounted to the CPU Unit to any external device other than the NT-AL001 or
CJ1W-CIF11 Conversion Adapter. The external device and the CPU Unit may be damaged.
Do not pull on the cables or bend the cables beyond their natural limit. Doing either of these may
break the cables.
Do not place objects on top of the cables or other wiring lines. Doing so may break the cables.

z Handling
Memory Status after Power Interrupts
A Battery cannot be installed in CP1E E-type CPU Units (basic models). The Battery is sold sepa-
rately for CP1E N-type CPU Units (application models).
Data in the following four areas will be cleared if power is interrupted for more than 50 hours (at
25C) for an E-type CPU Unit and for more than 40 hours (at 25C) for an N-type CPU Unit.
DM Area (D) (excluding backed up DM Area words)
Holding Area (H)
Counter PVs and Completion Flags (C)
Auxiliary Area (A)

Consider the possibility of data being cleared due to power interrupts, and observe the following pre-
cautions.
Write the ladder programs to set any data required for operation when starting operation.

P_First_Cycle
Set any data
required for
operation at the start
First Cycle Flag (A200.11)
of operation using
the MOV, XFER, or
other instructions.

Include programming to back up specified parts of the DM Area to built-in EEPROM during or
after operation. (This is called the DM backup function.)

Example)
Execution condition
SET Backs up D0 to D499
to built-in EEPROM.
A752.00

RST

A752.00

Refer to 3-2 Memory Backup in the CP1E Software Users Manual (Cat. No. W480) for other
processing information.

Check the ladder program for proper execution before actually running it on the Unit. Not checking
the program may result in an unexpected operation.
The ladder program and parameter area data in the CP1E CPU Units are backed up in the backup
memory. The BKUP indicator will light on the front of the CPU Unit when the backup operation is
in progress. Do not turn OFF the power supply to the CPU Unit when the BKUP indicator is lit. The
data will not be backed up if power is turned OFF.

CP1E CPU Unit Software Users Manual(W480) 23


Before replacing the battery, supply power to the CPU Unit for at least 30 minutes and then com-
plete battery replacement within 40 hours (at 25 C, N-type CPU Units only). Memory data may be
corrupted if this precaution is not observed.
Make sure that the required data for the DM Area, Holding Area, and other memory areas has
been transferred to a CPU Unit that has been replaced before restarting operation.
Do not attempt to disassemble, repair, or modify any Units. Any attempt to do so may result in mal-
function, fire, or electric shock.
Confirm that no adverse effect will occur in the system before attempting any of the following. Not
doing so may result in an unexpected operation.
Changing the operating mode of the PLC (including the setting of the startup operating mode).
Force-setting/force-resetting any bit in memory.
Changing the present value of any word or any set value in memory.
When replacing parts, be sure to confirm that the rating of a new part is correct. Not doing so may
result in malfunction or burning.
Do not touch the Expansion I/O Unit Connecting Cable while the power is being supplied in order
to prevent malfunction due to static electricity.
Do not turn OFF the power supply to the Unit while data is being transferred.
When transporting or storing Units or Board, static electricity can destroy LSIs or ICs. Cover the
PCBs with a conductive material and maintain the specified storage temperature.
Do not touch circuit boards or the components mounted to them with your bare hands. There are
sharp leads and other parts on the boards that may cause injury if handled improperly.
Double-check the pin numbers when assembling and wiring the connectors.
Never short-circuit the positive and negative terminals of a battery or charge, disassemble, heat,
or incinerate the battery. Do not subject the battery to strong shocks or deform the battery by
applying pressure. Doing any of these may result in leakage, rupture, heat generation, or ignition
of the battery. Dispose of any battery that has been dropped on the floor or otherwise subjected to
excessive shock. Batteries that have been subjected to shock may leak if they are used.
Dispose of the product and batteries according to local ordinances as they apply.

UL standards require that only an experienced engineer can replace the battery. Make sure that
an experienced engineer is in charge of battery replacement. Follow the procedure for battery
replacement given in this manual.

z External Circuits
Always configure the external circuits to turn ON power to the PLC before turning ON power to the
control system. If the PLC power supply is turned ON after the control power supply, temporary
errors may result in control system signals because the output terminals on DC Output Units and
other Units will momentarily turn ON when power is turned ON to the PLC.
Fail-safe measures must be taken by the customer to ensure safety in the event that outputs from
output terminals remain ON as a result of internal circuit failures, which can occur in relays, tran-
sistors, and other elements.
If the I/O Hold Bit is turned ON, the outputs from the PLC will not be turned OFF and will maintain
their previous status when the PLC is switched from RUN or MONITOR mode to PROGRAM
mode. Make sure that the external loads will not produce dangerous conditions when this occurs.
(When operation stops for a fatal error, including those produced with the FALS instruction, all out-
puts from PLC will be turned OFF and only the internal output status in the CPU Unit will be main-
tained.)

24 CP1E CPU Unit Software Users Manual(W480)


Operating Environment Precautions
z Follow the instructions in this manual to correctly perform installation.

z Do not operate the control system in the following locations:


Locations subject to direct sunlight
Locations subject to temperatures or humidity outside the range specified in the specifications
Locations subject to condensation as the result of severe changes in temperature
Locations subject to corrosive or flammable gases
Locations subject to dust (especially iron dust) or salts
Locations subject to exposure to water, oil, or chemicals
Locations subject to shock or vibration

z Take appropriate and sufficient countermeasures when installing systems in


the following locations:
Locations subject to static electricity or other forms of noise
Locations subject to strong electromagnetic fields
Locations subject to possible exposure to radioactivity
Locations close to power supplies

CP1E CPU Unit Software Users Manual(W480) 25


Regulations and Standards

Conformance to EC Directives

Applicable Directives

EMC Directives
Low Voltage Directive

Concepts

z EMC Directives
OMRON devices are electrical components that are designed to be built into equipment and manu-
facturing systems. OMRON devices that comply with EMC Directives also conform to the related
EMC standards (see note) so that they can be more easily built into other devices or the overall
machine. Whether the products conform to the standards in the system used by the customer, how-
ever, must be checked by the customer.
EMC-related performance of the OMRON devices that comply with EC Directives will vary depend-
ing on the configuration, wiring, and other conditions of the equipment or control panel on which the
OMRON devices are installed. The customer must, therefore, perform the final check to confirm that
devices and the overall machine conform to EMC standards.
Note The applicable EMC (Electromagnetic Compatibility) standard is EN61131-2.

z Low Voltage Directive


Always ensure that devices operating at voltages of 50 to 1,000 V AC and 75 to 1,500 V DC meet
the required safety standards for the PLC (EN 61131-2).

z Conformance to EC Directives
The CP1E PLCs comply with EC Directives. To ensure that the machine or device in which the
CP1E PLC is used complies with EC Directives, the PLC must be installed as follows:
1 The CP-series PLC must be installed within a control panel.
2 CP-series PLCs complying with EC Directives also conform to EN61131-2. Radiated emission
characteristics (10-m regulations) may vary depending on the configuration of the control panel
used, other devices connected to the control panel, wiring, and other conditions. You must there-
fore confirm that the overall machine or equipment complies with EC Directives.
3 A SYSMAC CP-series PLC is a class A product (for an industrial environment). In residential
areas it may cause radio interference, in which case the user may be required to take adequate
measures to reduce interference.

26 CP1E CPU Unit Software Users Manual(W480)


Trademarks
SYSMAC is a registered trademark for Programmable Controllers made by OMRON Corporation.
CX-One is a registered trademark for Programming Software made by OMRON Corporation.
Windows is a registered trademark of Microsoft Corporation.
Other system names and product names in this document are the trademarks or registered trademarks
of their respective companies.

Terminology and Notation


Term Description
PLC Programmable Controller is abbreviated as PLC in this manual.
PC, however, appears in some software displays in the meaning of Programmable
Controller.
PC is not used as an abbreviation for personal computer, which is always written out.
E-type A basic model of CPU Unit that support basic control applications using instructions
CPU Unit such as basic, movement, arithmetic, and comparison instructions.
Basic models of CPU Units are called E-type CPU Units in this manual.
N-type An application model of CPU Unit that supports connections to Programmable Termi-
CPU Unit nals, inverters, and servo drives.
Application models of CPU Units are called N-type CPU Units in this manual.

CP1E CPU Unit Software Users Manual(W480) 27


Related Manuals
The following manuals are related to the CP1E. Use them together with this manual.
Manual name Cat. No. Model numbers Application Contents
SYSMAC CP Series W480 CP1E-ED-A To learn the software Describes the following information for CP1E
CP1E CPU Unit Soft- (this manual) CP1E-ND-A specifications of the PLCs.
ware Users Manual CP1E CPU Unit operation
Internal memory
Programming
Settings
CPU Unit built-in functions
Interrupts
High-speed counter inputs
Pulse outputs
Serial communications
Other functions
Use this manual together with the CP1E CPU Unit Hardware Users
Manual (Cat. No. W479) and Instructions Reference Manual (Cat. No.
W483).
SYSMAC CP Series W479 CP1E-ED-A To learn the hard- Describes the following information for CP1E
CP1E CPU Unit Hard- CP1E-ND-A ware specifications PLCs.
ware Users Manual of the CP1E PLCs Overview and features
Basic system configuration
Part names and functions
Installation and settings
Troubleshooting
Use this manual together with the CP1E CPU Unit Software Users
Manual (Cat. No. W480) and Instructions Reference Manual (Cat. No.
W483).
SYSMAC CP Series W483 CP1E-ED-A To learn program- Describes each programming instruction in
CP1E CPU Unit Instruc- CP1E-ND-A ming instructions in detail.
tions Reference Manual detail When programming, use this manual together
with the CP1E CPU Unit Software Users Man-
ual (Cat. No. W480).
CS/CJ/CP/NSJ Series W342 CS1G/H-CPUH To learn communica- Describes
Communications Com- CS1G/H-CPU-V1 tions commands for 1) C-mode commands and
mands Reference Man- CS/CJ/CP/NSJ-
ual CS1D-CPUH series Controllers in 2) FINS commands in detail.
CS1D-CPUS detail Read this manual for details on C-mode and
CS1W-SCU-V1 FINS commands addressed to CPU Units.

CS1W-SCB-V1 Note This manual describes commands addressed to CPU Units. It


does not cover commands addressed to other Units or ports (e.g.,
CJ1G/H-CPUH serial communications ports on CPU Units, communications ports
CJ1G-CPUP on Serial Communications Units/Boards, and other Communica-
tions Units).
CJ1M-CPU
CJ1G-CPU
CJ1W-SCU-V1

28 CP1E CPU Unit Software Users Manual(W480)


1

Overview and SYSMAC Features


This section gives an overview of the CP1E and describes its features and procedures,
as well as the features of SYSMAC.

1-1 CP1E Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2


1-1-1 Overview of Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1-1-2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
1-1-3 CP1E CPU Unit Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8
1-2 Basic Operating Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9
1-3 SYSMAC PLC Operation and Programming Features . . . . . . . . . . . . . . . . 1-10
1-3-1 PLC Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10
1-3-2 Operating Mode at Startup: RUN Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11
1-3-3 I/O Allocation and Notation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-12
1-3-4 Specifying I/O Memory Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-13
1-3-5 CP1E Data: Normally Hexadecimal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-14
1-3-6 Condition Flags. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-15
1-3-7 Control Data that Sets the Instruction Function . . . . . . . . . . . . . . . . . . . . . . . 1-16

CP1E CPU Unit Software Users Manual(W480) 1-1


1 Overview and SYSMAC Features

1-1 CP1E Overview


The SYSMAC CP1E Programmable Controller is a package-type PLC made by OMRON that is
designed for easy application. The CP1E includes E-type CPU Units (basic models) for standard con-
trol operations using basic, movement, arithmetic, and comparison instructions, and N-type CPU Units
(application models) that supports connections to Programmable Terminals, Inverters, and Servo
Drives.

CP1E CPU Unit (An N-type CPU Unit with 40 I/O Points is shown here.)
CX-Programmer for CPIE

USB port CP1W-BAT01 Battery (sold separately) Power supply and input terminals
(Can be mounted only to N-type CPU Units.)
Expansion Units (Can be mounted to CPU Units with 30 or 40 I/O points.)

Commercially NC
COM
00
01
02
03
04
05
06
07
08
09
10
11
NC
COM
00
01
02
03
04
05
06
07
08
09
10
11
NC
COM
00
01
02
03
04
05
06
07
08
09
10
11

available USB IN CH

CH 00 01 02 03 04 05 06 07
IN CH

CH 00 01 02 03 04 05 06 07
IN CH

CH 00 01 02 03 04 05 06 07

cable 08 09 10 11 08 09 10 11 08 09 10 11

Peripheral USB port


OUT OUT OUT
CH 00 01 02 03 04 05 06 07 CH 00 01 02 03 04 05 06 07 CH 00 01 02 03 04 05 06 07
CH EXP CH EXP CH EXP
NC 00 01 02 04 05 07 NC 00 01 02 04 05 07 NC 00 01 02 04 05 07
NC COM COM COM 03 COM 06 NC COM COM COM 03 COM 06 NC COM COM COM 03 COM 06

Analog adjuster

Built-in RS-232C port Output terminal block


One slot for an
Option Board Option Board

One RS-232C port One RS-422A/485 port


RS-232C Option RS-422A/485 Option
Board CP1W-CIF01 Board CP1W-CIF11/12
(Note) The following Option Boards cannot be used.
CP1W-DAM01 LCD Option Board
CP1W-CIF41 Ethernet Option Board

1-1-1 Overview of Features


Programming, setting, and monitoring with CX-Programmer for CP1E.
Easy connection with computers using commercially available USB cables.
Expansion I/O Units can be connected to increase the I/O capacity of a CPU Unit (for CPU Units with
30 or 40 I/O points).
Expansion Units can be connected to add analog I/O or temperature inputs to a CPU Unit with 30 or
40 I/O points.
Quick-response inputs.
Input interrupts.
Complete high-speed counter functionality.
Versatile pulse control for N-type CPU Units.
Execution of origin searches and origin returns using instructions for N-type CPU Units.
PWM outputs for N-type CPU Units.
Changing settings with the analog adjusters.
Built-in RS-232C port on N-type CPU Units.
A Serial Option Board can be added to N-type CPU Units with 30 or 40 I/O points.

1-2 CP1E CPU Unit Software Users Manual(W480)


1 Overview and SYSMAC Features

1-1 CP1E Overview


1-1-2 Features

Programming, Setting, and Monitoring with the CX-Programmer for


CP1E
The CX-Programmer for CP1E is used as the Programming Device for the CP1E.
1
Easy Connection with Computers Using Commercially Available
USB Cables

1-1-2 Features
The CX-Programmer for CP1E is connected using a commercially available USB cable between the
computers USB port and the built-in peripheral USB port of the CP1E.

With CPU Units with 30 or 40 I/O Points, Add I/O by Connecting


Expansion I/O Units
A total of up to three of the following Expansion I/O Units can be connected to a CPU Unit with 30 or 40
I/O points. (The total of three Units must also include Expansion Units.)
24-input/16-output Unit, 32-output Unit, 12-input/8-output Unit, 16-output Unit, 8-input Unit, or 8-out-
put Unit

With CPU Units with 30 or 40 I/O Points, Add Analog I/O or


Temperature Inputs by Connecting Expansion Units
With a CPU Unit with 30 or 40 I/O points, a total of up to three of the following Expansion Units can be
connected. (The total of three Units must also include Expansion I/O Units.)
Analog I/O Unit, Analog Input Unit, Analog Output Unit, Temperature Sensor Units, CompoBus/S I/O
Link Unit

Quick-response Inputs
By setting a built-in input to quick-response operation, inputs with signal widths as small as 50 s can
be read with certainty regardless of the cycle time.
Up to six quick-response inputs can be used.

Photomicrosensor or other device

Quick-response input

Cycle time
Built-in input
I/O refresh

Can read ON signals shorter than the cycle time.

Cycle time
Can read ON signals
shorter than this time.

Note The user setting in the PLC Setup determines if each input is a quick-response input, normal input, interrupt
input, or high-speed counter input.

CP1E CPU Unit Software Users Manual(W480) 1-3


1 Overview and SYSMAC Features

Input Interrupts
An interrupt task can be started when a built-in input turns ON or turns OFF (supported only in direct
mode).
Up to six interrupt inputs can be used.

Interrupt input

Built-in input
Interrupt task

Ladder program
Interrupt occurs

END

Note The user setting in the PLC Setup determines if each input is a quick-response input, normal input, interrupt
input, or high-speed counter input.

Complete High-speed Counter Functionality


A high-speed counter input can be used by connecting a rotary encoder to a built-in input. A CP1E CPU
Unit is equipped with more than one high-speed counter input, making it possible to control devices for
multiple axes with a single PLC.

Built-in Inputs
(Functions can be assigned.)

High-speed Counter Inputs

E-type CPU Units:


Increment pulse inputs: 10kHz 6counters
Up/down pulse inputs: 10kHz 2counters
Pulse + direction inputs: 10kHz 2counters
Differential phase inputs (4): 5kHz 2counters
N-type CPU Units:
Increment pulse inputs: 100kHz 2 counters, 10kHz 4counters
Up/down pulse inputs: 100kHz 1 counter, 10kHz 1counter
Encoder Pulse + direction inputs: 100kHz 2counters
Differential phase inputs (4): 50kHz 1 counter, 5kHz 1counter

Note The user setting in the PLC Setup determines if each input is a quick-response input, normal
input, interrupt input, or high-speed counter input
High-speed counters can be used for high-speed processing, using either target value comparison or
range comparison with the counters PV to create interrupts.
An interrupt task can be started when the count reaches a specified value or falls within a specified
range.
High-speed counter input frequency (speed) can be measured.
The input pulse frequency can be measured using the PRV instruction (counter 0 only).

1-4 CP1E CPU Unit Software Users Manual(W480)


1 Overview and SYSMAC Features

1-1 CP1E Overview


Versatile Pulse Control for N-type CPU Units
Fixed duty ratio pulse outputs can be output from the CPU Units built-in outputs and used to perform
positioning or speed control with a servomotor or a stepping motor that accepts pulse inputs.
Two pulse outputs at 100 kHz are provided as standard features.

1-1-2 Features
Stepping Motor
Servomotor

16 Built-in Outputs
(Functions can be assigned.) (See note.)

Two pulse outputs


100 kHz

Note The instruction used to control each output determines whether it is used as a normal output, pulse output,
or PWM output.
Positioning is possible with Trapezoidal Acceleration and Deceleration
Trapezoidal acceleration and deceleration can be used for positioning using the PULSE OUTPUT
(PLS2) instruction.
Jogging Can Be Performed
Jogging can be performed by executing the SPED or ACC instruction.
Origin Searches and Origin Returns Can Be Performed Using the ORIGIN SEARCH Instruction
An accurate origin search combining all I/O signals can be executed with a single instruction. It is
also possible to move directly to an established origin using the ORIGIN SEARCH (ORG) instruction.

PWM Outputs for N-type CPU Units


Lighting and power control can be performed by outputting variable duty ratio pulse (PWM) output sig-
nals from the CPU Units built-in outputs

CP1E CPU Unit Software Users Manual(W480) 1-5


1 Overview and SYSMAC Features

Analog Settings

z Changing Settings Using Analog Adjuster


By adjusting the analog adjuster with a Phillips screwdriver, the value in the Auxiliary Area (A642)
can be changed to any value between 0 and 255. All CPU Units are equipped with two analog
adjusters. This makes it easy to change set values, such as those for timers and counters, without a
Programming Device.

Phillips screwdriver

Analog adjuster

Ladder program
Turning the adjuster on the CP1E changes the value in
A642 to between 0000 and 0255 (00 and FF hex).
CNTX
A642 CH
Example: The production quantity could be changed by
changing the counter set value from 100 to 150.

z Changing Settings Using External Analog Setting Inputs


Not provided.

Built-in RS-232C Port for N-type CPU Units


The N-type CPU Units have one built-in RS-232C port as a standard feature.

1-6 CP1E CPU Unit Software Users Manual(W480)


1 Overview and SYSMAC Features

1-1 CP1E Overview


Mounting Serial Option Boards to N-type CPU Units with 30 or 40 I/O
Points
One Serial Communications Option Board with one RS-232C port or one RS-422A/485 port can be
added to an N-type CPU Unit with 30 or 40 I/O points. With the serial communications port, it is easy to
connect to general components, such as barcode readers, and other components such as PTs, other
CP-series PLCs, and Inverters.
1
NS-series PT, Barcode Reader, etc.

1-1-2 Features
RS-232C

RS-422A/485 Option Board


With the CP1W-CIF11 or CP1W-CIF 12 mounted

RS-422A
Built-in RS-232C Modbus-RTU Easy Master Function
port

Example: Inverter

Serial PLC Links

CP1E, CP1H
CP1L, CJ1M

CP1E CPU Unit Software Users Manual(W480) 1-7


1 Overview and SYSMAC Features

1-1-3 CP1E CPU Unit Types


There are the following two types of CP1E CPU Units.
zE-type CPU Units: Basic models for standard control operations using basic, movement, arithmetic, and
comparison instructions.
zN-type CPU Units: Application models that support connections to Programmable Terminals, Inverters,
and Servo Drives.

Basic Models CP1E Application Models


(E-type CPU Units) (N-type CPU Units)
CPU with 20 I/O CPU Unit with 30 or 40 I/O CPU with 20 I/O CPU Unit with 30 or 40 I/O
Points Points Points Points
Appearance

Program capacity 2 Ksteps 8 Ksteps


DM Area capacity 2K words 8K words
Of these 1.5K words can be written to the built-in Of these 7K words can be written to the built-in
EEPROM. EEPROM.
Mounting Expan- Not possible. 3 Units maximum Not possible. 3 Units maximum
sion I/O Units and
Expansion Units
Model with transis- Not available. Available
tor outputs
Pulse outputs Not supported. Supported
Built-in serial com- Not provided. RS-232C port provided
munications port
Option Board Not supported. Not supported. Supported (for one port)
Connection port USB port USB port
for Programming
Device
Clock Not provided. Provided
Using a Battery Cannot be used. Can be used (sold separately).
Backup time of 50 hours at 25C 40 hours at 25C
built-in capacitor
Battery-free opera- Always battery-free operation. Only data in the Battery-free operation if no battery is attached.
tion built-in EEPROM will be retained if power is inter- In this case, only data in the built-in EEPROM
rupted for longer than 50 hours. will be retained if power is interrupted for longer
than 40 hours.

Precautions for Correct Use


A battery cannot be used with an E-type CPU Unit. Do not use an E-type CPU Unit if data in the
following areas need to be retained after a power interruption lasting longer than 50 hours at 25C.
DM Area (excluding backed up DM Area words)
Holding Area (H)
Counter PVs and Completion Flags (C)
Auxiliary Area (A)
Use an N-type CPU Unit and attach the CP1W-BAT01 Battery (sold separately) if data in the
above areas need to be retained after a power interruption lasting longer than 50 hours at 25C.

1-8 CP1E CPU Unit Software Users Manual(W480)


1 Overview and SYSMAC Features

1-2 Basic Operating Procedure


1-2 Basic Operating Procedure
In general, use the following procedure.

1. Setting Devices and Hardware


Connect the CPU Unit, Expansion I/O Units, and Expansion Units.
Set the DIP switches on the Option Board and Expansion Units as required. 1
Refer to Section 3 Part Names and Functions and Section 5 Installation and Wiring in the CP1E Hardware
Users Manual (Cat. No. W479).

2. Wiring
Wire the power supply, I/O, and communications.
Refer to Section 5 Installation and Wiring in the CP1E Hardware Users Manual (Cat. No. W479).

3. Connecting Online to the PLC


Connect the personal computer online to the PLC.
Refer to Section 4 Programming Device in the CP1E Hardware Users Manual (Cat. No. W479).

4. I/O Allocations
Allocations for built-in I/O on the CPU Unit are predetermined and memory is allocated automatically
to Expansion I/O Units and Expansion Units, so the user does not have to do anything.
Refer to Section 8 Backup Operations in the CP1E Hardware Users Manual (Cat. No. W479).

5. Software Setup
Make the PLC software settings.
With a CP1E CPU Unit, all you have to do is set the PLC Setup.
Refer to Section 4 Initial Settings for CPU Unit and Section 9 PLC Setup in the CP1E CPU Unit Software
Users Manual (Cat. No. W480).

6. Writing the Programs


Write the programs using the CX-Programmer.
Debug the programs offline using the CX-Stimulator.
Refer to Section 5 Programming Concepts in the CP1E CPU Unit Software Users Manual (Cat. No.
W480).

7. Checking Operation
Check the I/O wiring and the Auxiliary Area settings, and perform trial operation.
The CX-Programmer can be used for monitoring and debugging.
Refer to Section 10 Overview and Allocation of Built-in Functions and 17-8 Debugging in the CP1E CPU
Unit Software Users Manual (Cat. No. W480).

8. Basic Program Operation


Set the operating mode to RUN mode to start operation.

CP1E CPU Unit Software Users Manual(W480) 1-9


1 Overview and SYSMAC Features

1-3 SYSMAC PLC Operation and


Programming Features
This section describes the features of OMRON PLCs.

1-3-1 PLC Setup


SYSMAC PLCs have parameters that are called the PLC Setup. The PLC Setup enables a single PLC
to achieve different functions. The PLC Setup is used for the initial settings of a PLC. For example, for a
CP1E CPU Unit it is used to specify how to treat the input terminals (e.g., as interrupt inputs, quick-
response inputs, or high-speed counters). The settings of the parameters are applied to the CPU Unit
when the power supply is turned ON.

As shown above, the initial settings of PLC functions, such as interrupts and high-speed
counters, can be set using software.

Requirements for Input Interrupts,


Quick-response Inputs, and High-speed Counters

C 1 3 5 7 9 11

0 2 4 6 8 10

Set the PLC Setup using


How are the input terminals going to be used? CX-Programmer for CP1E.

Set in the PLC Setup CX-Programmer for CP1E

Additional Information

For SYSMAC PLCs, the PLC Setup is used for initial settings of parameters that need to be
changed during operation. Programming instructions are used to set parameters that need to be
changed during operation.

1-10 CP1E CPU Unit Software Users Manual(W480)


1 Overview and SYSMAC Features

1-3 SYSMAC PLC Operation and


Programming Features
1-3-2 Operating Mode at Startup: RUN Mode
For the SYSMAC PLCs, the default setting in the PLC Setup is started in RUN mode when the power
supply is turned ON.
To start the CPU Unit in PROGRAM mode, set the Operating Mode on the Startup Tab Page of the PLC
Setup to PROGRAM in the CX-Programmer for CP1E.
1

1-3-2 Operating Mode at Startup: RUN Mode


As shown above, by default, operation will begin when the power supply is turned ON.

Power supply ON

Operation CP1E

Programs

The default mode is RUN Mode

Set in PLC Setup

Additional Information

With a SYSMAC PLCs, turn ON the PLC power supply to enable the initial settings, such as
those in the PLC Setup. When the power supply is turned ON, operation will begin. Change the
operating mode to PROGRAM mode to transfer programs and the PLC Setup from the CX-Pro-
grammer for CP1E.

CP1E CPU Unit Software Users Manual(W480) 1-11


1 Overview and SYSMAC Features

1-3-3 I/O Allocation and Notation


In a SYSMAC PLC, I/O Area bits are allocated to inputs and outputs. (I/O Area word and bit addresses
appear on the CX-Programmer for CP1E without a prefix.) For CP1E CPU Units, the bit addresses in
the following words are always used for I/O bits and are allocated as input bits or output bits.

CIO 0 (0CH) and CIO 1 (1CH) Input bits


CIO 100 (100CH) and CIO 101 (101CH) Output bits

0CH 100CH
Inputs Outputs
1CH 101CH

As shown above, input bit addresses start at CIO 0 (for terminal block 0CH) and output bit
addresses start at CIO 100 (for terminal block 100CH). You can thus differentiate input bits
and output bits by their addresses.

z Inputs and outputs can be distinguished by the notation used by the CX-
Programmer for CP1E.

Addresses that start with I are for input bits. Example: I0.00
Addresses that start with Q are for output bits. Example: Q100.00

I0.00 Q100.00

z The address notation can be changed to X or Y.

Addresses that start with X are input bits. Example: X0.00


Addresses that start with Y are output bits. Example: Y100.00

X0.00 Y100.00

1-12 CP1E CPU Unit Software Users Manual(W480)


1 Overview and SYSMAC Features

1-3 SYSMAC PLC Operation and


Programming Features
1-3-4 Specifying I/O Memory Addresses
I/O memory addresses consist of a bit number that specifies the bit and a word address that specifies
the word. (Each word has 16 bits.) The bit number specifies the bit in the 16-bit word. A period . is
placed between the word address and bit number.
Example: W0.00
1
The word address specifies the word.

1-3-4 Specifying I/O Memory Addresses


Example: W0

Bit number

15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
W0
W1
Word Address W2
.
.
.

Word Address Bit Address

W2 W0 . 00
Bit number (00 to 15)

Period (.): Inserted between


word address and bit number
Word Address Word Address

As shown above, it is possible to specify either words or bits in the same area of the
memory map for bit-addressable areas.

Addresses in the Data Memory Area are indicated by D.


Example: D100

Additional Information

Bits are specified by placing a period after the word address and indicating the bit number
from 00 to 15.

CP1E CPU Unit Software Users Manual(W480) 1-13


1 Overview and SYSMAC Features

1-3-5 CP1E Data: Normally Hexadecimal


The CP1E normally treats data in hexadecimal format. For example, the present value of high-speed
counter 0 is stored in the Auxiliary Area words A271 and A270 in hexadecimal format. The high-speed
counter frequency read using the PRV instruction and present value are also stored in hexadecimal for-
mat. Values that can be treated as measured values by the PIDAT instruction are unsigned hexadeci-
mal numbers.
Example:

PRV
The high-speed
0
counter frequency or D100 #FFFF 16 Stored in
D0 present value is read to hexadecimal format
D100 and D101 D101 #7FFF
D100

The high-speed counter PV is A270 #FFFF 16 Stored in


automatically stored in A270
and A271 hexadecimal format
A271 #7FFF

As shown above, data is normally handled in hexadecimal format. The symbol # is


placed at the beginning of hexadecimal numbers. An & is used to denote unsigned
decimal numbers. The + and - signs are used for signed decimal numbers.

Additional Information

Numbers without a symbol are not treated as constants except for operands that specify num-
bers.
Example: 10 is not the constant 10. Instead it indicates word CIO 10.

1-14 CP1E CPU Unit Software Users Manual(W480)


1 Overview and SYSMAC Features

1-3 SYSMAC PLC Operation and


Programming Features
1-3-6 Condition Flags
Instruction execution errors and execution results, such as comparison results are indicated by flags
that are shared by all tasks called Condition Flags. These flags are shared by other instructions so they
must be accessed immediately after an instruction has been executed and before executing another
instruction.

1-3-6 Condition Flags


P_ER 1 Turns ON when there P_EQ 1 ON if comparison results in equal
is an instruction error
Immediately accessed Immediately accessed
P_ER P_EQ
Result in the Result in the Equals Flag
Error Flag

Example:
Example: HEX ASCII TO HEX instruction CMP Comparison instruction
S Data to be converted S1 Comparison data 1
Instruction Equal
error C when S2 Comparison data 2
occurs compared
D

P_ER W0.00 P_EQ W0.00


When the ASCII TO HEX When S1 = S2, the
instruction is executed but the Equals Flag (P_EQ)
data to be converted is ASCII turns ON, which turns
data that cannot be converted, ON W0.00.
the Error Flag (P_ER) turns
ON, which turns ON W0.00.

As shown above, Condition Flags show the results of instruction execution and are
shared by all instructions.

Additional Information

Instruction execution results are given by the Condition Flags, which are shared by all tasks.

CP1E CPU Unit Software Users Manual(W480) 1-15


1 Overview and SYSMAC Features

1-3-7 Control Data that Sets the Instruction Function


SYSMAC PLCs have instruction operands that are called control data. The control data is used to exe-
cute different functions with a single instruction. For example, control data is used to specify the start
address in the DM Area or other I/O memory area. Set the parameters that specify the function of the
instruction starting with the specified first address.

Specifies the
first address I/O memory
First address of Example:
control data D100
D100
Parameters
D101 Control data
Used as
parameters
=

Configures the
instructions function

Example:

HEX ASCII TO HEX instruction


S
D100 Control data D100
D
Number of digits to
Specifies the ASCII-to-hexadecimal be converted, etc.
conversion method

As shown above, the instructions function can be set as required.

Additional Information

With SYSMAC PLCs, one instruction can be used for different functions by indirectly accessing
I/O memory using the instruction parameters as control data.

1-16 CP1E CPU Unit Software Users Manual(W480)


2
Internal Memory in the CPU Unit

2-1 Internal Memory in the CPU Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2


2-1-1 CPU Unit Memory Backup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
2-1-2 Memory Areas and Stored Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
2-1-3 Transferring Data from a Programming Device to
the Internal Memory in the CPU Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5

CP1E CPU Unit Software Users Manual(W480) 2-1


2 Internal Memory in the CPU Unit

2-1 Internal Memory in the CPU Unit

2-1-1 CPU Unit Memory Backup

As shown in the following diagram, the internal memory in the CPU Unit consists of built-in RAM and
built-in EEPROM. The built-in RAM is used as execution memory and the built-in EEPROM is used as
backup memory.

Built-in RAM
The built-in RAM is the execution memory for the CPU Unit.
The user programs, PLC Setup, and I/O memory are stored in the built-in RAM.
The data is backed up by a built-in capacitor.
The backup time of the built-in capacitor is 50 hours for an E-type CPU Unit and 40 hours for an N-type
CPU Unit at 25C.
If a CP1W-BAT01 Battery (sold separately) is mounted to an N-type CPU Unit, the data is backed up by
the Battery.
The user programs and parameters are backed up to the built-in EEPROM, so they are not lost.

2-2 CP1E CPU Unit Software Users Manual(W480)


2 Internal Memory in the CPU Unit

2-1 Internal Memory in the CPU Unit


Built-in EEPROM
The built-in EEPROM is the backup memory for user programs, PLC Setup, and Data Memory backed
up using control bits in the Auxiliary Area. Data is retained even if the power supply is interrupted for
longer than the backup time of the built-in capacitor. Only the Data Memory Area words that have been
backed up using the Auxiliary Area control bits are backed up ( Refer to 17-6 DM Backup). All data in
all other words and areas is not backed up.

Precautions for Correct Use


Data in the I/O memory is cleared when the power supply is interrupted for longer than the
backup time of the built-in capacitor.
2
Create a system and write the ladder programs so that problems will not occur in the system if

2-1-1 CPU Unit Memory Backup


the data in these areas is cleared.
Data in areas such as the DM Area and Holding Area, which is retained by the Battery, will
also be cleared when the power supply is reset. (Except for the DM Area words that are
retained by the built-in EEPROM using the Auxiliary Area bit.)
The error log, Output OFF Bit, and clock data (N-type CPU Unit only) in the Auxiliary Area will
be cleared. Other words and bits in the Auxiliary Area will be cleared to their default values.
The built-in capacitor's backup time varies with the ambient temperature as shown in the fol-
lowing graph.
Backup time of built-in capacitor

50 hours
CP1E-E CPU Unit
40 hours
CP1E-N CPU Unit

25 hours
20 hours

9 hours
7 hours

25C 40C 60C


Ambient temperature

CP1E CPU Unit Software Users Manual(W480) 2-3


2 Internal Memory in the CPU Unit

2-1-2 Memory Areas and Stored Data


The following table lists the CPU Unit memory areas and the data stored in each area.

Built-in Built-in
Memory area and stored data Details
RAM EEPROM

User Program Area The User Program Area stores the object code for executing Stored Stored
the user program that was created using the CX-Programmer
for CP1E.
Parameter Area The Parameter Area stores the initial settings for the PLC. Stored Stored
PLC Names Not supported.
Setting PLC Setup Various initial settings are made in the PLC Setup using soft-
ware switches.
Refer to Section 9 PLC Setup.
I/O Tables Not supported.
Routing Tables
CPU Bus Unit Setup
I/O Memory Areas The I/O Memory Areas are used for reading and writing from Stored Not stored
the user programs.It is partitioned into the following regions
according to purpose.
Regions where data is cleared when power to the CPU Unit
is reset, and regions where data is retained.
Regions where data are exchanged with other Units, and
regions that are used internally.
DM Area words backed up to EEPROM using control bits in Stored Stored
the Auxiliary Area.
Source Code and Comment Area Not Stored
Source Code Not supported. stored

Symbol Table The symbol table contains symbols created using the CX-Pro-
grammer for CP1E (symbol names, addresses, and I/O com-
ments).
Comments Comments are created using the CX-Programmer for CP1E
and include annotations and row comments.
Program Index The program index provides information on program sections
created using the CX-Programmer for CP1E, as well as pro-
gram comments.
Network Symbols (Tags) Not supported. Note Stored
stored

2-4 CP1E CPU Unit Software Users Manual(W480)


2 Internal Memory in the CPU Unit

2-1 Internal Memory in the CPU Unit


2-1-3 Transferring Data from a Programming Device to the Internal
Memory in the CPU Unit
Data that has been created using the CX-Programmer for CP1E is transferred to the internal memory in
the CPU Unit as shown in the following diagram.

CX-Programmer CPU Unit

User-created Programs User Program Area

User programs
User programs 2
Symbol Table

2-1-3 Transferring Data from a Programming Device to the Internal


Source Code and Comment Area
Comments and

Memory in the CPU Unit


program index

Symbol Table

PLC Setup
Comments and
program index

PLC Memory

CIO Area, Work Area, Holding


Area, Timer Area, Counter Parameter Area
Area, DM Area, and Auxiliary
Area PLC Setup

I/O Memory Areas

The CX-Programmer for CP1E


can be used to set status in each
I/O memory area and to write
data to the I/O memory areas.

CP1E CPU Unit Software Users Manual(W480) 2-5


2 Internal Memory in the CPU Unit

2-6 CP1E CPU Unit Software Users Manual(W480)


CPU Unit Operation
3
This section describes the operation of the CP1E CPU Unit. Make sure that you under-
stand the contents of this section completely before writing ladder programs.

3-1 CPU Unit Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2


3-1-1 Overview of CPU Unit Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2
3-1-2 CPU Unit Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
3-1-3 Load OFF Function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6
3-1-4 Operation for Power Interruptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7
3-2 Backing Up Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10
3-2-1 CPU Unit Memory Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10
3-2-2 Backing Up Ladder Programs and PLC Setup . . . . . . . . . . . . . . . . . . . . . . . . 3-11
3-2-3 I/O Memory Backup during Power Interruptions . . . . . . . . . . . . . . . . . . . . . . . 3-11

CP1E CPU Unit Software Users Manual(W480) 3-1


3 CPU Unit Operation

3-1 CPU Unit Operation


This section gives an overview of the CPU Unit operation, describes the operating modes, and explains
how the Unit operates when there is a power interruption.

3-1-1 Overview of CPU Unit Operation


The CPU Unit reads and writes data to the internal I/O memory areas while executing user ladder pro-
grams by executing the instructions in order one at a time from the start to the end.

CPU Unit Internal Memory

Overhead processing
(self-diagnosis)
Change in status
after all instructions
I/O memory have been executed Inputs
Program execution
Access 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 Exchange
0 0 0 0 0 0 0 0 0 1 1 0 1 0 1 0
CPU Unit 1 1 0 1 1 0 0 0 1 1 0 0 1 0 1 0
processing 0 0 1 1 1 0 1 0 1 0 1 1 1 0 1 1
cycle 1 0 1 0 1 0 0 1 1 0 0 0 1 1 0 1
Outputs

I/O refreshing
Refreshes external devices at this timing

Peripheral servicing

Overhead Processing (Self-diagnosis)


Self-diagnosis, such as an I/O bus check, is performed.

Ladder Program Execution


Instructions are executed in order of the mnemonic code and I/O memory is refreshed.

I/O Refresh
Data to and from external devices, such as sensors and switches, directly connected to the built-in I/O
terminals and expansion I/O terminals is exchanged with data in the I/O memory of the PLC. This pro-
cess of data exchange is called the I/O refresh.

Peripheral Servicing
Peripheral servicing is used to communicate with devices connected to the communications port or for
exchanging data with the CX-Programmer.

Cycle Time
The cycle time is the time between one I/O refresh and the next. The cycle time can be determined
beforehand for SYSMAC PLCs. Refer to 19-2 Computing the Cycle Time for how to calculate the
cycle time.

Additional Information

The average cycle time during operation will be displayed in the status bar on the bottom right of
the Ladder Program Window on the CX-Programmer.

3-2 CP1E CPU Unit Software Users Manual(W480)


3 CPU Unit Operation

Ladder Programs
User ladder programs are saved in memory.

I/O Memory

3-1 CPU Unit Operation


These are the PLC memory areas that are accessed by the ladder programs. SYSMAC PLCs refer to
these areas as the I/O memory. It can be accessed by specifying instruction operands. There are words
in the I/O memory area where data is cleared and words where data is retained when recovering from a
power interruption. There are also words that can be set to be cleared or retained. Refer to Section
6 I/O Memory.

3-1-2 CPU Unit Operating Modes


3
Overview of Operating Modes

3-1-2 CPU Unit Operating Modes


CPU Units have the following three operating modes.

PROGRAM mode: The programs are not executed in PROGRAM mode.This mode is used for the initial
settings in PLC Setup, transferring ladder programs, checking ladder programs, and
making prepartions for executing ladder programs such as force-setting/resetting bits.

RUN mode: This is the mode in which the ladder program is executed. Some operations are dis-
abled during this mode. It is the default startup mode.

MONITOR mode: In this mode, it is possible to perform online editing, force-set/reset bits, and change
I/O memory present values while the ladder programs are being executed. Adjust-
ments during trial operation are also made in this mode.

Precautions for Correct Use


The default operating mode at startup is the RUN mode. To change the operating mode to PRO-
GRAM mode or MONITOR mode, change the operating mode on the Startup Tab Page of the
PLC Setup to PROGRAM or MONITOR and transfer the PLC Setup to the CP1E CPU Unit.

Changing the Operating Mode


The operating mode can be changed from the CX-Programmer.

z Changing the Startup Mode


The default operating mode when the CPU Unit is turned ON is RUN mode.
To change the startup mode to PROGRAM or MONITOR mode, set the desired mode in Startup
Setting in PLC Setup from the CX-Programmer for CP1E.

CP1E CPU Unit Software Users Manual(W480) 3-3


3 CPU Unit Operation

z Changing the Operating Mode after Startup


Use one of the following procedures.
Select PROGRAM, MONITOR, or RUN from the Operating Mode Menu.
Right-click the PLC in the project tree, and then select PROGRAM, MONITOR, or RUN from the
Operating Mode Menu.

Operating Modes and Operation


The following table lists status and operations for each mode.
Operating mode PROGRAM RUN MONITOR
Ladder program execution Stopped Executed Executed
I/O refresh Executed Executed Executed
External I/O status OFF after changing to Controlled by Controlled by
PROGRAM mode but the ladder pro- the ladder pro-
can be turned ON from grams. grams.
the CX-Programmer for
CP1E afterward.
I/O memory Non-retained memory Cleared Controlled by Controlled by
Retained memory Retained the ladder pro- the ladder pro-
grams. grams.
CX-Program- I/O memory monitoring { { {
mer opera- Ladder program monitoring { { {
tions
Ladder pro- From CPU Unit { { {
gram transfer To CPU Unit {
Checking programs {
Setting the PLC Setup {
Changing ladder programs { {
Forced-set/reset operations { {
Changing timer/counter SV { {
Changing timer/counter PV { {
Change I/O memory PV { {

3-4 CP1E CPU Unit Software Users Manual(W480)


3 CPU Unit Operation

Operating Mode Changes and I/O Memory


Non-retained areas Retained areas
I/O bits Holding Area
Serial PLC Link Words DM Area

3-1 CPU Unit Operation


Work bits Counter PV and Completion Flags
Mode changes Timer PV/Completion Flags (Auxiliary Area bits/words are
Data Registers retained or not retained depending
(Auxiliary Area bits/words are retained on the address.)
or not retained depending on the
address.)
RUN or MONITOR to Cleared*1 Retained
PROGRAM
PROGRAM to RUN or Cleared*1 Retained
MONITOR 3
RUN to MONITOR or Retained*2 Retained
MONITOR to RUN

3-1-2 CPU Unit Operating Modes


*1 The outputs from the Output Units will be turned OFF when power is interrupted even if the IOM Hold Bit is ON
and the status of the output bits in CPU Units I/O memory is retained.
*2 The cycle time will increase by approximately 10 ms when the operating mode is changed from MONITOR to
RUN mode. This will not, however, cause an error for exceeding the maximum cycle time limit.

I/O memory Output bits allocated to Output Units


Mode change Operation stop Mode change Operation stop
IOM Hold Bit
(A500.12) PROGRAM to Fatal error PROGRAM to Fatal error
or from RUN Execution or from RUN Execution
other than other than
or MONITOR of FALS or MONITOR of FALS
FALS FALS
OFF Cleared Cleared Retained OFF OFF OFF
ON Retained Retained Retained Retained OFF OFF

Refer to Section 6 I/O Memory for details on the I/O memory.

Checking the Operating Mode


The RUN indicator on the front of the CPU Unit indicates the operating mode as described below.

: Not lit : Flashing : Lit

RUN indicator on
Operating mode Remarks
CPU Unit
PROGRAM mode
Not lit
RUN or MONITOR mode Use the CX-Programmer to see if the mode is
RUN or MONITOR mode.
Lit (green)

CP1E CPU Unit Software Users Manual(W480) 3-5


3 CPU Unit Operation

z Checking with the CX-Programmer


You can check the operating mode in the project tree or status bar of the CX-Programmer.
Project Tree

Offline Online

The CPU Units operating


mode is displayed.

Status Bar

The operating mode is displayed here. The average cycle time will be displayed if
the CPU Unit is in RUN or MONITOR mode.

3-1-3 Load OFF Function

Load OFF Function Overview


The load OFF function stops refreshing outputs and turns OFF all outputs during operation in RUN or
MONITOR mode.

CP1E CPU Unit

Operation

Programs Output OFF Bit


I/O memory (A500.15) = ON

Operation is started but output refreshing is stopped


All outputs are turned OFF

3-6 CP1E CPU Unit Software Users Manual(W480)


3 CPU Unit Operation

Method
The load OFF function is executed by turning ON the Output OFF Bit (A500.15) in the Auxiliary Area
using an instruction in a ladder program or the CX-Programmer.

Applications

3-1 CPU Unit Operation


The load OFF function can be used to turn OFF all outputs in an emergency situation during operation.
It can also be used to turn OFF outputs to external loads by force-setting the Output OFF Bit during
debugging.

Load OFF Status


While the Load OFF Bit is ON, the CP1E will not refresh outputs, resulting in a load OFF status, and
all outputs (built-in outputs, outputs from the Expansion I/O Units, and outputs from Expansion Units)
will be OFF. However, the status of output bits in the I/O memory will still be controlled by the ladder pro- 3
grams and it will not be cleared.

z The INH indicator on the front of the CPU Unit will be lit when all outputs are

3-1-4 Operation for Power Interruptions


OFF (i.e., when the Output OFF Bit is ON).

z Clearing the Output OFF Bit


The status of the Output OFF Bit (A500.15) is held when the operating mode is changed and the
power is turned OFF and ON, i.e., the outputs will remain OFF.
It is necessary to turn OFF the Output OFF Bit using the ladder program or by directly writing to PLC
memory.

Precautions for Correct Use


The Output OFF Bit (A500.15) will be cleared if power is interrupted for longer than the I/O mem-
ory backup time. If you want to keep loads OFF after restarting, use A509.15 (I/O Memory Previ-
ous Corruption Flag (held at startup)) as the input condition for turning ON the Output OFF Bit
(A500.15). Refer to 3-2-3 Power Interruptions Longer than I/O Memory Backup Time for details.

3-1-4 Operation for Power Interruptions

Overview of Operation for Power Interruptions

z Power Supply Voltage Drop


If the power supply voltage falls below the specified value (85% of rated voltage) while the CPU Unit
is in RUN or MONITOR mode, operation will be stopped and all outputs will be turned OFF.
All outputs will turn OFF despite the status of the I/O Memory Hold Bit or I/O Memory Hold Bit at
Power ON settings in the PLC Setup.

z Detection of Momentary Power Interruptions


The system will continue to run if the momentary power interruption lasts less than 10 ms. If power is
interruped for longer than 10 ms, the CPU Unit will be stopped and outputs will be turned OFF.

CP1E CPU Unit Software Users Manual(W480) 3-7


3 CPU Unit Operation

Below 85% of rated voltage

10ms
Time
0

0 to 10 ms max.
Momentary power
interruption not detected
Operation continues
Supply
voltage
10ms

Supply
voltage
Operation will continue or stop
depending on whether a
momentary power interruption
is detected.

Precautions for Correct Use


The power OFF detection delay and power OFF interrupt task cannot be used.

z Automatic Recovery
Operation is automatically restarted when the power supply voltage is restored.

Power OFF Timing Chart


Operation always stopped at this point
Power supply
voltage: 85%
Holding time for 5 V internal
power supply after power OFF
detection: 1 ms
Power OFF detection

Power OFF Detection Time


AC: 10ms
Power OFF DC: 2ms
detected signal

Program execution
Cyclic task or interrupt task Stop
status

CPU Unit reset signal

Power OFF Detection Time: The time from when the power supply voltage drops to 85% or less the rated voltage until the
power interruption is detected.
Power Holding Time: The maximum amount of time (fixed at 1 ms) that 5 V will be held internally after power shuts
OFF.

z Description of Operation
The power interruption will be detected if the 100 to 240 VAC power supply falls below 85% of the
minimum rated voltage for the power OFF detection time (10 ms minimum, not fixed).
The CPU reset signal will turn ON and the CPU Unit will be reset immediately.

3-8 CP1E CPU Unit Software Users Manual(W480)


3 CPU Unit Operation

Instruction Execution for Power Interruptions


The power OFF detection time for CP1E CPU Units is 10 ms minimum. If power is interrupted and the
interruption is detected when the CPU Unit is operating in RUN or MONITOR mode, the instruction cur-
rently being executed will be completed and then the CPU Unit will be reset.

3-1 CPU Unit Operation


z Malfunction Countermeasures
If only a couple of Expansion I/O Units or Expansion Units are connected to the CPU Unit resulting
in a light power supply circuit load and a small current consumption, the time required by the CPU
Unit to detect a power interruption will be longer. For this reason, inputs may be incorrectly identified
as being OFF if external power supply used for an input turns OFF before the power interruption is
detected. If an external NC contact input is used or the ladder program counts the number of ON to
OFF transitions, a malfunction may occur if the external power supply turns OFF.
Power supply
voltage: 85%
Power OFF detected
3
Power OFF Power OFF detection

3-1-4 Operation for Power Interruptions


detected singal time: 10 ms min.

Program execution
status Cyclic task or interrupt task

CPU reset signal

External power supply

Input signal to CP1E


If the external power supply turns OFF
before the power interruption is
detected, the CPU Unit will read the
input as being OFF

The following diagram shows an example countermeasure for this situation.


Wiring

Emergency stop input

100 VAC

External power
supply input
L1 L2 COM 0.00 0.01

CP1E

Ladder Program

External power supply


Emergency input (Enables
stop input Emergency stop emergency stop output.) Emergency
release input 0.01 stop output
0.00

Emergency
stop output

CP1E CPU Unit Software Users Manual(W480) 3-9


3 CPU Unit Operation

3-2 Backing Up Memory


This section describes backing up the CP1E CPU Unit memory areas.

3-2-1 CPU Unit Memory Configuration


The following table describes data backup to the CP1E CPU Unit's built-in EEPROM backup memory.
Ladder programs and PLC Setup Automatically backed up to the built-in EEPROM when-
ever changed.
DM Area in the I/O memory Data in specified words of the DM Area can be backed
up to the built-in EEPROM by using bits in the Auxiliary
Area. Other words are not backed up.
Other areas in the I/O memory (including Holding Not backed up to the built-in EEPROM.
Area data, Counter PVs, and Counter Completion
Flags)

CP1E CPU Unit


Built-in RAM
Built-in EEPROM
backup memory
Ladder programs Ladder programs
Changing program

PLC power turned ON

PLC Setup changed Parameter Area


Parameter Area

PLC Setup
PLC Setup

I/O Memory Areas


PLC power turned ON
I/O Area
Work Area
Holding Area
Operation using control Auxiliary Area
bits in Auxiliary Area Timer/Counter
Areas

DM Area DM Area

PLC power turned ON

3-10 CP1E CPU Unit Software Users Manual(W480)


3 CPU Unit Operation

3-2-2 Backing Up Ladder Programs and PLC Setup


Ladder programs and the PLC Setup are automatically backed up to and restored from the built-in
EEPROM backup memory.

3-2 Backing Up Memory


z Backing Up Memory
Ladder programs and PLC Setup are backed up to the built-in EEPROM backup memory by trans-
ferring them from the CX-Programmer or writing them using online editing.

z Restoring Memory
Ladder programs and PLC Setup are automatically transferred from the built-in EEPROM backup
memory to the RAM when power is turned ON again or at startup.

Precautions for Safe Use


3
The BKUP indicator on the front of the CPU Unit turns ON when data is being written to the built-

3-2-2 Backing Up Ladder Programs and PLC Setup


in EEPROM backup memory. Never turn OFF the power supply to the CPU Unit when the BKUP
indicator is lit.

3-2-3 I/O Memory Backup during Power Interruptions

I/O Memory Backup Time during Power Interruptions


The built-in capacitors backup time for I/O memory during a power interruption is listed below for E-type
CPU Units and N-type CPU Units.
E-type CPU Units: 50 hours at 25C
N-type CPU Units (without a battery): 40 hours at 25C

CP1E E-type CPU Unit


Backup time of built-in capacitor

50 hours

40 hours
CP1E N-type CPU Unit
without a battery
25 hours
20 hours

9 hours
7 hours

25C 40C 60C


Ambient temperature

The following areas are cleared when power is interrupted for longer than the I/O memory backup
times given above.
DM Area (D) (excluding words backed up to the EEPROM using the DM backup function)
Holding Area (H)
Counter PVs and Completion Flags (C)
Auxiliary Area (A) (including clock data for N-type CPU Units)

CP1E CPU Unit Software Users Manual(W480) 3-11


3 CPU Unit Operation

Additional Information

The following words in the Auxiliary Area are cleared to zero. Others are cleared to default val-
ues.

Power interrution time CPU Unit


Words Name Less than I/O memory Longer than I/O N-type CPU
E-type CPU Unit
backup time memory backup time Unit
A90 to A93 User Program Date Retained Cleared to zero Not supported. Supported
A94 to A97 Parameter Date Not supported.
A100 to A199 Error Log Area Supported
A300 Error Log Pointer Supported
A351 to A354 Clock Area Not supported.
A500.15 Output OFF Bit Supported
A510 to A511 Startup Time Not supported.
A512 to A513 Power Interruption Time Not supported.
A514 Number of Power Supported
Interruptions
A515 to A517 Operation Start Time Not supported.
A518 to A520 Operation End Time Not supported.
A523 Total Power ON Time Not supported.
A720 to A749 Power ON Clock Data 1 to 10 Not supported.

Caution
Write the ladder programs and construct the system so that problems will not occur even if the
DM Area, Holding Aea, Counter PVs, and Counter Completion Flags (C) are cleared to zero and
the Auxiliary Area is cleared to default values when a power interruption continues for longer
than 50 hours for an E-type CPU Unit or 40 hours for an N-type CPU Unit (at 25C).Always
mount a CP1W-BAT01 Battery (sold separately) to an N-type CPU Unit. (This Battery cannot be
mounted to an E-type CPU Unit.)
Data may be lost and abnormal operation may occur if a power interruption lasts too long, possi-
bly resulting in serious accidents.
Power interruption
longer than I/O memory Retained when power supply
backup time is turned ON or there is a
momentary interruption.
E-type: Power interruption longer than 50 hours*1
Power supply N-type: Power interruption longer than 40 hours*1
*1: At 25C.

Cleared

DM Area (D)*

Holding Area (H)

Counter PVs and Completion Flags (C)

Auxiliary Area (A)

*Excluding words backed up to EEPROM using Auxiliary Area bits.

Create a system and write the ladder programs so that


problems will not occur in the system if the data in these areas
is cleared.

3-12 CP1E CPU Unit Software Users Manual(W480)


3 CPU Unit Operation

Additional Information

Ladder programs and PLC Setup are automatically backed up to backup memory. Words in the
DM Area backed up to the backup memory using Auxiliary Area bits are also backed up to the
backup memory.

3-2 Backing Up Memory


Power Interruptions Longer than I/O Memory Backup Time
If DM Area data, Holding Area data, Counter PVs, Counter Completion Flags, and Auxiliary Area data
are cleared because of a power interruption lasting longer than the I/O memory backup time, operation
can be stopped by creating a memory error.

z Not Creating a Memory Error (Default)


3
The system continues operation without detecting a memory error. If a non-fatal error is detected,
outputs may be turned OFF.

3-2-3 I/O Memory Backup during Power Interruptions


Creating User-defined Non-fatal Errors
To create user-defined non-fatal errors by executing the FAL instruction, insert the following
instructions at the start of the ladder program.

A509.15

FAL User-defined
non-fatal error
I/O Memory Corruption Flag 10

#0000

Power interruption
longer than I/O memory
backup time Turned OFF by user.

A509.15 ON
I/O Memory Previous Corruption
Flag (Held at startup.) OFF

I/O memory: Cleared

Create user-defined non-fatal errors or turn


the loads OFF using instructions.

Make the necessary settings in the DM Area


words and Holding Area words.

CP1E CPU Unit Software Users Manual(W480) 3-13


3 CPU Unit Operation

Continuing Operation but Turning All Outpus OFF


Outputs are turned OFF if power is interrupted for longer than the I/O memory backup time and
DM Area data, Holding Area data, Counter PVs, and Counter Completion Flags are cleared.

1 Insert the following instructions at the start of the ladder program.

A509.15

SET Turn ON the Output


OFF Bit.
I/O Memory Previous Corruption A500.15
Flag (Held at startup.)

2 Make the necessary settings in DM Area words and Holding Area words using the CX-Program-
mer after checking that the load OFF function is being executed (front panel INH Indicator).

3 Use the CX-Programmer to turn OFF A509.15 (I/O Memory Previous Corruption Flag (held at
startup)).

Additional Information

To detect the clock stopping as well as I/O memory lost, use A509.13 (I/O Memory Previous Cor-
ruption or Clock Stopped Flag (held at startup)) as the input condition instead of A509.15. This
flag turns ON when power is interrupted for longer than the I/O memory backup time, but
A509.14 (I/O Memory Lost Flag (cleared at startup)) is cleared when power supply is turned ON.
This flag can be used to check whether I/O memory was cleared by a power interruption.

Power interruption for


longer than memory
backup time

A509.15 ON
(I/O Memory Previous
Corruption Flag (Held at OFF
startup.))
E-type CPU Unit: Power interrution for longer than 50 hours
N-type CPU Unit: Power interruption for longer than 40 hours
ON
A509.14
(I/O Memory Corruption
Flag (Held at startup.)) OFF
Power supply turned ON

I/O memory:Cleared Cleared

3-14 CP1E CPU Unit Software Users Manual(W480)


3 CPU Unit Operation

z Creating a Memory Error


If I/O memory is not retained, a memory error can be created to stop the system. Use this setting to
definitively stop operation if I/O memory is not retained, e.g., in systems that operate 24 hours a day.

1 To create a memory error, select the Create memory error when I/O memory is lost Check Box
in the Execution Settings Area on the Startup Tab Page of the PLC Setup.

3-2 Backing Up Memory


2 The following table shows what happens if a memory error occurs at startup. A memory error is
created if the user memory (ladder programs and PLC Setup) or I/O memory could not be
retained or the clock stopped.
CX-Programmers Item Memory Error
Error Tab Page Error code 0x80F1
CX-Programmers 0002 hex
Error
Error Log Tab Page
Auxiliary Area A403.01 (Memory Error Location = I/O 3
memory) is ON
CPU Unit operation Stopped

3-2-3 I/O Memory Backup during Power Interruptions


ERR/ALM indicator on front of CPU Lit
Unit

3 Make the necessary setting in DM Area words and Holding Area words using the CX-Program-
mer after confirming the memory error.

4 Turn OFF A509.13 (I/O Memory Previous Corruption or Clock Stopped Flag (held at startup)) or
A509.15 (I/O Memory Previous Corruption Flag (held at startup) using the CX-Programmer.

5 Clear the error display by clicking the Clear All Button on the Error Tab Page of the CX-Pro-
grammer.

6 Restart operation.

Power interruption
longer than I/O
memory backup time Turned OFF by user.
A509.13
I/O Memory Previous ON
Corruption or Clock Stopped
Flag (Held at startup.)
OFF
or A509.15
I/O Memory Previous Corruption
Flag (Held at startup.)

I/O memory: Cleared Click the Clear All Button on the Error Tab
Page to clear the error display.

Select the Output


memory error when I/O Memory Error Location
memory lost Check
Box in the PLC Setup.

Make the necessary settings in DM Area


words and Holding Area words.

CP1E CPU Unit Software Users Manual(W480) 3-15


3 CPU Unit Operation

z Related Flags and Words


Name Bit Description
Memory Previous Corruption A509.13 This bit is turned ON and latched if power is interrupted for longer
or Clock Stopped Flag (Held than the I/O memory backup time and data in the DM Area words
at startup.) (excluding words backed up to the backup memory), Holding Area
words, Counter PVs, and Counter Completion Flags cannot be
retained, or the clock has stopped.
This flag will remain ON until the user turns it OFF.
I/O Memory Corruption A509.14 This bit is turned ON if power is interrupted for longer than the I/O
Flag(Cleared at startup.) memory backup time and data in the DM Area words (excluding
words backed up to the backup memory), Holding Area words,
Counter PVs, and Counter Completion Flags cannot be retained.
I/O Memory Previous Cor- A509.15 This bit is turned ON and latched if power is interrupted for longer
ruption Flag (Held at star- than the I/O memory backup time and data in the DM area words
tup.) (excluding words backed up to the backup memory), Holding Area
words, Counter PVs, and Counter Completion Flags cannot be
retained.
This flag will remain OFF until the user turns it ON.
Memory Error Location: I/O A403.01 This bit is turned ON when the Create I/O memory error when I/O
memory memory is lost Check Box is selected in the CPU Execute Process
Settings of the Startup Tab Page or a memory error occurs
because power was interrupted for longer thant he I/O emory
backup time. It is turned OFF when all memory is cleared or the
memory error is cleared.

3-16 CP1E CPU Unit Software Users Manual(W480)


CPU Unit Initialization
This section describes the initialization processing that is performed by the CPU Unit at
startup.
4

4-1 CPU Unit Initial Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2


4-1-1 CPU Unit Initial Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
4-2 PLC Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4
4-2-1 PLC Setup Defaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4

CP1E CPU Unit Software Users Manual(W480) 4-1


4 CPU Unit Initialization

4-1 CPU Unit Initial Settings

4-1-1 CPU Unit Initial Settings

The only initial settings required by the CPU Unit are in the PLC Setup.

CPU Unit

 Hardware Settings  Software Settings

(The CP1E does not  Parameter Area


require hardware settings,
such as DIP switches.)
PLC Setup

(The following items do not apply to


CP1E CPU Units.
Registered I/O tables
Routing tables
CPU Bus Unit Setup)

 I/O Memory Areas

(The CP1E does not allocate DM Area


words to Special I/O Units or CPU Bus
Unit.)

Hardware Settings
There are no DIP switches on CP1E CPU Units.

Software Settings
The following table gives the software setting applications and setting methods for applicable Units.
Files created
Applicable Setting Backup desti-
Set data Applications with Program-
Units method nation
ming Device
CPU Unit Parame- PLC Using non-default CX-Program- CX-Programmer Backup mem-
ter Area Setup specifications mer for CP1E for CP1E project ory (built-in
file (.CXP) EEPROM)

z PLC Setup
The PLC Setup is used to make changes for using the CPU Unit with non-default specifications.
The following settings are examples of the defaults for the CPU Unit.
Example:
Startup mode: RUN mode
Fixed servicing time: 4% of cycle time
To use specifications other than these defaults, change the PLC Setup using the CX-Programmer
for CP1E, and transfer the PLC Setup to the CPU Unit.

4-2 CP1E CPU Unit Software Users Manual(W480)


4 CPU Unit Initialization

From CX-Programmer for CP1E

CP1E CPU Unit


PLC Setup
PLC Setup

4-1 CPU Unit Initial Settings


4

4-1-1 CPU Unit Initial Settings

CP1E CPU Unit Software Users Manual(W480) 4-3


4 CPU Unit Initialization

4-2 PLC Setup


The PLC Setup contains the basic settings for the CPU Unit.
Parameters in the PLC Setup must be changed if the CP1E CPU Unit is to be used with specifications
that are not the defaults.
The parameters in the PLC Setup are set by using the CX-Programmer for CP1E.

4-2-1 PLC Setup Defaults


The following table gives the default settings in the PLC Setup.
To change the settings, edit the PLC Setup with the CX-Programmer for CP1E, and then transfer the
PLC Setup to the CPU Unit.

CX-Programmer
for CP1E PLC Parameter Default
Setup Tab Page
Startup Startup Hold Settings Forced Status Hold Bit Not retained when power is
ON.
IOM Hold Bit Startup Hold Setting Not retained when power is
ON.
Mode Run
Settings Execute Settings Create error for I/O memory cor- Do not create
ruption
Do not detect Low Battery Do not detect
Stop CPU on Instruction Error Do not stop
Do not register FAL to error log Register to error log
Timings Watch Cycle Time 1000 ms (1 s)
Constant Cycle Time No Setting
Scheduled Interrupt Interval 10 ms
Peripheral Service CPU Processing Mode Normal Mode
Set Time to All Events 4% of cycle time
Serial Port Communications Settings Used to sets serial communi- Standard (Host Link and
cations. 9,600 bps)
Built-in Inputs Interrupt Input Settings Used to sets quick-catch Normal inputs (general-
inputs and input interrupts. purpose inputs)
High-speed Counter Settings Used to set high-speed High-speed counters not
counters. used.
Pulse Outputs Base Settings Sets origin searches and ori- Origin searches and
Origin Search gin returns for pulse outputs. returns not used.

Origin Return

Refer to Section 9 PLC Setup for details on the PLC Setup.

4-4 CP1E CPU Unit Software Users Manual(W480)


Understanding Programming
This section provides basic information on ladder programming for CP1E CPU Units.

5-1 Programming. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2


5-1-1 Programs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 5
5-1-2 Program Capacity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3
5-1-3 Basics of Programming. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3
5-2 Tasks, Sections, and Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-7
5-2-1 Overview of Tasks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-7
5-2-2 Overview of Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-7
5-2-3 Overview of Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-7
5-3 Programming Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-9
5-3-1 Operands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-9
5-3-2 Instruction Variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-10
5-3-3 Execution Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-10
5-3-4 Specifying Data in Operands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-13
5-3-5 Data Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-14
5-3-6 I/O Refresh Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-16
5-4 Constants: &, #, +, -, and Numbers without Symbols . . . . . . . . . . . . . . . . 5-17
5-5 Specifying Offsets for Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-21
5-5-1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-21
5-5-2 Application Examples for Address Offsets . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-23
5-6 Checking Programs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-25
5-6-1 Checking during Input Operations from the CX-Programmer . . . . . . . . . . . . . 5-25
5-6-2 Program Checks with the CX-Programmer for CP1E . . . . . . . . . . . . . . . . . . . 5-25
5-6-3 Debugging with the Simulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-26
5-6-4 Program Execution Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-28
5-7 Ladder Programming Precautions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-31
5-7-1 Ladder Programming Precautions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-31
5-7-2 Special Program Sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-35

CP1E CPU Unit Software Users Manual(W480) 5-1


5 Understanding Programming

5-1 Programming

5-1-1 Programs

Structure of User Programs

User programs are created by using the CX-Programmer for CP1E.


The user programs consist of the following parts.
Programs
A program ends with an END instruction.
Tasks (Smallest Executable Unit)
The CP1E has only one cyclic task.
For interrupts, a program is assigned to an interrupt task to execute it. (In the CX-Programmer for
CP1E, the interrupt task number is specified in the program properties.)
Sections
When creating and displaying programs with the CX-Programmer for CP1E, the one program can be
divided into any number of parts.
Each part is called a section.
Sections are created mainly to make programs easier to understand.
Subroutines
You can create subroutines within a program.

User Program Data


The user programs are saved in a project file (.CXP) for the CX-Programmer for CP1E along with other
parameters, such as the symbol table, PLC Setup data, and I/O memory data.

User programs

Symbol table
CX-Programmer for
.CXP CP1E project file

PLC Setup

I/O memory data

Programming Languages
Programs can be written using only ladder programs.

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5 Understanding Programming

5-1-2 Program Capacity


The maximum program capacities of the CP1E CPU Units for all ladder programs (including programs
for interrupt tasks) are given in the following table.
The total number of steps must not exceed the maximum program capacity.
Unit type Model numbers Program capacity
E-type CPU Unit CP1E-E- 2K steps
N-type CPU Unit CP1E-N- 8K steps

It is possible to check the program size by selecting View - Memory View in the CX-Programmer.
The size of a ladder instruction depends on the specific instruction and operands that are used. For details,
refer to A-3 Instruction Execution Times and Number of Steps.

5-1 Programming
5-1-3 Basics of Programming

This section describes the basics of programming for the CP1E.

Basic Concepts of Ladder Programming


Instructions are executed in the order that they are stored in memory (i.e., in the order of the mnemonic
5
code). Be sure you understand the concepts of ladder programming, and write the programs in the
proper order.

5-1-2 Program Capacity


z Structural Elements of a Ladder Diagram
A ladder diagram consists of left and right bus bars, connecting lines, input conditions, OUTPUT
(OUT) instructions, and special instructions.
A ladder program consists of many program rungs. A program rung is a unit that can be horizontally
separated from other parts of the program by drawing lines between the bus bars. In mnemonic
form, a program rung is all of the instructions from an LD or LD NOT instruction to the output instruc-
tion just before the next LD or LD NOT instruction.
Program rungs consist of instruction blocks that begin with an LD or LD NOT instruction. The LD or
LD NOT instruction indicates a logical start.

Special
Input Connecting instruction OUT
condition line instruction
Left bus bar Right bus bar

Rungs
Instruction blocks

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5 Understanding Programming

Mnemonics
A mnemonic program is ladder program given using only instructions in mnemonic form.
It has program addresses, and one program address is equivalent to one instruction.
Example:
Instruction
0.00 0.01 0.02 0.03 102.00 Program
(mnemonic Operand
address
form)
0 LD 0.00
1.00 1.01
1 AND 0.01
2 LD 0.02
3 AND NOT 0.03
END
4 LD NOT 1.00
5 AND 1.01
6 OR LD
7 AND LD
8 OUT 102.00
9 END

z Basic Points in Creating Ladder Programs


Order of Ladder Program Execution
When the ladder diagram is executed by the CPU Unit, the execution condition (i.e., power flow)
flows from left to right and top to bottom.
The flow is different from that for circuits that consist of hard-wired control relays.
For example, when the diagram in figure A is executed by the CPU Unit, power flows as though
the diodes in brackets were inserted so that output R2 is not controlled by input condition D.
The actual order of execution is indicated on the right with mnemonics.
To achieve operation without these imaginary diodes, the diagram must be rewritten. Also, the
power flow in figure B cannot be programmed directly and must be rewritten.

Figure A
A  Signal flow  Order of execution (mnemonics)
( ) B 
R1 LD A AND B
 ()  LD C OUT R1
C D
OUT TR0
LD TR0
(
) AND D AND E
E  OR LD  OUT R2
R2

Figure B
A B
R1

E
C E
R2

Number of Times Bits Can Be Used and Connection Method

There is no limit to the number of I/O bits, work bits, timers, and other input bits that can be used.
Program structure should be kept as clear and simple as possible even if it means using more
input bits to make the programs easier to understand and maintain.

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5 Understanding Programming

There is no limit to the number of input conditions that can be connected in series or in parallel on
the rungs.

Two or more OUT instructions can be connected in parallel.

0.00 0.05
TIM
0000
#100

102.00

Output bits can also be used in input conditions.

102.00

5-1 Programming
102.00

z Ladder Programming Restrictions


5
A rung error will occur if a ladder program is not connected to both bus bars.
The ladder program must be connected to both bus bars so that the execution condition will flow
from the left bus bar to the right bus bar.

5-1-3 Basics of Programming


A rung error will occur if the rungs are not connected to both bus bars. Program execution will still
be possible.

A rung error will occur if an attempt is made to directly connect to the bus bar an instruction that
cannot be connected.
OUT instructions, timers, counters, and other output instructions cannot be connected directly to
the left bus bar.
If one is connected directly to the left bus bar, a rung error will occur during the program check on
the CX-Programmer for CP1E.

MOV

Additional Information

Insert an unused work bit or the Always ON Flag (ON, one of the Condition Flags) in an NC con-
dition if an input condition must be kept ON at all times.

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5 Understanding Programming

Unused work bit

ON (Always ON Flag)
MOV

A location error will occur if an instruction that cannot be connected to the right bus bar is con-
nected to it.
An input condition cannot be inserted after an OUT instruction or other output instruction. The
input condition must be inserted before an OUT instruction or other output instruction. If it is
inserted after an output instruction, then a location error will occur during the program check in the
CX-Programmer for CP1E.

0.00 0.03 102.01 0.04

0.01 102.01

A warning will occur if the same output bit is used more than once in an OUT instruction.
The same output bit cannot be controlled by more than one instruction. Instructions in a ladder
program are executed in order from the top rung in each cycle. The result of an OUT instruction in
a lower rung will be ultimately saved in the output bit. The results of any previous instructions con-
trolling the same bit will be overwritten and not output.
Output bit CIO 100.00

Output bit CIO 100.00

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5 Understanding Programming

5-2 Tasks, Sections, and Symbols

5-2-1 Overview of Tasks

There are basically two types of tasks.


Task settings must be made to use interrupt tasks with a CP1E CPU Unit.
Applicable
Task type Description programming Execution condition

5-2 Tasks, Sections, and Symbols


language
Cyclic task Executed once per cycle Ladder diagram Only one for the CP1E.
(Normally, the user does not have to con-
sider this.)
Interrupt tasks Executed when a specific Ladder diagram An interrupt task is placed into READY
condition occurs. The process status when the interrupt condition that is
being executed is interrupted. set for it occurs. A condition can be set for
each of the following interrupt tasks.
Scheduled interrupt tasks
I/O interrupt tasks

5
5-2-2 Overview of Sections

5-2-1 Overview of Tasks


With the CX-Programmer for CP1E, programs can be created and displayed in functional units called
sections.
Any program in a task can be divided into sections.
Using sections improves program legibility and simplifies editing.

5-2-3 Overview of Symbols

Symbols
I/O memory area addresses or constants can be specified using character strings by registering the
character strings as symbols.
Register the symbols in the symbol table of the CX-Programmer for CP1E.
Programming with symbols enables programming with names rather than having to be aware of the
actual addresses.
The symbol table is saved in the CX-Programmer project file (.CXP) along with other parameters, such
as the user programs.

Symbol Types
The following types of symbols are supported.
There are two types of symbols that can be used in programs.

z Global Symbols
Global symbols can be accessed from all ladder programs in the PLC.

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5 Understanding Programming

z Local Symbols
Local symbols can be accessed from only one task. They are assigned to individual tasks.

Addresses are allocated to symbols used in programming using one of the following methods.
User Specifications
Automatic allocation using the CX-Programmer for CP1E
The area of memory used for automatic allocations is set by selecting Memory Allocation - Auto-
matic Address Allocation from the PLC Menu in the CX-Programmer for CP1E.
Scope
Address and
Classifica- Project tree in the CX-Pro- Access I/O comment
Name Access Access
tion grammer for CP1E using sym- (without a
from other from the
bols from a symbol name)
tasks local task
network
Symbols in Global PLC tree Not Possible. Possible. Supported
program- symbols possible.
ming

Local Program tree Not Possible. Not supported


symbols possible.

Note Global and local indicate only the scope of application of the symbol.
They have nothing to do with the scope of application for memory addresses.
Therefore, a warning but not an error will occur in the following cases, and it will be possible to
transfer the user program.
The same addresses is used for two different local symbols.
The same addresses is used for a global symbol and a local symbol.

Additional Information

In programs in the CX-Programmer for CP1E, global symbols and local symbols can be identi-
fied by the following character colors and symbol icons.

Classification Display color Example (default color)


Global symbols Black (fixed) Start

3.00

Local symbols Blue (default) Error


Select Tools - Options, display the Appear-
ance Tab Page, and select Local Symbols to W0.00
change the color.

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5 Understanding Programming

5-3 Programming Instructions


This section describes operands, instruction variations, and execution conditions.

5-3-1 Operands
Operands specify preset instruction parameters that are used to specify I/O memory area contents or
constants. Operands are given in boxes in the ladder programs.
Addresses and constants are entered for the operands to enable executing the instructions.
Operands are classified as source, destination, or number operands.

5-3 Programming Instructions


Example:

MOV SBS

&0 S (source) 2 N (number)


D0 D (destination)

Operand
Operand type Description
symbol
Source oper- Specifies the address of SS Source oper- Source operand other than control
and the data to be read or a and data (C)
constant. CC Control data Compound data in a source operand
5
that has different meanings depend-
ing on bit status.

5-3-1 Operands
Destination Specifies the address DD
operand where data will be writ-
(results) ten.
Number Specifies a particular N With numbers, it is not possible to specify an address
number used in the for indirect specification (except for jump instruction
instruction, such as a numbers).
subroutine number.

Operands are also called the first operand, second operand, and so on, starting from the top of the
instruction.

MOV
#0 First operand
D0 Second operand

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5 Understanding Programming

5-3-2 Instruction Variations


The following variations are available for instructions to differentiate executing conditions and to refresh
data when the instruction is executed (immediate refreshing).
Variation Symbol Description
No variation used. These instructions are executed once every cycle while
the execution condition is satisfied.
Differentiation ON @ These instructions are executed only once when the exe-
variations cution condition turns ON.
OFF % These instructions are executed only once when the exe-
cution condition turns OFF.
Immediate refreshing ! Data in the built-in I/O area specified by the operands is
refreshed when the instruction is executed.

! @ MOV

Instruction (mnemonic)

Differentiation variation

Immediate refresh variation

5-3-3 Execution Conditions


The following two types of basic and special instructions can be used.
Non-differentiated instructions: Executed every cycle
Differentiated instructions: Executed only once

Non-differentiated Instructions

z Output Instructions (Instructions That Require Input Conditions)


These instructions are executed once every cycle while the execution condition is satisfied (ON or
OFF).

Non-differentiated Example:
Output instructions MOV
executed every cycle

z Input Instructions (Logical Starts and Intermediate Instructions)


These instructions read bit status, make comparisons, test bits, or perform other types of processing
every cycle. If the results are ON, the input condition is output (i.e., the execution condition is turned
ON).

Input instruction executed every cycle Example:

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5 Understanding Programming

Input-differentiated Instructions

z Upwardly Differentiated Instructions (Instructions Preceded by @)


Output Instructions
The instruction is executed only during the cycle in which the execution condition changes from
OFF to ON.
The instruction is not executed in the following cycle.

Example: 1.02
@ Upwardly
differentiated @MOV

5-3 Programming Instructions


instruction

Executes the MOV instruction once


when CIO 1.02 turns ON.

Input Instructions (Logical Starts and Intermediate Instructions)


The instruction reads bit status, makes comparisons, tests bits, or performs other types of pro-
cessing every cycle and will output an ON execution condition when the result changes from OFF
to ON.
The execution condition will turn OFF the next cycle.

Upwardly differentiated instruction Example: 1.03


  5

5-3-3 Execution Conditions


ON execution condition created for one
cycle when CIO 1.03 turns ON.

Input Instructions (Logical Starts and Intermediate Instructions)


The instruction reads bit status, makes comparisons, tests bits, or performs other types of pro-
cessing every cycle and will output an ON execution condition (power flow) when the result
changes from OFF to ON.

Upwardly differentiated instruction 1.03


Example:
 

OFF execution condition created for one


cycle when CIO 1.03 turns ON.

z Downwardly Differentiated Instructions (Instruction Preceded by %)


Output Instructions
The instruction is executed only during the cycle in which the execution condition changes from
ON to OFF.
It is not executed in the following cycle.

Example: 1.02
% Downwardly
differentiated %SET
instruction

Executes the SET instruction once


when CIO 1.02 turns OFF.

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5 Understanding Programming

Input Instructions (Logical Starts and Intermediate Instructions)


The instruction reads bit status, makes comparisons, tests bits, or performs other types of pro-
cessing every cycle and will output an ON execution condition (power flow) when the result
changes from ON to OFF.
The execution condition will turn OFF the next cycle.

Downwardly differentiated instruction Example: 1.03


 

OFF execution condition created for one cycle


when CIO 1.03 turns ON.

Input Instructions (Logical Starts and Intermediate Instructions)


The instruction reads bit status, makes comparisons, tests bits, or performs other types of pro-
cessing every cycle and will output an ON execution condition (power flow) when the result
changes from ON to OFF.
The execution condition will turn OFF the next cycle.

Downwardly differentiated instruction 1.03


Example:
 

OFF execution condition created for one cycle


when CIO 1.03 turns OFF.

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5 Understanding Programming

5-3-4 Specifying Data in Operands

Specifying Addresses
Application
Operand Description Example
examples
Specifying The word address and bit number are speci- 1 . 02 1.02
bit fied directly to specify a bit.
addresses Bit number 02
.
Word address CIO 1

5-3 Programming Instructions


Bit number
(00 to 15)

Word address

Note For Timer Completion Flags and


Counter Completion Flags, there is no
distinction between word addresses
and bit addresses.
Specifying The word address is specified directly to MOV 3 D200
3
word specify a 16-bit word.
Word address CIO 3
addresses
D200
Word address Word address D200 5
Specifying In brackets, specify the number of bits to off- 10.00[2] 10.00[2]
offsets for bit set the specified starting bit address. Number of bits to offset the address10.02

5-3-4 Specifying Data in Operands


addresses Starting bit address
.
Offset Constant 10.00 [W0]
0 to 15 or word Number of bits to offset the address
address in I/O memory When W0 = &210.02
Starting bit address Starting bit address

A symbol can also be specified for the start-


ing bit address. Only Holding, Work, and DM
Area addresses can be used regardless of
whether a physical address or symbol is
used.
A constant or word address in I/O memory
can be used for the offset. If a word address
is specified, the contents of the word is used
as the offset.
Specifying In brackets, specify the number of words to D0[2] MOV 3 D0[200]
offsets for offset the specified starting bit address. Number of words to offset the addressD2

word Starting word address


. [ ]
addresses
Offset Constant of 0 or D0 [W0]
higher or word address in
Number of words to offset the address
I/O memory When W0 = &2 D2
Starting word address Starting word address

A symbol can also be specified for the start-


ing word address. Only Holding, Work, and
DM Area addresses can be used regardless
of whether a physical address or symbol is
used.
A constant or word address in I/O memory
can be used for the offset. If a word address
is specified, the contents of the word is used
as the offset.

CP1E CPU Unit Software Users Manual(W480) 5-13


5 Understanding Programming

Application
Operand Description Example
examples
Specifying An offset from the beginning of the DM Area @D300
MOV #0001 @D300
indirect DM is specified. The contents of the address will
addresses in be treated as binary data (00000 to 32767)
&256 decimal Contents
Binary Mode to specify the word address in DM Area.
Add the @ symbol at the front to specify an (#0100 hexadecimal)
indirect address in Binary Mode.
@D Specify D00256

Contents &0 to &32767 decimal Add @


(#0000 to #7FFF hex)

Indirect DM An offset from the beginning of the DM Area * D200 MOV #0001 *D200
Addressing is specified. The contents of the address will
in BCD be treated as BCD data (0000 to 9999) to Contents
#0100
Mode specify the word address in the DM Area.
Add an asterisk (*) at the front to specify an
indirect address in BCD Mode. Specify D100

*D
Add *

Contents 0000 to 9999


(BCD)

5-3-5 Data Formats


The following table shows the data formats that the CP1E CPU Units can handle.
4-digit
Decimal
Type Data format hexadeci-
equivalent
mal
Unsigned &0 to #0000 to
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
binary &65535 #FFFF
Binary 215 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20
Hexadecimal 23 22 21 20 23 22 21 20 23 22 21 20 23 22 21 20
Decimal 32768 16384 8192 4096 2048 1024 512 256 128 64 32 16 8 4 2 1

Signed 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Negative: Negative:
binary -1 to #8000 to
Binary: 215 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20 - 32768 #FFFF
Hexadecimal: 23 22 21 20 23 22 21 20 23 22 21 20 23 22 21 20
Decimal: -32768 16384 8192 4096 2048 1024 512 256 128 64 32 16 8 4 2 1 Positive: Positive:
0 to 32767 #0000 to
Sign bit: #7FFF
1:Negative, 0:Non-negative

The data is treated as 16-bit signed binary data using the leftmost bit as the
sign bit. The value is expressed in 4-digit hexadecimal.
Positive numbers: If the leftmost bit is OFF, it indicates a non-negative value.
For 4-digit hexadecimal, the value will be 0000 to 7FFF hex.
Negative numbers: If the leftmost bit is ON, it indicates a negative value. For 4-
digit hexadecimal, the value be 8000 to FFFF hex. It will be expressed as the
2s complement of the absolute value of the negative value (decimal).

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5 Understanding Programming

4-digit
Decimal
Type Data format hexadeci-
equivalent
mal
BCD (binary 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
#0 to #9999 #0000 to
coded deci- #9999
mal) BCD 23 22 21 20 23 22 21 20 23 22 21 20 23 22 21 20

Decimal 0 to 9 0 to 9 0 to 9 0 to 9

Single-preci- 31 30 29 23 22 21 20 19 2 1 0
(Refer to
sion floating- the follow-
point decimal ing note.)

5-3 Programming Instructions


Sign of Exponent Mantissa
mantissa Binary

sign Exponent
Value = (-1) 1.[Mantissa] 2
Sign bit (bit 31): 1: Negative, 0: Positive
Mantissa: The 23 bits from bit 00 to bit 22 contain the mantissa, i.e., the portion
below the decimal point in 1. .....,in binary.
Indicates this value.

The 8 bits from bit 23 to bit 30 contain the exponent. The exponent
n n-127
is expressed in binary as the n in 2 . The actual value is 2 .

This format conforms to the IEEE 754 standard for single-precision floating-
5
point data. It is used only with instructions that convert or calculate floating-
point data.

5-3-5 Data Formats


Input using operands in the CX-Programmer for CP1E as signed decimal or
32-bit hexadecimal with the # symbol.
When inputting operands in the I/O Memory Edit/Monitor Window of the CX-
Programmer for CP1E as signed decimal values with seven digits or less, the
value will be automatically converted to scientific notation (mantissa
10Exponent) for setting and monitoring. Inputs must be made using scientific
notation for values with eight or more digits.
Example: When -1234.00 is input, it will become -1.234000e+003 in scientific
notation. For the mantissa10Exponent, the value before the e is the man-
tissa and the value after the e is the signed exponent.

Note Data range for single-precision floating-point decimal: -3.402823 1038 Value -1.175494 10-38, 0, +1.175494
10-38 Value 3.402823 1038

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5 Understanding Programming

5-3-6 I/O Refresh Timing


The following methods are used to refresh external I/O.
Cyclic refreshing
Immediate refreshing (instructions with the ! variation and IORF)

Cyclic Refreshing
I/O is all refreshed after ladder programs are executed.

Start
15 0
!LD1.01 CIO 0001
16-bit increments
15 0
!OUT2.09 CIO 0002

END
All actual I/O data



Cyclic refreshing
(batch)
I/O refresh

Execute an instruction with the immediate refresh variation or an IORF instruction to perform I/O
refreshing while ladder programming is being executed.

Immediate Refresh
The method of specifying immediate refreshing depends on whether the object to be refreshed is built-
in I/O or an Expansion Unit.
To specify immediate refreshing for the CPU Units built-in I/O, specify the immediate refresh variation
(!) of the instruction.
To specify immediate refreshing for Expansion I/O or an Expansion Unit, use the IORF instruction.
z Instructions with Refresh Variation (!)
I/O will be refreshed as shown below when an instruction is executing if a real I/O bit in the CPU
Units built-in I/O is specified as an operand.
Bit Operands: I/O refreshing for the bit will be performed.
Word Operands: I/O refreshing for the 16 specified bits will be performed.
Input or Source Operands: Inputs are refreshed immediately before the instruction is executed.
Output or Destination Operands: Outputs are refreshed immediately after the instruction is exe-
cuted.
Add an exclamation mark (!) in front of the instruction to specify immediate refreshing.
z IORF(097) Instruction
An I/O refresh (IORF) instruction is supported as a special instruction to refresh actual I/O data in
the specified word range. By using this instruction, it is possible to refresh all data or data in a spec-
ified range of actual I/O in CP-series Expansion I/O and Expansion Unit during the cycle.

Precautions for Correct Use


It is not possible to use the immediate refresh variation (!) for the actual I/O of Expansion I/O or
an Expansion Unit. Use the IORF instruction.

5-16 CP1E CPU Unit Software Users Manual(W480)


5 Understanding Programming

5-4 Constants: &, #, +, -, and Numbers


without Symbols

5-4 Constants: &, #, +, -, and Numbers without Symbols


Overview

Constants are numeric values expressed in 16 or 32 bits and can be specified as instruction operands.
The following types of constants are supported.
Bit Strings or Numeric Values (Integers)
Decimal values (with & symbol), hexadecimal values (with # symbol), BCD values (with # symbol),
or signed decimal values (with + or - symbol)
Operands Specifying Numbers
Decimal Notation (No Symbol)
Floating Point (Real Number) Notation
Signed decimal notation (with + or - symbol and decimal point)

Notation and Ranges

z Using Operands for Bit Strings or Numeric Values (Integers)


Unsigned Binary
5
Data type Decimal values Hexadecimal values
Notation With & symbol With # symbol
& 10 # 000A

Decimal value Hexadecimal value


(integer) using 0 to F

Decimal symbol Hexadecimal symbol

Application example: Application example:


MOV &10 D0 MOV #000A D0
Stores 10 decimal (#000A hex) in D0. Stores #000A hex (&10 decimal) in D0.

Precautions for Correct Use Precautions for Correct Use


An error will occur and the left bus bar An error will occur and the left bus bar will be
will be displayed in red if a hexadecimal displayed in red if a hexadecimal value
value including A to F is input with & including A to F is input without # from the
from the CX-Programmer for CP1E. CX-Programmer for CP1E.
The input will be treated as an address The input will be treated as an address in the
in the CIO Area and the contents of that CIO Area and the contents of that address
address will be specified if a decimal will be specified if a decimal value without #
value without & is input from the CX- is input from the CX-Programmer for CP1E.
Programmer for CP1E.
Range 16 bits &0 to 65535 #0000 to #FFFF
32 bits &0 to 4294967295 #00000000 to #FFFFFFFF

CP1E CPU Unit Software Users Manual(W480) 5 - 17


5 Understanding Programming

Signed Binary
Data type Decimal values Hexadecimal values
Notation Signed + or - With # symbol
- 10 # FFF6

Decimal value Hexadecimal value


(integer) using 0 to F

+ or - sign Hexadecimal symbol

Application example: Application example:


MOV -10 D0 MOV # 0100 D0
Stores 10 decimal (#FFF6 hex) in D0. Stores #FFF6 hex (10 decimal) in D0.

Precautions for Correct Use Precautions for Correct Use


The input will be treated as an address An error will occur and the left bus bar will be
in the CIO Area and the contents of that displayed in red if a hexadecimal value
address will be specified if a decimal including A to F is input without # from the
value without + or - is input from the CX-Programmer for CP1E.
CX-Programmer for CP1E. The input will be treated as an address in the
CIO Area and the contents of that address
will be specified if a decimal value without #
is input from the CX-Programmer for CP1E.
Range 16 bits Negative: -32768 to -1 Negative: #8000 to #FFFF
Positive: 0 to +32767 Positive: #0000 to #7FFF
32 bits Negative: -2147483648 to -1 Negative: #8000 0000 to #FFFF FFFF
Positive: 0 to +2147483647 Positive: #0000 0000 to #7FFF FFFF

Unsigned BCD
Data type Decimal values BCD values
Notation None # 0010
Decimal value using
0 to 9

BCD symbol

Application example:
+B #0010 D0 D1
Adds #0010 and the contents of D0 as BCD data
and stores the result in D1.

Precautions for Correct Use


The input will be treated as an address in the
CIO Area and the contents of that address will
be specified if a decimal value without # is input
from the CX-Programmer for CP1E.
Range 16 bits None #0000 to #9999
32 bits #0000 0000 to #9999 9999

5-18 CP1E CPU Unit Software Users Manual(W480)


5 Understanding Programming

z Using Operands to Specify Numbers


Data type Decimal values Hexadecimal values or BCD values
Notation No symbol (value only) Not possible.

5-4 Constants: &, #, +, -, and Numbers without Symbols


10
Number only

Application example:SBS 0
Jumps to subroutine 0.

Precautions for Correct Use


An error will occur and the left bus
bar will be displayed in red if a deci-
mal value is input with & from the
CX-Programmer for CP1E.

z Using Floating-point (Real Number) Notation for Operands


Data type Decimal values Hexadecimal values
Notation With + or - With # symbol
(for single-precision data)
+ 0.10
Decimal value # 3DCCCCCD
(real number) Hexadecimal value
using 0 to F
5
+ or - sign
Hexadecimal symbol

Application example: Application example:


FIX +0.10 D0 FIX #3DCCCCCD D0
Converts floating point +0.10 into 16- Converts floating point #3DCCCCCD (+0.10 deci-
bit signed binary data and stores the mal) into 16-bit signed binary data and stores the
integer portion in D0. integer portion in D0.

Precautions for Correct Use Precautions for Correct Use


The input will be treated as an The input will be treated as an address in the
address in the CIO Area, an error will CIO Area, an error will occur, and the left bus
occur, and the left bus bar will be dis- bar will be displayed in red if a hexadecimal
played in red if a decimal value with a value including A to F is input without # from the
decimal point is input without + from CX-Programmer for CP1E.
the CX-Programmer for CP1E.

Additional Information

Zero suppression can be used when inputting any data type.


Example: &2 can be input rather than &02 .
Example: #2 can be input rather than #02.
BIN indicates binary data.
BCD data is binary coded decimal.

CP1E CPU Unit Software Users Manual(W480) 5 - 19


5 Understanding Programming

Details

z Using Operands for Bit Strings or Numeric Values


Bit String
Input the operand using decimal representation with the & symbol or hexadecimal representation
with the # symbol.
Example: Input &0 to &65535 as decimal or #0000 to #FFFF as hexadecimal for operand S
(source data) of the MOV instruction.
Signed decimal data can also be input.
Numeric Values
Input the operand using decimal representation with the & symbol or hexadecimal representation
with the # symbol.
Example: Input &0 to &65535 decimal or #0000 to #FFFF hexadecimal for operand N (number of
words) of the XFER instruction.
Indirect specification is possible.
Example: Operand N of the XFER instruction: When an address (e.g., W100) is input as the num-
ber of words to transfer, the contents of the addressed word (e.g., the contents of
W100) is indirectly specified.

z Using Operands to Specify Numbers


Input the operand using decimal representation with a value only (i.e., no & prefix).
Example: Operand N of SBS Instruction: Input 0 to 1023 decimal as the subroutine number.
Indirect specification is not possible.
Input a numeric value for operands that can be indirectly specified (e.g., jump numbers for JMP
instruction or JME instruction).
Operands That Specify Numbers
Instruction type Instruction operand
Timer instructions Timer numbers for TIM/TIMX, TIMH/TIMHX, TMHH/TMHHX,
TIMU/TIMUX, TMUH/TMUHX, and TTIM/TTIMX instructions
Counter instructions Counter numbers for CNT/CNTX and CNTR/CNTRX instructions
Multi-interlock instructions Interlock numbers for MILH and MILR instructions
Subroutine instructions Subroutine numbers for SBS instructions
Interrupt control instructions Interrupt numbers for MSKS and CLI instructions
Failure diagnosis instructions FAL numbers for FAL instructions and FALS numbers for FALS instruc-
tions

z Using Operands to Specify Floating-point Values (Real Number)


Input the operand using decimal representation with + or - symbol or hexadecimal representation
with # symbol.
Example: Input decimal values in the following ranges or #0000 0000 to #FFFF FFFF hexadecimal
for operand S (first source word) of the FIX instruction.
-3.402823 1038 Value -1.175494 10-38, 0,
+1.175494 10-38 Value +3.402823 1038

5-20 CP1E CPU Unit Software Users Manual(W480)


5 Understanding Programming

5-5 Specifying Offsets for Addresses

5-5-1 Overview

When an address is specified for an instruction operand, it is possible to change the specified address
by specifying in brackets an offset for the specified address.

5-5 Specifying Offsets for Addresses


W100.0[W0]

When the start address is


W100.0 and W0 is &2, 2 is
added, resulting in W100.2. Examples of Specifying When the start address is
Bit Address Offsets D100 and W1 is &3, 3 is
added, resulting in D103.
W300.0[4]
Examples of Specifying
Word Address Offsets
An offset of 4 is added to
the start address of W300.0,
An offset of 12 is added to
resulting in W300.4.
the start address of D100,
resulting in D112.

z Bit Addresses
5
The bit address is offset by the amount specified by n (number of bits) from A (start bit address).

5-5-1 Overview
A [n]
Offset

Starting bit address

Number of bits to offset: +n

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Word 

Starting bit address A

Start Bit Address


It is possible to specify the start bit address with a bit address or with a symbol (except the NUM-
BER data type cannot be used).
Offsetting is possible only for addresses in the Holding, Work, and DM Areas.
The I/O comment for the start bit address is displayed.
Offset
The offset can be specified as a decimal constant, word address (but CIO Area addresses cannot
be specified), or a one-word symbol (i.e., symbols with the following data types: INT, UINT,
WORD, CHANNEL).
If a word address is specified, the contents of the specified word is used as the offset.
If the offset exceeds bit 15 in the specified word, offsetting will continue from bit 00 in the next
word.
If the offset is specified indirectly, make sure that the final bit address does not exceed the upper
limit of the memory area by using input comparison or other instruction.

CP1E CPU Unit Software Users Manual(W480) 5-21


5 Understanding Programming

If the number of offset bits exceeds the memory area of the start bit address, the final bit address will
be in the next memory area in the order determined by the actual PLC memory addresses.
Examples:

10.0 [2]  10.02 a [2]  10.02

Offset (decimal value) Offset (decimal value)

Start bit address; symbol a = 10.0


Start bit address (bit symbol named a)
(bit address in I/O memory)

10.00 [W0]  10.02


a [b]  10.02
Offset when W0 = &2
(word address in I/O memory) Offset; symbol b = &2
Start bit address Start bit address; symbol a = 10.0
(bit address in I/O memory)

z Word Addresses
The word address is offset by the amount specified by n (number of offset words) from A (start word
address).

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
A [n] Word 

Start word address A


Offset +n

Start Word Address


It is possible to specify the start word address with a word address or with a symbol (except the
NUMBER data type cannot be used).
Offsetting is possible only for addresses in the Holding, Word, and DM Areas.
The I/O comment for the start bit address is displayed.
Offset
The offset can be specified as a decimal constant, word address (but CIO Area addresses cannot
be specified), or one-word symbol (i.e., symbols with the following data types: INT, UINT, WORD,
CHANNEL).
If a word address or symbol is specified, the contents of the specified word is used as the offset.
If the offset exceeds bit 15 in the specified word, offsetting will continue from bit 00 in the next
word.
If the offset is specified indirectly, make sure that the final bit address does not exceed the upper
limit of the memory area by using input comparison or other instruction.

If the number of offset words exceeds the memory area of the start word address, the final word
address will be in the next memory area in the order determined by the actual PLC memory
addresses.

Examples:

D0 [2]  D2 a [2]  D2

Offset (decimal value)


Offset (decimal value)
Start word address;
Start word address symbol a (one-word symbol) = D0
(word address in I/O memory)

D0 [W0]  D2
a [b]  D2
Offset; W0 = &2
(word address in I/O memory) Offset;
symbol b(one-word symbol) = &2
Start bit address
(bit address in I/O memory) Start word address;
symbol a (one-word symbol) = D0

5-22 CP1E CPU Unit Software Users Manual(W480)


5 Understanding Programming

Caution
Observe the following precaution if a symbol or address is specified for an offset in a ladder dia-
gram.
Program so that the memory area of the start address is not exceeded when the offset is spec-
ified indirectly using a word address or symbol.
For example, write the program so that processing is executed only when the indirect specifica-
tion does not cause the final address to exceed the memory area by using an input comparison

5-5 Specifying Offsets for Addresses


instruction or other instruction.
If an indirect specification causes the address to exceed the area of the start address, the sys-
tem will access data in other area, and unexpected operation may occur.

5-5-2 Application Examples for Address Offsets


It is possible to dynamically specify the offset by specifying a word address in I/O memory for the offset
in the brackets. The contents of the specified word address will be used as the offset.
For example, execution can be performed by increasing the address by incrementing the value in the
brackets and using only one instruction.

z Ladder Program Example 5


In this example, two areas of consecutive data are used: D0 to D99 and D100 to D199.
The contents of corresponding words are added starting from the specified starting point, W0, to the

5-5-2 Application Examples for Address Offsets


end of the areas and the sums are output to D200 to D299 starting from the specified offset from
D200.
For example, if W0 is 30, the corresponding words from D30 to D99 and D130 to D199 are added,
and the sums are output to D230 to D299.

 Set the value of W0 to the offset word (W1) using the MOV instruction.

 Use the operand of the addition instruction to specify and execute D0[W1] +
D100[W1] = D200[W1]. Repeat this process
 Increment W1 to increase the offset. 100 times.

Each process is performed with an input comparison instruction (<) as the execution condition so
that W1 does not exceed &100 to make sure that the upper limit of the indirect addressing range is
not exceeded.

CP1E CPU Unit Software Users Manual(W480) 5-23


5 Understanding Programming

Execution condition
a

MOV When execution condition a (upwardly


W0 differentiated) turns ON, the value of W0 is
set to W1.
W1

FOR Starts FOR loop


&100
Execution condition
a
< If execution condition a is ON and the
+
value of W0 is less than &100, the data
W1 D0[W1] from the start position until D99 and
&100 D100[W1] the data until D199 are added, and the
D200[W1] sum for each is output until D299.

++ While execution condition a is ON, W0 is


incremented.
W1

NEXT Returns to FOR

5-24 CP1E CPU Unit Software Users Manual(W480)


5 Understanding Programming

5-6 Checking Programs


CJ-series programs can be checked at the following stages.
Checking during input operations from the CX-Programmer for CP1E
Checking programs using the CX-Programmer for CP1E
Instruction check during execution
Fatal error check (program errors) during execution

5-6-1 Checking during Input Operations from the CX-Programmer


The programming will be automatically checked by the CX-Programmer for CP1E at the following times.

5-6 Checking Programs


Timing Checked
When inputting ladder diagrams Instruction inputs, operand inputs, programming patterns
When loading files All operands for all instructions and all programming patterns
When downloading files Support for CP1E CPU Unit model and all operands for all instructions
During online editing Memory capacity, etc.

The results of checking are output to the Text Tab Page of the Output Window.
Also, the left bus bar of illegal program sections will be displayed in red in Ladder View.
5
5-6-2 Program Checks with the CX-Programmer for CP1E

5-6-1 Checking during Input Operations from the CX-Programmer


The user program can be checked in the CX-Programmer for CP1E. When the program is checked, the
user can specify program check in any of four levels: A, B, or C (in order of the seriousness of the
errors) or a custom check level.
The CX-Programmer for CP1E does not check range errors for indirectly addressed operands in
instructions. If an instructions operand data is invalid, the ER Flag will be turned ON during the program
execution check, which is described in the next section.

Refer to the CS/CJ/NSJ-series Instructions Reference Manual (Cat. No. W483) for details.

CP1E CPU Unit Software Users Manual(W480) 5-25


5 Understanding Programming

5-6-3 Debugging with the Simulator


Programming can be debugged without connecting to the actual PLC by simulating CPU Unit operation
on a computer.

Checking Ladder Program Operation


Programming that has been created can be checked and debugged with a virtual PLC by starting the
Simulator in the CX-Simulator from the CX-Programmer for CP1E.

CX-Programmer
Simulation
Simulation line connection

Download

Virtual PLC
(Simulator)

In addition to transferring programs and monitoring, the following functions can be used with the Simu-
lator.
Executing Step Run, Continuous Step Run, or Scan Run.
Specifying break points, start points, and I/O break conditions.
Checking the number of executions and execution time for each task.
Simulating execution of interrupt tasks.
Force-setting and force-resetting bits.

Debugging with Operation between PT and Ladder Programming:


Integrated Simulation
This functionality is not supported for the CP1E.

5-26 CP1E CPU Unit Software Users Manual(W480)


5 Understanding Programming

Debugging Operation with PLC Error (Error Simulation Function)


With the CX-Programmer for CP1E, it is possible to generate system errors in the virtual PLC during
ladder programming simulation.
It is easy to check operation of the ladder programming an the NS-series PT when a PLC system error
occurs by generating the desired fatal or non-fatal system error using a special operation window.

CX-Programmer PLC Error Simulator


Simulation Start Error list
PLC error Simulator Example: The Battery Error Flag (A402.04) turns ON.
The Cycle Time Too Long Flag (A401.08) turns
ON. The Memory Error Flag (A401.15) turns ON.

5-6 Checking Programs


An error occurs

Simulation in progress

An error occurs
Virtual PLC

An error is simulated 5

Note Unlike with an actual error, ladder execution will not stop even if a fatal error is generated using the PLC error

5-6-3 Debugging with the Simulator


generation simulation function.

Additional Information

System errors can also be generated in the PLC by using a FAL or FALS instruction.

CP1E CPU Unit Software Users Manual(W480) 5-27


5 Understanding Programming

5-6-4 Program Execution Check


The following checks can be performed using the CX-Programmer for CP1E during instruction execution.
The following checks are performed during instruction execution.
Type of error Flag that turns ON for error Stop/Continue operation
Instruction Processing ER Flag (See note 1.) A setting in the PLC Setup can be used to specify
Error whether to stop or continue operation for instruction
processing errors. The default is to continue opera-
tion.
A program error will be generated and operation will
stop only if Stop Operation is specified.
Illegal Area Access Error AER Flag (See note 2.) A setting in the PLC Setup can be used to specify
whether to stop or continue operation for instruction
processing errors. The default is to continue opera-
tion.
A program error will be generated and operation will
stop only if Stop Operation is specified.
Illegal Instruction Errors Illegal Instruction Error Flag Fatal (program error)
(A295.14)
User Program Area Over- User Program Area Overflow Fatal (program error)
flow Errors Error Flag (A295.15)
*1 The Instruction Processing Error Flag (A295.08) will also turn ON if Stop Operation is specified when an error
occurs.
*2 The Access Error Flag (A295.10) will turn ON if Stop Operation is specified when an error occurs.

1. Instruction Processing Errors (Error Flag ON Errors)


An instruction processing error will occur if incorrect data was provided when executing an instruction
or an attempt was made to execute an instruction outside of a task.
Here, data required at the beginning of instruction processing was checked and as a result, the
instruction was not executed and the P_ER Flag (Error Flag) will be turned ON. The P_EQ and P_N
Flags may be retained or turned OFF depending upon the instruction.
The P_ER Flag (error Flag) will turn OFF if the instruction (excluding input instructions) ends nor-
mally.
Conditions that turn ON the P_ER Flag will vary with individual instructions.
Refer to the CP-series Instructions Reference Manual (Cat. No. W483).

If Instruction Errors are set to Stop Operation in the PLC Setup, then operation will stop (fatal error)
and the Instruction Processing Error Flag (A295.08) will turn ON if an instruction processing error
occurs and the P_ER Flag turns ON.

2. Illegal Access Errors (P_AER Flag ON Errors)


Illegal access errors indicate that the wrong area was accessed in one of the following ways when the
address specifying the instruction operand was accessed.
A read or write was executed for a parameter area.
Writing memory that is not installed. (See note.)
Writing to a read-only area.
The value specified in an indirect DM address in BCD mode was not BCD (e.g., D1 contains
#A000).

5-28 CP1E CPU Unit Software Users Manual(W480)


5 Understanding Programming

Instruction processing will continue and the Error Flag (ER Flag) will not turn ON if an access error
occurs, but the Access Error Flag (P_AER Flag) will turn ON.
An access error will occur for the following:

If Instruction Errors are set to Stop Operation in the PLC Setup, then operation will stop (fatal error)
and the Illegal Access Error Flag (A295.10) will turn ON if an illegal access error occurs and the AER
Flag turns ON.

Additional Information

The Access Error Flag (P_AER Flag) will not be cleared after a task is executed. If Instruction
Errors are set to Continue Operation, this Flag can be monitored until just before the END
instruction to see if an illegal access error has occurred in the task program. (The status of the
final P_AER Flag after the entire user program has been executed will be monitored if the AER

5-6 Checking Programs


Flag is monitored on the CX-Programmer for CP1E.)

3. Other Errors
z Illegal Instruction Errors
Illegal instruction errors indicate that an attempt was made to execute instruction data other than
that defined in the system. 5
This error will normally not occur as long as the program is created with CX-Programmer for CP1E.
In the rare even that this error does occur, it will be treated as a program error, operation will stop

5-6-4 Program Execution Check


(fatal error), and the Illegal Instruction Flag (A295.14) will turn ON.

z User Program Area Overflow Errors


User program area overflow errors indicate that an attempt was made to execute instruction data
stored beyond the last address in the user program area defined as program storage area.
This error will normally not occur as long as the program is created with the CX-Programmer for
CP1E.
In the rare event that this error does occur, it will be treated as a program error, operation will stop
(fatal error), and the UM Overflow Flag (A295.15) will turn ON.

Additional Information

If the Error Flag (P_ER) or Illegal Access Error Flag (P_AER) turns ON, it will be treated as a
program error and it can be used to stop the CPU Unit from running. Specify operation for pro-
gram errors in the PLC Setup.

CP1E CPU Unit Software Users Manual(W480) 5-29


5 Understanding Programming

z Program Errors
Program error Description Related flags
No END Instruction An END instruction is not present in the program. The No END Flag
(A295.11) turns ON.
Error During Task Execution No task is ready in the cycle. The Task Error Flag
No program is allocated to a task. (295.12) turns ON.
The corresponding interrupt task number is not
present even though the execution condition for the
interrupt task was met.
Instruction Processing Error The wrong data values were provided in the oper- The ER Flag turns ON and
(ER Flag ON) and Stop Oper- and when an attempt was made to execute an the Instruction Processing
ation set for Instruction Errors instruction. Error Flag (A295.08) turns
in PLC Setup ON if Stop Operation set for
Instruction Errors in PLC
Setup.
Illegal Access Error (AER A read or write was executed for a parameter area. The AER Flag turns ON
Flag ON) and Stop Opera- A read or write was executed for a memory area and the Illegal Access Error
tion set for Instruction Errors that is not mounted. Flag (A295.10) turns ON if
in PLC Setup Stop Operation set for
Writing to a read-only area.
Instruction Errors in PLC
The value specified in an indirect DM address in Setup.
BCD mode is not BCD.
Indirect DM/EM BCD Error The value specified in an indirect DM address in The AER Flag turns ON
and Stop Operation set for BCD mode is not BCD. and the DM/EM Indirect
Instruction Errors in PLC BCD Error Flag (A295.09)
Setup turns ON if Stop Operation
set for Instruction Errors in
the PLC Setup.
Differentiation Address Over- During online editing, more than 131,071 differenti- The Differentiation Over-
flow Error ated instructions have been inserted or deleted. flow Error Flag (A295.13)
turns ON.
Illegal Instruction Errors Execution of an unexecuteable instruction was The UM (User Memory)
attempted. Overflow Flag (A295.14)
turns ON.
User Program Area Overflow An attempt was made to execute instruction data The UM (User Memory)
Errors stored beyond the last address in user memory Overflow Flag (A295.15)
(UM) defined as program storage area. turns ON.

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5 Understanding Programming

5-7 Ladder Programming Precautions

5-7-1 Ladder Programming Precautions

Using Condition Flags

The Condition Flags are shared by all of the instructions, so their status may change often in a single

5-7 Ladder Programming Precautions


cycle.
Therefore, be sure to use Condition Flags on a branched output with the same execution condition
immediately after an instruction to show the results of instruction execution.

z Do not connect an input condition for a Condition Flag directly to the bus bar.
Never connect an input condition for a Condition Flag directly to the bus bar because this will cause
it to show the execution results for another instruction.
Example: Using Instruction A Execution Results

Correct Use Instruction Operands


a Incorrect use
Instruction A LD a
Previous rung 5
The result from instruction A is Instruction A
shown in the Equals Flag.
Condition Flag
Ex) = AND =
Instruction A

5-7-1 Ladder Programming Precautions


Instruction B
Instruction B
Shows the execution results of the
preceding rung if instruction A is not
Condition Flag
executed.
Ex) =
Instruction B

The same execution condition (a) is used for instructions A If the Condition Flag is directly connected to
and B to execute instruction B based on the execution the bus bar, instruction B will be executed
results of instruction A. based on the execution results of the previous
In this case, instruction B will be executed according to the instruction even if instruction A is not executed.
Condition Flag only if instruction A is executed.

CP1E CPU Unit Software Users Manual(W480) 5-31


5 Understanding Programming

z Creating N.C. and N.O. Condition Flag Inputs Using OUT Instructions
The Condition Flags are used by all instructions, so make sure that they do not cause interference in
the same program.
Example: Using Execution Results in N.C. and N.O. Inputs
Incorrect Use Correct use
The Condition Flags will pick up instruction B execution results Make sure each of the results is picked up once by an
even though the N.C. and N.O. input bits are executed from the OUT instruction to ensure that execution results for
same output branch. instruction B will be not be picked up.

The result from instruction A


Instruction A
Instruction A is shown in the Equals Flag.

Condition Flag
C
Ex) =
The result from instruction A
Condition Flag is shown in the Equals Flag.
The result from instruction A
Ex) = Condition Flag is shown in the Equals Flag.
D
Instruction B Ex) =

The result from instruction B C


Condition Flag is shown in the Equals Flag.
Instruction B
Ex) =

A rung will have to be inserted to prevent execution


results for the first MOV instruction from being picked up.

CMP
CMP
#10
#10
D100
D100
Shows results of executing CMP.
Shows results of executing CMP. = A
=
MOV
= B
#200

D200
A
Shows the result of executing MOV.
MOV
MOV
= #200
#300 D200
D300
MOV
B
#300

D300

Precautions for Correct Use


Precautions for Using Condition Flags for Differentiated Instructions
With differentiated instructions, execution results for instructions are shown in Condition Flags
only when execution condition is met, and results for a previous rung (rather than execution
results for the differentiated instruction) will be shown in Condition Flags in the next cycle.
You must therefore be aware of what Condition Flags will do in the next cycle if execution results
for differentiated instructions are to be used.

5-32 CP1E CPU Unit Software Users Manual(W480)


5 Understanding Programming

Example: Instructions A and B will execute only if execution condition C is met, and instruction B picks up the execution
results from instruction A.
Incorrect Use Correct use
If execution condition C remains ON in the next cycle after If instructions A and B are not differentiated instructions,
instruction A was executed, then instruction B will be executed the DIFU (or DIFD) instruction is used instead and
(by the execution condition) when the Condition Flag turns ON instructions A and B are both upwardly (or downwardly)
because of results shown from a previous rung. differentiated and executed for one cycle only.

Previous rung
Previous rung

5-7 Ladder Programming Precautions


C
C
DIFU
Instruction A
Shows execution results for D
instruction A when execution D
condition is met, and then in the
Instruction A
Condition Flag next cycle, shows the execution
Ex) = results of the previous rung.
Instruction B The result from instruction A
Condition Flag is shown in the Equals Flag.
Ex) =
Instruction B

Additional Information

The CONDITION FLAG SAVE and CONDITION FLAG LOAD (CCS and CCL) instructions can
be used to save and load the Condition Flag status. These can be used to access the status of 5
the Condition Flags at other locations in a task or in a different task.

5-7-1 Ladder Programming Precautions


Main Conditions Turning ON Condition Flags
Refer to 6-10 Condition Flags(P_) for a list of Condition Flags.

z Error Flag (P_ER)


The Error Flag will turn ON under special conditions, such as when operand data for an instruction is
incorrect.
The instruction will not be executed when the Error Flag turns ON.

When the Error Flag is ON, the status of other Condition Flags, such as the <, >, OF, and UF Flags,
will not change.
The status of the = and N Flags will vary from instruction to instruction.
For information on the conditions that turn ON the Error Flag, refer to the pages in this manual that
describe the instructions.
Caution is required because some instructions will turn OFF the Error Flag regardless of conditions.

Additional Information

The PLC Setup Settings for when an instruction error occurs determines whether execution will
stop when the Error Flag turns ON.
In the default setting, operation will continue when the Error Flag turns ON.
If Stop Operation is specified when the Error Flag turns ON and operation stops (treated as a
program error), the program address at the point where operation stopped will be stored at in
A298 to A299.
At the same time, A295.08 will turn ON.

CP1E CPU Unit Software Users Manual(W480) 5-33


5 Understanding Programming

z Equals Flag (P_EQ)


The Equals Flag is a temporary flag for all instructions except when comparison results are equal
(=). It is set automatically by the system, and it will change.
The Equals Flag can be turned OFF (ON) by an instruction after a previous instruction has turned it
ON (OFF).
The Equals Flag will turn ON, for example, when MOV or another move instruction moves 0000 hex
as source data and will be OFF at all other times.
Even if an instruction turns the Equals Flag ON, the move instruction will execute immediately and
the Equals Flag will turn ON or OFF depending on whether the source data for the move instruction
is 0000 hex or not.
Some instructions will simply turn OFF the Equals Flag when the instruction is executed.

z Carry Flag (P_CY)


The Carry Flag is used in shift instructions, addition and subtraction instructions with carry input,
addition and subtraction instruction borrows and carries, as well as with PID instructions and FPD
instructions.
Note the following precautions.
Be care when executing instructions that use the Carry Flag as an input (e.g., addition and sub-
traction instructions with borrows and carries) to be sure that the Carry Flag has not been turned
ON or OFF by an unrelated instruction.
The Carry Flag can be turned ON (or OFF) by the execution results for a certain instruction and
can then be turned OFF (or ON) by another instruction.

z Greater Than and Less Than Flags (P_>, P_<)


The P_> and P_< Flags are used in comparison instruction, as well as in the PIDAT and other
instructions.
The P_> or P_< Flag can be turned OFF (or ON) by another instruction even if it is turned ON (or
OFF) by execution results for a certain instruction.

z Negative Flag (P_N)


The Negative Flag is turned OFF when the leftmost bit of the instruction execution results word is 1
for certain instructions and it is turned OFF unconditionally for other instructions.

z Specifying Operands for Multiple Words


An instruction will be executed as written even if an operand requiring multiple words is specified so
that all of the words for the operand are not in the same area. In this case, words will be taken in
order of the PLC memory addresses, as is normal for instructions in the CP1E.
The Error Flag will not turn ON.
As an example, consider the results of executing a block transfer with XFER if 20 words are speci-
fied for transfer beginning with W500. Here, the Work Area, which ends at W511, will be exceeded,
but the instruction will be executed without turning ON the Error Flag.
In the PLC memory addresses, the present values for timers are held in memory after the Work
Area, and thus for the following instruction, W500 to W511 will be transferred to D0 to D11 and the
present values for T0 to T7 will be transferred to D12 to D19.

W500 D00000
XFER
~

~
~

Transfer
&20 Number of transfer words W511 D00011
T0000 D00012
W500 First source word
~

~
~
~

D0 First destination word T0007 D00019

5-34 CP1E CPU Unit Software Users Manual(W480)


5 Understanding Programming

5-7-2 Special Program Sections


CP-series programs have special program sections that will control instruction conditions.
The following special program sections are available
Instruction
Program sections Instructions Status
conditions
Subroutines SBS, SBN, and RET instruc- Subroutine program The subroutine program
tions is executed. section between SBN and

5-7 Ladder Programming Precautions


RET instructions is exe-
cuted.
IL - ILC sections IL and ILC instructions During IL The output bits are turned
Step ladder sections STEP instructions OFF and timers are reset.
Other instructions will not be
executed and previous sta-
tus will be maintained.
FOR-NEXT loop FOR instructions and NEXT Break in progress. Looping
instructions

Instruction Combinations
The following table shows which of the special instructions can be used inside other program sections. 5
:Applicable, {: Not applicable

5-7-2 Special Program Sections


IL-ILC Step ladder FOR-NEXT
Subroutines
sections sections sections

Subroutine
IL-ILC { {
Step Ladder section {
FOR - NEXT loop { { {

Subroutines
Place all the subroutines together just before the END instruction in all programs but after all of the
main program.
A subroutine cannot be placed in a step ladder, block program, or FOR - NEXT section.
If instructions other than those in a subroutine are placed after a subroutine (SBN to RET), those
instructions will not be executed.

Program

Subroutines

Program

Subroutines

CP1E CPU Unit Software Users Manual(W480) 5-35


5 Understanding Programming

Instructions Not Supported in Subroutines


The following instructions cannot be placed in a subroutine.
Classification
Mnemonic Instruction
by function
Step Ladder STEP STEP DEFINE
Instructions SNXT STEP NEXT

Instructions Not Available in Step Ladder Program Sections


The following instructions cannot be used in step ladder program sections.
Classification
Mnemonic Instruction
by function
Sequence Con- FOR, NEXT, and BREAK FOR, NEXT, and BREAK LOOP
trol Instructions END END
IL and ILC INTERLOCK and INTERLOCK CLEAR
JMP and JME JUMP and JUMP END
CJP CONDITIONAL JUMP and CONDITIONAL JUMP NOT
Subroutines SBN and RET SUBROUTINE ENTRY and SUBROUTINE RETURN

Note A step ladder program section can be used in an interlock section (between IL and ILC).
The step ladder section will be completely reset when the interlock condition is ON.

5-36 CP1E CPU Unit Software Users Manual(W480)


I/O Memory
This section describes the I/O memory areas in a CP1E CPU Unit.
Be sure you understand the information in the section before attempting to write ladder
diagrams.
Refer to the Instructions Reference Manual (Cat. No. W483) for detailed information
on programming instructions.

6-1 Overview of I/O Memory Areas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2


6-1-1 I/O Memory Areas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2 6
6-1-2 I/O Memory Area Address Notation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5
6-1-3 I/O Memory Areas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-6
6-2 I/O Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-7
6-3 Work Area (W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-8
6-4 Holding Area (H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-9
6-5 Data Memory Area (D) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-11
6-6 TR Area (TR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-13
6-7 Timer Area (T) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-15
6-8 Counter Area (C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-17
6-9 Auxiliary Area (A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-19
6-10 Condition Flags (P_) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-21
6-11 Clock Pulses (P_) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-23

CP1E CPU Unit Software Users Manual(W480) 6-1


6 I/O Memory

6-1 Overview of I/O Memory Areas


This section describes the I/O memory areas in a CP1E CPU Unit.

6-1-1 I/O Memory Areas


Data can be read and written to I/O memory from the ladder programs. I/O memory consists of an area
for I/O with external devices, user areas, and system areas.

CIO Area (CIO 0 to CIO 289)


In the CIO Area, input bit addresses range from CIO 0 to CIO 99 and output bit addresses range from
CIO 100 to CIO 199.
Addresses for serial PLC links range from CIO 200 to CIO 289.
The bits and words in the CIO Area are allocated to built-in I/O terminals on the CP1E CPU Unit and to
the Expansion Units and Expansion I/O Units.
Input words and output bits that are not allocated may be used as work bits in programming.

6-2 I/O Bits

6-2 CP1E CPU Unit Software Users Manual(W480)


6 I/O Memory

User Areas
These areas can be used freely by the user.

z Work Area (W)


The Word Area is part of the internal memory of the CPU Unit. It is used in programming. Unlike the
input bits and output bits in the CIO Area, I/O to and from external devices is not refreshed for this
area.
Use this area for work words and bits before any words in the CIO Area. These words should be
used first in programming because they will not be assigned to new functions in future versions of
CP1E CPU Units.

6-3 Work Area (W)

6-1 Overview of I/O Memory Areas


z Holding Area (H)
The Holding Area is part of the internal memory of the CPU Unit. It is used in programming. Unlike
the input bits and output bits in the CIO Area, I/O to and from external devices is not refreshed for
this area.
These words retain their content when the PLC is turned ON or the operating mode is switched
between PROGRAM mode and RUN or MONITOR mode.
This data is cleared if a power interruption lasts longer than the I/O memory backup time (50 hours
for an E-type CPU Unit and 40 hours for an N-type CPU Unit).

6-4 Holding Area (H)


6
z Data Memory Area (D)
This data area is used for general data storage and manipulation and is accessible only by word (16

6-1-1 I/O Memory Areas


bits).
These words retain their content when the PLC is turned ON or the operating mode is switched
between PROGRAM mode and RUN or MONITOR mode.
Specified words can be retained in the built-in EEPROM backup memory using Auxiliary Area bits.
This data is cleared, however, if a power interruption lasts longer than the I/O memory backup time
(50 hours for an E-type CPU Unit and 40 hours for an N-type CPU Unit).

6-5 Data Memory Area (D)

z Timer Area (T)


There are two parts to the Timer Area: the Timer Completion Flags and the timer Present Values
(PVs).
Up to 256 timers with timer numbers T0 to T255 can be used.
Timer Completion Flags
Each Timer Completion Flag is accessed as one bit using the timer number.
A Completion Flag is turned ON when the set time of the timer elapses.
Timer PVs
Each timer PV is accessed as one word (16 bits) using the timer number.
The PV increases or decreases as the timer operates.

6-7 Timer Area (T)

CP1E CPU Unit Software Users Manual(W480) 6-3


6 I/O Memory

z Counter Area (C)


There are two parts to the Counter Area: the Counter Completion Flags and the Counter Present
Values (PVs).
Up to 256 counters with counter numbers C0 to C255 can be used.
These words retain their content when the PLC is turned ON or the operating mode is switched
between PROGRAM mode and RUN or MONITOR mode.
This data is cleared if a power interruption lasts longer than the I/O memory backup time (50 hours
for an E-type CPU Unit and 40 hours for an N-type CPU Unit).
Counter Completion Flags
Each Counter Completion Flag is accessed as one bit using the counter number.
A Completion Flag is turned ON when the set value of the counter is reached.
Counter PVs
Each counter PV is accessed as one word (16 bits) using the timer number.
The PVs count up or down as the counter operates.

6-8 Counter Area (C)

Additional Information

Constants ($, #, +, -, or numbers without symbols)


Constants are numerical values that can be specified as the instruction operands in 16 bits or 32
bits.
For an operand for a bit string or integer, & indicates a decimal number and # indicates a hexa-
decimal number. Bit strings can also be expressed with a signed decimal number.
For an operand for a number, an unsigned decimal number is used.
For an operand for a floating point number (real number), a signed decimal number is used.
Refer to 5-4 Constants: $, #, +, -, and Numbers without Symbols for details on constants.

System Areas
System Areas contain bits and words with preassigned functions.

z Auxiliary Area (A)


The words and bits in this area have preassigned functions.

A-2 Auxiliary Area by Address

z Condition Flags (P_)


The Condition Flags include the flags that indicate the results of instruction execution, as well as the
Always ON and Always OFF Flags.
The Condition Flags are specified with global symbols rather than with addresses.

z Clock Pulses (P_)


The Clock Pulses are turned ON and OFF by the CPU Units internal timer.
The Clock Pulses are specified with global symbols rather than with addresses.

6-4 CP1E CPU Unit Software Users Manual(W480)


6 I/O Memory

6-1-2 I/O Memory Area Address Notation


An I/O memory can be addressed using word addresses or bit addresses. The word addresses and bit
addresses are given in decimal format.

z Word Addresses
Specifies a16-bit word.

W 1 0 0
I/O memory area The word number within

6-1 Overview of I/O Memory Areas


designator the area given in decimal
Examples: D, A, and W

z Bit Addresses
A bit addresses specifies one of the 16 bits in a word.
The word number and bit number are separated with a period.

W 1 0 0 . 0 2
I/O memory Word number Period Bit number (00 to 15)
area designator

On the CX-Programmer for CP1E, addresses in the CIO Area (including addresses for Serial PLC
6
Links) are given with no I/O memory area designator. CIO is used as the I/O memory area desig-
nator in this manual for clarity.

6-1-2 I/O Memory Area Address Notation


0 . 0 3
IN C 1 3 5 7 9 11
CIO 0 0 2 4 6 8 10
Inputs begin from CIO 0 Period Bit number
Outputs begin from CIO 100 00 to 11: Input bits
00 to 07: Output bits

CP1E CPU Unit Software Users Manual(W480) 6-5


6 I/O Memory

6-1-3 I/O Memory Areas


Name No. of bits Word addresses Remarks Reference
CIO Area Input Bits 1,600 bits CIO 0 to CIO 99
Refer to 6-2 I/O Bits.
(100 words)
Output Bits 1,600 bits CIO 100 to CIO 199
(100 words)
Serial PLC 1,440 bits CIO 200 to CIO 289
Refer to Section 16
Link Words (90 words)
Serial Communications.
Work Area (W) 1,600 bits W0 to W99
Refer to 6-3 Work
(100 words)
Area (W).
Holding Area (H) 800 bits (50 words) H0 to H49 This data is cleared if a
Refer to 6-4 Holding
power interruption lasts
Area (H).
longer than the I/O mem-
ory backup time (50 hours
for an E-type CPU Unit and
40 hours for an N-type
CPU Unit).
Data Memory E-type CPU 2K words D0 to D2047 Data in specified words of
Refer to 6-5 Data
Area (D) Unit the DM Area can be
retained in the built-in Memory Area (D).
EEPROM in the backup
memory by using a bit in
the Auxiliary Area. Applica-
ble words: D0 to D1499
(500 words can be speci-
fied at a time.)
N-type CPU 8K words D0 to D8191 Data in specified words of
Unit the DM Area can be
retained in the built-in
EEPROM in the backup
memory by using a bit in
the Auxiliary Area.Applica-
ble words: D0 to D6999
(500 words can be speci-
fied at a time.)
Timer Area (T) Present values 256 T0 to T255
Refer to 6-7 Timer
Timer Comple- 256 Area (T).
tion Flags
Counter Area (C) Present values 256 C0 to C255 This data is cleared if a
Refer to 6-8 Counter
power interruption lasts
longer than the I/O mem- Area (C).
ory backup time (50 hours
for an E-type CPU Unit and
40 hours for an N-type
CPU Unit).
Counter Com- 256
pletion Flags
Auxiliary Area Read only 7,168 bits A0 to A447 This data is cleared if a
Refer to A-2 Auxiliary
(A) (448 words) power interruption lasts
longer than the I/O mem- Area by Address.
Read-write 4,896 bits A448 to A754
ory backup time (50 hours
(306 words)
for an E-type CPU Unit and
40 hours for an N-type
CPU Unit).
Temporary Area (TR) 16 bits TR0 to TR15
Refer to 6-6 TR Area
(TR).

6-6 CP1E CPU Unit Software Users Manual(W480)


6 I/O Memory

6-2 I/O Bits


This section describes the bits in the CIO Area that are used as external I/O bits.

Overview
These words are allocated to built-in I/O terminals of CP1E CPU Units and CP-series Expansion Units
and Expansion I/O Units.

Notation
0 . 02

Bit number: 02

Word number: 0

I/O memory area designator:


None on CX-Programmer, CIO in
documentation

6-2 I/O Bits


Range
Input bits: CIO 0.00 to CIO 99.15 (100 words)
Output bits: CIO 100.00 to CIO 199.15 (100 words)
6
Applications
Built-in inputs can be used as basic inputs, interrupt inputs, quick-response inputs, high-speed
counters, or origin inputs.
Built-in outputs can be used as basic outputs, pulse outputs, or PWM outputs.
Refer to Section 10 Overview and Allocation of Built-in Functions for details.

Details
Bits in the CIO Area can be force-set and force-reset.
The contents of the CIO Area will be cleared in the following cases:
When the operating mode is changed between PROGRAM or MONITOR mode and RUN mode
When the PLC power is reset
When the CIO Area is cleared from the CX-Programmer
When PLC operation is stopped due to a fatal error other than an FALS error occurs. (The con-
tents of the CIO Area will be retained when FALS is executed.)

CP1E CPU Unit Software Users Manual(W480) 6-7


6 I/O Memory

6-3 Work Area (W)

Overview
The Work Area is part of the internal memory of the CPU Unit. It is used in programming. Unlike the
input bits and output bits in the CIO Area, I/O to and from external devices is not refreshed for this area.

Notation
W 0 20 . 02

Bit number: 02

Word number: 020

I/O memory area designator: W

Range
The Work Area contains 100 words with addresses ranging from W0 to W099.

Applications
It is sometimes necessary to use the same set of input conditions many times in the same program. In
this case a work bit can be used to store the final condition to simplify programming work and program
design.

W100

W100
NO bit
W100
NC bit

Storing a Condition in a Work Bit

Details
Bits in the Work Area can be force-set and force-reset.
The contents of the Work Area will be cleared in the following cases:
When the operating mode is changed between PROGRAM or MONITOR mode and RUN mode
When the PLC power is reset
When the Work Area is cleared from the CX-Programmer
When PLC operation is stopped due to a fatal error other than an FALS error occurs. (The con-
tents of the Work Area will be retained when FALS is executed.)

6-8 CP1E CPU Unit Software Users Manual(W480)


6 I/O Memory

6-4 Holding Area (H)

Overview
The Holding Area is part of the internal memory of the CPU Unit. It is used in programming. Unlike the
input bits and output bits in the CIO Area, I/O to and from external devices is not refreshed for this area.
These words retain their content when the PLC is turned ON or the operating mode is switched
between PROGRAM mode and RUN or MONITOR mode.

Precautions for Safe Use


Words in the DM Area that are not saved to the built-in EEPROM backup memory using Auxiliary
Area bits are cleared if power is interrupted for longer than the I/O memory backup time (50
hours for E-type CPU Units and 40 hours for N-type CPU Units).
Write the ladder programs and construct the system so that problems will not occur even if this

6-4 Holding Area (H)


data is cleared.

Notation
H 020 . 02

Bit number: 02
6
Word number: 020

I/O memory area designator: H

Range
The Holding area contains 50 words with addresses ranging from H0 to H049.

Applications
The Holding Area is used when you want to resume operation after a power interruption using the same
status as before the power interruption.

Precautions for Correct Use


Holding Area data is retained only when a Battery is mounted to an N-type CPU Unit. When
using E-type CPU Units or N-type CPU Units without a Battery, data can be held only up to 50
hours for an E-type CPU Unit and 40 hours for an N-type CPU Unit.

CP1E CPU Unit Software Users Manual(W480) 6-9


6 I/O Memory

Details
Bits in the Holding Area can be force-set and force-reset.
A Holding Area bit will be cleared if it is programmed between the ILC and IL instructions and the exe-
cution condition for IL(002) is OFF.
To keep a bit ON even when the execution condition for the IL instruction is OFF, turn ON the bit with
the SET instruction just before the IL instruction.)
When a self-maintaining bit is programmed with a Holding Area bit, the self-maintaining bit will not be
cleared even when the power is reset.

H0.00 If a Holding Area bit is not used for the self-maintaining


bit, the bit will be turned OFF and the self-maintaining
bit will be cleared when the power is reset.
H0.00 If a Holding Area bit is used but not programmed as a
self-maintaining bit as in the following diagram, the bit
will be turned OFF by execution condition A when the
H0.00
power is reset.
A

Precautions for Correct Use


When a Holding Area bit is used in a KEEP instruction, never use a normally closed condition
for the reset input.
When the power supply goes OFF or is temporarily interrupted, the input will go OFF before
the PLCs internal power supply and the Holding Area bit will be reset.

A B
Set
KEEP
Input Unit

H1.00
~ A
Reset

A B
Set
KEEP
H1.00
Input Unit

~ A
Reset

There are no restrictions in the order of using bit address or in the number of N.C. or N.O. con-
ditions that can be programmed.

6-10 CP1E CPU Unit Software Users Manual(W480)


6 I/O Memory

6-5 Data Memory Area (D)

Overview

This data area is used for general data storage and manipulation and is accessible only by word (16
bits).
These words retain their contents when the PLC is turned ON or the operating mode is switched
between PROGRAM mode and RUN or MONITOR mode.
Some words in the DM Area can be saved to the built-in EEPROM backup memory using Auxiliary Area
bits. These words are specifically referred to as the backed up words in the DM Area.

Precautions for Safe Use


Words in the DM Area that are not saved to the built-in EEPROM backup memory using Auxiliary

6-5 Data Memory Area (D)


Area bits are cleared if power is interrupted for longer than the I/O memory backup time (50
hours for E-type CPU Units and 40 hours for N-type CPU Units). Write the ladder programs and
construct the system so that problems will not occur even if this data is cleared.

Notation
D 0200

Word number: 0200


6

I/O memory area designator: D

Range
E-type CPU Units have DM Area addresses ranging from D0 to D2047.
(Of these, D0 to D1499 can be backed up in backup memory (built-in EEPROM).)
N-type CPU Units have DM Area addresses ranging from D0 to D8191.
(Of these, D0 to D6999 can be backed up in backup memory (built-in EEPROM).)

[ E-type CPU Unit ] [ N-type CPU Unit ]


All CPU Units Regardless CPU Unit with 20 I/O Points CPU Unit with 30 or 40 I/O Points
of I/O Capacity
D0 D0 D0
Words that can be backed
~

Words that can be


~
~

Words that can be backed up to backup memory


backed up to backup D1199
memory up to backup memory DM Fixed Allocation Words for
D1200 the Modbus-RTU Easy Master
~

(for Built-in RS-232C Port)


D1299 D1299
D1499
DM Fixed Allocation Words D1300 DM Fixed Allocation Words
D1500 D1300 for the Modbus-RTU Easy for the Modbus-RTU Easy
~
~

Master (for Built-in RS- Master (for Serial Option


~

D1399 232C Port) Port)


D2047 D1399
D1400 D1400
~

D6999 D6999
D7000 D7000
~

D8191 D8191

CP1E CPU Unit Software Users Manual(W480) 6-11


6 I/O Memory

Applications
The DM Area is for storing numeric data. It can be used for data exchange with Programmable Termi-
nals, serial communications devices, such as Inverters, and Analog I/O Units or Temperature I/O Units.

Details
Bits in the DM Area cannot be addressed individually.
z Backing Up to the Built-in EEPROM Backup Memory
The corresponding DM Area words can be saved to the built-in EEPROM backup memory in 500
word increments during operation by turning ON the following Auxiliary Area bits.
Words that can be Backed Up and the Corresponding Auxiliary Area Bits
Words that can be saved to the built-in
Type of CP1E Auxiliary Area bits
EEPROM backup memory
E-type CPU Unit D0 to D1499 (total area: D0 to D2047) A752.00 to A752.02
N-type CPU Unit D0 to D6999 (total area: D0 to D8191) A752.00 to A752.13
Specify in the PLC Setup whether to read the data in the DM Area words to the RAM as the initial
values when the power supply is turned ON or at startup.

Refer to 17-6 DM Backup for how to use DM Area words and bits.
z DM Fixed Allocation Words for the Modbus-RTU Easy Master
The following DM area words are used as command and response storage areas for the Modbus-
RTU Easy Master function.
Unit I/O capacity DM Area words
E-type CPU Units D0 to D2047
N-type CPU Units 20 I/O points D1300 to D1399 (for built-in RS-232C ports)
30 or 40 I/O points D1200 to D1299 (for built-in RS-232C ports)
D1300 to D1399 (for serial option ports)

Refer to 16-5 Modbus-RTU Easy Master function for how to use the DM Area words and bits.
z Indirect Addressing of the DM Area
Indirect addressing can be used in the DM Area.
There are two modes that can be used.
Binary-mode Addressing (@D)
If a @ symbol is input before a DM Area address, the contents of that DM Area word is treated
as a hexadecimal (binary) address and the instruction will operate on the DM Area word at that
address.
The entire DM Area can be indirectly addressed with hexadecimal values 0000 to 7FFF.
Example:

@D100 0100 D256


Address actually used.

BCD-mode Addressing (*D)


If a * symbol is input before a DM Area address, the content of that DM Area word is treated as a
BCD address and the instruction will operate on the DM Area word at that address.
Only part of the DM Area (D0 to D9999) can be indirectly addressed with BCD values 0 to 9999.
Example:

*D100 0100 D100


Address actually used.

6-12 CP1E CPU Unit Software Users Manual(W480)


6 I/O Memory

6-6 TR Area (TR)

Overview

TR bits are used to temporarily store ON/OFF status when there are several output branches in a lad-
der program.
They are used only with mnemonic programs.
There is no need to use them when writing ladder programs using symbols with the CX-Programmer.

Notation
TR 2

Bit number: 2

I/O memory area designator: TR

6-6 TR Area (TR)


Reference
There are no restrictions in the order or the number of times that TR0 to TR15 can be used.

Range
The TR Area contains 16 bits with addresses ranging from TR0 to TR15. 6
Applications
The TR Area is used in the following situations.
In this example, a TR bit is used when two outputs In this example, a TR bit is used when two outputs
have been directly connected to a branch point and are connected to a branch point without a separate
there are input conditions after the branch point. input condition for the second output.

Instruction Operand Instruction Operand


0.00 TR0 0.01 0.02
0.00 TR0 0.02 0.03 LD 0.00 LD 0.00
OR 0.01 OUT TR0
OUT TR0 0.03 AND 0.01
0.01 0.04 0.05 OUT 0.02
AND 0.02
OUT 0.03 LD TR0
LD TR0 OUT 0.03
AND 0.04
OUT 0.05

CP1E CPU Unit Software Users Manual(W480) 6-13


6 I/O Memory

Details
TR bits can be used only with the OUT and LD instructions.
OUT instructions (OUT TR0 to OUT TR15) store the ON/OFF status of a branch point and LD
instructions recall the stored ON/OFF status of the branch point.
TR bits cannot be used twice in the same instruction block. They can be used as many times as nec-
essary as long as they are used only once in each instruction block.
TR bit status cannot be changed using the CX-Programmer.
A TR bit is not required when there are no execution conditions after the branch point or there is an
execution condition only in the last line of the instruction block.
0.00 0.01 Instruction Operand
LD 0.00
0.02 OR 0.01
OUT 0.02

0.00 0.01 Instruction Operand


LD 0.00
0.02 0.03 OR 0.01
AND 0.02
OUT 0.03

6-14 CP1E CPU Unit Software Users Manual(W480)


6 I/O Memory

6-7 Timer Area (T)

Overview

The Timer Area contains Timer Completion Flags (1 bit each) and timer PVs (16 bits each). The Com-
pletion Flag is turned ON when a decrementing timer PV reaches 0 (counting out) or an increment-
ing/decrementing timer PV reaches 0.

Notation
T 0002

Time number: 0002

I/O memory area designator: T

6-7 Timer Area (T)


Range
Timer numbers range from T0 to T255.

Details

z Types of Timers 6
The following table shows which instructions are used to refresh timer PVs in BCD and binary mode.
Timer instruction BCD mode Binary mode
ONE-MS TIMER TIM TIMX
TEN-MS TIMER TIMH TIMHX
HUNDRED-MS TIMER TMHH TMHHX
ACCUMULATIVE TIMER TTIM TTIMX

Timer numbers 0 to 255 are used by all timers listed above.

z Timer Example: Timer Number 0 and a Timer Set Value of 1 s


BCD mode
Timer Completion Flag
TIM
T0000
0000

#10

Binary mode

Timer Completion Flag


TIMX
T0000
0000

#A or &10

CP1E CPU Unit Software Users Manual(W480) 6-15


6 I/O Memory

z Timer PV Refresh Method


Timer num-
Timer PV refresh method
bers
T0 to T255 The timer PV is refreshed when the instruction is executed. This can cause a delay depending
on the cycle time.
When the cycle time is longer than 100 ms, delay is generated by the TIM instruction.
When the cycle time is longer than 10 ms, delay is generated by the TIMH instruction.
When the cycle time is longer than 1 ms, delay is generated by the TIMHH instruction.

Precautions for Correct Use


It is not recommended to use the same timers number in two timer instructions because the tim-
ers will not operate correctly if they are operating simultaneously.
Do not use the same timer number for more than one instruction.
If two or more timer instructions use the same timer number, an error will be generated during
the program check.

z Resetting or Maintaining Timers


The following table shows when timers will be reset or maintained.
TMHH/ TTIM/
TIM/TIMX TIMH/TIMHX
TMHHX TTIMX
Instruction
HIGH-SPEED ONE-MS ACCUMULA
Timer Area
TIMER TIMER TIVE TIMER
When the operating mode is PV=0 Flag=OFF
changed between PROGRAM or
MONITOR mode and RUN mode*1
When the PLC power is reset*2 PV=0 Flag=OFF
CNR/CNRX instructions PV= Flag=OFF
(timer/counter reset)*3 9999/FFFF
Jumps (JMP-JME) or tasks in WAIT PVs refreshed in operating timers Retained
status*4
Interlocks (IL-ILC) with OFF inter- Reset (PV = SV, Timer Completion Flag = Retained
lock conditions OFF)

*1 If the IOM Hold Bit (A500.12) is ON, the PV and Completion Flag will be retained when a fatal error occurs
(including execution of FALS instructions) or the operating mode is changed from PROGRAM mode to RUN or
MONITOR mode or vice-versa.
(The PV and Completion Flag will be cleared when power is cycled.)
*2 If the IOM Hold Bit (A500.12) is ON and the IOM Hold Bit Check Box is selected in the Startup Hold Area on
the Startup Tab Page in the PLC Setup, the PV and Completion Flag will be retained when the PLCs power is
cycled.
This data is cleared, however, if a power interruption lasts longer than the I/O memory backup time (50 hours
for an E-type CPU Unit and 40 hours for an N-type CPU Unit).
*3 Since the TIML/TIMLX instructions do not use timer numbers, they are reset under different conditions.
The PV for a TIML/TIMLX instruction is reset to the SV.
Refer to the descriptions of these instructions for details.
*4 The PV of timers programmed with timer numbers T0016 to T0255 will be held when jumped.
Timer Completion Flags can be force-set and force-reset.
Timer PVs cannot be force-set or force-reset, although the PVs can be refreshed indirectly by force-
setting/resetting the Completion Flag.
There are no restrictions in the order of using timer numbers or in the number of N.C. or N.O. condi-
tions that can be programmed.
Timer PVs can be read as word data and used in programming.

6-16 CP1E CPU Unit Software Users Manual(W480)


6 I/O Memory

6-8 Counter Area (C)

Overview

The Counter Area contains Completion Flags (1 bit each) and counter PVs (16 bits each). A Comple-
tion Flag is turned ON when the counter PV reaches the set value (counting out).

Precautions for Safe Use


Counter values are cleared if a power interruption lasts longer than the I/O memory backup time
(50 hours for an E-type CPU Unit and 40 hours for an N-type CPU Unit).
Write the ladder programs and construct the system so that problems will not occur even if this
data is cleared.

6-8 Counter Area (C)


Notation
C 0002

Counter number: 0002

I/O memory area designator: C

6
Range
Counter numbers range from C0 to C0255.

Details

z Types of Counters
The following table shows which instructions are used to refresh counter PVs in BCD and binary mode.
Counter instruction BCD mode Binary mode
COUNTER CNT instruction CNTX instruction
REVERSIBLE CNTR instruction CNTRX instruction
COUNTER

Counter numbers 0 to 255 are used by all counters given above.

The refresh method for counter PVs can be set from the CX-Programmer to either BCD or binary.
Built-in high-speed counters 0 to 5 do not use counter numbers.

Precautions for Correct Use


It is not recommended to use the same counter number in two counter instructions because the
counters will not operate correctly if they are counting simultaneously.
If two or more counter instructions use the same counter number, an error will be generated dur-
ing the program check.

CP1E CPU Unit Software Users Manual(W480) 6-17


6 I/O Memory

z Counter Example: Counter Number 0 with a Counter Set Value of 10


BCD mode

Counter Completion Flag


CNT C0000
0000
#10

Binary mode

Counter Completion Flag


CNTX
C0000
0000
#A or &10

z Resetting or Maintaining Counter PVs


The following table shows when counters PVs are reset or maintained.
CNT/CNTX CNTR/CNTRX
Instruction
COUNTER REVERSIBLE COUNTER
PV and Counter Completion Flag when counter PV=0
is reset Counter Completion Flag = OFF
When the operating mode is changed between Retained
PROGRAM or MONITOR mode and RUN mode
When the PLC power is reset Retained
Reset Input Reset
CNR/CNRX instructions Reset
Interlocks (IL-ILC) with OFF interlock conditions Retained

Counter Completion Flags can be force-set and force-reset.


Counter PVs cannot be force-set or force-reset, although the PVs can be refreshed indirectly by
force-setting/resetting the Counter Completion Flag.
There are no restrictions in the order of using counter numbers or in the number of N.C. or N.O. con-
ditions that can be programmed.
Counter PVs can be read as word data and used in programming.

6-18 CP1E CPU Unit Software Users Manual(W480)


6 I/O Memory

6-9 Auxiliary Area (A)

Overview

The words and bits in this area have preassigned functions.

Refer to A-2 Auxiliary Area by Address for details.

Precautions for Safe Use


The following words are cleared to all zeros if a power interruption lasts longer than the I/O mem-
ory backup time (50 hours for an E-type CPU Unit and 40 hours for an N-type CPU Unit).
Other words are cleared to default values.
At startup CPU Unit

Bit/word Name Within I/O


Longer than I/O E-type CPU N-type CPU

6-9 Auxiliary Area (A)


memory
memory backup time Unit Unit
backup time
A90 to A93 User Program Date Retained Cleared to all zeros Not provided. Supported
A94 to A97 Parameter Date Not provided.
A100 to A199 Error Log Area Supported
A300 Error Log Pointer Supported
A351 to A354 Calendar/Clock Area Not provided.
A500.15 Output OFF Bit Supported
A510 to A511 Startup Time Not provided. 6
A512 to A513 Power Interruption Not provided.
Time
A514 Number of Power Supported
Interruptions
A515 to A517 Operation Start Time Not provided.
A518 to A520 Operation End Time Not provided.
A523 Total Power ON Time Not provided.
A720 to A749 Power ON Clock Data Not provided.
1 to 10

Write the ladder programs and construct the system so that problems will not occur even if this
data is cleared.

Notation
A 020. 02

Bit number: 02

Word number: 020

I/O memory area designator: A

Range
The Auxiliary Area contains 754 words with addresses ranging from A0 to A753.

CP1E CPU Unit Software Users Manual(W480) 6-19


6 I/O Memory

Applications
Applications of the bits and words in the Auxiliary Area are predefined. Ladder programs can be simpli-
fied and controllability can be improved by effectively using the bits and words in this area.

Details
Some words or bits are set automatically by the system and others are set and manipulated by the
user.
The Auxiliary Area includes error flags set by self-diagnosis, initial settings, control bits, and status
data.
Words and bits in this area can be read and written from the program or the CX-Programmer.
The Auxiliary Area contains words that are read-only (A0 to A447) and words that can be read and
written (A448 to A754).
Even the read/write bits in the Auxiliary Area cannot be force-set and force-reset continuously.
Refer to A-2 Auxiliary Area by Address for the functions of bits and words in the Auxiliary Area.

z Auxiliary Area Words and Bits in the CX-Programmers System-defined


Symbols
The following table gives the Auxiliary Area bits and words pre-registered in the CX-Programmers glo-
bal symbol table as system-defined symbols.

Refer to A-2 Auxiliary Area by Address for details.


Word/Bit Name Name in CX-Programmer
A200.11 First Cycle Flag P_First_Cycle
A200.12 Step Flag P_Step
A262 Maximum Cycle Time P_Max_Cycle_Time
A264 Present Cycle Time P_Cycle_Time_Value
A401.08 Cycle Time Too Long Flag P_Cycle_Time_Error
A402.04 Battery Error Flag P_Low_Battery
A500.15 Output OFF Bit P_Output_Off_Bit

6-20 CP1E CPU Unit Software Users Manual(W480)


6 I/O Memory

6-10 Condition Flags (P_)

Overview

These flags include the flags that indicate the results of instruction execution, as well as the Always ON
and Always OFF Flags.
These bits are specified with symbols rather than addresses.
The Condition Flags are specified with symbols, such as P_CY and P_ER, rather than addresses.

The CX-Programmer treats condition flags as system-defined symbols (global symbols) beginning with P_.

Notation
P_ ER

6-10 Condition Flags (P_)


Condition flag name: ER

I/O memory area designator:


P_ (indicates a system symbol name)

Details
The Condition Flags are read-only; they cannot be written from instructions or from the CX-Program-
mer.
All Condition Flags are cleared when the program switches tasks.
6
The status of the ER Flag, AER Flag, and other flags are thus retained only in the task in which the
error occurred.
The Condition Flags cannot be force-set and force-reset.

z Types of Condition Flags


Refer to 5-7-1 Ladder Programming Precautions for details.
Name in CX-
Name Function
Programmer
Always ON Flag P_OnP_On Always ON.
Always OFF Flag P_OffP_Off Always OFF.
Error Flag P_ER Turned ON when the operand data in an instruction is incorrect (an
instruction processing error) to indicate that an instruction ended
because of an error.
When the PLC Setup is set to stop operation for an instruction error
(Instruction Error Operation), program execution will be stopped and
the Instruction Processing Error Flag (A295.08) will be turned ON
when the Error Flag is turned ON.
Access Error Flag P_AER Turned ON when an Illegal Access Error occurs. The Illegal Access
Error indicates that an instruction attempted to access an area of
memory that should not be accessed.
When the PLC Setup is set to stop operation for an instruction error
(Instruction Error Operation), program execution will be stopped and
the Instruction Processing Error Flag (A4295.10) will be turned ON
when the Access Error Flag is turned ON.
Carry Flag P_CY Turned ON when there is a carry in the result of an arithmetic opera-
tion or a 1 is shifted to the Carry Flag by a Data Shift instruction.
The Carry Flag is part of the result of some Data Shift and Symbol
Math instructions.

CP1E CPU Unit Software Users Manual(W480) 6-21


6 I/O Memory

Name in CX-
Name Function
Programmer
Greater Than Flag P_GT Turned ON when the first operand of a Comparison Instruction is
greater than the second or a value exceeds a specified range.
Equals Flag P_EQ Turned ON when the two operands of a Comparison Instruction are
equal or the result of a calculation is 0.
Less Than Flag P_LT Turned ON when the first operand of a Comparison Instruction is less
than the second or a value is below a specified range.
Negative Flag P_N Turned ON when the most significant bit of a result is ON.
Overflow Flag P_OF Turned ON when the result of calculation overflows the capacity of the
result word(s).
Underflow Flag P_UF Turned ON when the result of calculation underflows the capacity of
the result word(s).
Greater Than or P_GE Turned ON when the first operand of a Comparison Instruction is
Equals Flag greater than or equal to the second.
Not Equal Flag P_NE Turned ON when the two operands of a Comparison Instruction are
not equal.
Less than or Equals P_LE Turned ON when the first operand of a Comparison Instruction is less
Flag than or equal to the second.

z Using the Condition Flags


The Condition Flags are shared by all of the instructions. Their status may change after each
instruction execution in a single cycle.
Therefore, be sure to use Condition Flags on a branched output with the same execution condition
immediately after an instruction to reflect the results of instruction execution.

Example: Using Instruction A Execution Results

Instruction A Instruction Operand


LD
Instruction A
The result from instruction A
is reflected in the Equals Flag AND =
Condition Flag
Example: = Instruction B

Instruction B

Precautions for Correct Use


The Condition Flags are shared by all of the instructions. This means that program operation can
be changed from its expected course by interruption of a single task. Be sure to consider the
effects of interrupts when writing ladder programs to prevent unexpected operation.

6-22 CP1E CPU Unit Software Users Manual(W480)


6 I/O Memory

6-11 Clock Pulses (P_)

Overview

The Clock Pulses are turned ON and OFF by the CPU Units internal timer.
These bits are specified with symbols rather than addresses.
The CX-Programmer treats condition flags as system-defined symbols (global symbols) beginning with P_.

Notation
P_ 0_02s

Clock pulse name: 0_02s

I/O memory area designator:

6-11 Clock Pulses (P_)


P_ (indicates a system symbol name)

Details
The Clock Pulses are read-only; they cannot be written from instructions or from the CX-Programmer.
They are cleared at the start of operation.

z Clock Pulses
Name in CX- 6
Name Description
Programmer
0.02-s Clock Pulse P_0_02s 0.01s ON for 0.01 s
OFF for 0.01 s

0.01s

0.1-s clock pulse P_0_1s 0.05s ON for 0.05 s


OFF for 0.05 s

0.05s

0.2-s clock pulse P_0_2s 0.1s ON for 0.1 s


OFF for 0.1 s

0.1s

1-s clock pulse P_1s 0.5s


ON for 0.5 s
OFF for 0.5 s

0.5s

1-min clock pulse P_1min 30s ON for 30 s


OFF for 30 s

30s

CP1E CPU Unit Software Users Manual(W480) 6-23


6 I/O Memory

z Using the Clock Pulses


The following example turns a bit ON and OFF at 0.5-s intervals.

1s 100.00 Instruction Operand


LD 1s 100.00
OUT 100.00 0.5s 0.5s

6-24 CP1E CPU Unit Software Users Manual(W480)


File Operations
The CP1E does not support file operations.

CP1E CPU Unit Software Users Manual(W480) 7-1


7 File Operations

7-2 CP1E CPU Unit Software Users Manual(W480)


I/O Allocation
This section describes I/O allocation in a CP1E CPU Unit.
Be sure you understand the information in the section before attempting to write ladder
diagrams.

8-1 Allocation of Input Bits and Output Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2


8-1-1 I/O Allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2
8-1-2 I/O Allocation Concepts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-3
8-1-3 Allocations on the CPU Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-3
8-1-4 Allocations to Expansion Units and Expansion I/O Units . . . . . . . . . . . . . . . . . 8-4

CP1E CPU Unit Software Users Manual(W480) 8-1


8 I/O Allocation

8-1 Allocation of Input Bits and Output


Bits
This section describes the allocation of input bits and output bits.

8-1-1 I/O Allocation


The I/O on Expansion I/O Units are allocated I/O bits in the words immediately following the words con-
taining the bits allocated to the built-in I/O on the CPU Unit.
OMRON calls allocating bits in memory I/O allocation.

Allocated 12 bits
Allocated 12 bits in the next word
00 to 11 00 to 11

Inputs 0CH (CIO 0) 1CH (CIO 1)

CPU Unit Expansion I/O Unit

Outputs 100CH (CIO 100) 101CH (CIO 101)

00 to 07 00 to 07

Allocated 8 bits Allocated 8 bits in


the next word

Bit 03 in CIO 0 Bit 05 in CIO 1

0CH (CIO 0) 1CH (CIO 1)

C 1 3 5 7 9 11 C 1 3 5 7 9 11
Inputs
0 2 4 6 8 10 0 2 4 6 8 10

CPU Unit Expansion I/O Unit

0 1 2 4 5 7 0 1 2 4 5 7
Outputs
C C C 3 c 6 C C C 3 c 6
Bit 02 in CIO 101
100CH (CIO 100) Bit 03 in CIO 100 101CH
(CIO 101)

8-2 CP1E CPU Unit Software Users Manual(W480)


8 I/O Allocation

8-1-2 I/O Allocation Concepts


I/O bits are automatically allocated to the I/O on CPU Units, Expansion I/O Units, and Expansion Units
when the power supply is turned ON.
It is not necessary to specify I/O bits in parameters.

8-1-3 Allocations on the CPU Unit


z Input bits are allocated from CIO 0 and output bits are allocated from CIO 100
The first word from which input bits are allocated is CIO 0. The first word from which output bits are allo-
cated is CIO 100. These cannot be changed.
z Words Allocated by the System and the Number of Connected Units
The starting words for inputs and outputs are predetermined for a CP1E CPU Unit. Input bits in CIO 0,
or CIO 0 and CIO 1, and output bits in CIO 100, or CIO 100 and CIO 101, are automatically allocated to
the built-in I/O on the CPU Unit.

8-1 Allocation of Input Bits and Output Bits


The words from which bits are allocated by the system and the number of Expansion I/O Units and
Expansion Units that can be connected are given in the following table.
Allocated words Number of Expansion
CPU Unit Units and Expansion I/O
Input Bits Output Bits Units connected
CPU Unit with 20 CIO 0 CIO 100 0 Unit
I/O points
CPU Unit with 30 CIO 0 and CIO 1 CIO 100 and CIO 101 3 Units
I/O points
CPU Unit with 40 CIO 0 and CIO 1 CIO 100 and CIO 101 3 Units
I/O points

z Application Example: CPU Unit with 40 I/O Points


CPU Unit with 40 I/O Points
24 inputs
8
CIO 0 (CIO 0.00 to CIO 0.11)
Input Bits
CIO 1 (CIO 1.00 to CIO 1.11)

Output Bits
CIO 100 (CIO 100.00 to CIO 100.07) 8-1-2 I/O Allocation Concepts
CIO 101 (CIO 101.00 to CIO 101.07)

16 outputs
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
CIO 0 Cannot be used Input bits: 24
CIO 1

CIO 100
Can be used as work bits Output bits: 16
CIO 101

For a CPU Unit with 40 I/O points, a total of 24 input bits are allocated to the input terminal block. The
bits that are allocated are input bits CIO 0.00 to CIO 0.11 (i.e., bits 00 to 11 in CIO 0) and input bits CIO
1.00 to CIO 1.11 (i.e., bits 00 to 11 in CIO 1).
In addition, a total of 16 output bits are allocated to the output terminal block. The bits that are allocated
are output bits CIO 100.00 to CIO 100.07 (i.e., bits 00 to 07 in CIO 0) and output bits CIO 101.00 to CIO
101.07 (i.e., bits 00 to 07 in CIO 1).
The upper bits (bits 12 to 15) that are not used in the input words cannot be used as work bits. Only the
upper bits that are not used in the output words can be used as work bits.

CP1E CPU Unit Software Users Manual(W480) 8-3


8 I/O Allocation

8-1-4 Allocations to Expansion Units and Expansion I/O Units


Expansion Units and Expansion I/O Units connected to the CPU Unit are automatically allocated input
bits and output bits in words following those allocated to the CPU Unit.
For example, if a CPU Unit with 40 I/O points is used, CIO 0 and CIO 1 are allocated for inputs and CIO
100 and CIO 101 are allocated for outputs. Thus, words from CIO 2 onward for inputs and words from
CIO 102 onward for outputs are automatically allocated in order to the Expansion I/O Units and Expan-
sion Units in the order that the Units are connected.

Allocations to Expansion I/O Units


There are Expansion I/O Units for expanding inputs, for expanding outputs, and for expanding both
input and outputs.
I/O bits starting from bit 00 in the next word after the word allocated to the previous Expansion Unit,
Expansion I/O Unit, or CPU Unit are automatically allocated. This word is indicated as CIO m for input
words and as CIO n for output words.
Input bits Output bits
Model No. of No. of No. of No. of
Addresses Addresses
bits words bits words
8-point Input Unit CP1W-8ED 8 1 CIO m, bits 00 to 07 None None
8-point Relay outputs CP1W-8ER None None 8 1 CIO n, bits 00
Output Unit Sinking transistor CP1W-8ET to 07
outputs
Sourcing transis- CP1W-8ET1
tor outputs
16-point Relay outputs CP1W-16ER None None 16 2 CIO n, bits 00
Output Unit Sinking transistor CP1W-16ET to 07
outputs CIO n+1, bits
00 to 07
Sourcing transis- CP1W-16ET1
tor outputs
20-point Relay outputs CP1W-20EDR1 12 1 CIO m, bits 00 to 11 8 1 CIO n, bits 00
I/O Units Sinking transistor CP1W-20EDT to 07
outputs
Sourcing transis- CP1W-20EDT1
tor outputs
32-point Relay outputs CP1W-32ER None None 32 4 CIO n, bits 00
Output Unit Sinking transistor CP1W-20EDT to 07
outputs CIO n+1, bits
00 to 07
CIO n+2, bits
Sourcing transis- CP1W-20EDT1 00 to 07
tor outputs
CIO n+3, bits
00 to 07
40-point Relay outputs CP1W-40EDR 24 2 CIO m, bits 00 to 11 16 2 CIO n, bits 00
I/O Unit Sinking transistor CP1W-40EDT CIO m+1, bits 00 to to 07
outputs 11 CIO n+1, bits
00 to 07
Sourcing transis- CP1W-40EDT1
tor outputs

8-4 CP1E CPU Unit Software Users Manual(W480)


8 I/O Allocation

z I/O Bits Allocation with Expansion I/O Units Connected


Allocation Example: 40-point I/O Unit (CP1W-40ED)
Twenty-four input bits in two words are allocated (bits 00 to 11 in CIO m and bits 00 to 11 CIO
m+1).
Sixteen output bits in two words are allocated in two words (bits 00 to 07 in CIO n and bits 00 to 07
in CIO n+1).

15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Input bits CIO m
Cannot be used
CIO m+1

CIO n
Output bits Can be used as work bits
CIO n+1

Two input words (24 bits) and two output words (16 bits) are allocated to a 40-point I/O Unit.
Input bits 12 to 15 cannot be used as work bits. Output bits 08 to 15, however, can be used as work
bits.

8-1 Allocation of Input Bits and Output Bits


Allocation Example: Maximum I/O Capacity
The configuration shown in this example is for the maximum I/O capacity. It consists of a CPU Unit
with 40 I/O points and three Expansion I/O Units, each with 40 I/O points.
Control is possible using 96 inputs and 64 outputs, or a total of 160 points.

CPU Unit with 40 I/O Points Three Expansion I/O Unit with 40 I/O points each

Input bits CIO 0.00 to CIO 0.11 CIO 2.00 to CIO 2.11 CIO 4.00 to CIO 4.11 CIO 6.00 to CIO 6.11
CIO 1.00 to CIO 1.11 CIO 3.00 to CIO 3.11 CIO 5.00 to CIO 5.11 CIO 7.00 to CIO 7.11
24 inputs 24 inputs 24 inputs 24 inputs
16 outputs 16 outputs 16 outputs 16 outputs
Output bits CIO 100.00 to CIO 100.07 CIO 102.00 to CIO 102.07 CIO 104.00 to CIO 104.07 CIO 106.00 to CIO 106.07
CIO 101.00 to CIO 101.07 CIO 103.00 to CIO 103.07 CIO 105.00 to CIO 105.07 CIO 107.00 to CIO 107.07
1st Unit 2nd Unit 3rd Unit

bit 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
CIO 0
CPU Unit with 40 I/O Points
CIO 1
CIO 2
8
1st Unit: Expansion I/O Unit with 40 I/O Points
CIO 3
Input bits Cannot be used
CIO 4

8-1-4 Allocations to Expansion Units and


2nd Unit: Expansion I/O Unit with 40 I/O Points
CIO 5
CIO 6
3rd Unit: Expansion I/O Unit with 40 I/O Points Expansion I/O Units
CIO 7

CIO 100
CPU Unit with 40 I/O Points
CIO 101
CIO 102
1st Unit: Expansion I/O Unit with 40 I/O Points
Output bits CIO 103
Can be used as work bits
CIO 104
2nd Unit: Expansion I/O Unit with 40 I/O Points
CIO 105
CIO 106
3rd Unit: Expansion I/O Unit with 40 I/O Points
CIO 107

CP1E CPU Unit Software Users Manual(W480) 8-5


8 I/O Allocation

Allocation Example: Expansion Input Units and Expansion Output Units


If Expansion Input Units or Expansion Output Units are connected, the input or output word not
used by an Expansion I/O Unit is allocated to the next Unit that requires it.

CPU Unit with 30 I/O Points 1st Unit: 2nd Unit: 3rd Unit:
8-point Input Unit 16-point Output Unit 20-point I/O Unit
Input bits CIO 0.00 to CIO 0.11
CIO 2.00 to CIO 2.07 CIO 3.00 to CIO 3.11
CIO 1.00 to CIO 1.05
No inputs
18 inputs 12 inputs
8 inputs 16 outputs
12 outputs 8 outputs
No outputs
Output bits CIO 100.00 to CIO 100.07 CIO 102.00 to CIO 102.07
CIO 104.00 to CIO 104.07
CIO 101.00 to CIO 101.03 CIO 103.00 to CIO 103.07

bit 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
CIO 0
CPU Unit with 30 I/O Points
CIO 1
Input bits Cannot be used
CIO 2 1st Unit: 8-point Input Unit
CIO 3 3rd Unit: 20-point I/O Unit

CIO 100 CPU Unit with


CIO 101 30 I/O Points
Output bits CIO 102 Can be used as work bits
2nd Unit: 16-point Output Unit
CIO 103
CIO 104 3rd Unit: 20-point I/O Unit

Allocations for Expansion Units

z I/O Word Allocations to Expansion Units


Interpreting the Table
m: Indicates the next input word after the input word allocated to the Expansion Unit, Expansion I/O
Unit, or CPU Unit to the left of the current Unit.
n: Indicates the next output word after the output word allocated to the Expansion Unit, Expansion
I/O Unit, or CPU Unit to the left of the current Unit.
Name Model number Input words Output words
Analog I/O Unit CP1W-MAD11 2 words CIO m and m+1 1 word CIO n
Analog Input Unit CP1W-AD041 4 words CIO m to m+3 1 word CIO n
2 words CIO n and
CIO n+1
Analog Output Unit CP1W-DA041 None 4 words CIO n to
CIO n+3
Temperature Sensor Units CP1W-TS001 2 words CIO m and m+1 Not supported
CP1W-TS002 4 words CIO m to m+3 Not supported
CP1W-TS101 2 words CIO m and m+1 Not supported
CP1W-TS102 4 words CIO m to m+3 Not supported
CompoBus/S I/O Link Unit CP1W-SRT21 1 word CIO m 1 word CIO n

8-6 CP1E CPU Unit Software Users Manual(W480)


8 I/O Allocation

z I/O Word Allocations to Expansion Units


Allocation Example: CPU Unit with 40 I/O Points + TS002 + DA041 + 40ED

1st Unit: 2nd Unit: 3rd Unit:


CPU Unit with 40 I/O Points
Temperature Sensor Unit Analog Output Unit 40-point I/O Unit
Input bits CIO 0.00 to CIO 0.11 CIO 6.00 to CIO 6.11
CIO 2 to CIO 5 None
CIO 1.00 to CIO 1.11 CIO 7.00 to CIO 7.11
24 inputs 24 inputs
TS002 DA041
16 outputs 16 outputs
Output bits CIO 100.00 to CIO 100.07 CIO 106.00 to CIO 106.07
None CIO 102 to CIO 105
CIO 101.00 to CIO 101.07 CIO 107.00 to CIO 107.07

bit 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
CIO 0 Cannot be used CPU Unit with 40 I/O Points
CIO 1
CIO 2
CIO 3 1st Unit: Temperature Sensor Unit
Input bits
CIO 4
CIO 5
CIO 6 Cannot be used 3rd Unit: Expansion I/O Unit with 40 I/O Points
CIO 7

8-1 Allocation of Input Bits and Output Bits


CIO 100
Can be used as work bits CPU Unit with 40 I/O Points
CIO 101
CIO 102
Output bits CIO 103
2nd Unit: Analog Output Unit
CIO 104
CIO 105
CIO 106 Can be used as work bits 3rd Unit: Expansion I/O Unit with 40 I/O Points
CIO 107

8-1-4 Allocations to Expansion Units and


Expansion I/O Units

CP1E CPU Unit Software Users Manual(W480) 8-7


8 I/O Allocation

8-8 CP1E CPU Unit Software Users Manual(W480)


PLC Setup
This section describes the parameters in the PLC Setup, which are used to make basic
settings for the CP1E CPU Unit.

9-1 Overview of the PLC Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2


9-2 PLC Setup Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3
9-2-1 Startup and CPU Unit Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3
9-2-2 Timing, Interrupt, and Peripheral Servicing Settings . . . . . . . . . . . . . . . . . . . . 9-4
9-2-3 Input Constant Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-5
9-2-4 Serial Port 1 Settings (Built-in RS-232C Port for N-type CPU Units) . . . . . . . . 9-5
9-2-5 Serial Port 2 (N-type CP1E CPU Unit with 30 or 40 I/O Points) . . . . . . . . . . . 9-8
9-2-6 Built-in Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-12
9-2-7 Pulse Output 0 Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-14
9-2-8 Pulse Output 1 Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-16

CP1E CPU Unit Software Users Manual(W480) 9-1


9 PLC Setup

9-1 Overview of the PLC Setup


The PLC Setup contains basic CPU Unit software parameter settings that the user can change to cus-
tomize PLC operation.
The PLC Setup is used to make the basic settings for the CPU Unit.
These settings can be changed from a Programming Device. Change the PLC Setup in the following
cases.
Application requiring changes to default settings Parameter
A memory error must be generated when a power interruption Select the ??? Generate memory error when
last longer than 40 hours for an N-type CPU Unit or more than I/O memory is corrupted Check Box on the
50 hours for an E-type CPU Unit. Settings Tab Page.
Data in all regions of I/O Memory (including the CIO Area, Work IOM Hold Bit Status at Startup
Area, Timer Flags, Timer PVs, Task Flags, Index Registers, and
Data Registers) must be retained when the PLCs power is
turned ON.
The status of bits that are force-set or force-reset from a Pro- Forced Status Hold Bit Status at Startup
gramming Device must be retained when the PLCs power is
turned ON.
Changing the Startup Mode to PROGRAM or MONITOR mode Startup Mode
when debugging.
Detection of low-battery errors is not required when using bat- Detect Low Battery
tery-free operation.
You want the intervals for scheduled interrupts to be set in units Scheduled Interrupt Interval
of 1 ms or 0.1 ms rather than 10 ms.
Finding instruction errors when debugging. Stop CPU on Instruction Error
You want a minimum cycle time setting to create a consistent Minimum Cycle Time
I/O refresh cycle.
You want to set a maximum cycle time other than 1 second (10 Watch Cycle Time
ms to 40,000 ms).
You do not want to record user-defined errors for FAL in the FAL Error Log Registration
error log.

z Related Auxiliary Area Flags


Name Word Description Read/write
PLC Setup Error A40210 ON when there is a setting error in the PLC Setup. Read only
Flag (Non-fatal error)

z Setting Methods for the PLC Setup


Set using the CX-Programmer for CP1E.

From the CX-Programmer for CP1E

CP1E CPU Unit

PLC Setup
PLC Setup

9-2 CP1E CPU Unit Software Users Manual(W480)


9 PLC Setup

9-2 PLC Setup Settings

9-2-1 Startup and CPU Unit Settings

Startup Hold Settings


When setting
Internal
Name Default Possible settings is read by Bits Data
address
CPU Unit
1 Forced Status Hold Bit Startup Hold Not held. Not held. When power is 36 14 0
Setting turned ON
Held. 1
2 IOM Hold Bit Startup Hold Setting Not held. Not held. When power is 36 15 0
turned ON
Held. 1

Startup Data Read Setting


When setting
Internal
Name Default Possible settings is read by Bits Data
address
CPU Unit
1 Read DM from backup memory Do not read. Do not read. When power is 38 15 0
turned ON
Read. 1

Startup Mode Setting


When setting
Internal
Name Default Possible settings is read by Bits Data
address

9-2 PLC Setup Settings


CPU Unit
1 Startup Mode Setting Run: RUN mode Program: PROGRAM mode When power is 37 0 to 15 8000 hex
turned ON
Monitor: MONITOR mode 8001 hex
Run: RUN mode 8002 hex

Execute Process Settings


When setting
Internal
Name Default Possible settings is read by Bits Data
address
CPU Unit
1 Do not detect Low Battery Do not detect. Do not detect. Every cycle 40 15 0
9
Detect. 1 9-2-1 Startup and CPU Unit Settings
2 Generate error for I/O memory corruption Do not generate. Do not generate. At start of 40 13 0
operation
Generate. 1
3 Stop CPU on Instruction Error Do not stop. Do not stop. At start of 67 15 0
operation
Stop. 1
4 Dont register FAL to error log Register. Register. Every cycle 41 15 0
Do not register. 1

CP1E CPU Unit Software Users Manual(W480) 9-3


9 PLC Setup

9-2-2 Timing, Interrupt, and Peripheral Servicing Settings

Timing and Interrupt Settings


When setting
Internal
Name Default Possible settings is read by Bits Data
address
CPU Unit
1 Watch Cycle Time ON:Default (1 s) ON:Default (1 s) At start of 71 15 0
operation
OFF: Use user setting. 1
1-1 OFF: When Using User Setting 0 1 (10 ms) At start of 71 0 to 14 001 hex
Is Specified operation
: :
Watch Cycle Time
40,000 (10 ms) FA0 hex
2 Constant Cycle Time ON (variable) No setting (variable) At start of 70 0 to 15 0000 hex
operation
1ms 0001 hex
: :
32,000 ms 7D00 hex
3 Scheduled Interrupt Interval 10 ms 10 ms At start of 66 0 to 3 0 hex
operation
1 ms 1 hex
0.1 ms 2 hex

Peripheral Service Settings


When setting
Internal
Name Default Possible settings is read by Bits Data
address
CPU Unit
1 Set Time to All Events 4% of cycle time ON: Default (4% of cycle At start of 74 15 0
time) operation
OFF: Use user setting. 1
1-1 OFF: When Using User Setting Is 0 0 (0.1 ms) At start of 74 0 to 7 00 hex
Specified operation
: :
Set Time to All Events
255 (0.1 ms) FF hex

9-4 CP1E CPU Unit Software Users Manual(W480)


9 PLC Setup

9-2-3 Input Constant Settings

Input Constants
When set-
Internal
Name Default Possible settings ting is read Bits Data
address
by CPU Unit
1 0CH: CIO 0 8 ms No filter (0 ms) When power 0 0 to 7 10 hex
is turned ON
1 ms 12 hex
2 ms 13 hex
4 ms 14 hex
8 ms 15 hex
16 ms 16 hex
32 ms 17 hex
2 1CH: CIO 1 Same as above. Same as above. Same as 1 8 to 15 Same as
above. above.
3 2CH: CIO 2 2 0 to 7
4 3CH: CIO 3 3 8 to 15
5 4CH: CIO 4 4 0 to 7
6 5CH: CIO 5 5 8 to 15
7 6CH: CIO 6 6 0 to 7
8 7CH: CIO 7 7 8 to 15
9 8CH: CIO 8 8 0 to 7
10 9CH: CIO 9 9 8 to 15
11 10CH: CIO 10 15 0 to 7
12 11CH: CIO 11 15 8 to 15
13 12CH: CIO 12 16 0 to 7
14 13CH: CIO 13 16 8 to 15

9-2 PLC Setup Settings


15 14CH: CIO 14 17 0 to 7
16 15CH: CIO 15 17 8 to 15
17 16CH: CIO 16 18 0 to 7
18 17CH: CIO 17 18 8 to 15

9-2-4 Serial Port 1 Settings (Built-in RS-232C Port for N-type CPU Units)
9
Communications Settings 9-2-3 Input Constant Settings

When set-
Internal
Name Default Possible settings ting is read Bits Data
address
by CPU Unit
1 Communications Settings Standard (9,600; Standard Every cycle 46 15 0
1, 7, 2, E) Baud rate: 9,600 bps
(Default settings) Start bits: 1 bit
Data length: 7 bits
Parity: Even
Stop bits: 2 bits
Host Link
Custom 1
2 Mode Host Link Host Link Every cycle 8 to 11 0 hex
(When custom settings have been 5 hex
selected.) NT Link (1:N): 1:N NT Links 2 hex
RS-232C (No-protocol) 3 hex
PC Link (Slave) 7 hex
PC Link (Master) 8 hex
Modbus-RTU Easy Master 9 hex

CP1E CPU Unit Software Users Manual(W480) 9-5


9 PLC Setup

When set-
Internal
Name Default Possible settings ting is read Bits Data
address
by CPU Unit
2 2-1 Host Link Settings
2-1-1 Baud 9,600 bps 300 bps Every cycle 47 0 to 7 01 hex
600 bps 02 hex
1,200 bps 03 hex
2,400 bps 04 hex
4,800 bps 05 hex
9,600 bps 00 or 06
hex
19,200 bps 07 hex
38,400 bps 08 hex
57,600 bps 09 hex
115,200 bps 0A hex
2-1-2 Format (data length, 7 bits, 2 bits, even 7 bits, 2 bits, even Every cycle 46 0 to 3 0 hex
stop bits, parity)
7 bits, 2 bits, odd 1 hex
7 bits, 2 bits, no parity 2 hex
7 bits, 1 bit, even 4 hex
7 bits, 1 bit, odd 5 hex
7 bits, 1 bit, no parity 6 hex
8 bits, 2 bits, even 8 hex
8 bits, 2 bits, odd 9 hex
8 bits, 2 bits, no parity A hex
8 bits, 1 bit, even C hex
8 bits, 1 bit, odd D hex
8 bits, 1 bit, no parity E hex
2-1-3 Unit Number 0 0 Every cycle 49 0 to 7 00 hex
: :
31 1F hex
2-2 NT Link (1:N) Settings
2-2-1 Baud 115,200 bps 38,400 bps (standard) Every cycle 47 0 to 7 00 hex
(disabled) 115,200 bps (high speed) 0A hex
2-2-2 No.NT/PC Link Max. 1 0 Every cycle 52 0 to 3 0 hex
(Highest unit number
: :
of PT that can be
connected to the PLC) 7 7 hex

2-3 RS-232C (No-protocol) Settings


2-3-1 Baud 9,600 bps 300 bps Every cycle 47 0 to 7 01 hex
600 bps 02 hex
1,200 bps 03 hex
2,400 bps 04 hex
4,800 bps 05 hex
9,600 bps 00 or 06
hex
19,200 bps 07 hex
38,400 bps 08 hex
57,600 bps 09 hex
115,200 bps 0A hex

9-6 CP1E CPU Unit Software Users Manual(W480)


9 PLC Setup

When set-
Internal
Name Default Possible settings ting is read Bits Data
address
by CPU Unit
2 2-3 2-3-2 Format 7 bits, 2 bits, even 7 bits, 2 bits, even Every cycle 46 0 to 3 0 hex
(data length, stop bits,
7 bits, 2 bits, odd 1 hex
parity)
7 bits, 2 bits, no parity 2 hex
7 bits, 1 bit, even 4 hex
7 bits, 1 bit, odd 5 hex
7 bits, 1 bit, no parity 6 hex
8 bits, 2 bits, even 8 hex
8 bits, 2 bits, odd 9 hex
8 bits, 2 bits, no parity A hex
8 bits, 1 bit, even C hex
8 bits, 1 bit, odd D hex
8 bits, 1 bit, no parity E hex
2-3-3 Start Code Disable. Disable. Every cycle 51 12 0
Set. 1
2-3-4 Start Code (setting) 00 Hex 00 Hex Every cycle 50 8 to 15 00 hex
: :
FF hex FF hex
2-3-5 End Code None Received Bytes (no end Every cycle 51 8 and 9 00
(Received Bytes) code)
CR, LF 10
Set End Code 01
2-3-6 Received Bytes 256 bytes 256 bytes Every cycle 51 0 to 7 00 hex
(setting)
1 byte 01 hex
: :
255 bytes FF hex
2-3-7 Set End Code 00 Hex 00 Hex Every cycle 50 0 to 7 00 hex
(setting) : :

9-2 PLC Setup Settings


FF Hex FF hex
2-3-8 Delay 0 ms 0 (10 ms) Every cycle 48 0 to 15 0000 hex
: :
9999 (10 ms) 270F hex
2-5 Modbus-RTU Easy Master Settings
2-5-1 Baud 9,600 bps 300 bps Every cycle 47 0 to 7 01 hex
600 bps 02 hex
1,200 bps 03 hex
2,400 bps 04 hex 9
4,800 bps 05 hex
9,600 bps 00 or 06
9-2-4 Serial Port 1 Settings (Built-in RS-232C
hex
19,200 bps 07 hex
Port for N-type CPU Units)

38,400 bps 08 hex


57,600 bps 09 hex
115,200 bps 0A hex
2-5-2 Format 7 bits, 2 bits, even 7 bits, 2 bits, even Every cycle 46 0 to 3 0 hex
(data length, stop bits,
7 bits, 2 bits, odd 1 hex
parity)
7 bits, 2 bits, no parity 2 hex
7 bits, 1 bit, even 4 hex
7 bits, 1 bit, odd 5 hex
7 bits, 1 bit, no parity 6 hex
8 bits, 2 bits, even 8 hex
8 bits, 2 bits, odd 9 hex
8 bits, 2 bits, no parity A hex
8 bits, 1 bit, even C hex
8 bits, 1 bit, odd D hex
8 bits, 1 bit, no parity E hex

CP1E CPU Unit Software Users Manual(W480) 9-7


9 PLC Setup

When set-
Internal
Name Default Possible settings ting is read Bits Data
address
by CPU Unit
2 2-5 2-5-3 Response Timeout 5s 5s Every cycle 53 8 to 15 00 hex
1 (100 ms) 01 hex
: :
255 (100 ms) FF hex
2-6 PC Link (Slave) Settings
2-6-1 Baud 9,600 bps 38,400 bps (standard) Every cycle 47 0 to 7 00 hex
(disabled)
115,200 bps (high speed) 0A hex
2-6-2 PLC Link Unit No. 0 0 Every cycle 53 0 to 3 0 hex
: :
7 7 hex
2-7 PC Link (Master) Settings
2-7-1 Baud 9,600 bps 38,400 bps (standard) Every cycle 47 0 to 7 00 hex
(disabled)
115,200 bps (high speed) 0A hex
2-7-2 Link Words 10 Words 1 word Every cycle 52 4 to 7 1 hex
: :
10 words 0 or A hex
2-7-3 PC Link Mode ALL ALL Every cycle 52 15 0
Masters 1
2-7-4 No. 1 0 Every cycle 63 0 to 3 0 hex
NT/PC Link Max.
: :
(Highest unit number
of PT that can be 7 7 hex
connected to the PLC)

9-2-5 Serial Port 2 (N-type CP1E CPU Unit with 30 or 40 I/O Points)

Communications Settings
When set-
Internal
Name Default Possible settings ting is read Bits Data
address
by CPU Unit
1 Communications Settings Standard (9600; Standard Every cycle 56 15 0
1, 7, 2, E) Baud rate: 9,600 bps
(Default settings)
Start bits: 1 bit
Data length: 7 bits
Parity: Even
Stop bits: 2 bits
Custom 1
2 Mode Host Link Host Link Every cycle 56 8 to11 0 or 5 hex
(When custom settings have been NT Link (1:N): 1:N NT Links 2 hex
selected.)
RS-232C (No-protocol) 3 hex
PC Link (Slave) 7 hex
PC Link (Master) 8 hex
Modbus-RTU Easy Master 9 hex

9-8 CP1E CPU Unit Software Users Manual(W480)


9 PLC Setup

When set-
Internal
Name Default Possible settings ting is read Bits Data
address
by CPU Unit
2 2-1 Host Link Settings
2-1-1 Baud 9,600 bps 300 bps Every cycle 57 0 to 7 01 hex
600 bps 02 hex
1,200 bps 03 hex
2,400 bps 04 hex
4,800 bps 05 hex
9,600 bps 00 or 06
hex
19,200 bps 07 hex
38,400 bps 08 hex
57,600 bps 09 hex
115,200 bps 0A hex
2-1-2 Format 7 bits, 2 bits, even 7 bits, 2 bits, even Every cycle 56 0 to 3 0 hex
(data length, stop bits,
7 bits, 2 bits, odd 1 hex
parity)
7 bits, 2 bits, no parity 2 hex
7 bits, 1 bit, even 4 hex
7 bits, 1 bit, odd 5 hex
7 bits, 1 bit, no parity 6 hex
8 bits, 2 bits, even 8 hex
8 bits, 2 bits, odd 9 hex
8 bits, 2 bits, no parity A hex
8 bits, 1 bit, even C hex
8 bits, 1 bit, odd D hex
8 bits, 1 bit, no parity E hex
2-1-3 Unit Number 0 0 Every cycle 59 0 to 7 00 hex
: :

9-2 PLC Setup Settings


31 1F hex
2-2 NT Link (1:N) Settings
2-2-1 Baud 115,200 bps 38,400 bps (standard) Every cycle 57 0 to 7 00 hex
(disabled)
115,200 bps (high speed) 0A hex
2-2-2 NT/PC Link Max. 1 0 Every cycle 62 0 to 3 0 hex
(Highest unit number
: :
of PT that can be con-
nected to the PLC) 7 7 hex

2-3 RS-232C (No-protocol) Settings


2-3-1 Baud 9,600 bps 300 bps Every cycle 57 0 to 7 01 hex 9
600 bps 02 hex
1,200 bps 03 hex
9-2-5 Serial Port 2 (N-type CP1E CPU Unit with

2,400 bps 04 hex


30 or 40 I/O Points)

4,800 bps 05 hex


9,600 bps 00 or 06
hex
19,200 bps 07 hex
38,400 bps 08 hex
57,600 bps 09 hex
115,200 bps 0A hex

CP1E CPU Unit Software Users Manual(W480) 9-9


9 PLC Setup

When set-
Internal
Name Default Possible settings ting is read Bits Data
address
by CPU Unit
2 2-3 2-3-2 Format 7 bits, 2 bits, even 7 bits, 2 bits, even Every cycle 56 0 to 3 0 hex
(data length, stop bits,
7 bits, 2 bits, odd 1 hex
parity)
7 bits, 2 bits, no parity 2 hex
7 bits, 1 bit, even 4 hex
7 bits, 1 bit, odd 5 hex
7 bits, 1 bit, no parity 6 hex
8 bits, 2 bits, even 8 hex
8 bits, 2 bits, odd 9 hex
8 bits, 2 bits, no parity A hex
8 bits, 1 bit, even C hex
8 bits, 1 bit, odd D hex
8 bits, 1 bit, no parity E hex
2-3-3 Start Code Disable. Disable. Every cycle 61 12 0
Set. 1
2-3-4 Start Code 00 hex 00 hex Every cycle 60 8 to 15 00 hex
(setting)
: :
FF hex FF hex
2-3-5 End Code None Received Bytes (no end Every cycle 61 8 and 9 00
(Received Bytes) code)
CR, LF 10
Set End Code 01
2-3-6 Received Bytes (set- 256 bytes 256 bytes Every cycle 60 0 to 7 00 hex
ting)
1 byte 01 hex
: :
255 bytes FF hex
2-3-7 Set End Code (setting) 00 hex 00 hex Every cycle 61 0 to 7 00 hex
: :
FF hex FF hex
2-3-8 Delay 0 ms 0 (10 ms) Every cycle 58 0 to 15 0000 hex
: :
9999 (10 ms) 270F hex
2-5 Modbus-RTU Easy Master Settings
2-5-1 Baud 9,600 bps 300 bps Every cycle 57 0 to 7 01 hex
600 bps 02 hex
1,200 bps 03 hex
2,400 bps 04 hex
4,800 bps 05 hex
9,600 bps 00 or 06
hex
19,200 bps 07 hex
38,400 bps 08 hex
57,600 bps 09 hex
115,200 bps 0A hex

9-10 CP1E CPU Unit Software Users Manual(W480)


9 PLC Setup

When set-
Internal
Name Default Possible settings ting is read Bits Data
address
by CPU Unit
2 2-5 2-5-2 Format 7 bits, 2 bits, even 7 bits, 2 bits, even Every cycle 56 0 to 3 0 hex
(data length, stop bits,
7 bits, 2 bits, odd 1 hex
parity)
7 bits, 2 bits, no parity 2 hex
7 bits, 1 bit, even 4 hex
7 bits, 1 bit, odd 5 hex
7 bits, 1 bit, no parity 6 hex
8 bits, 2 bits, even 8 hex
8 bits, 2 bits, odd 9 hex
8 bits, 2 bits, no parity A hex
8 bits, 1 bit, even C hex
8 bits, 1 bit, odd D hex
8 bits, 1 bit, no parity E hex
2-5-3 Response Timeout 5s 5s Every cycle 63 8 to 15 00 hex
1 (100 ms) 01 hex
: :
255 (100 ms) FF hex
2-6 PC Link (Slave) Settings
2-6-1 Baud 9,600 bps 38,400 bps (standard) Every cycle 57 0 to 7 00 hex
(disabled)
115,200 bps (high speed) 0A hex
2-6-2 PLC Link Unit No. 0 0 Every cycle 63 0 to 3 0 Hex
: :
7 7 hex
2-7 PC Link (Master) Settings
2-7-1 Baud 9,600 bps 38,400 bps (standard) Every cycle 57 0 to 7 00 hex
(disabled)
115,200 bps (high speed) 0A hex

9-2 PLC Setup Settings


2-7-2 Link Words 10 words 1 word Every cycle 62 4 to 7 1 hex
: :
10 words 0 or A hex
2-7-3 PC Link Mode ALL ALL Every cycle 62 15 0
Masters 1
2-7-4 NT/PC Link Max. 1 0 Every cycle 63 0 to 3 0 hex
(Highest unit number
: :
of PT that can be con-
nected to the PLC) 7 7 hex

9
9-2-5 Serial Port 2 (N-type CP1E CPU Unit with
30 or 40 I/O Points)

CP1E CPU Unit Software Users Manual(W480) 9-11


9 PLC Setup

9-2-6 Built-in Inputs

High-speed Counter Settings


When setting
Internal
Name Default Possible settings is read by Bits Data
address
CPU Unit
1 Use high-speed counter 0 Do not use. Do not use. When power 10 12 to 15 0 hex
is turned ON
Use. 1 hex
1-1 Counting mode Linear mode Linear mode At start of 10 8 to 11 0 hex
operation
Circular mode 1 hex
1-1-1 Circular Max. Count 0 0 At start of 11 and 12 0 to 15 0000 0000
operation hex
: :
4,294,967,295 FFFF FFFF
hex
1-2 Reset Z phase, software Z phase, software reset When power 10 4 to 7 0 hex
reset (stop comparing) is turned ON
(stop comparing)
Software reset 1 hex
(stop comparing)
Phase Z, software reset 2 hex
(comparing)
Software reset (comparing) 3 hex
1-3 Input Setting Differential phase Differential phase input (4) When power 10 0 to 3 0 hex
input (4) is turned ON
Pulse + direction input 1 hex
Up/Down input 2 hex
Increment pulse input 3 hex
2 Use high-speed counter 1 Do not use. Do not use. When power 13 12 to 15 0 hex
is turned ON
Use. 1 hex
2-1 Counting mode Linear mode Linear mode At start of 13 8 to 11 0 hex
operation
Circular mode 1 hex
2-1-1 Circular Max. Count 0 0 At start of 14 and 15 0 to 15 0000 0000
operation hex
: :
4,294,967,295 FFFF FFFF
hex
2-2 Reset Z phase, software Z phase, software reset When power 13 4 to 7 0 hex
reset (stop comparing) is turned ON
(stop comparing)
Software reset 1 hex
(stop comparing)
Phase Z, software reset 2 hex
(comparing)
Software reset (comparing) 3 hex
2-3 Input Setting Differential phase Differential phase input (4) When power 13 0 to 3 0 hex
input (4) is turned ON
Pulse + direction input 1 hex
Increment 2 hex
Increment 3 hex
3 Use high-speed counter 2 Do not use. Do not use. When power 16 12 to 15 0 hex
is turned ON
Use. 1 hex
3-1 Counting mode Linear mode Linear mode At start of 16 8 to 11 0 hex
operation
Circular mode 1 hex
3-1-1 Circular Max. Count 0 0 At start of 17 and 18 0 to 15 0000 0000
operation hex
: :
4,294,967,295 FFFF FFFF
hex

9-12 CP1E CPU Unit Software Users Manual(W480)


9 PLC Setup

When setting
Internal
Name Default Possible settings is read by Bits Data
address
CPU Unit
3-2 Reset Software reset Software reset When power 16 4 to 7 1 hex
is turned ON
Software reset (comparing) 3 hex
3-3 Input Setting Increment pulse Increment pulse input When power 16 0 to 3 3 hex
input is turned ON
4 Use high-speed counter 3 Do not use. Do not use. When power 19 12 to 15 0 hex
is turned ON
Use. 1 hex
4-1 Counting mode Linear mode Linear mode At start of 19 8 to 11 0 hex
operation
Circular mode 1 hex
4-1-1 Circular Max. Count 0 0 At start of 20 and 21 0 to 15 0000 0000
operation hex
: :
4,294,967,295 FFFF FFFF
hex
4-2 Reset Software reset Software reset When power 19 4 to 7 1 hex
is turned ON
Software reset (comparing) 3 hex
4-3 Input Setting Increment pulse Increment pulse input When power 19 0 to 3 3 hex
input is turned ON
5 Use high-speed counter 4 Do not use. Do not use. When power 22 12 to 15 0 hex
is turned ON
Use. 1 hex
5-1 Counting mode Linear mode Linear mode At start of 22 8 to 11 0 hex
operation
Circular mode 1 hex
5-1-1 Circular Max. Count 0 0 At start of 23 and 24 0 to 15 0000 0000
operation hex
: :
4,294,967,295 FFFF FFFF
hex
5-2 Reset Software reset Software reset When power 22 4 to 7 1 hex

9-2 PLC Setup Settings


is turned ON
Software reset (comparing) 3 hex
5-3 Input Setting Increment pulse Increment pulse input When power 22 0 to 3 3 hex
input is turned ON
6 Use high-speed counter 5 Do not use. Do not use. When power 25 12 to 15 0 hex
is turned ON
Use. 1 hex
6-1 Counting mode Linear mode Linear mode At start of 25 8 to 11 0 hex
operation
Circular mode 1 hex
6-1-1 Circular Max. Count 0 0 At start of 26 and 27 0 to 15 0000 0000
operation hex
: : 9
4,294,967,295 FFFF FFFF
hex
9-2-6 Built-in Inputs

6-2 Reset Software reset Software reset When power 25 4 to 7 1 hex


is turned ON
Software reset (comparing) 3 hex
6-3 Input Setting Increment pulse Increment pulse input When power 25 0 to 3 3 hex
input is turned ON

CP1E CPU Unit Software Users Manual(W480) 9-13


9 PLC Setup

Interrupt Input Settings


When setting
Internal
Name Default Possible settings is read by Bits Data
address
CPU Unit
1 IN2: CIO 0.02 Normal Normal When power 31 0 to 3 0 hex
is turned ON
Interrupt 1 hex
Quick 2 hex
2 IN3: CIO 0.03 Normal Normal When power 31 4 to 7 0 hex
is turned ON
Interrupt 1 hex
Quick 2 hex
3 IN4: CIO 0.04 Normal Normal When power 31 8 to 11 0 hex
is turned ON
Interrupt 1 hex
Quick 2 hex
4 IN5: CIO 0.05 Normal Normal When power 31 12 to 15 0 hex
is turned ON
Interrupt 1 hex
Quick 2 hex
5 IN6: CIO 0.06 Normal Normal When power 32 0 to 3 0 hex
is turned ON
Interrupt 1 hex
Quick 2 hex
6 IN7: CIO 0.07 Normal Normal When power 32 4 to 7 0 hex
is turned ON
Interrupt 1 hex
Quick 2 hex

9-2-7 Pulse Output 0 Settings

Base Settings
When setting
Internal
Name Default Possible settings is read by Bits Data
address
CPU Unit
1 Undefined Origin (operation for limit Hold Hold At start of 88 12 to 15 0 hex
signal turning ON) operation
Undefined 1 hex
2 Limit Input Signal Operation Search Only Search Only When power 76 4 to 7 0 hex
is turned ON
Always 1 hex
3 Limit Input Signal NC NC At start of 88 0 to 3 0 hex
operation
NO 1 hex
4 Search/Return Initial Speed 0 pps (disabled) 0 pps At start of 78 and 79 0 to 15 0000 0001
operation hex
: :
100,000 pps 0001 86A0
hex

9-14 CP1E CPU Unit Software Users Manual(W480)


9 PLC Setup

Origin Search Settings


When setting
Internal
Name Default Possible settings is read by Bits Data
address
CPU Unit
1 Use define origin operation Do not use. Do not use. When power 76 0 to 3 0 hex
is turned ON
Use. 1 hex
1-1 Search Direction CW CW At start of 77 12 to 15 0 hex
operation
CCW 1 hex
1-2 Detection Method Method 0 Method 0 At start of 77 8 to 11 0 hex
operation
Method 1 1 hex
Method 2 2 hex
1-3 Search Operation Inverse 1 Inverse 1 At start of 77 4 to 7 0 hex
operation
Inverse 2 1 hex
1-4 Operation Mode Mode 0 Mode 0 At start of 77 0 to 3 0 hex
operation
Mode 1 1 hex
Mode 2 2 hex
1-5 Origin Input Signal NC NC When power 88 8 to 11 0 hex
is turned ON
NO 1 hex
1-6 Proximity Input Signal NC NC At start of 88 4 to 7 0 hex
operation
NO 1 hex
1-7 Search High Speed 0 pps (disabled) 0 pps At start of 80 and 81 0 to 15 0000 0001
operation hex
: :
100,000 pps 0001 86A0
hex
1-8 Search Proximity Speed 0 pps (disabled) 1 pps At start of 82 and 83 0 to 15 0000 0001
operation hex

9-2 PLC Setup Settings


: :
100,000 pps 0001 86A0
hex
1-9 Origin Compensation Value 0 pps -2,147,483,648 At start of 84 and 85 0 to 15 8000 0000
operation hex
: :
0 0000 0000
hex
: :
+2,147,483,647 7FFF FFFF
Hex
9
1-10 Origin Search Acceleration 0 (disabled) 1 (pulses/4 ms) At start of 86 0 to 15 0001 hex
Ratio (Rate) operation
9-2-7 Pulse Output 0 Settings
: :
65,535 (pulses/4 ms) FFFF hex
1-11 Origin Search Deceleration 0 (disabled) 1 (pulses/4 ms) At start of 87 0 to 15 0001 hex
Ratio (Rate) operation
: :
65,535 (pulses/4 ms) FFFF hex
1-12 Positioning Monitor Time 0 (ms) 0 (ms) At start of 89 0 to 15 0000 hex
operation
: :
9,999 (ms) 270F hex

CP1E CPU Unit Software Users Manual(W480) 9-15


9 PLC Setup

Origin Return Settings


When setting
Internal
Name Default Possible settings is read by Bits Data
address
CPU Unit
1 Speed 0 pps (disabled) 1 pps At start of 90 and 91 0 to 15 0000 0001
operation hex
: :
100,000 pps 0001 86A0
hex
2 Acceleration Ratio (rate) 0 (disabled) 1 (pulses/4 ms) At start of 92 0 to 15 0001 hex
operation
: :
65,535 (pulses/4 ms) FFFF hex
3 Deceleration rate 0 (disabled) 1 (pulses/4 ms) At start of 93 0 to 15 0001 hex
operation
: :
65,535 (pulses/4 ms) FFFF hex

9-2-8 Pulse Output 1 Settings

Base Settings
When setting
Internal
Name Default Possible settings is read by Bits Data
address
CPU Unit
1 Undefined Origin Hold Hold At start of 106 12 to 15 0 hex
(operation for limit signal turning ON) operation
Undefined 1 hex
2 Limit Input Signal Operation Search Only Search Only When power 94 4 to 7 0 hex
is turned ON
Always 1 hex
3 Limit Input Signal NC NC At start of 106 0 to 3 0 hex
operation
NO 1 hex
4 Search/Return Initial Speed 0 pps (disabled) 0 pps At start of 96 and 97 0 to 15 0000 0001
operation hex
: :
100,000 pps 0001 86A0
hex

9-16 CP1E CPU Unit Software Users Manual(W480)


9 PLC Setup

Origin Search Settings


When setting
Internal
Name Default Possible settings is read by Bits Data
address
CPU Unit
1 Use define origin operation Do not use. Do not use. When power 94 0 to 3 0 hex
is turned ON
Use. 1 hex
1-1 Search Direction CW CW At start of 95 12 to 15 0 hex
operation
CCW 1 hex
1-2 Detection Method Method 0 Method 0 At start of 95 8 to 11 0 hex
operation
Method 1 1 hex
Method 2 2 hex
1-3 Search Operation Inverse 1 Inverse 1 At start of 95 4 to 7 0 hex
operation
Inverse 2 1 hex
1-4 Operation Mode Mode 0 Mode 0 At start of 95 0 to 3 0 hex
operation
Mode 1 1 hex
Mode 2 2 hex
1-5 Origin Input Signal NC NC When power 106 8 to 11 0 hex
is turned ON
NO 1 hex
1-6 Proximity Input Signal NC NC At start of 106 4 to 7 0 hex
operation
NO 1 hex
1-7 Search High Speed 0 pps (disabled) 0 pps At start of 98 and 99 0 to 15 0000 0001
operation hex
: :
100,000 pps 0001 86A0
hex
1-8 Search Proximity Speed 0 pps (disabled) 1 pps At start of 100 and 0 to 15 0000 0001
operation 101 hex

9-2 PLC Setup Settings


: :
100,000 pps 0001 86A0
hex
1-9 Origin Compensation Value 0 pps -2,147,483,648 At start of 102 and 0 to 15 8000 0000
operation 103 hex
: :
0 0000 0000
hex
: :
+2,147,483,647 7FFF FFFF 9
hex
1-10 Origin Search Acceleration 0 (disabled) 1 (pulses/4 ms) At start of 104 0 to 15 0001 hex
Ratio (Rate) operation
9-2-8 Pulse Output 1 Settings

: :
65,535 (pulses/4 ms) FFFF hex
1-11 Origin Search Deceleration 0 (disabled) 1 (pulses/4 ms) At start of 105 0 to 15 0001 hex
Ratio (Rate) operation
: :
65,535 (pulses/4 ms) FFFF hex
1-12 Positioning Monitor Time 0 (ms) 0 (ms) At start of 107 0 to 15 0000 hex
operation
: :
9,999 (ms) 270F hex

CP1E CPU Unit Software Users Manual(W480) 9-17


9 PLC Setup

Origin Return Settings


When setting
Internal
Name Default Possible settings is read by Bits Data
address
CPU Unit
1 Speed 0 pps (disabled) 1 pps At start of 108 and 0 to 15 0000 0001
operation 109 hex
: :
100,000 pps 0001 86A0
hex
2 Acceleration Ratio (rate) 0 (disabled) 1 (pulses/4 ms) At start of 110 0 to 15 0001 hex
operation
: :
65,535 (pulses/4 ms) FFFF hex
3 Deceleration rate 0 (disabled) 1 (pulses/4 ms) At start of 111 0 to 15 0001 hex
operation
: :
65,535 (pulses/4 ms) FFFF hex

9-18 CP1E CPU Unit Software Users Manual(W480)


10

Overview of Built-in Functions


and Allocations
This section describes the built-in functions, overall procedure, and allocations for func-
tions of the CP1E.

10-1 Built-in Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-2


10-2 Overall Procedure for Using CP1E Built-in Functions. . . . . . . . . . . . . . . . 10-3
10-3 Allocations for Built-in Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-4
10-3-1 Allocation of CPU Units Built-in I/O Terminals . . . . . . . . . . . . . . . . . . . . . . . . 10-4
10-3-2 Specifying the Functions to Use . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-5
10-3-3 Selecting Functions in the PLC Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-5
10-3-4 Allocating Built-in Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-6
10-3-5 Allocating Built-in Output Temrinals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-9

CP1E CPU Unit Software Users Manual(W480) 10-1


10 Overview of Built-in Functions and Allocations

10-1 Built-in Functions


The following built-in functions are provided by the CP1E CPU Units.
z: Supported, : Not supported
Type CP1E Basic Models (E-type CPU Units) CP1E Application Models (N-type CPU Units) Reference

Function

Quick-response inputs z6 inputs z6 inputs Section 11


Input interrupts z6 inputs z6 inputs Section 12
Scheduled interrupts z1 interrupt z1 interrupt
High-speed counter z z Section 13
Up/down: 10 kHz2 counters Up/down: 100 kHz1 counter, 10 kHz1
Pulse plus direction: 10 kHz2 counters counter
Incremental: 10 kHz6 counters Pulse plus direction: 100 kHz2 counters
Differential phases (4): 5 kHz2 Incremental: 100 kHz 2 counters, 10 kHz4
counters counters
Differential phases (4): 50 kHz1 counter, 5
kHz1 counter
Pulse outputs z2 outputs (pulse plus direction only) Section 14
PWM output z1 output Section 15
communications z(CPU Units with 20 I/O Points: 1 port, CPU Section 16
Units with 30 or 40 I/O Points: One standard
port plus option slot)
PID control z z Section 17
Clock functions z(While power is supplied.)
Analog adjuster z z

10-2 CP1E CPU Unit Software Users Manual(W480)


10 Overview of Built-in Functions and Allocations

10-2 Overall Procedure for Using


CP1E Built-in Functions
10-2 Overall Procedure for Using CP1E
Built-in Functions
The overall procedure for using built-in CP1E functions is described in this section.

1 Select the functions to use.


10
Select Functions Example: Interrupts, high-speed counter
inputs, and pulse outputs.

2 Make the Settings in


Set the functions with the applicable numbers
using the CX-Programmer.
Refer to Section
9 PLC Setup and
the PLC Setup Example: Input interrupt IN0 and high-speed 10-3 Allocations for
counter 0.Parameters in the PLC Built-in Functions for
Setup must be set for the following details.
functions.

Input interrupts Origin searches


Quick-response Minimum cycle time
inputs Serial communications
High-speed counters

3 Create Ladder Program


Write ladder diagrams using the CX-Pro-
grammer.

Example: Permitting interrupts with the


Special Instructions
MSKS instruction and program-
ming high-speed counters with the
CTBL instruction.

Writing Related Example: Stopping high-speed counters.


Auxiliary Area Words

Example: Reading the present value of a Refer to A-2


Reading Related
high-speed counter. Auxiliary Area by
Auxiliary Area Words
Address for details.

4 Transfer PLC Setup


Transfer the PLC Setup and ladder program
from the CX-Programmer to the CPU Unit.
and Ladder Program

5 Turn ON PLC Power


Turn ON the power supply to the PLC.

6 Start Operation
Start PLC operation.

CP1E CPU Unit Software Users Manual(W480) 10-3


10 Overview of Built-in Functions and Allocations

10-3 Allocations for Built-in Functions

10-3-1 Allocation of CPU Units Built-in I/O Terminals

A CP1E CPU Unit uses the same built-in I/O terminals for different functions. Allocate the I/O terminals
in advance, making sure that each terminal is used for only one function.

Input terminals:
Normal inputs Normal inputs, interrupt inputs,
quick-response inputs, high-
Interrupt inputs speed counters, and origin
These functions cannot be searches use the same input
Quick-response inputs used simultaneously because terminals.
they use the same terminals.
High-speed counters

Origin searches

Input terminals

CP1E CPU Unit

Output terminals

Output terminals:
Normal outputs, pulse outputs,
Normal outputs PWM output, and origin
searches (counter reset output)
Pulse outputs These functions cannot be use the same output terminals.
used simultaneously because
they use the same terminals.
Origin searches

PWM output

10-4 CP1E CPU Unit Software Users Manual(W480)


10 Overview of Built-in Functions and Allocations

10-3 Allocations for Built-in


10-3-2 Specifying the Functions to Use

Functions
Specify the functions to use as shown below.
z Input Functions

10
Interrupt inputs

10-3-2 Specifying the Functions to Use


Quick-response inputs Enable each function to be
used in the PLC Setup
from the CX-Programmer
High-speed counters

Origin searches

z Output Functions

Pulse outputs Specify the functions


to use in programming
instructions.
PWM output

10-3-3 Selecting Functions in the PLC Setup


Functions are enabled by setting parameters in the PLC Setup. Set the functions so that no more than
one function uses the same terminal. Select function numbers so that high-speed counter inputs and
inputs for other functions, such as interrupt inputs, quick-response inputs, and origin inputs do no con-
flict with each other.

1 Input functions can be selected by selecting the Use Check Box in a High-speed Counter Area
on the Built-in Internal Tab Page or by setting an input to Interrupt or Quick in the Interrupt
Input Area of the same page.

Select the Use Check Box for a


High-speed Counter

CP1E CPU Unit Software Users Manual(W480) 10-5


10 Overview of Built-in Functions and Allocations

2 The input and output terminals used by the origin search function can be enabled by selecting
the Use define origin operation Check Box on a Pulse Output Tab Page.

Select the Use define origin


operation Check Box.

10-3-4 Allocating Built-in Inputs

Terminal Arrangement

z Input Terminal Arrangement for CPU Unit with 20 I/O Points

L1 L2/N COM 01 03 05 07 09 11

NC 00 02 04 06 08 10
IN CIO 0

z Input Terminal Arrangement for CPU Unit with 30 I/O Points

L1 L2/N COM 01 03 05 07 09 11 01 03 05

00 02 04 06 08 10 00 02 04 NC
IN CIO 0 IN CIO 1

z Input Terminal Arrangement for CPU Unit with 40 I/O Points

L1 L2/N COM 01 03 05 07 09 11 01 03 05 07 09 11

00 02 04 06 08 10 00 02 04 06 08 10
IN CIO 0 IN CIO 1

10-6 CP1E CPU Unit Software Users Manual(W480)


10 Overview of Built-in Functions and Allocations

10-3 Allocations for Built-in


Allocating Built-in Inputs to Functions
Input terminals are allocated functions by setting parameters in the PLC Setup. Set the PLC Setup so

Functions
that each terminal is used for only one function.
Settings in PLC Setup

Origin search
CPU Unit Input terminal block Interrupt input setting on High-speed counter 0 to 3 setting on settings on
Built-in Input Tab Page Built-in Input Tab Page Pulse Output
0/1 Tab Page
10

10-3-4 Allocating Built-in Inputs


Normal Interrupt Quick Use
CPU Unit CPU Unit CPU Unit Two-phase
with 20 with 30 with 40 Terminal Terminal Quick- Single-phase (differential Two-phase
Normal Input Use
block label number response (increment (pulse/direc-
I/O points I/O points I/O points input interrupt phase4 or
input pulse input) up/down) tion)

Applicable Applicable Applicable CIO 0 00 Normal Counter 0, Counter 0, Counter 0,


input 0 increment phase A or pulse input
input up input
01 Normal Counter 1, Counter 0, Counter 1,
input 1 increment phase B or pulse input
input down input
02 Normal Interrupt Quick- Counter 2, Counter 1, Counter 0,
input 2 input 2 response increment phase A or direction
input 2 input up input
03 Normal Interrupt Quick- Counter 1, Counter 1,
input 3 input 4 response phase B or direction
input 3 down input
04 Normal Interrupt Quick- Counter 3, Counter 0, Counter 0,
input 4 input 4 response increment phase Z or reset input
input 4 input reset input
05 Normal Interrupt Quick- Counter 4, Counter 1, Counter 1,
input 5 input 5 response increment phase Z or reset input
input 5 input reset input
06 Normal Interrupt Quick- Counter 5, Pulse 0:
input 6 input 6 response increment Origin input
input 6 input signal
07 Normal Interrupt Quick- Pulse 1:
input 7 input 7 response Origin input
input 7 signal
08 Normal
input 8
09 Normal
input 9
10 Normal Pulse 0:
input 10 Origin prox-
imity input
signal
11 Normal Pulse 1:
input 11 Origin prox-
imity input
signal
Not appli- Applicable Applicable CIO 1 00 Normal
cable input 12
01 Normal
input 13
02 Normal
input 14
03 Normal
input 15
Not appli- 04 Normal
cable input 16
05 Normal
input 17
06 Normal
input 18
07 Normal
input 19
08 Normal
input 20
09 Normal
input 21
10 Normal
input 22
11 Normal
input 23

CP1E CPU Unit Software Users Manual(W480) 10-7


10 Overview of Built-in Functions and Allocations

Inputs with Settable Functions


z:The black dots indicate the functions that can be set for each input. Be sure that each input is used
for only one function.
High-
High-
speed
speed
High-speed counter, counter, Origin
Input interrupts Quick-response inputs counter,
single-phase differential searches
pulse +
phase or
direction
up/down
2 3 4 5 6 7 2 3 4 5 6 7 0 1 2 3 4 5 0 1 0 1 0 1
Normal
0 z z z
input
Normal
1 z z z
input
Normal
2 z z z z z
input
Normal
3 z z z z
input
Normal
4 z z z z z
input
Normal
5 z z z z z
input
Normal
6 z z z z
input
Normal
7 z z z
input
~
Normal
10 z
input
Normal
11 z
input

Note 1 The same input setting must be used for high-speed counter 0 and high-speed counter.
2 High-speed counter 2 cannot be used if the input setting of high-speed counter 0 or high-speed counter 1 is set for
differential phase inputs (4), pulse + direction inputs, or up/down pulse inputs.

10-8 CP1E CPU Unit Software Users Manual(W480)


10 Overview of Built-in Functions and Allocations

10-3 Allocations for Built-in


10-3-5 Allocating Built-in Output Temrinals

Functions
Terminal Arrangement

z Output Terminal Arrangement for CPU Unit with 20 I/O Points


10
00 01 02 03 04 05 07

10-3-5 Allocating Built-in Output Temrinals


COM COM NC COM NC COM 06
CIO 100

z Output Terminal Arrangement for CPU Unit with 30 I/O Points

+ 00 01 02 04 05 07 00 02

- COM COM COM 03 COM 06 COM 01 03


CIO 100 CIO 101

z Output Terminal Arrangement for CPU Unit with 40 I/O Points

+ 00 01 02 03 04 06 00 01 03 04 06

- COM COM COM COM 05 07 COM 02 COM 05 07


CIO 100 CIO 101

CP1E CPU Unit Software Users Manual(W480) 10-9


10 Overview of Built-in Functions and Allocations

Allocating Built-in Output Terminals to Functions

Output terminals are allocated functions by setting parameters in the PLC Setup. Set the PLC Setup so
that each terminal is used for only one function.
Setting in PLC
When a pulse output
Other than Setup When the PWM
instruction (SPED,
those shown Origin search instruction is
Output terminal ACC, PLS2, or ORG) is
CPU Unit right setting on Pulse executed
block executed
Output 0/1 Tab Page

Variable duty
Terminal Fixed duty ratio pulse output ratio pulse
20-point 30-point 40-point Terminal
block Normal output output
I/O Units I/O Units I/O Units number
label
Pulse + direction Use PWM output

Applicable Applicable Applicable CIO 100 00 Normal output 0 Pulse output 0 (pulse)

01 Normal output 1 Pulse output 1 (pulse) PWM output 0

02 Normal output 2 Pulse output 0 (direction)

03 Normal output 3 Pulse output 1 (direction)

04 Normal output 4 Pulse 0: Error counter


reset output
05 Normal output 5 Pulse 1: Error counter
reset output
06 Normal output 6
07 Normal output 7
Not appli- CIO 101 00 Normal output 8
cable.
01 Normal output 9
02 Normal output 10
03 Normal output 11
Not appli- 04 Normal output 12
cable.
05 Normal output 13
06 Normal output 14
07 Normal output 15

Outputs with Settable Functions


z:The black dots indicate the functions that can be set for each input.
Be sure that each input is used for only one function.
Error counter reset PWM
Pulse outputs
outputs outputs
0 1 0 1 0
Normal output 0 z
Normal output 1 z z
Normal output 2 z
Normal output 3 z
Normal output 4 z
Normal output 5 z
Normal output 6
Normal output 7
~
Normal output 14
Normal output 15

10-10 CP1E CPU Unit Software Users Manual(W480)


11
Quick-response Inputs
This section describes the quick-response inputs that can be used to read signals that
are shorter than the cycle time.

11-1 Quick-response Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-2


11-1-1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-2
11-1-2 Flow of Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-3

CP1E CPU Unit Software Users Manual(W480) 11-1


11 Quick-response Inputs

11-1 Quick-response Inputs


Quick-response inputs can be used with any model of CP1E CPU Unit.

11-1-1 Overview
The quick-response inputs can read pulses with an ON time as short as 50 s even if they are shorter
than the cycle time. Use the quick-response inputs to read signals shorter than the cycle time, such as
inputs from photomicrosensors.

Photomicrosensor or other
device with short signal Quick-response input

Cycle time
Built-in input
I/O refresh

ON signal shorter than cycle time

Catch and take in

Cyclic tasks
(ladder programs)
Cycle time.
Can read ON signals
shorter than this time
END
I/O refresh

Quick-response Input Specifications


Item Specification
ON response time 50 s max.
OFF response time 50 s max.
Required pulse The pulse widths of quick-response input signals
must meet the following conditions.

50s 50s

11-2 CP1E CPU Unit Software Users Manual(W480)


11 Quick-response Inputs

11-1-2 Flow of Processing

11-1 Quick-response Inputs


1 Assigning terminals for
quick-response inputs
The terminals 02 to 07 of channel 0 can be used for quick-
response inputs.

Bits CIO 0.02 to CIO 0.07 correspond to terminals 02 to 07.


Automatic bit allocation

2 Set IN0 to IN5 for quick-response inputs on the Built-in Input 11


PLC Setup Tab Page of the PLC Setup using the CX-Programmer.

11-1-2 Flow of Processing


3 Ladder Cyclic task or
Read the status of CIO 0.02 to CIO 0.07 using the LD
instruction or other instructions.
programming interrupt task

z Settings When Using Quick-response Input


Corresponding Quick-response setting on Built-in
Terminal
bit address Input Tab Page
02 on 0CH terminal block 0.02 IN2
03 on 0CH terminal block 0.03 IN3
04 on 0CH terminal block 0.04 IN4
Set to Quick.
05 on 0CH terminal block 0.05 IN5
06 on 0CH terminal block 0.06 IN6
07 on 0CH terminal block 0.07 IN7

Restrictions
A built-in input cannot be used as a quick-response input if it is being used as a normal input, interrupt
input, or high-speed counter input.

1 Setting the Quick-response Input Terminal


The following terminals can be used for quick-response inputs. These terminals correspond to CIO 0.02
to CIO 0.07 in I/O memory.
Input Terminal Block on CPU Unit with 20 I/O Points

Quick-response input IN5: CIO 0.05


Upper Terminal Block Quick-response input IN7: CIO 0.07
Quick-response input IN3: CIO 0.03

L1 L2/N COM 01 03 05 07 09 11

NC 00 02 04 06 08 10
CIO 0
Quick-response input IN2: CIO 0.02
Quick-response input IN6: CIO 0.06
Quick-response input IN4: CIO 0.04

CP1E CPU Unit Software Users Manual(W480) 11-3


11 Quick-response Inputs

Input Terminal Block on CPU Unit with 30 I/O Points

Quick-response input IN5: CIO 0.05


Upper Terminal Block Quick-response input IN7: CIO 0.07
Quick-response input IN3: CIO 0.03

L1 L2/N COM 01 03 05 07 09 11 01 03 05

00 02 04 06 08 10 00 02 04
CIO 0 CIO 1
Quick-response input IN2: CIO 0.02
Quick-response input IN6: CIO 0.06
Quick-response input IN4: CIO 0.04

Input Terminal Block on CPU Unit with 40 I/O Points

Quick-response input IN5: CIO 0.05


Upper Terminal Block Quick-response input IN7: CIO 0.07
Quick-response input IN3: CIO 0.03

L1 L2/N COM 01 03 05 07 09 11 01 03 05 07 09 11

00 02 04 06 08 10 00 02 04 06 08 10
CIO 0 CIO 1
Quick-response input IN2: CIO 0.02
Quick-response input IN6: CIO 0.06
Quick-response input IN4: CIO 0.04

2 PLC Setup
Click the Built-in Input Tab and select Quick in the interrupt input settings.

Select Quick

11-4 CP1E CPU Unit Software Users Manual(W480)


11 Quick-response Inputs

Built-in Input Tab Page


Quick-response input setting Corresponding bit address

11-1 Quick-response Inputs


IN2 Select Quick for IN2 CIO 0.02
IN3 to IN7. CIO 0.03
IN4 CIO 0.04
IN5 CIO 0.05
IN6 CIO 0.06
IN7 CIO 0.07

Note The power supply must be restarted after the PLC Setup is transferred in order to validate the quick-
response input settings.
11
3 Creating Ladder Programs

11-1-2 Flow of Processing


Pulse inputs shorter than the cycle time can be read in the CPU Unit I/O memory using normal instruc-
tions simply by setting the interrupt setting for the required input to Quick in the PLC Setup.
The status of CIO 0.02 to CIO 0.07 can be read using instructions such as the LD instruction.
Example: Setting IN2 to Quick in the PLC Setup Interrupt Settings.

Even if the signal that is input to terminal 02 on terminal block


0CH is shorter than the cycle time, the signal will be latched for
one cycle and the status will be stored in memory.

0.02

The pulse width (ON time) that can be read for a quick-response input is 50 s.
The status of the input that is stored in the I/O memory for a short input will be cleared during the next
input refresh period.

CP1E CPU Unit Software Users Manual(W480) 11-5


11 Quick-response Inputs

11-6 CP1E CPU Unit Software Users Manual(W480)


Interrupts
12
This section describes the interrupts that can be used with CP1E PLCs, including input
interrupts and scheduled interrupts.

12-1 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-2


12-1-1 CP1E Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-2
12-2 Input Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-3
12-2-1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-3
12-2-2 Flow of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-4
12-2-3 Application Example for Input Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-8
12-3 Scheduled Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-11
12-3-1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-11
12-3-2 Flow of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-12
12-4 Precautions for Using Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-15
12-4-1 Interrupt Task Priority and Order of Execution . . . . . . . . . . . . . . . . . . . . . . . 12-15
12-4-2 Auxiliary Area Words and Bits Related to Interrupts . . . . . . . . . . . . . . . . . . 12-15
12-4-3 Duplicate Processing in Cyclic and Interrupt Tasks . . . . . . . . . . . . . . . . . . . 12-15

CP1E CPU Unit Software Users Manual(W480) 12-1


12 Interrupts

12-1 Interrupts

12-1-1 CP1E Interrupts

CP1E CPU Units normally repeat processes in the following order: overseeing processes, program exe-
cution, I/O refreshing, peripheral servicing. During the program execution stage, cyclic tasks (ladder
programs) are executed.
The interrupt function, on the other hand, allows a specified condition to interrupt a cycle and execute a
specified program.
The CP1E performs the following processing when an interrupt occurs.
When an interrupt occurs, execution of the ladder programs in the normal cycle is interrupted.
The ladder program in the interrupt task is executed.
When the interrupt task is finished, the ladder program that was being executed is returned to.

Interrupt task executed


Cyclic tasks
(ladder programs) Ladder program
Interrupt occurs

Cycle END

END When the interrupt task is


I/O refreshing finished, the ladder diagram that
was being executed is returned to.

Interrupts can thus be used to perform high-speed processing that is not restricted by the cycle time.

Interrupt Factors and Types of Interrupts


Interrupts are classified by the interrupt factor. There are the following three types of interrupts.
Changes in status of built-in inputs on the CPU Unit: Input interrupts
Specified intervals measured by internal timers: Scheduled interrupts
PVs of high-speed counter inputs: High-speed counter interrupts

Refer to 13-3 High-speed Counter Interrupts for information on high-speed counter interrupts.

Additional Information

The CP1E CPU Units do not support a power OFF interrupt.

12-2 CP1E CPU Unit Software Users Manual(W480)


12 Interrupts

12-2 Input Interrupts


Input interrupts can be used with any model of CP1E CPU Unit.

12-2-1 Overview

12-2 Input Interrupts


A corresponding interrupt task can be executed when a built-in input on the CPU Unit turns ON or turns
OFF.

Interrupt input
Built-in input

12

12-2-1 Overview
Input interrupt bit turns ON

Interrupt task
Cyclic tasks
(ladder programs) Ladder program
Interrupt occurs
Cycle
END

END
I/O refreshing

Condition for
accepting interrupt
Example: CIO 0.02
(interrupt input IN0)
MSKS instruction
executed to enable
the interrupt
Processing Processing
Cyclic task execution
interrupted Cyclic task execution
interrupted

Interrupt task
Interrupt task
2 executed
2 executed

Pulse Width Specifications for Interrupt Input Signals


Item Specification
ON response time 50 s max.
OFF response time 50 s max.
Required pulse The pulse widths of interrupt input signals must
meet the following conditions.
50s 50s

CP1E CPU Unit Software Users Manual(W480) 12-3


12 Interrupts

12-2-2 Flow of Operation

1 Assigning interrupt
input terminals
Terminals 02 to 07 on the 0CH terminal block can be used
for input interrupts.

Automatic bit allocation Bits CIO 0.02 to CIO 0.07 correspond to terminals 02 to
07.

2 PLC Setup Set IN2 to IN7 for interrupt inputs on the Built-in Input Tab
Page of the PLC Setup using the CX-Programmer.

Automatic assignment of Interrupt tasks 2 to 7 correspond to interrupt inputs 2 to 7.


interrupt task numbers

3 Execute MSKS
Specify whether the interrupt is executed when the input
turns ON or when it turns OFF in the MSKS instruction.
instruction in a Set N to 112 to 117 in the MSKS instruction.
Ladder cyclic task Enable input interrupts in the MSKS instruction. Set N to
programming 102 to 107 in the MSKS instruction.

Interrupt task Write the program in the interrupt task.

z Settings When Using Input Interrupts


Specify oper-
Correspond- Setting in PLC SetupInter- and N in the
Interrupt
Terminal ing bit rupt input settings on Built- Instruction instruction to
task number
address in Input Tab Page enable inter-
rupts
02 on 0CH CIO 0.02 IN2 102 2
terminal block
03 on 0CH CIO 0.03 IN3 103 3
terminal block
04 on 0CH CIO 0.04 IN4 104 4
terminal block
Set to Interrupt. MSKS
05 on 0CH CIO 0.05 IN5 105 5
terminal block
06 on 0CH CIO 0.06 IN6 106 6
terminal block
07 on 0CH CIO 0.07 IN7 107 7
terminal block

Restrictions
A built-in input cannot be used as a normal input, high-speed counter input, or quick-response input if it
is being used as an interrupt input.

12-4 CP1E CPU Unit Software Users Manual(W480)


12 Interrupts

1 Assigning Input Interrupt Terminals


The following input terminals can be used for input interrupts. These terminals correspond to COI 0.02
to CIO 0.07 in I/O memory.
Input Terminal Block on CPU Unit with 20 I/O Points

12-2 Input Interrupts


Upper Terminal Block Interrupt input IN5: CIO 0.05 Interrupt input IN7: CIO 0.07
Interrupt input IN3: CIO 0.03

L1 L2/N COM 01 03 05 07 09 11

NC 00 02 04 06 08 10
CIO 0

Interrupt input IN2: CIO 0.02 12


Interrupt input IN6: CIO 0.06
Interrupt input IN4: CIO 0.04

12-2-2 Flow of Operation


Input Terminal Block on CPU Unit with 30 I/O Points

Interrupt input IN5: CIO 0.05


Upper Terminal Block Interrupt input IN7: CIO 0.07
Interrupt input IN3: CIO 0.03

L1 L2/N COM 01 03 05 07 09 11 01 03 05

00 02 04 06 08 10 00 02 04
CIO 0 CIO 1

Interrupt input IN2: CIO 0.02


Interrupt input IN6: CIO 0.06
Interrupt input IN4: CIO 0.04

Input Terminal Block on CPU Unit with 40 I/O Points

Upper Terminal Block Interrupt input IN5: CIO 0.05 Interrupt input IN7: CIO 0.07
Interrupt input IN3: CIO 0.03

L1 L2/N COM 01 03 05 07 09 11 01 03 05 07 09 11

00 02 04 06 08 10 00 02 04 06 08 10
CIO 0 CIO 1

Interrupt input IN2: CIO 0.02


Interrupt input IN6: CIO 0.06
Interrupt input IN4: CIO 0.04

CP1E CPU Unit Software Users Manual(W480) 12-5


12 Interrupts

2 PLC Setup
Click the Built-in Input Tab and select Interrupt in the interrupt intput settings.

Select Interrupt

Built-in Input Tab Page


Corresponding Scheduled
Interrupt input settings
bit address interrupt task
IN2 Select Interrupt for CIO 0.02 2
IN3 IN2 to IN7. CIO 0.03 3
IN4 CIO 0.04 4
IN5 CIO 0.05 5
IN6 CIO 0.06 6
IN7 CIO 0.07 7

Note The power supply must be restarted after the PLC Setup is transferred in order to enable the interrupt input
settings.

3 Writing the Ladder Program: Execute MSKS Instruction in a Cyclic


Task
Execute the MSKS instruction from the ladder program in a cyclic task to use input interrupts.
MSKS has the following two functions and two of this instruction are normally used in combination.
(1)Specifying whether to detect ON or OFF signals.
(2)Enabling input interrupts.

Execution condition
@MSKS (1)Specifies creating an interrupt when
N the input turns OFF or when it turns
C ON.
@MSKS
N (2)Enables input interrupts.
C

The MSKS instruction must be executed only once to make the settings, so in general execute MSKS in
just one cycle using the upwardly differentiated variation of the instruction. The first MSKS instruction
can be omitted. If it is omitted, an interrupt will be created when the input turns ON by default.

12-6 CP1E CPU Unit Software Users Manual(W480)


12 Interrupts

z Specifying MSKS Operands (N and C)


(1)Specifying to Detect ON or OFF Input Signals
PLC Setup on Interrupt Operand N Operand C
Correspond-
Terminal Built-in Input task Specifying to
ing bit address Interrupt identifier
Tab Page number detect ON or OFF
02 on 0CH terminal CIO 0.02 Interrupt input 2 112 #0000:
block IN2 Detect ON

12-2 Input Interrupts


03 on 0CH terminal CIO 0.03 Interrupt input 3 113
block IN3
04 on 0CH terminal CIO 0.04 Interrupt input 4 114 #0001:
block IN4
Detect OFF
05 on 0CH terminal CIO 0.05 Interrupt input 5 115
block IN5
06 on 0CH terminal CIO 0.06 Interrupt input 6 116
block IN6
12
07 on 0CH terminal CIO 0.07 Interrupt input 7 117
block IN7

12-2-2 Flow of Operation


(2)Enabling the Input Interrupt
PLC Setup on Interrupt Operand N Operand C
Correspond-
Terminal Built-in Input task
ing bit address Interrupt identifier Enable/Disable
Tab number
02 on 0CH terminal CIO 0.02 Interrupt input 2 102 #0000:
block IN2 Enable interrupt
03 on 0CH terminal CIO 0.03 Interrupt input 3 103 #0001:
block IN3
Disable interrupt
04 on 0CH terminal CIO 0.04 Interrupt input 4 104
block IN4
05 on 0CH terminal CIO 0.05 Interrupt input 5 105
block IN5
06 on 0CH terminal CIO 0.06 Interrupt input 6 106
block IN6
07 on 0CH terminal CIO 0.07 Interrupt input 7 107
block IN7

Example
Specifying Detecting ON or OFF Input Signals
For interrupt input IN2: Specify 112.
Cyclic task
Specifies an interrupt when the input turns ON.
MSKS Enabling Input Interrupt CIO 0.02 turns ON
112 For interrupt input IN2: Specify 102.
#0000 Enables Input interrupt. Built-in input terminal
The specified input interrupt (here, IN2) is 01 03 05 07 09 11
MSKS enabled when the MSKS instruction is executed.
102 00 02 04 06 08 10
#0000
Interrupt CIO 0

Interrupt task 2
END

END

CP1E CPU Unit Software Users Manual(W480) 12-7


12 Interrupts

Writing the Interrupt Tasks Ladder Program


Create ladder programs for interrupt tasks 2 to 7, which are executed for the corresponding interrupt
inputs. Right-click a program in the CX-Programmer and select Properties. Select interrupt tasks 2 to 7
in the Task Type Field of the Program Properties Dialog Box.

Always put an END instruction at the last address of the program.

12-2-3 Application Example for Input Interrupts


In this example, bent parts are detected in a moving workpiece, such as an IC component. When the
sensor input (terminal 0 on terminal block 02 = CIO 0.02) changes from OFF to ON, the interrupt task is
executed.

Sensor input (interrupt input 0)


Sensor input (interrupt) CIO 0.02 Interrupt task Interrupt task Interrupt task
Workpiece execution execution execution
Sensor input
CIO 0.00

Sensor input
Sensor input 3 Sensor input 1 CIO 0.01
Sensor input 2 Sensor input
CIO 0.03
Reset input
CIO 0.04
OK output
CIO 100.00
NG output 1
CIO 100.01

NG output 2
CIO 100.02
NG output 3
CIO 100.03
NG output 4
CIO 100.04

12-8 CP1E CPU Unit Software Users Manual(W480)


12 Interrupts

1)Connecting Interrupt Input Terminals


Terminal 2 on terminal block 0CH of a CP1E CPU Unit with 20 I/O Points is interrupt input IN2.
Interrupt task 2 corresponds to interrupt input 2.

Interrupt input (sensor input):


Sensor input 3: CIO 0.03 CIO 0.02
Sensor input 2: CIO 0.01 Reset input: CIO 0.04
Sensor input 1: CIO 0.00

12-2 Input Interrupts


12
OK output: CIO 100.00
NG output 2: CIO 100.04

12-2-3 Application Example for Input Interrupts


NG output 1: CIO 100.01 NG output 3: CIO 100.03
NG output 4: CIO 100.02

2)PLC Setup
Set IN2 to Interrupt in the interrupt input settings on the Built-in Input Tab Page.

CP1E CPU Unit Software Users Manual(W480) 12-9


12 Interrupts

3)Programming Example
(1) Cyclic Task

Interrupt input 0

Specifies executing The MSKS instruction is


interrupt when input used to specify an interrupt
turns ON. when the input turns ON
Interrupt input 0 and then it is used to
unmask the input interrupt.

Unmasks the input


interrupt.

NG output sensor input 1

NG output sensor input 2

NG output sensor input 3

0.04

Reset input

(2)Interrupt Task

OK output
Sensor input 1 Sensor input 2 Sensor input 3

NG output 2
Sensor input 1
Sensor input 1
Interrupt task 2

NG output 3
Sensor input 2
Sensor input 2

NG output 4
Sensor input 3
Sensor input 3

12-10 CP1E CPU Unit Software Users Manual(W480)


12 Interrupts

12-3 Scheduled Interrupts


Scheduled interrupts can be used with any model of CP1E CPU Unit.

12-3-1 Overview

12-3 Scheduled Interrupts


Scheduled interrupts can be used to execute interrupt tasks at fixed time intervals measured by the
CPU Units built-in timer.

12

12-3-1 Overview
Minimum interval: 0.5 ms

Specified interval
Interrupt task
Cyclic tasks
Interrupt occurs Ladder program
(ladder programs)
Cycle
END

END
I/O refresh

Condition for
accepting interrupts
MSKS instruction executed Scheduled Interrupt Interval =
to set the scheduled 0.5 ms (example)
interrupt interval
0.5ms 0.5ms 0.5ms
Internal clock

Execution Cyclic task Execution Cyclic task Execution


Cyclic task execution interrupted interrupted interrupted
execution execution

Executing Executing Executing


scheduled scheduled scheduled
interrupt interrupt interrupt
task 1 task 1 task 1

CP1E CPU Unit Software Users Manual(W480) 12-11


12 Interrupts

12-3-2 Flow of Operation

Determine the scheduled Determine whether to set the time interval in units of
interrupt time unit 10 ms (default), 1 ms, or 0.1 ms.

Make the settings in the In the PLC Setup of the CX-Programmer, set the
1 PLC Setup scheduled interrupt interval time unit to 10 ms, 1 ms,
or 0.1 ms on the Timings Tab Page.

Automatic assignment of The corresponding interrupt task number is 1.


interrupt task numbers

Use MSKS to specify the scheduled interrupt interval.


Execute MSKS
2 Ladder instruction in a cyclic
The setting can be 0.5 ms or longer.
Set N to 4 in the MSKS instruction.
program task

Interrupt task Write the program for the corresponding interrupt task.

1 PLC Setup
To change the time unit to 1 ms or 0.1 ms, set the scheduled interrupt interval parameter on the Timings
Tab Page of the PLC Setup.

Note The power supply must be restarted after the PLC Setup is transferred in order to enable the time unit set-
ting.
The scheduled interrupt interval is calculated by multiplying the unit set in the PLC Setup by the timer
SV set with MSKS.

12-12 CP1E CPU Unit Software Users Manual(W480)


12 Interrupts

2 Writing the Ladder Program: Execute MSKS in a Cyclic Task


The MSKS instruction must be executed from the ladder program in a cyclic task in order to use sched-
uled interrupts.

12-3 Scheduled Interrupts


Execution condition

@MSKS(690)
N Specifies scheduled interrupt 0 (interrupt task 1)
C Sets the scheduled interrupt interval and starts timing

The MSKS instruction must be executed only once to make the settings, so in general execute MSKS in
just one cycle using the upwardly differentiated variation of the instruction.

z Specifying MSKS Operands (N and C) 12


MSKS Operands

12-3-2 Flow of Operation


MSKS Operands Interrupt time interval (period)
N C Time unit set in
Interrupt interval
Interrupt number Interrupt time PLC Setup
Scheduled interrupt 0 (interrupt #0000 to #270F (0 to 10 ms 10 to 99,990 ms
task 1) 9999) 1 ms 1 to 9,999 ms
14: Reset and restart
4: Do not reset and restart 0.1 ms 0.5 to 999.9 ms

Example:

Scheduled Interrupt Time Unit


Scheduled interrupt
Cyclic tasks
When time unit is 0.1 ms: 0.5 ms
MSKS
4 Setting in PLC Setup
#0005
Set the schedule interrupt
time unit to 0.1, 1, or 10 ms
In intervals of 0.5 ms min

Interrupt

Interrupt task 1
END

END

CP1E CPU Unit Software Users Manual(W480) 12-13


12 Interrupts

Precautions for Correct Use


Set a scheduled interrupt interval that is longer than the time required to execute the corre-
sponding interrupt task.
If you shorten the scheduled interrupt interval and increase the execution frequency of the
scheduled interrupt task, the cycle time will increase, and this will affect the execution timing of
cyclic tasks.
If an interrupt task is being executed for another interrupt (input interrupt or high-speed
counter interrupt) when the scheduled interrupt occurs, the scheduled interrupt will not be exe-
cuted until the other interrupt task had been completed.
Even in this case, measurement of scheduled interrupt times are continually executed in paral-
lel, so the execution of scheduled interrupt tasks will not be delayed.

Writing the Interrupt Task Program


Create the program for interrupt task 1, which is executed for the scheduled interrupt. Right-click a pro-
gram in the CX-Programmer and select Properties. Select Interrupt Tasks 1 (scheduled interrupt) in
Task Type Field of the Program Properties Dialog Box.

Always put an END instruction at the last address of the program.

12-14 CP1E CPU Unit Software Users Manual(W480)


12 Interrupts

12-4 Precautions for Using Interrupts

12-4 Precautions for Using Interrupts


12-4-1 Interrupt Task Priority and Order of Execution

If interrupt task A (an input interrupt, for example) is being executed when interrupt task B (a scheduled
interrupt, for example) is called, task A execution will not be interrupted. Task B execution will be started
when task A had been completed.
If multiple types of interrupts occur simultaneously, they are executed in the following order. If they are
the same interrupt type, the task with the lower interrupt task number will be executed frist.

Input interrupts High-speed Scheduled


counter interrupts interrupts
12
For example, if an interrupt task is being executed for another interrupt (input interrupt or high-speed

12-4-1 Interrupt Task Priority and Order of Execution


counter interrupt) when a scheduled interrupt occurs, the scheduled interrupt will not be executed until
execution of the other interrupt task had been completed.Even in this case, scheduled interrupt times
are continually measured in parallel, so the execution of the scheduled interrupt task will not be
delayed.

12-4-2 Auxiliary Area Words and Bits Related to Interrupts


The processing time of an interrupt task and the task number of the interrupt with the maximum pro-
cessing time can be found in the Auxiliary Area. The actual processing time can also be checked.
Name Addresses Description
Maximum A440 Contains the maximum interrupt task processing time in units of 0.1 ms.
Interrupt Task This value is cleared at the start of operation.
Processing Time
Interrupt Task A441 Contains the task number of the interrupt task with the maximum processing
With Maximum time.Here, #8000 to #80FF correspond to tasks 0 to 15 (00 to FF hex).
Processing Time A441.15 will turn ON when the first interrupt occurs after the start of operation.
The maximum processing time for subsequent interrupt tasks will be stored in
the rightmost two digits in hexadecimal.This value is cleared at the start of
operation.

12-4-3 Duplicate Processing in Cyclic and Interrupt Tasks


If a memory address is manipulated by instructions both in a cyclic task and an interrupt task, an inter-
rupt mask must be set to disable interrupts while the instruction in the cyclic task is being executed.
Normally, if an interrupt occurs, execution of the cyclic task will be interrupted immediately, even during
execution of an instruction in the cyclic task, and the partially processed data is saved. After the inter-
rupt task had been completed, processing returns to the cyclic task and the interrupted processing
restarts with the data saved before the interrupt processing.
If the interrupt task overwrites a memory address used by one of the interrupted instructions operands,
the data may be overwritten when the saved data is restored when processing returns to the cyclic task.
To prevent certain instructions from being interrupted during processing, insert the MSKS instruction
just before and after the instructions, using the MSKS instruction before the instructions to disable inter-
rupts and the MSKS instruction after the instructions to enable interrupts again.

CP1E CPU Unit Software Users Manual(W480) 12-15


12 Interrupts

12-16 CP1E CPU Unit Software Users Manual(W480)


High-speed Counters
This section describes the high-speed counter inputs, high-speed counter interrupts,
and the frequency measurement function.
13

13-1 Overview and Flow of Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-2


13-1-1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-2
13-1-2 Flow of Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-3
13-1-3 Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-8
13-2 High-speed Counter Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-9
13-2-1 Pulse Input Method (Input Setting) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-9
13-2-2 Counting Modes: Linear Mode and Ring Mode . . . . . . . . . . . . . . . . . . . . . . 13-10
13-2-3 Reset Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-11
13-2-4 Reading the Present Value of a High-speed Counter . . . . . . . . . . . . . . . . . 13-12
13-2-5 High-speed Counter Frequency Measurement . . . . . . . . . . . . . . . . . . . . . . 13-12
13-3 High-speed Counter Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-14
13-3-1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-14
13-3-2 Target Value Comaprison and Range Comparison . . . . . . . . . . . . . . . . . . . 13-17
13-4 Auxiliary Area Bits and Words Used with High-speed Counters . . . . . . 13-25
13-5 Application Example of High-speed Counter Interrupt . . . . . . . . . . . . . 13-26

CP1E CPU Unit Software Users Manual(W480) 13-1


13 High-speed Counters

13-1 Overview and Flow of Processing


High-speed counters can be used with any model of CP1E CPU Unit.

13-1-1 Overview
High-speed counters are used to measure high-speed input signals that cannot be measured by
counter instructions.

z Applications
Detecting the position or length of a workpiece with an input from an incremental rotary encoder.
Measuring the speed of a workpiece from its position data using frequency measurement and
rotational speed conversion.
Hhigh-speed processing according to the workpieces position data.

The present value of the high-speed counter is stored in the Auxiliary Area and can be used as posi-
tion data. When it reaches specified values, interrupts can be generated. The count can be started
and stopped. Depending on the instruction, the frequency (speed) can be read from the present
value of the high-speed counter.

Changes to PV

Read Reading PV (from Auxiliary Area


Count High-speed counter PV or using PRV instruction)
Encoder
input (stored in Auxiliary Area) Reading frequency (using PRV instruction)
Phase A/phase B
Up/down pulse inputs Read PRV
Reset input (phase Z)
Etc. High-speed counter PV comparison

Target value comparison

Range comparison for Interrupt task


upper and lower limits

Settings

Setting target values or range upper/lower


limits and starting comparison (with CTBL
instruction or by executing interrupt task)

CTBL

13-2 CP1E CPU Unit Software Users Manual(W480)


13 High-speed Counters

13-1-2 Flow of Processing

1 Selecting the high-speed


counter input setting, assigning
The high-speed counter input setting can be set and ter-
minals 00 to 07 on the 0CH terminal block can be used

13-1 Overview and Flow of Processing


terminals, and wiring for high-speed counters.

Terminals 00 to 07 on the 0CH terminal block corre-


High-speed counter allocation
spond to high-speed counters 0 to 5.

2 PLC Setup
Enable the required high-speed counters.
Select the Use high speed counter Check Box for
high-speed counters 0 to 5 and select the input setting
on the Built-in Input Tab Page of the PLC Setup using
the CX-Programmer.

3 Ladder
Read counter PV
Read the PV from Auxiliary Area or by executing a
PRV instruction.
13
programming Execute a PRV instruction.
Read counter frequency

13-1-2 Flow of Processing


Restrictions
A built-in input cannot be used as a normal input, interrupt input, or quick-response input if it is being
used as a high-speed counter input.

CP1E CPU Unit Software Users Manual(W480) 13-3


13 High-speed Counters

1 Assigning Terminals for High-speed Counter Inputs


z Pulse Input Method and High-speed Counter Input Terminals
The following input terminals can be used for high-speed counters 0 to 5 with the pulse input
method.
Settings in PLC Setup
Input terminal block Other functions that cannot be used at the same time
High-speed counter 0 to 3 settings on Built-in
Input Tab Page

Use

Terminal Input setting Quick-


Input Origin searches for
block Terminal Normal input response
interrupts pulse outputs 0 and 1
label Single-phase Two-phase (differ- Two-phase Inputs
(increment ential phase 4 or (pulse/
pulse input) up/down) direction)

CIO 0 00 Counter 0, Counter 0, phase A Counter 0, Normal input 0


increment or up input pulse input
input

01 Counter 1, Counter 0, phase B Counter 1, Normal input 1


increment or down input pulse input
input

02 Counter 2, Counter 1, phase A Counter 0, Normal input 2 Interrupt input 2 Quick-


increment or up input direction response
input input 2

03 Counter 1, phase B Counter 1, Normal input 3 Interrupt input 3 Quick-


or down input direction response
input 3

04 Counter 3, Counter 0, phase Z Counter 0, Normal input 4 Interrupt input 4 Quick-


increment or reset input reset input response
input input 4

05 Counter 4, Counter 1, phase Z Counter 1, Normal input 5 Interrupt input 5 Quick-


increment or reset input reset input response
input input 5

06 Counter 5, Normal input 6 Interrupt input 6 Quick- Pulse 0:


increment response Origin input signal
input input 6

07 Normal input 7 Interrupt input 7 Quick- Pulse 1:


response Origin input signal
input 7

Note 1 The same input setting must be used for high-speed counter 0 and high-speed counter 1.
2 High-speed counter 2 cannot be used if the input setting of high-speed counter 0 or high-speed counter 1
is set for differential phase inputs (4x), pulse + direction inputs, or up/down pulse inputs.

13-4 CP1E CPU Unit Software Users Manual(W480)


13 High-speed Counters

z Wiring High-speed Counters


Using a 24-VDC Open-collector Encoder
The following example shows the connections to an encoder with phase-A, phase-B, and phase-Z
inputs.

CP1E CPU Unit

13-1 Overview and Flow of Processing


(Differential Phase Input Mode)
Black Phase A 0.00
Encoder (High-speed counter 0: Phase A 0 V)
(power supply: 24 VDC)
White Phase B 0.01
(High-speed counter 0: Phase B 0 V)
Orange Phase Z
0.04
(High-speed counter 0: Phase Z 0 V)
Example: E6B2-CWZ6C
Brown+Vcc COM
NPN open-collector output (COM 24V)
Blue 0V(COM)

24 VDC power supply


0V
+24V

(Do not use the same I/O power supply as other equipment.)
1
Power provided 0V Power supply
Encoder 2 24V 0V
Shielded twisted-pair cable
CP1E CPU Unit
13
IA
Phase A 0.00

13-1-2 Flow of Processing


IB 0.01
Phase B

IZ
Phase Z 0.04

COM

CP1E CPU Unit Software Users Manual(W480) 13-5


13 High-speed Counters

2 PLC Setup
Click the Built-in Input Tab and select the Use high speed counter Check Box for high-speed counters
0 to 5. Set the counting mode, reset method, and input setting.

Built-in Input Tab Page


Item Setting
Use high Use counter Select Use high speed counter for each counter to be used.
speed Counting Mode Select Linear mode or Circular ring mode.
counter 0
to 5 Circular Max. If circular mode is selected, set the maximum ring count.
Count(maximum 0 to 4,294,967,295 decimal
ring count)
Reset Method Phase Z and software reset
Software reset*
Phase Z and software reset (continue comparing)
Software reset (continue comparing)
*Only a software reset can be used if an increment pulse input is specified.
Input Setting Differential phase inputs (4)
Pulse + direction inputs
Up/down pulse inputs
Increment pulse input

Note The power supply must be restarted after the PLC Setup is transferred in order to enable the high-speed
counter settings.

13-6 CP1E CPU Unit Software Users Manual(W480)


13 High-speed Counters

3 Writing the Ladder Program


Generating interrupts for the Execute interrupt tasks with CTBL
13-3 High-speed
high-speed counter PV (num- instructions.
Counter Interrupts
ber of pulses) and perform

13-1 Overview and Flow of Processing


high-speed processing.

Reading the high-speed Read the high-speed counter PV from


13-2-4 Reading
counter PV (number of the Auxiliary Area and convert it to
the Present Value of
pulses). position or length data using instruc-
a High-speed
tions or measure the length using con-
Counter
mparison instructions such as =, >,
and <.

Reading the high-speed Execute a PRV instruction.


13-2-6 High-
counter frequency (speed).
speed Counter
Frequency
Measurement 13

13-1-2 Flow of Processing

CP1E CPU Unit Software Users Manual(W480) 13-7


13 High-speed Counters

13-1-3 Specifications
Item Description
nput setting (Selected in the PLC Increment input Differential Up/down pulse Pulse + direc-
Setup) phase inputs inputs tion inputs
Input terminal allocations Increment pulse Phase-A input Up pulse input Pulse input
input
Phase-B input Down pulse input Direction input
Phase-Z input Reset input Reset input
Input method Single-phase Differential Two Single- Single-phase
input phase, 4 phase inputs pulse + direc-
(Fixed) tion inputs
Frequency and CP1E-N F - F 100 kHz: 50 kHz: 100 kHz: 100 kHz:
number of high- 2 counters, 1 counter, 1 counter, 2 counters
speed counters 10 kHz: 5 kHz: 1 counter 10 kHz: 1 counter
4 counters
CP1E-E F - F 10 kHz: 5 kHz: 10 kHz: 10 kHz:
6 counters 2 counters 2 counters 2 counters
Counting mode Linear mode or circular (ring) mode (Select in the PLC Setup.)
Count values Linear mode: 8000 0000 to 7FFF FFFF hex
Ring Mode: 0000 0000 to Ring SV
(The ring SV (Circular Max. Count) is set in the PLC Setup and the setting
range is 0000 0001 to FFFF FFFF hex.)
High-speed counter PV storage High-speed counter 0: A271 (upper 4 digits) and A270 (lower 4 digits)
locations High-speed counter 1: A273 (upper 4 digits) and A272 (lower 4 digits)
High-speed counter 2: A317 (upper 4 digits) and A316 (lower 4 digits)
High-speed counter 3: A319 (upper 4 digits) and A318 (lower 4 digits)
High-speed counter 4: A323 (upper 4 digits) and A322 (lower 4 digits)
High-speed counter 5: A325 (upper 4 digits) and A324 (lower 4 digits)
Target value comparison interrupts or range comparison interrupts can be
executed based on these PVs.

Note The PVs are refreshed in the overseeing processes at the start of
each cycle. Use PRV to read the most recent PVs.
Data format: 8 digit hexadecimal
Range in linear mode: 8000 0000 to 7FFF FFFF hex
Range in Ring Mode: 0000 0000 to Ring SV (Circular Max. Count)
Control Target value Up to 6 target values and corresponding interrupt task numbers can be
method comparison registered.
Range comparison Up to 6 ranges can be registered, with a separate upper limit, lower limit,
and interrupt task number for each range.
Counter reset method Phase-Z + Software reset
(Set the counter reset method in the The counter is reset when the phase-Z input goes ON while the Reset
PLC Setup.) Bit is ON. (Phase Z cannot be used for the increment pulse.)
Software reset
The counter is reset when the Reset Bit is turned ON.

Note Operation can be set to stop or continue the comparison operation


when the high-speed counter is reset.

13-8 CP1E CPU Unit Software Users Manual(W480)


13 High-speed Counters

13-2 High-speed Counter Inputs


13-2-1 Pulse Input Method (Input Setting)

Increment Mode

13-2 High-speed Counter Inputs


The Increment Mode counts signals on a single-phase pulse input. Only incrementing the count is
possible in this mode.
Conditions for Incrementing the Count

Pulse Count value


Pulse  Increment
H No change
 No change
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
L No change
Only rising edges are counted.

Differential Phase Mode (4)


The Differential Phase Mode uses two phase signals (phase A and phase B) and increments/decre- 13
ments the count according to the status of these two signals.
Conditions for Incrementing/

13-2-1 Pulse Input Method (Input Setting)


Decrementing the Count

Phase A Phase A Phase B Count value


 OFF Increment
Phase B ON  Increment
 ON Increment
OFF  Increment
4 0 1 2 3 4 5 6 7 8 9 10 11 12 11 10 9 8 7 6 5 4 3 2 1 2 3 4 5 6 7 8 OFF  Decrement
 ON Decrement
ON  Decrement
 OFF Decrement

Up/Down Mode
The Up/Down Mode uses two signals, an increment pulse input and a decrement pulse input.
Conditions for Incrementing/
Decrementing the Count
Increment Decrement Increment Count value
pulse pulse pulse
 OFF Decrement
Decrement ON  Increment
pulse  ON No change
0 1 2 3 4 5 6 7 8 7 6 5 4 3 2 1 0 OFF  No change
OFF  Increment
 ON Decrement
ON  No change
 OFF No change
The count is incremented for each increment
pulse and decremented for each decrement pulse.
Only rising edges are counted.
Pulse + Direction Mode
The pulse + direction mode uses a direction signal input and pulse signal input. The count is incre-
mented or decremented depending on the status (ON or OFF) of the direction signal.
Conditions for Incrementing/
Decrementing the Count

Pulse Direction Pulse Count value

 OFF No change
Direction
ON  Increment
 ON No change
0 1 2 3 4 5 6 7 8 7 6 5 4 3 2 1 0 OFF  No change
OFF  Decrement
 ON No change
ON  No change
 OFF No change
The count is incremented when the
direction signal is ON and
decremented when it is OFF.
Only rising edges are counted.

CP1E CPU Unit Software Users Manual(W480) 13-9


13 High-speed Counters

Additional Information

The count of a high-speed counter can be monitored to see if it is currently being incremented or
decremented. The count in the current cycle is compared with the count in the previous cycle to
determine if it is being incremented or decremented.
The results are reflected in the High-speed Counter Count Direction Flags.
Address of High-speed
High-speed counter
Counter Count Direction Flag
High-speed counter 0 A274.10
High-speed counter 1 A275.10
High-speed counter 2 A320.10
High-speed counter 3 A321.10
High-speed counter 4 A326.10
High-speed counter 5 A327.10

13-2-2 Counting Modes: Linear Mode and Ring Mode

Linear Mode
Input pulses can be counted in the range between the lower limit and upper limit values. If the pulse
count goes beyond the lower/upper limit, an underflow/overflow will occur and counting will stop.
Increment Mode
0 4294967295
(000000 Hex) (FFFFFFFF Hex)

PV overflow

Up/Down Mode

-2147483648 0 +2147483647
(80000000 Hex) (00000000 Hex) (7FFFFFFF Hex)

PV underflow PV overflow

Circular (Ring) Mode


Input pulses are counted in a loop within the set range.
If the count is incremented from the maximum ring count, the count will be reset to 0 automatically
and incrementing will continue.
If the count is decremented from 0, the count will be set to the maximum ring count automatically and
decrementing will continue.
Consequently, underflows and overflows cannot occur when Ring Mode is used.

Count value

2 32-1

Maximum ring
count

13-10 CP1E CPU Unit Software Users Manual(W480)


13 High-speed Counters

Maximum Ring Count


Use the PLC Setup to set the maximum ring count (Circular Max. Count), which is the maximum
value of the input pulse counting range. The maximum ring count can be set to any value between
0000 0001 and FFFF FFFF hex (1 to 4,294,967,295 decimal).
Restrictions
There are no negative values in Ring Mode.
If the maximum ring count is set to 0 in the PLC Setup, the counter will operate with a maximum

13-2 High-speed Counter Inputs


ring count of FFFF FFFF hex.

13-2-3 Reset Methods

Phase-Z Signal + Software Reset


The high-speed counters PV is reset when the phase-Z signal (reset input) goes from OFF to ON while
the corresponding High-speed Counter Reset Bit is ON.
The CPU Unit recognizes the ON status of the High-speed Counter Reset Bit only at the beginning of
the PLC cycle during the overseeing processes. Consequently, when the Reset Bit is turned ON in the
ladder program, the phase-Z signal does not become effective until the next PLC cycle.

One cycle
13

13-2-3 Reset Methods


Phase Z

Reset bit

PV not PV reset PV reset PV reset PV not reset PV reset


reset

Note The phase-Z signal cannot be used if an incremental counter is specified. Only a software reset can be used.

Software Reset
The high-speed counters PV is reset when the corresponding High-speed Counter Reset Bit goes from
OFF to ON.
The CPU Unit recognizes the OFF-to-ON transition of the High-speed Counter Reset Bit only at the
beginning of the PLC cycle during the overseeing processes. Reset processing is performed at the
same time. The OFF-to-ON transition will not be recognized if the Reset Bit goes OFF again within the
same cycle.

One cycle

Reset bit

PV reset PV not reset PV not reset PV not reset

Additional Information

The comparison operation can be set to stop or continue when a high-speed counter is reset.
This enables applications where the comparison operation can be restarted from a counter PV of
0 when the counter is reset.

CP1E CPU Unit Software Users Manual(W480) 13-11


13 High-speed Counters

13-2-4 Reading the Present Value of a High-speed Counter


The present value of a high-speed counter can be read in the following two ways.
Value refreshed at the I/O refresh timing: Read PV from Auxiliary Area.
Value updated when an instruction is executed: Read PV by executing a PRV instruction.

Reading the Value Refreshed at the I/O Refrefresh Timing


The PV that is stored in the following words can be read using the MOVL instruction or other instruc-
tions.
Read PV Auxiliary Area word
High-speed counter 0 A271 (upper digits) and A270 (lower digits)
High-speed counter 1 A273 (upper digits) and A272 (lower digits)
High-speed counter 2 A317 (upper digits) and A316 (lower digits)
High-speed counter 3 A319 (upper digits) and A318 (lower digits)
High-speed counter 4 A323 (upper digits) and A322 (lower digits)
High-speed counter 5 A325 (upper digits) and A324 (lower digits)

Reading the Value When an Instruction Is Executed

z Reading the High-speed Counter PV with a PRV Instruction


Execution condition

@PRV
#0010 C1: Port specifier (example for high-speed counter input 0)
#0000 C2: Control data (for reading PV)
D100 S: First destination word
15 0

D100 PV data lower bytes


High-speed counter PV that was read
D101 PV data upper bytes

13-2-5 High-speed Counter Frequency Measurement

High-speed Counter Frequency Measurement


This function measures the frequency of the high-speed counter (input pulses.)
The input pulse frequency can be read by executing the PRV instruction. The measured frequency is
output in 8-digit hexadecimal and expressed in Hz. The frequency measurement function can be used
with high-speed counter 0 only.
The frequency can be measured while a high-speed counter 0 comparison operation is in progress.
Frequency measurement can be performed at the same time as functions such as the high-speed
counter and pulse output without affecting the performance of those functions.

13-12 CP1E CPU Unit Software Users Manual(W480)


13 High-speed Counters

z Flow of Processing

1 Selecting the high-speed counter


Set the high-speed counter input setting and deter-
mine the use of the terminals.
mode and assigning terminals

High-speed counter 0 must be used.


High-speed counter allocation

13-2 High-speed Counter Inputs


2 PLC Setup
Enable the high-speed counter.
Select the Use high speed counter Check Box for
high-speed counter 0 and select the input setting
on the Built-in Input Tab Page of the PLC Setup
using the CX-Programmer.

3 Ladder Execute PRV instruction


Read the frequency by executing the PRV instruc-
tion.
programming in a cyclic task

13
z Reading the High-speed Counter Frequency with a PRV Instruction

13-2-5 High-speed Counter Frequency Measurement


Execution condition

@PRV
#0010 C1: Port specifier (example for high-speed counter input 0)
#0013 C2: Control data for reading frequency (10-ms sampling)
D100 S: First destination word
15 0
Present frequency
D100 data lower bytes High-speed counter frequency
D101
Present frequency that was read
data upper bytes

z Restrictions
The frequency measurement function can be used with high-speed counter 0 only.
Frequency measurements are not possible for high-speed counter 3.

z Specifications
Item Specifications
Number of frequency mea- 1 input (high-speed counter 0 only)
surement inputs
Frequency measurement High-speed counter 0:
range Differential phase inputs: 0 to 50 kHz
All other input modes: 0 to 100 kHz

Note If the frequency exceeds the maximum value, the maximum value will be
stored.
Measurement method Execution of the PRV instruction
Stored data Unit Hz
Output data Differential phase input: 0000 0000 to 0000 C350 hex
range All other input modes: 0000 0000 to 000186A0 hex

CP1E CPU Unit Software Users Manual(W480) 13-13


13 High-speed Counters

13-3 High-speed Counter Interrupts


High-speed counter interrupts can be used with any model of CP1E CPU Unit.

13-3-1 Overview
This function counts input pulses with the CPU Units built-in high-speed counter and executes an inter-
rupt task when the count reaches the preset value or falls within a preset range (target-value or zone
comparison). An interrupt task between 0 and 15 can be allocated with an instruction.

Rotary Encoder
Built-in input

Present position Present position matches set target value

Time

Interrupt task
Cyclic tasks
(ladder programs) Interrupt occurs Ladder diagram
Cycle
END

END
I/O refresh

Target value comparison Range comparison


The specified interrupt program can be started when the The specified interrupt program can be started when the
present value of the high-speed counter matches a target present value of the high-speed counter enters a set range.
value.

Instruction execution Instruction execution


condition condition

CTBL instruction executed CTBL instruction executed


High-speed High-speed
Counter Unit Counter Unit

High-speed counter PV High-speed counter PV

Target value 1
Target value
Target value 2
0 0
Time Time
Counting enabled Counting enabled
Cyclic task Interrupted Cyclic task Interrupted Cyclic task Cyclic task Interrupted Cyclic task Interrupted Cyclic task
execution execution execution execution execution execution

Interrupt task Interrupt task Interrupt task Interrupt task


execution execution execution execution

13-14 CP1E CPU Unit Software Users Manual(W480)


13 High-speed Counters

Flow of Processing

1 Selecting the high-speed counter


The high-speed counter input setting can be set
and terminals 00 to 05 on the 0CH terminal block
input setting and assigning terminals
can be used for high-speed counters.

13-3 High-speed Counter Interrupts


High-speed counters 0 to 5 can be used for high-
Assigning high-speed counter numbers
speed counter interrupts.

2 PLC Setup
Enable the required high-speed counters.
Select the Use high speed counter Check Box for
high-speed counters 0 to 5 and select the input
setting on the Built-in Tab Page of the PLC Setup
using the CX-Programmer.

3 Execution of CTBL and


Set the comparison values for the high-speed
counter and the interrupt tasks (0 to 15) to be
INI instructions in a started using the CTBL instruction.
Ladder
cyclic task
programming Start the comparison using the INI instruction. 13
Interrupt task Write a program for interrupt tasks 0 to 15.

13-3-1 Overview
z High-speed Counter Settings
Specify
Single- operand N in
Two-phase Instruc- Interrupt
phase Settings in PLC Setup the instruc-
terminal tion task number
terminal tion to enable
interrupts
00 on CIO 0 00 on CIO 0 Interrupt input High-speed Select Use CTBL #0000 0 to 15
terminal terminal settings on counter 0 Check Box. instruc- (Specified by
block block Built-in Input tion user.)
01 on CIO 0 Tab Page
terminal
block
04 on CIO 0
terminal
block
01 on CIO 0 02 on CIO 0 High-speed #0001 0 to 15
terminal terminal counter 1 (Specified by
block block user.)
03 on CIO 0
terminal
block
05 on CIO 0
terminal
block
02 on CIO 0 High-speed #0002 0 to 15
terminal counter 2 (Specified by
block user.)
03 on CIO 0 High-speed #0003 0 to 15
terminal counter 3 (Specified by
block user.)
04 on CIO 0 High-speed #0004 0 to 15
terminal counter 4 (Specified by
block user.)
05 on CIO 0 High-speed #0005 0 to 15
terminal counter 5 (Specified by
block user.)

CP1E CPU Unit Software Users Manual(W480) 13-15


13 High-speed Counters

Restrictions
A built-in input cannot be used as a normal input, interrupt input, or quick-response input if it is being
used as a high-speed counter input.

1 Assigning High-speed Counter Input Terminals


High-speed counters 0 to 5 can be used for high-speed counter interrupts.
Settings in PLC Setup
Input terminal block
High-speed counter 0 to 5 settings on Built-in Input Tab Page

Termi- Use
nal Terminal Two-phase (differen-
block number Single-phase (incre- Two-phase
tial phase 4 or
label ment pulse input) (pulse/direction)
up/down)
CIO 0 00 High-speed counter 0, High-speed counter 0, High-speed counter 0,
increment input phase A or up input pulse input
01 High-speed counter 1, High-speed counter 0, High-speed counter 1,
increment input phase B or down input pulse input
02 High-speed counter 2, Counter 1, phase A or High-speed counter 0,
increment input up input direction
03 High-speed counter 1, High-speed counter 1,
phase B or down input direction
04 High-speed counter 3, High-speed counter 0, High-speed counter 0,
increment input phase Z or reset input reset input
05 High-speed counter 4, High-speed counter 1, High-speed counter 1,
increment input phase Z or reset input reset input
06 High-speed counter 5,
increment input

2 PLC Setup
Click the Built-in Input Tab and select the Use high-speed counter Check Box for high-speed counters 0
to 5, and then set the counting mode, reset method, and input setting.

Refer to 2 PLC Setup in 13-1-2 Flow of Processing for details.

13-16 CP1E CPU Unit Software Users Manual(W480)


13 High-speed Counters

3 Writing the Ladder Program


Execute the instructions in the following order.
Register the compari- Register the comparison table with the CTBL (COMPARISON ABLE
son table LOAD) instruction.

13-3 High-speed Counter Interrupts


Start comparison Start comparison with the CTBL (COMPARISON ABLE LOAD) or INI
(MODE CONTROL) instruction.

Stop comparison Stop with the INI (MODE CONTROL) instruction.

13-3-2 Target Value Comaprison and Range Comparison

Target Value Comparison 13


The specified interrupt task is executed when the high-speed counter PV matches a target value regis-
tered in the table.

13-3-2 Target Value Comaprison and Range Comparison


The comparison conditions (target values and counting directions) are registered in the comparison
table along with the corresponding interrupt task number. The specified interrupt task will be exe-
cuted when the high-speed counter PV matches the registered target value.
Comparison is executed in the order set in the comparison table. Once comparison has cycled
through the comparison table, it will return and wait for a match with the first target value again.

The following examples show the operation of an interrupt task for a comparison table.
Example 1

High-speed counter PV
Comparison table
Number of values = 4
Target value 4 Target value 1 (when counting up)
Target value 3
Comparison is Interrupt task = 0
executed according Target value 2 (when counting up)
to the order of the Interrupt task = 1
Target value 2
values in the table. Target value 3 (when counting up)
Interrupt task = 5
Target value 1 Target value 4 (when counting up)
Interrupt task = 8

Time
Interrupt task that is started NO. No.0 No.1 No.5 No.8 No.0

CP1E CPU Unit Software Users Manual(W480) 13-17


13 High-speed Counters

Example 2

High-speed counter PV
Comparison table
Number of values = 4
Target value 1 Target value 1 (when counting up)
Target value 2
Comparison is Interrupt task = 0
executed according Target value 2 (when counting down)
to the order of the Interrupt task = 1
Target value 3
values in the table. Target value 3 (when counting down)
Interrupt task = 5
Target value 4 Target value 4 (when counting down)
Interrupt task = 8

Time
Interrupt task that is started NO. No.0 No.1 No.5 No.8

Up to 6 target values (between 1 and 6) can be registered in the comparison table.


A different interrupt task can be registered for each target value.
If the PV is changed, the changed PV will be compared with the target values in the table, even if the
PV is changed while the target value comparison operation is in progress.

Precautions for Correct Use


When the count direction (incrementing/decrementing) changes at a PV that matches a target
value, the next target value cannot be matched in that direction.
Set the target values so that they do not occur at the peak or trough of count value changes.

Match Match

Target value 1 Target value 1

Target value 2 Target value 2


Match
Match not recognized

13-18 CP1E CPU Unit Software Users Manual(W480)


13 High-speed Counters

The maximum response frequencies of the high-speed counters are given in the following table.
E-type CPU N-type CPU
Item
Unit Unit
Incremental pulse 10kHz 100kHz
Up and down pulses
High-speed counter 0
Pulse plus direction

13-3 High-speed Counter Interrupts


Differential phase (4) 5kHz 5kHz
Incremental pulse 10kHz 100kHz
Up and down pulses 10kHz
High-speed counter 1
Pulse plus direction
Differential phase (4) 5kHz 5kHz
High-speed counter 2 Incremental pulse 10kHz 10kHz
High-speed counter 3 Incremental pulse
High-speed counter 4 Incremental pulse
High-speed counter 5 Incremental pulse

Exceptions
When using target matching, the total processing frequency for all high-speed counters must be 13
50 kHz or less.
When using target matching, the interval between interrupts for target matches must be 1 ms or

13-3-2 Target Value Comaprison and Range Comparison


greater.
If the input setting is set to pulse plus direction inputs, the frequency must be 1 kHz or less when
reversing directions.

Range Comparison
The specified interrupt task is executed when the high-speed counter PV is within the range defined by
the upper and lower limit values.
The comparison conditions (upper and lower limits of the range) are registered in the comparison
table along with the corresponding interrupt task number. The specified interrupt task will be exe-
cuted once when the high-speed counter PV is in the range (Lower limit PV Upper limit).

High-speed counter PV Comparison table


Upper limit 1
Upper limit 1 Lower limit 1
Lower limit 1 Interrupt task = 1
Comparison is executed Upper limit 2
regardless of the order of Lower limit 2
the ranges in the table. Interrupt task = 2
Upper limit 2
Lower limit 2

Time
Interrupt task to execute NO. No.2 No.1 No.1 No.2

A total of 6 ranges (upper and lower limits) are registered in the comparison table.
The ranges can overlap.
A different interrupt task can be registered for each range.
The counter PV is compared with the 6 ranges once each cycle.
The interrupt task is executed just once when the comparison condition goes from unmet to met.

CP1E CPU Unit Software Users Manual(W480) 13-19


13 High-speed Counters

z Restrictions
When more than one comparison condition is met in a cycle, the first interrupt task in the table will
be executed in that cycle. The next interrupt task in the table will be executed in the next cycle.

Additional Information

The range comparison table can be used without starting an interrupt task when the comparison
condition is met. The range comparison function can be useful when you just want to know
whether or not the high-speed counter PV is within a particular range.
Use the Range Comparison Condition Met Flags to determine whether the high-speed counter
PV is within a registered range.

COMPARISON TABLE LOAD Instruction: CTBL


The CTBL instruction compares the PV of a high-speed counter (0 to 5) to target values or ranges and
executes the corresponding interrupt task (0 to 15) when the specified condition is met.

Execution condition
@CTBL
C1 C1: High-speed counter number
C2 C2: Control data
S S: First comparison table word

Operand Settings
C1 High-speed #0000 High-speed counter 0
counter num-
~

ber
#0005 High-speed counter 5
C2 Control data #0000 Registers a target-value comparison table and starts the com-
parison operation.
#0001 Registers a range comparison table and starts the comparison
operation.
#0002 Registers a target-value comparison table.
#0003 Registers a range comparison table.
S First compari- Specifies the first word address of the comparison table, which is described
son table word below.

z Contents of the Comparison Table


Target-value Comparison Table
Depending on the number of target values in the table, the target-value comparison table requires
a continuous block of 4 to 19 words.
Range Comparison Table
The range comparison table requires a continuous block of 30 words for comparison conditions 1
to 6 require 5 words each (two words for the upper range value, two words for the lower range
value, and one word for the interrupt task number).

13-20 CP1E CPU Unit Software Users Manual(W480)


13 High-speed Counters

MODE CONTROL Instruction: INI


The INI instruction is used for the following items.
Starting and stopping comparison with the high-speed counter comparison table
Use the CTBL instruction to register the target value or range comparison table before using INI to
start or stop comparison.

13-3 High-speed Counter Interrupts


Note The INI instruction is not required for normal applications of interrupt functions.
Changing the PV of a High-speed Counter

Execution condition
@INI
C1 C1: Port specifier
C2 C2: Control data
S S: First word of new PV

Operand Settings
C1 Port specifier #0010 High-speed counter 0
13
~

#0015 High-speed counter 5

13-3-2 Target Value Comaprison and Range Comparison


C2 Control data #0000 Start comparison.
#0001 Stop comparison.
#0002 Change the PV.
S First word of S contains the first word of the new PV when C is set to #0002
new PV (change the PV).

z Example 1: Target Value Comparison


In this example, high-speed counter 0 operates in linear mode and starts interrupt task 10 when the
PV reaches 30,000 (0000 7530 hex) and starts interrupt task 11 when the PV reaches 20,000 (0000
4E20 hex).
(1)Set high-speed counter 0 in the PLC Setup's Built-in Input Tab.
Item Setting
High-speed counter 0 Use counter
Counting mode Linear mode
Circular Max. Count
Reset method Software reset
Input Setting Up/Down inputs

(2)Set the target-value comparison table in words D10000 to D10003.


Word Setting Function
D10000 #0002 Number of target values = 2
D10001 #7530 Rightmost 4 digits of the target value 1 data (30000) Target value =
D10002 #0000 Leftmost 4 digits of the target value 1 data (30000) 30,000(0000 7530 hex)
D10003 #000A Target value 1
Bit 15: 0 (incrementing)
Bits 0 to 7: A hex (interrupt task number 10)
D1004 #4E20 Rightmost 4 digits of the target value 2 data (20000) Target value =
D1005 #0000 Leftmost 4 digits of the target value 2 data (20000) 20,000(0000 4E20 hex)
D1006 #800B Target value 2
Bit 15: 1 (decrementing)
Bits 0 to 07: B hex (interrupt task number 11)

CP1E CPU Unit Software Users Manual(W480) 13-21


13 High-speed Counters

(3)Create the programs for interrupt tasks 10 and 11. Always put an END instruction at the pro-
gram's last address.
(4)Use the CTBL instruction to start the comparison operation with high-speed counter 0 and inter-
rupt tasks 10 and 11.

W0.00
CTBL
#0000 Use high-speed counter 0.
#0000 Register a target-value comparison
D1000 table and start comparison operation.
First comparison table word.

(5)Operation
When execution condition W0.00 turns ON, the comparison starts with high-speed counter 0.
When the PV of high speed counter 0 reaches 30,000, cyclic task execution is interrupted, and inter-
rupt task 10 is executed.
When the PV of high speed counter 0 reaches 20,000, cyclic task execution is interrupted, and inter-
rupt task 11 is executed.
When interrupt task 10 or 11 execution has been completed, execution of the interrupted cyclic task
resumes.

W0.00

0.00

High-speed counter 30,000 (7530 Hex)


0 PV (in A270 and
A271) 20,000 (4E20 Hex)

Counting enabled

Cyclic task Processing Cyclic task Processing Cyclic task


execution interrupted execution interrupted execution

Interrupt task Interrupt task


10 execution 11 execution

z Example 2: Range Comparison


In this example, high-speed counter 1 operates in circular (ring) mode and starts interrupt task 12
when the PV is between 25,000 (0000 61A8 hex) and 25,500 (0000 639C hex).
The maximum ring count is set to 50,000 (0000 C350 hex).

(1)Set high-speed counter 1 on the PLC Setups Built-in Input Tab Page.
Item Setting
High-speed counter 1 Use counter
Counting mode Circular mode
Circular Max. Count 50,000
Reset method Software reset (continue comparing)
Input Setting Up/Down inputs

13-22 CP1E CPU Unit Software Users Manual(W480)


13 High-speed Counters

(2)Set the range comparison table starting at word D20000. Even though range 1 is the only range
being used, all 30 words must still be dedicated to the range comparison table.
Word Setting Function
D2000 #61A8 Rightmost 4 digits of range 1 lower Lower limit value: 25,000
limit
D2001 #0000 Leftmost 4 digits of range 1 lower
limit

13-3 High-speed Counter Interrupts


D2002 #639C Rightmost 4 digits of range 1 Upper limit value: 25,500
upper limit
D2003 #0000 Leftmost 4 digits of range 1 upper
limit
D2004 #000C Range 1 interrupt task number = 12 (C hex)
D2005 All Range 2 lower and upper limit val- Range 2 settings
to #0000 ues(Not used and don't need to be
set.)
D2008
D2009 #FFFF Disables range 2.
~

D2014 #FFFF Set the fifth word for ranges 3 to 5 (listed at left) to #FFFF to disable
those ranges.
13
D2019
D2024

13-3-2 Target Value Comaprison and Range Comparison


~

D2025 All Range 6 lower and upper limit val- Range 6 settings
to #0000 ues (Not used and don't need to
be set.)
D2028
D2029 #FFFF Disables the range.

(3)Create the program for interrupt task 12. Always put an END instruction at the programs last
address.
(4) Use the CTBL instruction to start the comparison operation with high-speed counter 1 and inter-
rupt task 12.

W0.00

@CTBL
#0001 Use high-speed counter 1.
#0001 Register a range comparison table
D2000 and start comparison operation.
First comparison table word.

CP1E CPU Unit Software Users Manual(W480) 13-23


13 High-speed Counters

(5) Operation
When execution condition W0.00 turns ON, the comparison starts with high-speed counter 1.
When the PV of high speed counter 1 is between 25,000 and 25,500, cyclic task execution is inter-
rupted, and interrupt task 12 is executed.
When interrupt task 12 execution is completed, execution of the interrupted cyclic task resumes.

W0.00

0.02

High-speed counter 1 PV
(in A272 and A273)

Upper limit: 25,500 (639C hex)

Lower limit: 25,000 (61A8 hex)

Counting enabled

Cyclic task Processing Cyclic task Processing Cyclic task


execution interrupted execution interrupted execution

Interrupt task Interrupt task


12 execution 12 execution

13-24 CP1E CPU Unit Software Users Manual(W480)


13 High-speed Counters

13-4 Auxiliary Area Bits and Words Used with High-speed Counters
13-4 Auxiliary Area Bits and Words Used
with High-speed Counters

Bits and Words Allocated in the Auxiliary Area


High- High- High- High- High- High-
Contents speed speed speed speed speed speed
counter 0 counter 1 counter 2 counter 3 counter 4 counter 5
High-speed Leftmost 4 digits A271 A273 A317 A319 A323 A325
counter PV Rightmost 4 digits A270 A272 A316 A318 A322 A324
storage
words
Range Range 1 Compari- A274.00 A275.00 A320.00 A321.00 A326.00 A327.00
Comparison son Condition Met
Condition Flag (ON for
Met Flags match.)
Range 2 Compari- A274.01 A275.01 A320.01 A321.01 A326.01 A327.01 13
son Condition Met
Flag (ON for
match.)
Range 3 Compari- A274.02 A275.02 A320.02 A321.02 A326.02 A327.02
son Condition Met
Flag (ON for
match.)
Range 4 Compari- A274.03 A275.03 A320.03 A321.03 A326.03 A327.03
son Condition Met
Flag (ON for
match.)
Range 5 Compari- A274.04 A275.04 A320.04 A321.04 A326.04 A327.04
son Condition Met
Flag (ON for
match.)
Range 6 Compari- A274.05 A275.05 A320.05 A321.05 A326.05 A327.05
son Condition Met
Flag (ON for
match.)
Comparison ON when a com- A274.08 A275.08 A320.08 A321.08 A326.08 A327.08
In-progress parison operation
Flags is being executed
for the high-speed
counter.
Overflow/ ON when an over- A274.09 A275.09 A320.09 A321.09 A326.09 A327.09
Underflow flow or underflow
Flags has occurred in
the high-speed
counters PV.
Count Direc- 0: Decrementing A274.10 A275.10 A320.10 A321.10 A326.10 A327.10
tion Flags 1: Incrementing

CP1E CPU Unit Software Users Manual(W480) 13-25


13 High-speed Counters

13-5 Application Example of High-speed


Counter Interrupt
Using a Rotary Encoder to Measure Positions

Functions Used

z High-speed Counting for a Built-in Input


A high-speed counter input can be used by connecting a rotary encoder to a built-in input. A CP1E
CPU Unit is equipped with more than one high-speed counter input, making it possible to control
devices for multiple axes with a single PLC.
High-speed counters can be used for high-speed processing, using either target value comparison
or range comparison to create interrupts. Interrupt tasks are executed when the counter value
reaches a specific target value or range.

Operation Overview
A sheet feeder is controlled to feed constant lengths in a given direction, e.g., for vacuum packing of
food products.

Motor speed

Motor start input:


CIO 0.02
Motor run output:
CIO 100.00
Motor low speed
output: CIO 100.01
Normal stop position
output: CIO 100.02
Error stop position
output: CIO 100.03

3550
Number of pulses 3500
counted by high- 3000
speed counter (Pulses)
(A270)

The High-speed Counter Reset Bit


(A531.00) is turned ON in the ladder
program as soon a operation starts.

While the pulse count is between 3,500 and 3,550, normal stop position output (CIO 100.02) will be
ON. If the pulse count exceeds 3550, the error stop position output (CIO 100.03) will turn ON.

13-26 CP1E CPU Unit Software Users Manual(W480)


13 High-speed Counters

13-5 Application Example of High-speed Counter Interrupt


System Configuration

z Wiring Example

Encoder (power Black Phase A


supply: 24 VDC)

White Phase B

Orange Phase Z

Brown
Example: E6B2-CWZ6C
NPN open-collector output Blue

24 VDC
power supply
Start motor
100 to 240 VAC

13

CP1E-N20DR-A

Motor running: CIO 100.00


Error stop
Motor low speed output: CIO 100.01 position output:
CIO 100.03
(indicator)
Example: Inverter
Normal stop
position output:
CIO 100.02
(indicator)

Precautions for Correct Use


Use the external power supply for input devices only. (Do not use it to power output devices.)

CP1E CPU Unit Software Users Manual(W480) 13-27


13 High-speed Counters

z PLC Setup
Use the following procedure to enable high-speed counter 0.

1 Open the PLC Settings Dialog Box.

2 Click the Built-in Input Tab.

3 Select the Use high speed counter 0 Check Box for high-speed counter 0.

4 Select Linear Mode for the counting mode.

5 Select Software reset (comparing) for the reset method.

6 Select Differential phase input for the input setting.

7 Close the PLC Settings Dialog Box.

8 To apply changes made to the PLC Setup, cycle the power to the PLC.

13-28 CP1E CPU Unit Software Users Manual(W480)


13 High-speed Counters

13-5 Application Example of High-speed Counter Interrupt


Programming Example 1
In this example, comparison instructions are used to compare counter values. The program can be cre-
ated easily simply by using comparison instructions to compare counter values.

z Ladder Program
Based on the counter value, the motor is started, decelerated, and stopped.

High-speed Counter
Reset Bit
Motor start Motor
stop

Motor run Motor run

When the present value of the


13
high-speed counter (A270)
reaches 3000 (0BB8 hex), the
Motor low speed motor is changed to low speed.

When the present value of the


high-speed counter (A270)
reaches 3500 (0DAC hex), the
Motor stop motor is stopped.

After the motor stops, the stop position is checked.

Motor stop Motor Motor stopped


start
The stop position is normal if
the present value of the high-
speed counter (A270) is
between 3500 (0DAC hex) and
Motor stopped Normal stop
3550 (0DDE hex).
position

The stop position is in error if the


present value of the high-speed
counter (A270) is greater than
Error stop 3550 (0DDE hex).
position

CP1E CPU Unit Software Users Manual(W480) 13-29


13 High-speed Counters

Programming Example 2
In this example, the CTBL (COMPARISON TABLE LOAD) instruction is used to create an interrupt
when the target value is reached. Slowing and stopping are executed as interrupt tasks, allowing high-
speed processes to be executed without affecting the cycle time.

z Ladder Program
Use the CTBL instruction to execute interrupt tasks when the target positions are reached.

Reset with motor stopped


Motor start

High-speed Counter 0 Reset Bit

Specifies high-speed counter 0


Specifies comparision with target
values and starts comparison
First word of comparision table

Turns ON motor run output

After motor stops, the stop position is checked.

The stop position is normal if the


present value of the high-speed
counter (A270) is between 3500
Motor stopped Normal stop (0DAC hex) and 3550 (0DDE hex).
position

The stop position is in error if


the present value of the high-
speed counter (A270) is
Error stop
greater than 3550 (0DDE hex).
position

When the PV of the high-speed counter matches target value 1 (3000), interrupt task 04 is executed.

Interrupt task
04
Turns ON the motor
low speed output

13-30 CP1E CPU Unit Software Users Manual(W480)


13 High-speed Counters

13-5 Application Example of High-speed Counter Interrupt


When the present vale of the high-speed counter matches target value 2 (3500), interrupt task 05 is
executed.

Turns OFF the


motor run output

Interrupt task
05
Turns OFF the motor
low speed output

Turns OFF the motor


stopped output

z DM Area Setup
The comparison table for the CTBL (COMPARISON TABLE LOAD) instruction is set in D600 through
D606.
Word Value Contents 13
D600 0002 Number of target values: 2
D601 0BB8 Target value 1: 3000 BCD (BB8 hex)
D602 0000
D603 0004 Target value 1: Interrupt task No.4
D604 0DAC Target value 2: 3500 BCD (DAC hex)
D605 0000
D606 0005 Target value 2: Interrupt task No.5

CP1E CPU Unit Software Users Manual(W480) 13-31


13 High-speed Counters

13-32 CP1E CPU Unit Software Users Manual(W480)


Pulse Outputs
This section describes positioning functions such as trapezoidal control, jogging, and
origin searches.

14-1 Overview and Flow of Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-3 14


14-1-1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-3
14-1-2 Flow of Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-4
14-1-3 Pulse Output Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-8
14-2 Trapezoidal Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-9
14-2-1 Determine the Pulse Output Port, Output Method, and Output Waveform . . . 14-9
14-2-2 Relative Pulse Outputs and Absolute Pulse Outputs . . . . . . . . . . . . . . . . . . . 14-9
14-2-3 Operations Affecting the Origin Status (Defined/Undefined Status) . . . . . . . 14-11
14-2-4 Programming Example for Trapezoidal Control . . . . . . . . . . . . . . . . . . . . . . 14-11
14-3 Jogging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-13
14-3-1 Determine the Pulse Output Port and Pulse Output Method . . . . . . . . . . . . 14-13
14-3-2 Pulse Waveform and Applicable Instructions . . . . . . . . . . . . . . . . . . . . . . . . 14-13
14-3-3 Programming Example for Jogging. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-14
14-4 Performing Origin Searches. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-16
14-4-1 Origin Searches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-16
14-4-2 Flow of Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-17
14-4-3 Setting the Pulse Output Port and Pulse Output Method . . . . . . . . . . . . . . . 14-17
14-4-4 Settings in PLC Setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-20
14-4-5 Applicable Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-22
14-4-6 Details on the Origin Search Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-23
14-4-7 Origin Search Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-30
14-5 Returning to the Origin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-33
14-6 Changing/Reading the Pulse Output Present Value . . . . . . . . . . . . . . . . 14-34
14-6-1 Changing the Present Value of the Pulse Output . . . . . . . . . . . . . . . . . . . . . 14-34
14-6-2 Reading the Present Value of a Pulse Output . . . . . . . . . . . . . . . . . . . . . . . 14-34
14-7 Auxiliary Area Bits and Words Used with Pulse Outputs . . . . . . . . . . . . 14-36
14-8 Pulse Output Application Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-37
14-8-1 Example 1: Cutting Long Material Using Fixed Feeding. . . . . . . . . . . . . . . . 14-37

CP1E CPU Unit Software Users Manual(W480) 14-1


14 Pulse Outputs

14-8-2 Example 2: Vertically Conveying PCBs


(Multiple Progressive Positioning) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-40
14-8-3 Example 3: Feeding Wrapping Material: Interrupt Feeding . . . . . . . . . . . . . . 14-45
14-9 Precautions When Using Pulse Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . 14-48
14-10Pulse Output Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-53
14-10-1 Continuous Mode (Speed Control). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-53
14-10-2 Independent Mode (Positioning) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-55

14-2 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

14-1 Overview and Flow of Processing


Pulse outputs can be used only with the CP1E N-type CPU Unit.

14-1-1 Overview
Pulse outputs can be output from the CPU Unit's built-in outputs using instructions to perform position-
ing or speed control with a servomotor or a stepping motor that accepts pulse inputs. It is also possible

14-1 Overview and Flow of Processing


to perform origin searches or origin returns.
Trapezoidal control
Frequency (speed)

Travel distance
Built-in output

Pulse output Time

Jogging
Frequency (speed)
Servo Drive (or
stepping driver)

14
Travel distance
Time

14-1-1 Overview
Servomotor (or
stepping motor) Origin search
Frequency (speed)

Travel distance

Time

Positioning is performed with a servomotor or stepping motor in the following configuration.

CP1E

Trapezoidal control with a


PLS2 instruction
PLS2

Jogging with a SPED


Servo Drive (or
instruction
stepping driver)
SPED

Jogging with an ACC Pulse output


instruction
ACC

Pulse output PV in
Auxiliary Area

Origin search with ORG Origin input


Origin proximity input instruction (phase-Z)
(Positioning
CW limit input ORG completed)

CCW limit input Error counter


reset

CP1E CPU Unit Software Users Manual(W480) 14-3


14 Pulse Outputs

14-1-2 Flow of Processing

1 Setting the pulse output method,


setting the pulse output port
You can set the pulse output method, pulse output 0
or 1, and whether to use terminals 00 and 02, or 01
number, assigning pulse output and 03 on the 100CH terminal block for pulse out-
terminals, and wiring puts

2 PLC Setup
Setting is required for the following situations:
Performing an origin search.
Using the Limit Input Signal as an input to func-
tions other than origin searches.

3 Ladder Cyclic task,


Execute instructions related to pulse outputs.
programming interrupt task

1 Setting the Pulse Output Method, Setting the Pulse Output Port
Number, Assigning Pulse Output Terminals, and Wiring

z Pulse Output Method


The following pulse output plus a direction output can be used as the pulse output method.
CW CCW

Pulses

Direction Output ON Output OFF

z Pulse Output Port Number and Output Terminals


The following terminals can be used for pulse outputs according to the pulse output method.
Output terminal When a pulse output instruction (SPED, ACC, Other functions that cannot be
block PLS2, or ORG) is executed used at the same time
Terminal Pulse output method
Terminal
block Normal output PWM output
number CW/CCW Pulse plus direction
label
CIO 100 00 Not possible. Pulse output 0, pulse Normal output 0
01 Pulse output 1, pulse Normal output 1 PWM output
02 Pulse output 0, direction Normal output 2
03 Pulse output 1, direction Normal output 3

14-4 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

z Origin Searches
Use the following input and output terminals for origin searches.
Input Terminals
Other functions that cannot be used at the same
Input terminal block Setting in PLC Setup
time
High-speed
counter
Terminal Quick- settings
Terminal Enable origin searches for Normal Interrupt
block response
number pulse outputs 0 and 1 inputs inputs Single-phase

14-1 Overview and Flow of Processing


label Inputs
(increment
pulse input)
CIO 0 06 Pulse 0, Origin input signal Normal Interrupt Quick- High-speed
input 6 input 6 response counter 5
input 6
07 Pulse 1, Origin input signal Normal Interrupt Quick-
input 7 input 7 response
input 7
: :
10 Pulse 0, Origin proximity Normal
input signal input 10
11 Pulse 1, Origin proximity Normal
input signal input 11
14
Output Terminals
Other functions

14-1-2 Flow of Processing


that cannot be
Output terminal block Setting in PLC Setup
used at the same
time
Terminal
Terminal Enable origin searches for pulse
block Normal outputs
number outputs 0 and 1
label
CIO 100 04 Pulse 0, Error counter reset output Normal output 4
05 Pulse 1, Error counter reset output Normal output 5

z Pulse Output Wiring


24-VDC
CP1E CPU Unit built-in output terminals power
supply
+ - Servo Drive for 24-VDC input

PULS
(+)
PULS

(-)

Pulse output SGN

(+)
SGN

(-)

Direction output

Instruction pulse mode = feed pulse


and forward/reverse signal

CP1E CPU Unit Software Users Manual(W480) 14-5


14 Pulse Outputs

2 PLC Setup
To perform an origin search or to use a Limit Input Signal as an input to a function other than origin
search, set the parameters on the Pulse Output 0 and Pulse Output 1 Tab Pages in the PLC Setup.

Pulse Output 0 or 1 Tab Page


Item Setting Description
Base Hold When a Limit Input Signal is input, the pulse output is
Settings stopped and the previous status is held.
Undefined Origin
Undefined When a Limit Input Signal is input, the pulse output is
stopped and origin becomes undefined.
Search Only The CW/CCW Limit Input Signal is used for origin
Limit Input Signal searches only.
Operation Always The CW/CCW Limit Input Signal is used by functions
other than origin search.
NC Select when using NC contacts for the Limit Input Signal.
Limit Input Signal
NO Select when using NO contacts for the Limit Input Signal.
Search/Return Ini- Set the motors starting speed when performing an origin search. Specified in
tial Speed pulses per second (pps).
Specify the acceleration/deceleration curve.
Speed Curve
Trapezoidal only Accelerates and decelerates linearly.

Note The power supply must be restarted after the PLC Setup is transferred in order to enable the pulse output
settings.

z Origin Searches
Refer to 14-4-4 Settings in PLC Setup

z Origin Returns
Refer to 14-4-4 Settings in PLC Setup

14-6 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

3 Executing Pulse Control Instructions in a Ladder Program


The pulse outputs are used by executing pulse control instructions in the ladder program.

z Applicable Instructions
The following instructions are used.
Purpose Overview Instruction Reference

14-1 Overview and Flow of Processing


Jogging Without acceler- Performs pulse output control without SPED: SPEED Refer to 5-3
ation and decel- acceleration or deceleration. OUTPUT
eration
With acceleration Performs trapezoidal pulse output ACC:
and deceleration control with the same acceleration ACCELERATION
and deceleration rates. CONTROL
Performing trapezoidal con- Performs trapezoidal pulse output PLS2: PULSE Refer to 5-2
trol control with independent accelera- OUTPUT
tion and deceleration rates. (The
number of pulses can be set.)
Performing origin searches Actually moves the motor with pulse ORG: ORIGIN Refer to 5-4
outputs and defines the machine ori- SEARCH
gin based on the Origin Proximity
Input and Origin Input signals.
Performing origin returns Returns to the origin position from ORG: ORIGIN Refer to 14-2
14
any position. SEARCH
Changing or reading the Changes the PV of the pulse output. INI: MODE Refer to 14-7-1

14-1-2 Flow of Processing


pulse output PV (This operation defines the origin CONTROL
location.)
Reads the PV of the pulse output. PRV: HIGH-SPEED Refer to 14-7-2
COUNTER PV
READ

z Outputting to the Auxiliary Area Using the OUT Instruction


The OUT instruction in the ladder program is used to write signals received from the CW limit sensor
and CCW limit sensor connected to normal inputs to the Auxiliary Area bits.

Normal input from CW Limit Input Signal


CW limit sensor A540.08 or A541.08

Normal input from CCW Limit Input Signal


CCW limit sensor A540.09 or A541.09

Bits Written in the Auxiliary Area


Auxiliary Area
Name
Word Bit
A540 08 Pulse Output 0 CW Limit Input Signal Signals must be received from exter-
09 Pulse Output 0 CCW Limit Input Signal nal sensors connected to normal
inputs and then written to the Auxil-
A541 08 Pulse Output 1 CW Limit Input Signal iary Area by the user program.
09 Pulse Output 1 CCW Limit Input Signal

CP1E CPU Unit Software Users Manual(W480) 14-7


14 Pulse Outputs

14-1-3 Pulse Output Specifications


Item Specifications
Output mode Continuous mode (for speed control) or independent mode (for position con-
trol)
Positioning (independent mode) instruc- PULS and SPED, PULS and ACC, or PLS2
tions
Speed control (continuous mode) SPED or ACC
instructions
Origin (origin search and origin return) ORG
instructions
Output frequency 1 Hz to 100 kHz (1 Hz units), two pulse outputs
Frequency acceleration and decelera- Set in increments of 1 Hz for acceleration/deceleration rates from 1 to 65,635 Hz
tion rates (every 4 ms).
The acceleration and deceleration rates can be set independently only with
the PLS2 instruction.
Changing SVs during instruction execu- The target frequency, acceleration/deceleration rate, and target position can
tion be changed.
Duty factor Fixed at 50%
Pulse output method Pulse + direction inputs (CW/CCW inputs cannot be used.)
Number of output pulses Relative coordinates: 0000 0000 to 7FFF FFFF hex(Accelerating or decelerat-
ing in either direction: 2,147,483,647)
Absolute coordinates: 8000 0000 to 7FFF FFFF hex(2147483648 to 2147483647)
Pulse output PVs relative/absolute Absolute coordinates are specified automatically when the origin location has
coordinate specifications been defined by setting the pulse output PV with the INI instruction or perform-
ing an origin search with the ORG instruction. Relative coordinates are used
when the origin location is undefined.
Relative pulse/absolute pulse specifica- The pulse type can be specified with an operand in the PULS or PLS2 instruc-
tions tion.

Note The absolute pulse specification can be used when absolute coordiates
are specified for the pulse output PV, i.e. the origin location has been
defined.The absolute pulse specification cannot be used when relative
coordinates are specified, i.e. the origin location is undefined. An instruc-
tion error will occur.
Pulse output PVs storage location The following Auxiliary Area words contain the pulse output PVs
Pulse output 0: A277 (leftmost 4 digits) and A276 (rightmost 4 digits)
Pulse output 1: A279 (leftmost 4 digits) and A278 (rightmost 4 digits)
The PVs are refreshed during regular I/O refreshing.

14-8 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

14-2 Trapezoidal Control


This section describes how to use pulse outputs with trapezoidal acceleration and deceleration when
using the PLS2 instruction.

14-2-1 Determine the Pulse Output Port, Output Method, and Output
Waveform

Pulse Output Port


Specify pulse output 0 or 1 in the instruction operands.

14-2 Trapezoidal Control


Pulse Output Method
Specify the pulse + direction method in the instruction operands.

Output Waveform
Specify the output waveform in the instruction operands.

Target frequency Acceleration 14


Deceleration rate
rate

14-2-1 Determine the Pulse Output Port, Output Method, and Output Waveform
Specified number of
pulses
Starting frequency

Target frequency 1 Hz to 100 kHz (in increments of 1 Hz)


Starting frequency 0 Hz to 100 kHz (in increments of 1 Hz)
Acceleration rate Set in increments of 1 Hz from 1 to 65,535 Hz (every 4 ms).
Deceleration rate Set in increments of 1 Hz from 1 to 65,535 Hz (every 4 ms).
Direction specification Set to CW or CCW.
Specified number of Relative coordinates: 0000 0000 to 7FFF FFFF hex (Incre-
pulses menting and decrementing in each direction: 2,147,483,647)
Absolute coordinates: 8000 0000 to 7FFF FFFF hex
(-2,147,483,648 to 2,147,483,647)

14-2-2 Relative Pulse Outputs and Absolute Pulse Outputs

z Selecting Relative or Absolute Coordinates


The pulse output PVs coordinate system (absolute or relative) is selected automatically, as follows:
When the origin is undefined, the system operates in relative coordinates.
When the origin has been defined, the system operates in absolute coordinates.
Origin undefined (Origin search
Origin has been Origin has been defined by
has not been performed and PV
Conditions defined by an origin executing the INI instruction
has not been changed with the
search to change the PV
INI instruction.)
Pulse output Absolute coordinates Relative coordinates
PVs coordinate
system

CP1E CPU Unit Software Users Manual(W480) 14-9


14 Pulse Outputs

z Relationship between the Coordinate System and Pulse Specification


The following table shows the pulse output operation for the four possible combinations of the coor-
dinate systems (absolute or relative) and the pulse output (absolute or relative) specified when the
PULS or PLS2 instruction is executed.
Pulse output Relative coordinate system Absolute coordinate system
specified in PULS Origin undefined:The No-origin Flag will be Origin defined:The No-origin Flag will
or PLS2 ON in this case. be OFF in this case.
Relative pulse Positions the system to another position relative to the present position.
specification Number of movement pulses = Number of pulses setting
The pulse output PV after instruction execution = The pulse output PV after instruction
Number of movement pulses = Number of execution = PV + Number of movement
pulses setting pulses.
Note The pulse output PV is reset to 0 just The following example shows the num-
before pulses are output. After that, the ber of pulses setting = 100 counterclock-
specified number of pulses is output. wise.
The following example shows the number of Number of pulses setting

=
pulses setting = 100 counterclockwise. Number of movement
pulses
Number of pulses setting
100
=

Number of Pulse output


movement pulses 0 Target position Present position PV
Origin
100

Pulse output PV
Pulse output PV range:
Target position Present position=0
8000 0000 to 7FFF FFFF hex
Pulse output PV range: Number of pulses setting range:
8000 0000 to 7FFF FFFF hex 0000 0000 to 7FFF FFFF hex
Number of pulses setting range:
0000 0000 to 7FFF FFFF hex
Absolute pulse The absolute pulse specification cannot be Positions the system to an absolute
specification used when the origin location is undefined, i.e., position relative to the origin.The num-
when the system is operating in the relative ber of movement pulses and movement
coordinate system. An instruction execution direction are calculated automatically
error will occur. from the present position (pulse output
PV) and target position.
The following example shows the num-
ber of pulses setting = +100.
Number of pulses setting
=

Number of movement
pulses

+100

+200
Pulse output
0 Target position= Present position PV
Number of pulses setting
Origin

Number of movement pulses = Number


of pulses setting Pulse output PV
when instruction is executedThe move-
ment direction is determined automati-
cally.
Pulse output PV when instruction is exe-
cuted = Number of pulses setting
Pulse output PV range:
8000 0000 to 7FFF FFFF hex
Number of pulses setting range:
8000 0000 to 7FFF FFFF hex

14-10 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

14-2-3 Operations Affecting the Origin Status (Defined/Undefined


Status)

The following table shows the operations that can affect the origin status (origin defined or undefined),
such as changing the operating mode and executing certain instructions.
The No-origin Flag will be ON when the corresponding pulse outputs origin is undefined and OFF when
the origin is defined.
Current status PROGRAM mode RUN mode or MONITOR mode
Operation Origin defined Origin undefined Origin defined Origin undefined
Operating Switch to RUN Origin becomes Origin continues to

14-2 Trapezoidal Control


mode or MONITOR undefined. be undefined.
change Switch to Origin continues to Origin continues to
PROGRAM be defined. be undefined.
Instruction Origin search Origin becomes Origin becomes
execution performed by defined. defined.
ORG
PV changed by Origin continues to Origin becomes
INI be defined. defined.
The Pulse Output Reset Bit Origin becomes Origin continues to Origin becomes Origin continues to
turns ON. undefined. be undefined. undefined. be undefined. 14

14-2-3 Operations Affecting the Origin Status (Defined/Undefined Status)


14-2-4 Programming Example for Trapezoidal Control

Specifications and Operation


When the start input (CIO 0.00) goes ON, this example program outputs 600,000 pulses from pulse
output 0 to turn the motor.

Target frequency 50,000 Hz Acceleration


rate
300Hz/4ms Deceleration rate
200Hz/4ms
Number of output
pulses
Starting frequency 100Hz 600,000 pulses

Start input 0.00

Applicable Instructions
PLS2

Preparations

z PLC Setup
There are no settings that need to be made in the PLC Setup.

CP1E CPU Unit Software Users Manual(W480) 14-11


14 Pulse Outputs

z DM Area Settings
Settings for PLS2 Instruction (D0 to D7)
Setting Address Data
Acceleration rate: 300 Hz/4 ms D0 #012C
Deceleration rate: 200 Hz/4 ms D1 #00C8
Target frequency: 50,000 Hz D2 #C350
D3 #0000
Number of output pulses: 600,000 pulses D4 #27C0
D5 #0009
Starting frequency: 100 Hz D6 #0064
D7 #0000

Ladder Program

0.00
@PLS2
#0001 Pulse output 1
Start input
#0100 Specifies Pulse + Direction output method, CW, and relative pulses
D0 Target frequency, number of pulses setting
D6 Starting frequency

END(001)

Additional Information

Absolute pulses can be specified when the origin position has been defined.
If a target frequency that cannot be reached has been set, the target frequency will be reduced
automatically, i.e., triangular control will be performed.In some cases where the acceleration
rate is substantially greater than the deceleration rate, the operation will not be true triangular
control. The motor will be operated at a constant speed for a short time between the accelera-
tion and deceleration.

14-12 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

14-3 Jogging
Jogging can be performed by using the SPED and ACC instructions. This section describes the steps
for jogging.

14-3-1 Determine the Pulse Output Port and Pulse Output Method

Pulse Output Port


Specify pulse output 0 or 1 with the instruction operands.

Pulse Output Method


Specify the pulse + direction method in the instruction operands. (Pulse plus direction inputs must be
used.)

14-3 Jogging
14-3-2 Pulse Waveform and Applicable Instructions

Low-speed Jogging (Pulse Output without Acceleration or Deceleration)


Start pulse output without acceleration or deceleration using the SPED (SPEED OUTPUT) instruction.
Set the target frequency of the SPED instruction to 0 Hz to stop the pulse output. 14

14-3-1 Determine the Pulse Output Port and Pulse Output Method
Target frequency

Pulse output started Pulse output stopped

Target frequency Starting pulse output: 1 Hz to 100 kHz (in increments of 1 kHz)
Stopping pulse output: 0 Hz
Direction specification Set to CW or CCW.
Mode specification Set to continuous mode.

High-speed Jogging (Pulse Output with Acceleration or Deceleration)


Start pulse output with acceleration or deceleration using the ACC (ACCELERATION CONTROL)
instruction. Set the target frequency of the ACC instruction to 0 Hz to stop the pulse output.

Acceleration
Target frequency and
deceleration
rate

Pulse output started Pulse output stopped

Target frequency Starting pulse output: 1 Hz to 100 kHz (in increments of 1 kHz)
Stopping pulse output: 0 Hz
Acceleration and deceleration rate Set in increments of 1 Hz from 1 to 65,535 Hz (every 4 ms).
Direction specification Set to CW or CCW.
Mode specification Set to continuous mode.

CP1E CPU Unit Software Users Manual(W480) 14-13


14 Pulse Outputs

14-3-3 Programming Example for Jogging

Specifications and Operation


The following example shows jogging without acceleration or deceleration executed using a SPED
instruction. It is used for low-speed jogging.
Clockwise low-speed jogging will be executed from pulse output 1 while CIO 0.00 is ON.
Counterclockwise low-speed jogging will be executed from pulse output 1 while CIO 0.01 is ON.

Target frequency 1,000Hz

CW low-speed jogging (CIO 0.00)

CCW low-speed jogging (CIO 0.01)

The example shows jogging with acceleration and deceleration executed using an ACC instruction. It is
used for high-speed jogging.
Clockwise high-speed jogging will be executed from pulse output 1 while CIO 0.04 is ON.
Counterclockwise high-speed jogging will be executed from pulse output 1 while CIO 0.05 is ON.

Acceleration/
Target frequency 100,000Hz deceleration rate
100Hz/4ms
Acceleration/
deceleration rate
100Hz/4ms

CW high-speed jogging (CIO 0.04)

CCW high-speed jogging (CIO 0.05)

Preparations

z PLC Setup
There are no settings that need to be made in the PLC Setup.

z DM Area Settings
Settings to Control Speed while Jogging (D0 to D1 and D10 to D15)
Setting Address Data
Target frequency (low speed): 1,000 Hz D0 #03E8
D1 #0000
Acceleration rate: 100 Hz/4 ms D10 #0064
Target frequency (high speed): 100,000 Hz D11 #86A0
D12 #0001
Acceleration/deceleration rate: 100 Hz/4 ms D13 #0064
(Not used.)
Target frequency (stop): 0 Hz D14 #0000
D15 #0000

14-14 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

Ladder Program

0.00 A281.04
SPED
Low-speed CW Start Pulse Output in Progress #0001 Pulse output 1
#0100 Specifies Pulse + Direction output method, CW, and continuous mode.
D0 Target frequency

SET W0.00
W0.00 0.00
SPED
Low-speed CW Low-speed CW Start #0001
output in progress #0100
#0000

RSET W0.00
0.01 A281.04
SPED
Low-speed CCW Start Pulse Output in Progress #0001 Pulse output 1
#0110 Specifies Pulse + Direction output method, CCW, and continuous mode.
Target frequencyz

14-3 Jogging
D0

SET W0.01
W0.01 0.01
SPED
Low-speed CCW Low-speed CCW Start #0001
output in progress #0110
#0000

RSET W0.01
14
0.04 A281.04

ACC

14-3-3 Programming Example for Jogging


High-speed CW Start Pulse Output in Progress #0001 Pulse output 1
#0100 Specifies Pulse + Direction output method, CW, and continuous mode.
D10 Acceleration/deceleration rate and target frequency

SET W0.02
W0.02 0.04

ACC
High-speed CW High-speed CW Start #0001
output in progress #0100
D13

RSET W0.02
0.05 A281.04

ACC
High-speed CCW Start Pulse Output in Progress #0001 Pulse output 1
#0110 Specifies Pulse + Direction output method, CCW, and continuous mode.
D10 Acceleration/deceleration rate and target frequency

SET W0.03

W0.03 0.05
ACC
High-speed CCW High-speed CCW Start #0001
output in progress #0110
D13

RSET W0.03

END

Additional Information

The PLS2 instruction can be used to set a starting frequency or separate acceleration and decel-
eration rates, but there are limitations on the operating range because the end point must be
specified in the PLS2 instruction.

CP1E CPU Unit Software Users Manual(W480) 14-15


14 Pulse Outputs

14-4 Performing Origin Searches

14-4-1 Origin Searches

When the ORG instruction executes an origin search, it outputs pulses to actually move the motor and
defines the origin position using the input signals that indicate the origin proximity and origin positions.
The input signals that indicate the origin position can be received from the servomotors built-in phase-Z
signal or external sensors such as photoelectric sensors, proximity sensors, or limit switches.

In the following example, the motor is started at a specified speed, accelerated to the origin search high
speed, and run at that speed until the origin proximity position is detected. After the Origin Proximity
Input is detected, the motor is decelerated to the origin search low speed and run at that speed until the
origin position is detected. The motor is stopped at the origin position.

1
Origin Proximity
Input Signal 0

Origin Input 1
Signal
0

Pulse frequency
Origin search high speed Origin search deceleration rate

Origin search
acceleration rate
Deceleration point Origin search low speed

Origin search
initial speed

Time
Start Decelerate from high to low speed Stop

Execution of ORG Indicated by the Origin Indicated by the


Proximity Input Signal Origin Input Signal

(Example for reversal mode 1


and method 0 (described later))

Additional Information

The motor can be moved even if the origin position has not been defined, but positioning opera-
tions will be limited as follows:
Origin return: Cannot be used.
Positioning with absolute pulse specification: Cannot be used.
Positioning with relative pulse specification: Outputs the specified number of pulses after set-
ting the present position to 0.

14-16 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

14-4-2 Flow of Processing


You can set the pulse output method, output
1 Setting the pulse output method, setting
the pulse output port number, assigning
pulse 0 or 1, and whether to use terminals 00
and 01, or 02 and 03 on the 100CH terminal
pulse output terminals, and wiring
block for pulse outputs.

2 PLC Setup
Set the origin search parameters in the Pulse
Output 0 and Pulse Output 1 Tab Pages of the
PLC Setup using the CX-Programmer.

14-4 Performing Origin Searches


3 Ladder Cyclic task,
Output the status of the Limit Signal Inputs
and Positioning Completed Signal to Auxil-
program interrupt task iary Area bits.
Execute ORG.Specify an origin search.

14-4-3 Setting the Pulse Output Port and Pulse Output Method

Pulse Output Port


Specify pulse output 0 or 1 in the instruction operands.
14
Pulse Output Method

14-4-2 Flow of Processing


Specify the pulse + direction method in the instruction operands. (Pulse plus direction outputs must be
used.)

Connecting the Servo Drive and External Sensors


z Connections for Pulse Output 0
Terminal block Origin search
Terminal Terminal Addresses Signal
block Operating mode 0 Operating mode 1 Operating mode 2
label number

CIO 100 00 CIO 100.00 stored in A276 Pulse Connect to Servo Drives pulse input (PULS).
and A277.
02 CIO 100.02 Direction Connect to Servo Drives direction input (SIGN).
Normal input The external signal must be CW limit Connect sensor to a normal input terminal.
received as an input and sensor
the input status must be
written to A540.08 in the
ladder program.
Normal input The external signal must be CCW limit Connect sensor to a normal input terminal.
received as an input and sensor
the input status must be
written to A540.09 in the
ladder program.
CIO 0 06 CIO 0.06 Origin input Connect to open- Connect to the Connect to the
signal collector output phase-Z signal phase-Z signal
from sensor or from the Servo from the Servo
other device. Drive. Drive.
10 CIO 0.10 Origin Proxim- Connect to sensor.
ity Input
CIO 100 04 CIO 100.04 Error counter Not used. Connect to error counter reset (ECRST)
reset output of the Servo Drive.
Normal input The external signal must be Positioning Not used. Connect the Posi-
received as an input and completed tioning Completed
the input status must be input Signal (INP) from
written to A540.10 in the the Servo Drive to
ladder program. a normal input ter-
minal.

CP1E CPU Unit Software Users Manual(W480) 14-17


14 Pulse Outputs

z Connections for Pulse Output 1


Terminal block Origin search
Terminal Addresses Signal
Terminal
block Operating mode 0 Operating mode 1 Operating mode 2
number
label
CIO 100 01 CIO 100.01 stored in A278 Pulse Connect to Servo Drives pulse input (PULS).
03 CIO 100.03 and A279 Direction Connect to Servo Drives direction input (SIGN).
Normal input The external signal must be CW limit Connect sensor to a normal input terminal.
received as an input and sensor
the input status must be
written to A541.08 in the
ladder program.
Normal input The external signal must be CCW limit Connect sensor to a normal input terminal.
received as an input and sensor
the input status must be
written to A541.09 in the
ladder program.
CIO 0 07 CIO 0.07 Origin Input Connect to open- Connect to the Connect to the
Signal collector output phase-Z signal phase-Z signal
from sensor or from the Servo from the Servo
other device. Drive. Drive.
11 CIO 0.11 Origin Prox- Connect to sensor.
imity Input
CIO 100 05 CIO 100.05 Error counter Not used. Connect to error counter reset (ECRST)
reset output of the Servo Drive.
Normal input The external signal must be Positioning Not used. Connect the Posi-
received as an input and completed tioning Completed
the input status must be input Signal (INP) from
written to A541.10 in the the Servo Drive to
ladder program. a normal input ter-
minal.

Connecting to OMRON Servo Drives


Use the following cables to connect to an OMRON Servo Drive.
Cable model: Indicates the cable length
OMRON Servo Drive
(1m or 2m)
SmartStep2 Series (pulse string input) R7A-CPBS
SmartStep A Series (pulse string input) R88A-CPUS
SmartStep Junior (pulse string input) R7A-CPZS
W Series (pulse string input) R88ACPWS
G Series (pulse string input) R88A-CPGS

Set the Servo Drives command pulse mode to feed pulse and forward/reverse signals because the
method of pulse output from a CP1E CPU Unit is pulse + direction.

14-18 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

Example: Connecting to a SmartStep2-series Servo Drive


Operating Mode 1

Connector-Terminal Block Conversion Unit


XW2-34G
Output terminal block PIN Signal
2k
CW output (CIO 100.00) 22 +CCW
Pulse 23 -CCW
2k
output 0 CCW output (CIO 100.01) 24 +CW
25 -CW

14-4 Performing Origin Searches


1 +24VIN
Error counter reset output 0 (CIO 100.04) 4 ECRST SmartStep2

XW2Z-J-B28
COM (CIO100)
Move stocker (CIO 100.02)
PCB storage enabled (CIO 100.03)
Input terminal block 14 GND
Pulse 0 origin input signal (CIO 0.06) 21 Z
COM
DC24V Servo Drive
RUN input X1
Pulse 0 origin proximity input signal (CIO 0.10) 2 RUN
3 RESET
Servo Drive alarm
Origin search start switch (CIO 0.00)
reset input
Emergency stop switch (CIO 0.01) 13 0GND
PCB storage completed (CIO 0.03) X1 9
Stocker movement completed (CIO 0.04) DC24V
/ALM
14
XB 11 BKIR

14-4-3 Setting the Pulse Output Port and Pulse Output Method
26 FG

R7A-CPBS Cables for SmartStep2-series Servo Drives


No. Wire color (mark color) Symbol
1 Orange (Red 1) +24VIN
2 Orange (Black 1) RUN
3 Gray (Red 1) RESET
4 Gray (Black 1) ECRST/VSEL2
5 White (Red 1) GSEL/VZERO/TLSEL
6 White (Black 1) GESEL/VSEL1
7 Yellow (Red 1) NOT
8 Yellow (Black 1) POT
9 Pink (Red 1) /ALM
10 Pink (Black 1) INP/TGON
11 Orange (Red 2) BKIR
12 Orange (Black 2) WARN
13 Gray (Red 2) OGND
14 Gray (Black 2) GND
15 White (Red 2) +A
16 White (Black 2) -A
17 Yellow (Black 2) +B
18 Yellow (Red 2) -B
19 Pink (Red 2) +Z
20 Pink (Black 2) -Z
21 Orange (Red 3) Z
22 Gray (Red 3) +CW/+PULS/+FA
23 Gray (Black 3) -CW/-PULS/-FA
24 White (Red 3) +CCW/+SIGN/+FB
25 White (Black 3) -CCW/-SIGN/-FB
26 Orange (Black 3) FG

10126-3000PE Connector Plug (3M)


10326-52A0-008 Connector Plug (3M)
AWG24 13P UL20276 Cable
Each twisted pair has wires of the same color and number of marks.

CP1E CPU Unit Software Users Manual(W480) 14-19


14 Pulse Outputs

R7A-CPZS Cables for SmartStep Junior Servo Drives


No. Wire / mark colors Symbol
1 Orange/Red (-) +CW/PULS
2 Orange/Black (-) -CW/PULS
3 Light gray/Red (-) +CCW/SIGN
4 Light black/Black (-) -CCW/SIGN
5 White/Red (-) +24VIN
6 Yellow/Black (-) RUN
7 White/Black (-) OGND
8 Pink/Red (-) +ECRST
9 Pink/Black (-) -ECRST
10 Orange/Red (--) Z
11 Orange/Black (--) ZCOM
12 Light gray/Red (--) /ALM
13 Light gray/Black (--) BKIR
14 Yellow/Red (-) INP

14-4-4 Settings in PLC Setup


To perform an origin search or to use a Limit Input Signal as an input to a function other than origin
search, set the parameters on the Pulse Output 0 and Pulse Output 1 Tab Pages in the PLC Setup.

Pulse Output 0 or 1 Tab Page


Item Selection Description
Base Undefined Origin Hold When a Limit Input Signal is input, the pulse output is
Settings stopped and the previous status is held.
Undefined When a Limit Input Signal is input, the pulse output is
stopped and origin becomes undefined.
Limit Input Signal Search Only The CW/CCW Limit Input Signal is used for origin
Operation searches only.
Always The CW/CCW Limit Input Signal is used by functions
other than origin search.
Limit Input Signal NC Select when using NC contacts for the Limit Input
Signal.
NO Select when using NO contacts for the Limit Input
Signal.
Search/Return Set the motors starting speed when performing an origin search.
Initial Speed Specified in units of pulses per second (pps).
Speed Curve Specify the acceleration/deceleration curve.
Trapezoidal only Accelerates and decelerates linearly.

14-20 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

Item Selection Description


Origin Use origin Select this check box to use origin searches.
searches search
Search Direc- Set the direction for detecting the Origin Input Signal. An origin search is performed so
tion that the Origin Input Signals rising edge is detected when moving in the origin search
direction.
CW Performs origin search in the clockwise direction.
CCW Performs origin search in the counterclockwise direction.
Detection Set one of the following three methods to determine the parameters related to the
Method Origin Proximity Input Signal.
Method 0 The direction is reversed at the Origin Proximity Input Signal.
The Origin Input Signal is accepted after the Origin Proximity

14-4 Performing Origin Searches


Input Signal turns ON and then OFF.
Method 1 The direction is not reversed at the Origin Proximity Input
Signal. The Origin Input Signal is accepted after the Origin
Proximity Input Signal turns ON.
Method 2 The Origin Proximity Input Signal is not used.
The Origin Input Signal is accepted without using the Origin
Proximity Input Signal.
Search Select one of the following two modes for the origin search operation pattern.
Operation Inverse 1 The direction is reversed when the Limit Input Signal is
received while moving in the origin search direction.
Inverse 2 An error is generated and operation is stopped if the Limit
Input Signal is received while moving in the origin search
direction. 14
Operation This parameter determines the I/O signals that are used for origin search.
Mode Mode 0 Use when connecting to a stepping motor that does not have

14-4-4 Settings in PLC Setup


a Positioning Completed Signal.
Mode 1 In this mode, the Positioning Completed Signal from the
Servo Drive is not used. Use this mode when you want to
reduce the processing time, even at the expense of position-
ing accuracy.
Mode 2 In this mode, the Positioning Completed Signal from the
Servo Drive is used. Use this mode when you want high
positioning accuracy.
Origin Input Specifies the type of Origin Input Signal (NC or NO).
Signal NC Sets a normally closed Origin Input Signal.
NO Sets a normally open Origin Input Signal.
Proximity Specifies the type of Origin Proximity Input Signal (NC or NO).
Input Signal NC Sets a normally closed Origin Proximity Input Signal.
NO Sets a normally open Origin Proximity Input Signal.
Origin Search Sets the motors target Setting range: 1 to 100 pps
High Speed speed when the origin
search is executed. Note The origin search will not be performed in these cases:
Specify the speed in the Origin search high speed Origin search proximity
number of pulses per speed
second (pps). Origin search proximity speed Origin search initial
speed
Origin Search Sets the motors speed
Proximity after the Origin Proximity
Speed Input Signal is detected.
Specify the speed in the
number of pulses per
second (pps).
Origin Com- After the origin has been Setting range: ~2,147,483,648 to 2,147,483,647 pulses
pensation defined, the origin com-
pensation can be set to Note Once the origin has been detected in an origin search,
compensate for a shift in the number of pulses specified in the origin compensa-
the Proximity Sensors tion is output, the present position is reset to 0, and the
ON position, motor pulse outputs No-origin Flag is turned OFF.
replacement, or other
change.

CP1E CPU Unit Software Users Manual(W480) 14-21


14 Pulse Outputs

Item Selection Description


Origin Origin Search Sets the motors acceleration rate when the origin Setting range: 1 to 65,535 Hz/
searches Acceleration search is executed. Specify the amount to increase 4 ms
Rate the speed (Hz) per 4-ms interval.
Origin Search Sets the motors deceleration rate when the origin Setting range: 1 to 65,535 Hz/
Deceleration search function is decelerating. Specify the amount to 4 ms
Rate decrease the speed (Hz) per 4-ms interval.
Positioning When the operating mode is set to mode 2, this setting Setting range: 0 to 9,999 ms
Monitor Time specifies how long to wait (in ms) for the Positioning
Completed Signal after the positioning operation has Note The actual monitoring
been completed, i.e., the pulse output has been com- time will be the Position-
pleted. A Positioning Timeout Error (error code 0300) ing Monitor Time rounded
will be generated if the motor drivers Positioning Com- up to the nearest 10-ms
pleted Signal does not come ON within the specified unit + 10 ms max.
time. If the Positioning Monitor
Time is set to 0, the func-
tion will be disabled and
the Unit will continue
waiting for the Positioning
Completed Signal to
come ON. (A Positioning
Timeout Error will not be
generated.)
Origin Origin Return Sets the motors target speed when the origin return is Setting range: 1 to 100 pps
Return Target Speed executed. Specify the speed in the number of pulses
per second (pps).
Origin Return Sets the motors acceleration rate when the origin Setting range: 1 to 65,535 Hz/
Acceleration return operation starts. Specify the amount to increase 4 ms
Rate the speed (Hz) per 4-ms interval.
Origin Return Sets the motors deceleration rate when the origin Setting range: 1 to 65,535 Hz/
Deceleration return function is decelerating. Specify the amount to 4 ms
Rate decrease the speed (Hz) per 4-ms interval.

Note 1 The power supply must be restarted after the PLC Setup is transferred in order to enable the
pulse output settings.
2 Only the Origin Input Signal type can be changed while the power is turned ON. Other param-
eters are updated when operation is started.

14-4-5 Applicable Instructions

Outputting to the Auxiliary Area Using the OUT Instruction


The OUT instruction is used in the ladder program to write signals received from the CW limit sensor
and CCW limit sensor connected to normal inputs to the Auxiliary Area bits.

Normal input from CW CW Limit Input Signal


limit sensor A540.08 or A541.08

Normal input from CCW CCW Limit Input Signal


limit sensor A540.09 or A541.09

14-22 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

Bits Written in the Auxiliary Area


Auxiliary Area
Name
Word Bit
A540 08 Pulse Output 0 CW Limit Input Signal Signals received from external sen-
09 Pulse Output 0 CCW Limit Input Signal sors connected to normal inputs
must be written to the Auxiliary Area
A541 08 Pulse Output 1 CW Limit Input Signal bits in the user program.
09 Pulse Output 1 CCW Limit Input Signal

ORIGIN SEARCH Instruction: ORG

14-4 Performing Origin Searches


Execute the ORG instruction in the ladder program to perform an origin search with the specified
parameters.

ORG C1:Port specifier


Pulse output 0: #0000
C1
Pulse output 1: #0001
C2 C2:Control data
Origin search and pulse + direction output method: #0100

14
14-4-6 Details on the Origin Search Function

14-4-6 Details on the Origin Search Function


Operating Mode
The operating mode parameter specifies the kind of I/O signals that are used in the origin search.
I/O signal Mode 0 Mode 1 Mode 2
Driver Stepping motor*1 Servomotor
Operation Origin Input Inputs signals are arranged Even if an Origin Input Signal is received during
Signal so deceleration starts when deceleration, it is ignored. After the motor has
the Origin Proximity Input reached the origin search proximity speed and the
Signal is received and then Origin Input Signal is received, the motor stops, com-
the Origin Input Signal is pleting the origin search process.
received while the motor is
decelerating to the origin
search proximity speed. If an
Origin Input Signal is
detected during this deceler-
ation, an Origin Input Signal
error will occur and the
motor will decelerate to a
stop.
Positioning The Positioning Completed The Positioning Com- After detecting the origin,
Completed Signal from the driver is not pleted Signal from the the origin search pro-
Signal connected. (See note.) driver is not connected. cess is not completed
Use this mode when you until the Positioning
want to reduce the pro- Completed Signal is
cessing time, even at the received.
expense of positioning Use this mode when you
accuracy. want high positioning
accuracy.

Note There are stepping motor drivers that are equipped with a Positioning Completed Signal like a servomotor.
Operating modes 1 and 2 can be used with these stepping motor drivers.

CP1E CPU Unit Software Users Manual(W480) 14-23


14 Pulse Outputs

The use of an error counter reset output and positioning completed input depends on the mode as
described in the following table.
I/O signal Mode 0 Mode 1 Mode 2
Origin Input Connected to the open- Connected to the phase-Z Connected to the phase-Z
Signal collector output from a sen- signal from the Servo Drive. signal from the Servo Drive.
sor or other device.
Error counter Not used. Connected to the error Connected to the error
reset output (The origin search operation counter reset of the Servo counter reset of the Servo
is completed when the origin Drive. Drive.
is detected.)
Positioning Not used. Not used. Connected to the Position-
completed input ing Completed Signal from
the Servo Drive.

Operations Detecting the Origin during Deceleration from High


Speed

z Operating Mode 0 (without Error Counter Reset Output, without Positioning


Completed Input)
Connect the sensors open-collector output signal to the Origin Input Signal. The Origin Input Sig-
nals response time is 0.1 ms when set as NO contacts.
When the Origin Proximity Input Signal is received, the motor will begin decelerating from the origin
search high speed to the origin search proximity speed. In this operating mode, the Origin Input Sig-
nal will be detected if it is received during this deceleration and an Origin Input Signal Error (error
code 0202) will be generated. In this case, the motor will decelerate to a stop.

OFFON Origin input turns ON during


deceleration

Origin Proximity 1
Input Signal 0

Origin Input 1
Signal 0

Original pulse output pattern

Pulse output
CCW CW

Starts when ORG is executed Origin Input Signal Error (error code 0202)

14-24 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

z Operating Mode 1 (with Error Counter Reset Output, without Positioning


Completed Input)
Connect the phase-Z signal from the Servo Drive to the Origin Input Signal.
When the Origin Input Signal is received, the pulse output will be stopped and the Error Counter
Reset Signal will be output for about 20 to 30 ms.
1
Origin Input Signal
(phase-Z signal)
0

1
Pulse output
0

14-4 Performing Origin Searches


Error Counter
Reset Signal

Approx. 20 to 30 ms

When the Origin Proximity Input Signal is received, the motor will begin decelerating from the origin
search high speed to the origin search proximity speed. In this operating mode, the motor will stop at
the Origin Input Signal after deceleration is completed.
Operating Mode 1 with Origin Proximity Input Signal Reverse (Origin Detection Method Setting = 0)
The Origin Input Signal can be detected immediately after the Origin Proximity Input Signal turns
OFF if the deceleration time is short, e.g., when starting from within the Origin Proximity Input Sig-
nal. Set an Origin Proximity Input Signal dog setting that is long enough (longer than the decelera- 14
tion time.)

14-4-6 Details on the Origin Search Function


Verify that the Origin Proximity Input Signals dog setting
is long enough (longer than the deceleration time.)
1
Origin Proximity
Input Signal 0

Origin Input Signal 1


(phase-Z signal) 0
Origin Input
Signal is
ignored
during Motor stopped by an Origin Input
Pulse output deceleration Signal received after deceleration

CCW CW

Stop
Starts
when ORG is executed Ideal time for the Origin Proximity
Input Signal to go OFF
(Settings when the deceleration time is short)

CCW CW

Stop (*1)
*1 The Origin Input Signal can be detected
Starts immediately after the Origin Proximity Input
when ORG is executed Signal turns OFF if the deceleration time is
short, e.g., when starting from within the
Origin Proximity Input Signal.

CP1E CPU Unit Software Users Manual(W480) 14-25


14 Pulse Outputs

Operating Mode 1 without Origin Proximity Input Signal Reverse (Origin Detection Method Setting = 1)
Depending on the length of the deceleration time, the stopping position may change when the Origin
Input Signal is detected during deceleration.

1
Origin Proximity
Input Signal 0

Origin Input Signal 1


(phase-Z signal) 0
Origin Input
Signal is
ignored
Motor stopped by an Origin Input
during
Pulse output Signal received after deceleration
deceleration

CCW CW
(The deceleration time is
relatively long in this case.) Starts Stop
when ORG is executed
Motor stopped by an Origin Input
Signal received after deceleration

CCW CW
(The deceleration time is
relatively short in this case.) Starts Stop
when ORG is executed

z Operating Mode 2 (with Error Counter Reset Output, with Positioning


Completed Input)
This operating mode is the same as mode 1, except the Positioning Completed Signal (INP) from
the Servo Drive is used. Connect the Positioning Completed Signal from the Servo Drive to a normal
input (origin search 0 to 3 input).
If origin compensation is not being applied, the Positioning Completed Signal is checked after the
Error Counter Reset Output. If origin compensation is being applied, the Positioning Completed Sig-
nal is checked after the compensation operation is completed.

Pulse output

Time

Stop

1
Error Counter
Reset Output 0

Positioning 1
Completed Signal 0

14-26 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

Origin Search Operation Setting


z Origin Detection Method 0: Origin Proximity Input Signal Reversal Required
Deceleration starts when Origin
Proximity Input Signal turns ON.
1
Origin Proximity
Input Signal 0
After the Origin Proximity Input Signal turns
ON and then OFF, the motor is stopped
when the Origin Input Signal turns ON.
1
Origin Input Signal

14-4 Performing Origin Searches


0

High speed for origin search


Pulse output
Deceleration
Acceleration
Proximity speed for origin search
Initial speed

CCW CW
Start when ORG is executed Stop

z Origin Detection Method 1: Origin Proximity Input Signal Reversal Not


Required
Deceleration starts when Origin 14
Proximity Input Signal turns ON.
Origin Proximity 1
Input Signal
0

14-4-6 Details on the Origin Search Function


After the Origin Proximity Input Signal
turns ON, the motor is stopped when the
Origin Input Signal turns ON.
1
Origin Input Signal
0

High speed for origin search


Pulse output
Deceleration
Acceleration
Proximity speed for origin search
Initial speed

CCW CW
Start when ORG is executed Stop

z Origin Detection Method 2: Origin Proximity Input Signal Not Used


Deceleration starts when Origin
Proximity Input Signal turns ON.
1
Origin Input Signal
0

Proximity speed for


Pulse output origin search

Acceleration

Initial speed
Start when ORG is executed Stop

CP1E CPU Unit Software Users Manual(W480) 14-27


14 Pulse Outputs

Operation Patterns for Origin Search Operating Mode and Origin


Detection Method Settings
The following examples show how the operation patterns are affected by the origin detection method
and origin search operating mode.
These examples have a CW origin search direction. (The search direction and Limit Input Signal direc-
tion would be different for an origin search in the CCW direction.)
Method 0 is the recommended method for reversal mode 1.
z Using Reversal Mode 1
Origin search operation
Reversal mode 1
Origin detection method
0: Origin Proximity Input Signal Origin Proximity 1
reversal required. Input Signal 0
1
(Recommended method) Origin Input Signal
0
High speed for origin search
Pulse output Proximity speed for origin search

CCW CW
Start Stop

CCW CW
Stop
CW Limit Input Signal (See note.)
Start

CCW CW
Stop Start

Note When the Limit Input Signal is received, the motor stops without
deceleration, reverses direction, and accelerates.
1: Origin Proximity Input Signal 1
Origin Proximity
reversal not required. Input Signal 0
1
Origin Input Signal
0

Pulse output
CCW CW
Start Stop

CCW CW
Stop
CW Limit Input Signal (See note.)
Start

CCW CW
Stop Start
Note When the Limit Input Signal is received, the motor stops without
deceleration, reverses direction, and accelerates.

2: Origin Proximity Input Signal not 1


Origin Input Signal
used. 0

Proximity speed for origin search


Pulse output

CCW CW

Start Stop

CCW CW

Stop Start CW Limit Input Signal (See note.)

CCW CW

Stop Start
Note When the direction of operation is reversed, it is reversed immediately
without deceleration or acceleration.

14-28 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

z Using Reversal Mode 2


Origin search operation
Reversal mode 2
Origin detection method
0: Origin Proximity Input Signal 1
Origin Proximity
reversal required. Input Signal 0
1
Origin Input Signal
0

Pulse output

CCW CW

14-4 Performing Origin Searches


Start Stop

CCW CW

Stop
CW Limit Input Signal (See note.)
Start

CCW CW

Start Limit stop


(error code:0200)
Note When the Limit Input Signal is received, the motor stops
without deceleration.

1: Origin Proximity Input Signal


Origin Proximity
1 14
reversal not required. Input Signal 0
1
Origin Input Signal

14-4-6 Details on the Origin Search Function


0

Pulse output

CCW CW

Start Stop

CCW CW

Stop CW Limit Input Signal (See note.)


Start

CCW CW
Start Limit stop
(error code:0200)
Note When the Limit Input Signal is received, the motor stops
without deceleration.

2: Origin Proximity Input Signal not


1
used. Origin Input Signal
0

Proximity speed for origin search


Pulse output

CCW CW

Start Stop

CCW CW

Stop Start CW Limit Input Signal (See note.)

CCW CW

Start Limit stop


(error code:0201)
Note When the Limit Input Signal is received, the motor stops
without deceleration.

CP1E CPU Unit Software Users Manual(W480) 14-29


14 Pulse Outputs

14-4-7 Origin Search Examples


Connect a Servo Drive and execute an origin search based on the Servomotors built-in encoder phase-
Z signal and an Origin Proximity Input Signal.

z Conditions
Operating mode: 1 Uses the Servomotor encoders phase-Z signal as the Origin Input
Signal.
Origin search operation setting: 1 Sets reverse mode 1. Reverses direction when the Limit Input Signal
is input in the origin search direction.
Origin detection method: 0 Reads the Origin Input Signal after the Origin Input Signal turns ON
and then turns OFF.
Origin search direction: CW direction

z System Configuration

CW limit Origin proximity


sensor input sensor
Workpiece CCW limit
sensor Servomotor

CIO 0.10: Origin proximity input sensor


CIO 0.00: CW limit sensor
CIO 0.01: CCW limit sensor
Encoder

Servomotor Driver
CIO 0.06: Servomotor encoders
phase-Z origin input

Pulse output from built-in output OUT0

z Applicable Instructions
ORG
Any instruction, such as the OUT instruction, that can write the status of CIO 0.00 to A541.08 and
the status of CIO 0.01 to A541.09.
z I/O Allocations (CP1E-N40/30/20DT-)
Inputs
Input terminal
Terminal Terminal Name
block label number
CIO 0 00 CW limit sensor
The status of CIO 0.00 is written to A541.08 in the ladder program using an OUT
instruction.
01 CCW limit sensor
The status of CIO 0.01 is written to A541.09 in the ladder program using an OUT
instruction.
06 Pulse Output 0 Origin Input Signal
10 Pulse Output 0 Origin Proximity Input Signal

14-30 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

Outputs
Output terminal
Terminal Name
Terminal
block
number
label
CIO 100 00 Pulse Output 0 CW output
01 Pulse Output 0 CCW output

z Operation
1

14-4 Performing Origin Searches


Pulse Output 0
Origin Proximity Input 0.10
0

1
Pulse Output 0
Origin Signal Input 0.06
0

Pulse
frequency
Origin search Origin search high speed Origin search
acceleration deceleration
rate rate
Pulse Output 0 Origin search proximity speed
100.00/100.01
Origin search
initial speed

CCW Stop CW
14
Execution of ORG starts:
Origin search starts

14-4-7 Origin Search Examples


z Pulse Output Tab 0 Page in PLC Setup
Function Setting (example)
Base Undefined Origin Hold
Settings Limit Input Signal Operation Search Only
Limit Input Signal NO
Origin Search/Return Initial 100 pps
Speed
Speed Curve Trapezoid
Origin Use define origin operation Use
searches Origin Search Direction CW
Origin Detection Method Method 0
Origin Search Operation Inverse 1
Operation Mode Mode 1
Origin Input Signal NO
Origin Proximity Input Signal NO
Origin Search High Speed 2,000 pps
Origin Search Proximity Speed 1,000 pps
Origin Compensation Value 0
Origin Search Acceleration Ratio 50(Hz/4 ms)
(Rate)
Origin Search Deceleration 50(Hz/4 ms)
Ratio (Rate)

CP1E CPU Unit Software Users Manual(W480) 14-31


14 Pulse Outputs

z Ladder Diagram

CW limit sensor CW Limit Input Signal


0.00 A540.08

CCW limit sensor CCW Limit Input Signal


0.01 A540.09

Execution condition

ORG
#0000 Origin search 0: #0000

#0100 Origin search and pulse +


direction method: #0100

14-32 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

14-5 Returning to the Origin

Origin Return

An origin return operation moves the motor to the origin position from any other position. The origin
return operation is controlled by ORG.
The origin return operation returns the motor to the origin by starting at the specified speed, accelerat-
ing to the target speed, moving at the target speed, and then decelerating to a stop at the origin posi-
tion.

14-5 Returning to the Origin


Pulse frequency
Origin return target speed Origin return
deceleration rate

Origin return
acceleration rate

Origin return
initial speed

Time
Start Stop

Started by executing ORG

14
PLC Setup
The various origin return parameters are set on the Pulse Output 0 Tab Page in the PLC Setup.

z Origin Return Parameters


Name Setting Setting range
Base Search/Return Sets the motors starting speed when the 1 to 100 kHz
Settings Initial Speed origin search is executed. Specify the speed
in the number of pulses per second (pps).
Origin Speed Sets the motors target speed when the 1 to 100 pps
Return origin return is executed. Specify the speed
in the number of pulses per second (pps).
Acceleration Ratio Sets the motors acceleration rate when the 1 to 65,535
(Rate) origin return operation starts. Specify the (Hz/4ms)
amount to increase the speed (Hz) per 4-ms
interval.
Deceleration Ratio Sets the motors deceleration rate when the 1 to 65,535
(Rate) origin return function is decelerating. Specify (Hz/4ms)
the amount to decrease the speed (Hz) per
4-ms interval.

Executing an Origin Return


ORG C1:Port specifier
Pulse output 0: #0000
C1 Pulse output 1: #0001
C2 C2:Control data
Origin return and Pulse + Direction output method: #1100

Note An instruction execution error will occur if the origin is not defined (relative coordinate system)
when the ORG instruction is executed to perform an origin return operation.

CP1E CPU Unit Software Users Manual(W480) 14-33


14 Pulse Outputs

14-6 Changing/Reading the Pulse Output


Present Value

14-6-1 Changing the Present Value of the Pulse Output

The present value of the pulse output can be changed by using the INI instruction. To define the present
value as the origin, set the pulse output PV to 0 using the INI instruction.
INI instruction executed

New origin Present origin

Pulse output
PV
Example: 0

Origin return

z Example: Setting the Present Position as the Origin


Execution condition

@INI
#0000 C1: Port specifier (example for pulse output 0)
#0002 C2: Control data (example for changing PV)
D100 S:First word with new PV
15 0
D100 #0 0 0 0
D101 #0 0 0 0

Operands Settings
C1 Port specifier #0000 Pulse output 0
#0001 Pulse output 1
C2 Control data #0002 Changes PV
#0003 Stops pulse output
S First word with new Store the new PV starting from this word when changing the PV
PV (i.e., when C = #0002).

14-6-2 Reading the Present Value of a Pulse Output


The present value of a pulse output can be read in the following two ways.
Value refreshed at the I/O refresh timing: Read PV from Auxiliary Area.
Value updated when an instruction is executed: Read PV by executing a PRV instruction.

Reading the PV Refreshed at the I/O Refresh Timing


The PV that is stored in the following words can be read using the MOVL instruction or other instruc-
tions.
Read PV Auxiliary Area words
Pulse 0 A277 (upper digits) and A276 (lower digits)
Pulse 1 A279 (upper digits) and A278 (lower digits)

14-34 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

Reading the Value When an Instruction Is Executed

z Reading the Pulse Output PV with a PRV Instruction

14-6 Changing/Reading the Pulse Output Present Value


Execution condition

@PRV
#0000 C1: Port specifier (example for pulse output 0)
#0002 C2: Control data (example for reading PV)
D100 S: First destination word
15 0
D100 Present value data lower bytes
Pulse output PV that was read
D101 Present value data upper bytes

14

14-6-2 Reading the Present Value of a Pulse Output

CP1E CPU Unit Software Users Manual(W480) 14-35


14 Pulse Outputs

14-7 Auxiliary Area Bits and Words Used


with Pulse Outputs

Auxiliary Area Allocations


Pulse output Pulse output
Name Description Values
0 1
Pulse Output PV PV range: 8000 0000 to 7FFF FFFF hex~ Leftmost 4 digits A277 A279
Storage Words (2,147,483,648 to 2,147,483,647) Rightmost 4 digits A276 A278
Pulse Output The pulse output PV will be cleared when 0: Not cleared. A540.00 A541.00
Reset Bit this bit is turned ON. 1: Clear PV.
CW Limit Input This flag shows the status of the CW Limit ON when turned ON A540.08 A541.08
Signal Flag Input Signal, which is used in the origin from an external input.
search.

Note The status of the signal from the


CW limit input sensor connected to
a normal input must be written to
A540.08 or A541.08.
CCW Limit Input This flag shows the status of the CCW ON when turned ON A540.09 A541.09
Signal Flag Limit Input Signal, which is used in the ori- from an external input.
gin search.

Note The status of the signal from the


CCW limit input sensor connected
to a normal input must be written to
A540.0 or A541.09.
Positioning com- This flag shows the status of the position- ON when turned ON A540.10 A541.10
pleted input signal ing completed input signal, which is used from an external input.
in the origin search.
Note The status of the Positioning Com-
pleted Signal from the Servo Drive
connected to a normal input must
be written to A540.10 or A541.10.
Accel/Decel Flag ON when pulses are being output accord- 0: Constant speed A280.00 A281.00
ing to an ACC or PLS2 instruction and the 1: Accelerating or decel-
output frequency is being changed in erating
steps (accelerating or decelerating).
Overflow/Underflow ON when an overflow or underflow has 0: Normal A280.01 A281.01
Flag occurred in the pulse output PV. 1: Overflow or underflow
Output Amount ON when the number of output pulses has 0: No setting A280.02 A281.02
Set Flag been set with the PULS instruction. 1: Setting made
Output Completed ON when the number of output pulses set 0: Output not completed. A280.03 A281.03
Flag with the PULS/PLS2 instruction has been 1: Output completed.
output.
Output In-progress ON when pulses are being output from 0: Stopped A280.04 A281.04
Flag the pulse output. 1: Outputting pulses.
No-origin Flag ON when the origin has not been defined 0: Origin defined. A280.05 A281.05
for the pulse output. 1: Origin undefined.
At-origin Flag ON when the pulse output PV matches 0: Not stopped at origin. A280.06 A281.06
the origin (0). 1: Stopped at origin.
Output Stopped ON when an error occurred while output- 0: No error A280.07 A281.07
Error Flag ting pulses in the origin search function. 1: Stop error occurred.
Stop Error Code When a Pulse Output Stop Error occurs, --- A444 A445
the error code is stored in that pulse out-
puts corresponding Stop Error Code
word.

14-36 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

14-8 Pulse Output Application Examples

14-8-1 Example 1: Cutting Long Material Using Fixed Feeding

Specifications and Operation

14-8 Pulse Output Application Examples


z Outline
In this example, first jogging is used to position the material and then fixed-distance positioning is
used to feed the material.
10000Hz Acceleration/deceleration: 1000Hz/4ms
(2710Hex) (03E8Hex)
1000Hz
(03E8) 50000
(C350)
CW
Jogging Fixed-distance
feeding

Material cut Material cut Material cut


with cutter with cutter with cutter

z System Configuration

Jogging switch
IN 0.00
14
Positioning switch
IN 0.01

14-8-1 Example 1: Cutting Long Material Using Fixed Feeding


Cutter finished
IN 0.02 Emergency stop switch
IN 0.03
Cutter start
OUT 100.02

Cut operation finished


OUT 100.03
Pulse output (CW/CCW)

*Normal I/O other than pulse outputs are used for I/O.

z Operation
1 The workpiece is set at the starting position using the Jogging Switch Input (CIO 0.00).

2 The workpiece is fed the specified distance (relative) using the Positioning Switch Input (CIO
0.01).

3 When feeding has been completed, the cutter is activated using the Cutter Start Output (CIO
100.02).

4 Feeding is started again when the Cutter Finished Input (CIO 0.02) turns ON.

5 The feeding/cutting operation is repeated for the number of times specified for the counter (C0,
100 times).

6 When the operation has been completed, the Cutting Operation Finished Output (CIO 100.03) is
turned ON.
The feeding operation can be canceled and stopped at any point using the Emergency Switch Input
(CIO 0.03).

CP1E CPU Unit Software Users Manual(W480) 14-37


14 Pulse Outputs

Applicable Instructions
SPED
PLS2

Preparations

z PLC Setup
There are no settings that need to be made in the PLC Setup.

z DM Area Settings
Speed Settings for Jogging (D0 to D3)
Setting details Address Data
Target frequency: 1,000 Hz D0 #03E8
D1 #0000
Target frequency: 0000 Hz D2 #0000
D3 #0000

Settings for PLS2 for Fixed-distance Feeding (D10 to D20)


Setting details Address Data
Acceleration rate: 1,000 Hz/4 ms D10 #03E8
Deceleration rate: 1,000 Hz/4 ms D11 #03E8
Target frequency: 10,000 Hz D12 #2710
D13 #0000
Number of output pulses: 50,000 D14 #C350
pulses
D15 #0000
Starting frequency: 0000 Hz D16 #0000
D17 #0000
Counter setting: 100 times D20 #0100

14-38 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

Ladder Program

Jog Operation
0.00 A280.04
SPED

Jogging Switch Pulse Output In-Progress Flag #0000


Target frequency: 1000Hz
#0100

14-8 Pulse Output Application Examples


D0

SET W0.00 Jogging Flag

0.00 W0.00
SPED

Jogging Switch Jogging Flag #0000


Target frequency: 0Hz
#0100
D2

RSET W0.00 Jogging Flag


Fixed-distance Feed
0.01
@PLS2

Positioning Switch #0000


#0100
0.02 D10
D16
Cutter Finished 14
A280.03 100.02

14-8-1 Example 1: Cutting Long Material Using Fixed Feeding


Cutter activated

Pulse Output Completed Flag

Counting Feed Operations

A280.03
CNT
Pulse Output Completed Flag 0000
0.01 D20

Positioning Switch

C0000 100.03
Cutting Operation Finished

0.03
INI

Emergency Stop Switch #0000


#0003
0

Additional Information
The PLS2 instruction uses a relative pulse setting. This enables operation even if the origin is not
defined.
The present position in A276 (lower 4 digits) and A277 (upper 4 digits) is set to 0 before pulse output
and then contains the specified number of pulses.

The ACC instruction can be used instead of the SPED instruction for the jog operation. If ACC is
used, acceleration/deceleration can be included in the jog operation.

CP1E CPU Unit Software Users Manual(W480) 14-39


14 Pulse Outputs

14-8-2 Example 2: Vertically Conveying PCBs (Multiple Progressive


Positioning)

Specifications and Operation

z Outline
PCBs with components mounted are stored in a stocker.
When a stocker becomes full, it is moved to the conveyance point.

Positioning Operation for Vertical Conveyor Stocker conveyance


position


From mounter

z Operation Pattern
An origin search is performed.
Fixed-distance positioning is repeated.
The system is returned to the original position.

CCW Origin (servo Origin CW


limit phase Z) proximity limit

Origin search

CCW Fixed-distance CW
positioning repeated

50,000 Hz
(C350 Hex)

10,000
(2710 Hex)

CCW CW
Acceleration/deceleration:
Return to start 1,000 Hz/4 ms (03E8 hex)

PCB storage PCB storage Stocker Stocker movement


enabled completed moved completed

14-40 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

z Wiring Example Using SmartStep A-series Servo Drive


Origin Search Start Switch (CIO 0.00)

Emergency Stop Switch (CIO 0.01)

Stocker Moved (CIO 100.02) PCB Storage Completed (CIO 0.03)


Stocker Movement Completed PCB Storage Enabled (CIO 100.03)
(CIO 0.04)

SmartStep A-series
Servo Drive

14-8 Pulse Output Application Examples


R88A-CPU00S
and resistor

CP1E N-type CPU Unit SmartStep A-series Servo Drive

R88A-CPU00S

Output terminal block


1.6k
Pulse output (CIO 100.00) 1 +CW
Pulse 1.6k 2 -CW
output 0 Direction output (CIO 100.02) 3 +CCW
4 -CCW
14
1.6k 5 +ECRST
Error counter reset output 0 (CIO 100.04) 6 -ECRST
24-VDC input terminal (+)

14-8-2 Example 2: Vertically Conveying PCBs (Multiple Progressive Positioning)


24-VDC input terminal (-)
COM (CIO 100)
Move stocker (CIO 100.02)
PCB storage enabled (CIO 100.03) 8 INP
Input terminal block 33 ZCOM
Pulse 0 origin input signal (CIO 0.06) 32 Z
COM 13 +24VIN
24-VDC Servo Drive
RUN input X1
Pulse 0 origin input signal (CIO 0.10) 14 RUN
18 RESET
Servo Drive alarm reset input
Origin search start switch (CIO 0.00) 10 OGND
Emergency stop switch (CIO 0.01)
PCB storage completed (CIO 0.03) X1 34 ALM
Stocker movement completed (CIO 0.04) 24-VDC 35 ALMCOM
XB 7 BKIR

Hood FG

z Operation
1 An origin search is performed using the Origin Search Start Switch (CIO 0.00).

2 When the origin search is finished, the PCB Storage Enabled Output (CIO 100.03) is turned ON.

3 When a PCB has been stored, the stocker is raised (relative positioning) using the PCB Storage
Completed Input (CIO 0.03).
4 Storing PCBs is repeated until the stocker is full.

5 The number of PCBs in the stocker is counted with counter C0 by counting the number of times
the stocker is raised.
6 When the stocker is full, it is moved (CIO 100.02) and only the conveyor is lowered (absolute
positioning) when stoker movement is completed (CIO 0.04).
The operation can be canceled and pulse output stopped at any point using the Emergency Switch
Input (CIO 0.01).

CP1E CPU Unit Software Users Manual(W480) 14-41


14 Pulse Outputs

Preparations

z PLC Setup
Setting
Enable origin search function for pulse output 0.

* The origin search enable setting is read from the PLC Setup when the power supply is turned ON.

z DM Area Settings
Settings for PLS2 for Fixed-distance Positioning (D0 to D7)
Setting Address Data
Acceleration rate: 1,000 Hz/4 ms D0 #03E8
Deceleration rate: 1,000 Hz/4 ms D1 #03E8
Target frequency: 50,000 Hz D2 #C350
D3 #0000
Number of output pulses: 10,000 pulses D4 #2710
D5 #0000
Starting frequency: 0 Hz D6 #0000
D7 #0000
Settings for PLS2 to Return to Start (D10 to D17)
Setting details Address Data
Acceleration rate: 300 Hz/4 ms D10 #012C
eceleration rate: 200 Hz/4 ms D11 #00C8
Target frequency: 50,000 Hz D12 #C350
D13 #0000
Number of output pulses: 10,000 15 pulses D14 #49F0
D15 #0002
Starting frequency: 100 Hz D16 #0064
D17 #0000
Number of Repeats of Fixed-distance Positioning Operation (D20)
Setting details Address Data
Number of repeats of fixed-distance positioning D20 #0015
operation (number of PCBs in stocker)

14-42 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

Ladder Program

Jog Operation

0.00 W0.01 W0.00

Origin search in progress


Origin search Origin search
start switch completed

14-8 Pulse Output Application Examples


ORG
W0.00
#0000
#0100
Origin search
in progress W0.01
A280.05
Origin search completed
No-origin Flag

100.03
W0.01 W0.02
PCB storage enabled

Origin search Lift positioning start


completed

W0.05 W0.02
0.03
Lift positioning start
PCB stored PCB storage completed

100.03

14
PCB storage enabled

14-8-2 Example 2: Vertically Conveying PCBs (Multiple Progressive Positioning)


Positioning
Lift 10,000 pulses (relative) at a time

W0.03
W0.02 W0.04
Lift positioning in progress

Lift positioning start Lift positioning


completed
@PLS2
W0.03
#0000
#0100
Lift positioning
in progress D0
D6

A280.03 W0.04

Lift positioning completed

Pulse Output Completed Flag

Counter for number of lifts (number of PCBs stored)


W0.04
CNT
Lift positioning completed 0000
W0.09 #0100

Lower positioning
completed

CP1E CPU Unit Software Users Manual(W480) 14-43


14 Pulse Outputs

When the stocker is not full (C0 = OFF), store PCB,


and repeat lift positioning after PCB storage is completed.

W0.05
W0.04 C0000
PCB stored

Lift positioning Stocker full


completed

When the stocker is full (C0 = ON), move the stocker,


and start lower positioning after stocker movement is completed.

W0.04 C0000 W0.06

Stocker moved

Lift positioning Stocker full


completed

W0.06 W0.07 100.02

Stocker moving output


Stocker moved Lower positioning

100.02 W0.07
0.04
Lower positioning
Stocker moving
Stocker movement completed
output

Positioning
Lower to "0" position (absolute pulses)

W0.08
W0.07 W0.09
Lower positioning in progress

Lower positioning Lower positioning


start completed
@PLS2
W0.08
#0000
#0101
Lower positioning
in progress D10
D16

A280.03 W0.09

Lower positioning completed

Pulse Output Completed Flag

Emergency stop (Pulse output stopped)


0.01

@INI
Emergency stop switch #0000
#0003
0
Repeat limit input settings
Limit inputs are allocated to external sensors using the following programming.

A540.08
0.05
CW Limit Input Signal Flag

Built-in input

0.07 A540.09

CCW Limit Input Signal Flag

Built-in input

14-44 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

14-8-3 Example 3: Feeding Wrapping Material: Interrupt Feeding

Specifications and Operation


Feeding Wrapping Material in a Vertical Pillow Wrapper

14-8 Pulse Output Application Examples


Start switch (CIO 0.00)

Emergency stop switch (CIO 0.01)

Marker sensor Speed


(Built-in input 0.04) control

Position
control

Pulse output

14
z Operation Pattern

14-8-3 Example 3: Feeding Wrapping Material: Interrupt Feeding


Speed control is used to feed wrapping material to the initial position. When the marker sensor input
is received, fixed-distance positioning is performed before stopping.

10,000 Hz
500 Hz/4ms (2710 Hex)
(01F4 Hex)

Position control
Speed control 5,000 (1388 hex)
pulses output before stopping.

PLS2 is executed in
input interrupt task.

Marker sensor input


(0.04)

z Operation

1 Speed control is used to feed wrapping material to the initial position when the Start Switch (CIO
0.00) is activated.

2 When the Marker Sensor Input (CIO 0.04) is received, the PLS2 instruction is executed in inter-
rupt task 2.

3 Fixed-distance positioning is executed with the PLS2 instruction before stopping.

4 An emergency stop is executed to stop pulse output with the Emergency Stop input (CIO 0.01).

CP1E CPU Unit Software Users Manual(W480) 14-45


14 Pulse Outputs

Preparations

z PLC Setup
Setting
Enable using built-in input IN0 as an interrupt input.

Note The interrupt input setting is read from the PLC Setup when the power supply is turned ON.

z DM Area Settings
Speed Control Settings to Feed Wrapping Material to Initial Position
Setting Address Data
Acceleration/deceleration rate: D0 #03E8
500 Hz/4 ms
Target frequency: 10,000 Hz D1 #2710
D2 #0000

Positioning Control Settings for Wrapping Material


Setting Address Data
Acceleration rate: 500 Hz/4 ms D10 #01F4
Deceleration rate: 500 Hz/4 ms D11 #01F4
Target frequency: 10,000 Hz D12 #2710
D13 #0000
Number of output pulses: 5,000 D14 #1388
pulses D15 #0000
Starting frequency: 0 Hz D16 #0000
D17 #0000

14-46 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

Ladder Program

z Cyclic Task Program (Executed at Startup)

Enabling Input Interrupt 0 (IN0)

P_First Cycle

MSKS

14-8 Pulse Output Application Examples


First Cycle Flag 100
#0

Feeding Material with Speed Control

W0.00
0.00 W0.01
Material being fed
Material feed start Material positioning
completed
@ACC
W0.00
#0000

Material feed start #0100


D0

A280.03 A280.04 W0.01


Material positioning completed 14
Pulse Output Pulse output
Completed Flag in progress

14-8-3 Example 3: Feeding Wrapping Material: Interrupt Feeding


Emergency Stop
0.01
@INI
Emergency stop switch #0000
#0003
0

z Program for Interrupt Task 2


Interrupt Task for Master Sensor Input IN0
Starting interrupt feed

P_ON
@PLS2
Always ON Flag #0000
#0100
D10
D16

CP1E CPU Unit Software Users Manual(W480) 14-47


14 Pulse Outputs

14-9 Precautions When Using Pulse Outputs

Movement Direction When Specifying Absolute Pulses

When operating with the absolute pulse specification, the movement direction is selected automatically
based on the relationship between the pulse output PV when the instruction is executed and the speci-
fied target position. The direction (CW/CCW) specified in an ACC or SPED instruction is not effective.

Using CW/CCW Limit Inputs for Pulse Output Functions Other than
Origin Searches
Pulse outputs will stop when either the CW or CCW Limit Input Signals turns ON. It is also possible to
select whether or not the defined origin will be cleared when a CW or CCW Limit Input Signal turns ON
for an origin search or other pulse output function.

Difference between Set Frequencies and Actual Frequencies


The CP1E CPU Units pulse output frequency is determined by dividing the source clock frequency
(32 MHz) by an integer ratio. Consequently, there may be a slight difference between the set frequency
and the actual frequency, and that difference increases as the frequency increases. The actual fre-
quency can be calculated from the following equations.

z Pulse Output System


Integer dividing ratio calculated
from users set frequency

Output pulses (actual frequency)

Source clock Frequency divider


32MHz

z Equations

Source clock frequency


Actual frequency (Hz)=INT
Dividing ratio

Source clock frequency 2 + Set frequency


Dividing ratio=INT
Set frequency (Hz) 2

The INT function extracts an integer from the fraction. The non-integer remainder is rounded.

14-48 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

z Differences between Set Frequencies and Actual Frequencies


Source clock frequency: 32 MHz
Set frequency (kHz) Actual frequency (kHz)
99.844 to 100.000 100.000
99.534 to 99.843 99.688
: :
50.040 to 50.117 50.078

14-9 Precautions When Using Pulse Outputs


49.961 to 50.039 50.000
49.889 to 49.960 49.921
: :
10.002 to 10.004 10.003
9.999 to 10.001 10.000
9.995 to 9.998 9.996

Combinations of Pulse Control Instructions


The following tables show when a second pulse control instruction can be started if a pulse control
operation is already being executed.
A second independent-mode positioning instruction can be started if an independent-mode positioning
instruction is being executed, and a second continuous-mode speed control instruction can be started if
a continuous-mode speed control instruction is being executed. Operation cannot be switched between
the independent and continuous modes, although a PLS2 instruction can be executed while a ACC
instruction (continuous mode) is being executed. 14
It is possible to start another operation during acceleration/deceleration and start another positioning
instruction during positioning.
Instruction being started(z:Can be executed. :Error occurs.)

Instruction being executed SPED SPED ACC ACC


INI (Indepen- (Contin- (Inde- (Contin- PLS2 ORG
dent) uous) pendent) uous)
SPED (Independent) z z(*1) z(*3)
SPED (Continuous) z z(*2) z(*5)
ACC Steady speed z z(*4) z(*6)
(Continuous) Accelerating or z z(*4) z(*6)
decelerating
ACC Steady speed z z(*5) z(*7)
(Continuous) Accelerating or z z(*5) z(*7)
decelerating
PLS2 Steady speed z z(*4) z(*8)
Accelerating or z z(*4) z(*8)
decelerating
ORG Steady speed z
Accelerating or z
decelerating

*1 SPED (Independent) to SPED (Independent)


The number of output pulses cannot be changed.
The frequency can be changed.
The output mode cannot be switched.
*2 SPED (Continuous) to SPED (Continuous)
The frequency can be changed.
The output mode cannot be switched.

CP1E CPU Unit Software Users Manual(W480) 14 - 49


14 Pulse Outputs

*3 SPED (Independent) to ACC (Independent)


The number of output pulses cannot be changed.
The frequency can be changed.
The acceleration/deceleration rate can be changed.
The output mode cannot be switched.
*4 ACC (Independent) to ACC (Independent) or PLS2 to ACC (Independent)
The number of output pulses cannot be changed.
The frequency can be changed.
The acceleration/deceleration rate can be changed. (The rate can even be changed
during acceleration or deceleration.)
The output mode cannot be switched.
*5 SPED (Continuous) to ACC (Continuous) or ACC (Continuous) to ACC (Continuous)
The frequency can be changed. (The target frequency can even be changed during
acceleration or deceleration.)
The acceleration/deceleration rate can be changed. (The rate can even be changed
during acceleration or deceleration.)
The output mode cannot be switched.
*6 ACC (Independent) to PLS2
The number of output pulses can be changed. (The setting can even be changed
during acceleration or deceleration.)
The frequency can be changed. (The target frequency can even be changed during
acceleration or deceleration.)
The acceleration/deceleration rate can be changed. (The rate can even be changed
during acceleration or deceleration.)
The output mode cannot be switched.
*7 ACC (Continuous) to PLS2
The frequency can be changed. (The target frequency can even be changed during
acceleration or deceleration.)
The acceleration/deceleration rate can be changed. (The rate can even be changed
during acceleration or deceleration.)
The output mode cannot be switched.
*8 PLS2 to PLS2
The number of output pulses can be changed. (The setting can even be changed
during acceleration or deceleration.)
The frequency can be changed. (The target frequency can even be changed during
acceleration or deceleration.)
The acceleration/deceleration rate can be changed. (The rate can even be changed
during acceleration or deceleration.)
The output mode cannot be switched.

Origin Search Error Processing


The CP1E CPU Units pulse output function performs a basic error check before starting to output
pulses (when the instruction is executed) and will not output pulses if the settings are incorrect.
There are other errors that can occur with the origin search function during pulse output, which may
stop the pulse output.
If an error occurs that stops pulse output, the pulse outputs Output Stopped Error Flag will be turned
ON and the Pulse Output Stop Error Code will be written to Error Code word. Use these flags and error
codes to identify the cause of the error.
The Pulse Output Stop Errors will not affect the CPU Units operating status. (The Pulse Output Stop
Errors do not cause a fatal or non-fatal error in the CPU Unit.)

14-50 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

z Related Auxiliary Area Flags


Pulse Pulse
Function
output 0 output 1
Output Stopped Error Flags 0: No error A280.07 A281.07
ON when an error occurred while outputting pulses in the 1: Stop error occurred.
origin search function.
Stop Error Codes A444 A445
When a Pulse Output Stop Error occurs, the error code is stored in that pulse outputs

14-9 Precautions When Using Pulse Outputs


corresponding Stop Error Code word.

z Pulse Output Stop Error Codes


Error Operation after
Error name Likely cause Corrective action
code error
CW Limit Stop 0100 Stopped due to a CW limit sig- Move in the CCW direction. Immediate stop
Input Signal nal input. No effect on other
CCW Limit 0101 Stopped due to a CCW limit sig- Move in the CW direction. port
Stop Input Sig- nal input.
nal
No Origin Prox- 0200 The parameters indicate that the Check the wiring of the Origin Proximity Input No effect on other
imity Input Sig- Origin Proximity Input Signal is Signal as well as the PLC Setups Origin port
nal being used, but a Origin Proxim- Proximity Input Signal Type setting (NC or
ity Input Signal was not receivedNO) and execute the origin search again.
during the origin search. Turn the power supply OFF and then ON if
the signal type setting was changed.
No Origin Input 0201 The Origin Input Signal was not Check the wiring of the Origin Input Signal as
Signal received during the origin well as the PLC Setups Origin Input Signal
search. Type setting (NC or NO) and execute the ori-
14
gin search again. Turn the power supply OFF
and then ON if the signal type setting was
changed.
Origin Input 0202 During an origin search in oper- Take one or both of the following steps so Decelerates to a
Signal Error ating mode 0, the Origin Input that the Origin Input Signal is received after stop.
Signal was received during the deceleration is completed. No effect on other
deceleration started after the Increase the distance between the Origin port
Origin Proximity Input Signal Proximity Input Signal sensor and Origin
was received. Input Signal sensor.
Decrease the difference between the origin
searchs high speed and proximity speed
settings.
Limit Inputs in 0203 The origin search cannot be Check the wiring of the limit signals in both Operation will not
Both Directions performed because the limit sig- directions as well as the PLC Setups Limit start.
nals for both directions are Signal Type setting (NC or NO) and execute No effect on other
being input simultaneously. the origin search again. Turn the power sup- port
ply OFF and then ON if the signal type set-
ting was changed.
Simultaneous 0204 The Origin Proximity Input Sig- Check the wiring of the Origin Proximity Input Immediate stop
Origin Proximity nal and the Limit Input Signal in Signal and the Limit Input Signal. Also check No effect on other
and Limit Inputs the search direction are being the PLC Setups Origin Proximity Input Signal port
input simultaneously during an Type and Limit Signal Type settings (NC or
origin search. NO) and then execute the origin search
again. Turn the power supply OFF and then
ON if a signal type setting was changed.
Limit Input Sig- 0205 When an origin search in one Check the wiring of the Limit Input Signal and Immediate stop
nal Already direction is being performed, the PLC Setups I/O settings. Also check the No effect on other
Being Input the Limit Input Signal is PLC Setups Limit Signal Type setting (NC or port
already being input in the ori- NO) and then execute the origin search
gin search direction. again. Turn the power supply OFF and then
When a non-regional origin ON if the signal type setting was changed.
search is being performed, the
Origin Input Signal and the
Limit Input Signal in the oppo-
site direction (from the search
direction) are being input
simultaneously.

CP1E CPU Unit Software Users Manual(W480) 14-51


14 Pulse Outputs

Error Operation after


Error name Likely cause Corrective action
code error
Origin Proximity 0206 When an origin search with Check the installation positions of the Origin Immediate stop
Input Signal reversal at the limit is being Proximity Input Signal, Origin Input Signal, No effect on other
Origin Reverse performed, the Limit Input Sig- and Limit Input Signal as well as the PLC port
Error nal in the search direction was Setups I/O settings. Also check the PLC
input while the Origin Proxim- Setups Signal Type settings (NC or NO) for
ity Input Signal was reversing. each input signal and then execute the origin
When an origin search with search again. Turn the power supply OFF
reversal at the limit is being and then ON if a signal type setting was
performed and the Origin changed.
Proximity Input Signal is not
being used, the Limit Input
Signal in the search direction
was input while the Origin
Input Signal was reversing.
Positioning 0300 The Servo Drives Positioning Adjust the Positioning Monitor Time setting Decelerates to a
Timeout Error Completed Signal does not or Servo system gain setting. Check the stop.
come ON within the Positioning Positioning Completed Signal wiring, correct No effect on other
Monitor Time specified in the it if necessary, and then execute the origin port
PLC Setup. search again.

14-52 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

14-10Pulse Output Details


The CP1E CPU Units pulse output function enables operation in Continuous Mode, for which the num-
ber of output pluses is not specified, or in Independent Mode, for which the number of output pulses is
specified. Continuous Mode is used for speed control and Independent Mode is used for speed control.

14-10-1 Continuous Mode (Speed Control)


The following operations can be performed in Continuous Mode by combining instructions.

Starting a Pulse Output

14-10 Pulse Output Details


Example Procedure
Operation Frequency changes Description
application Instruction Settings
Output with Changing the Pulse frequency Outputs SPED Port
specified speed (fre- pulses at a (Continuous) Pulse + direction
Target frequency
speed quency) in one specified Continuous
step frequency.
Target frequency
Time
Execution of SPED

Output with Accelerating the Pulse frequency Outputs ACC Port 14


specified speed pulses and (Continuous) Pulse + direction
Target frequency
acceleration (frequency) at a Acceleration/ changes the Continuous
deceleration
and speed fixed rate frequency at a

14-10-1 Continuous Mode (Speed Control)


rate Acceleration/
fixed rate.
Time deceleration rate
Execution of ACC Target frequency

Changing Settings
Example Procedure
Operation Frequency changes Description
application Instruction Settings
Change Changing the Pulse frequency Changes the SPED Port
speed in one speed during frequency (Continuous) Continuous
Target frequency
step operation (higher or Target frequency
lower) of the
Present frequency SPED
pulse output
Time (Continuous)
in one step.
Execution of SPED

Change Changing the Pulse frequency Changes the ACC or Port


speed speed smoothly frequency SPED Continuous
Target frequency
smoothly during operation Acceleration/ from the (Continuous) Target frequency
deceleration
rate
present fre-
Present frequency Acceleration/
quency at a
Time ACC deceleration rate
fixed rate. The
Execution of ACC (Continuous)
frequency can
be acceler-
ated or decel-
erated.

CP1E CPU Unit Software Users Manual(W480) 14-53


14 Pulse Outputs

Example Procedure
Operation Frequency changes Description
application Instruction Settings
Changing the Pulse frequency Acceleration/ Changes the ACC Port
deceleration rate n
speed in a Acceleration/
acceleration or (Continuous) Continuous
Target frequency deceleration rate 2
polyline curve Acceleration/
deceleration Target frequency
during operation deceleration
rate 1 rate during
Present frequency ACC Acceleration/
acceleration or
Time (Continuous) deceleration rate
deceleration.
Execution of ACC
Execution of ACC
Execution of ACC

Change Not supported.


direction
Change Not supported.
pulse output
method

Stopping a Pulse Output


Example Procedure
Operation Frequency changes Description
application Instruction Settings
Stop pulse Immediate stop Pulse frequency Stops the SPED or Port
output pulse output ACC Stop pulse
Present
frequency immediately. (Continuous) output

Time INI
Execution of INI

Stop pulse Immediate stop Pulse frequency Stops the SPED or Port
output pulse output ACC Continuous
Present
frequency
immediately. (Continuous) Target
frequency=0
Time SPED
Execution of SPED (Continuous)

Stop pulse Decelerate to a Pulse frequency Decelerates SPED or Port


Acceleration/deceleration
output stop Present rate (Rate set at the start the pulse out- ACC Continuous
smoothly frequency of the operation.) put to a stop.* (Continuous) Target
frequency=0
Target
frequency=0 Time ACC
Execution of ACC (Continuous)

* If an ACC instruction started the operation, the original acceleration/deceleration rate will remain in effect.
If a SPED instruction started the operation, the acceleration/deceleration rate will be invalid and the pulse output will stop
immediately.

14-54 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

14-10-2 Independent Mode (Positioning)


The following operations can be performed in Independent Mode by combining instructions.

Starting a Pulse Output


Procedure
Example
Operation Frequency changes Description Instruc-
application Settings
tion
Output with Positioning Pulse frequency Starts outputting PULS Number of
specified without accel- Specified number of pulses pulses at the speci- pulses
(Specified with PULS)
speed eration or fied frequency and Relative or

14-10 Pulse Output Details


Target
frequency SPED
deceleration stops immediately absolute
(Indepen-
when the specified pulse speci-
Time dent)
number of pulses fication
Execution of SPED Outputs the specified number
of pulses and then stops.
has been output.*1 Port
Note The target Pulse +
position (spec- Direction
ified number Independent
of pulses) Target fre-
cannot be quency
changed dur-
ing position- 14
ing.
Simple trape- Positioning Pulse frequency
Accelerates and PULS Number of

14-10-2 Independent Mode (Positioning)


zoidal control with trapezoi- Specified number of pulses decelerates at the pulses
(Specified with PULS)
dal accelera- Target same fixed rate and Relative or
Acceleration/ ACC
tion and frequency deceleration rate stops immediately absolute
(Indepen-
deceleration when the specified pulse speci-
Time dent)
(Same rate number of pulses fication
used for accel- Execution of ACC Outputs the specified has been output. Port
number of pulses and
eration and then stops.
Pulse +
deceleration;
Direction
no starting
speed)The Independent
number of Accelera-
pulses cannot tion and
be changed decelera-
during posi- tion rate
tioning. Target fre-
quency
Complex Positioning Pulse
Accelerates and PLS2 Number of
Specified number of pulses
trapezoidal with trapezoi- frequency
decelerates at a pulses
Target
control dal accelera- frequency Acceleration
Deceleration rate
fixed rates. The Relative or
rate
tion and pulse output is absolute
Starting
deceleration frequency
Stop frequency
stopped when the pulse speci-
(Separate Time specified number of fication
rates used for Execution Output stops pulses has been Port
of PLS2 Deceleration point
Target
acceleration frequency reached
output.*1
Pulse +
and decelera-
Note The target Direction
tion; starting
speed) position (spec- Accelera-
ified number tion rate
The number of of pulses) can
pulses can be Decelera-
be changed tion rate
changed dur- during posi-
ing position- Target fre-
tioning.
ing. quency
Starting fre-
quency

CP1E CPU Unit Software Users Manual(W480) 14-55


14 Pulse Outputs

*1 Triangular Control
If the specified number of pulses is less than the number required just to reach the target frequency and return
to zero, the function will automatically reduce the acceleration/deceleration time and perform triangular control
(acceleration and deceleration only.) An error will not occur.

Pulse frequency Specified number of pulses Pulse frequency


(Specified with PULS) Specified number of pulses
(Specified with PLS2)
Target
frequency
Target
frequency

Time Time

Execution of ACC Execution of PLS2

Changing Settings
Example Procedure
Operation Frequency changes Description
application Instruction Settings
Change Changing Number of pulses SPED can be exe- PULS Number of
Specified number of specified with PULS
speed in the speed in Pulse frequency
pulses (Specified with does not change.
cuted during posi- pulses
one step one step New target frequency PULS.) tioning to change Relative or
SPED
during oper- Target frequency (raise or lower) the absolute
(Independent)
ation pulse output fre- pulse speci-
quency in one step. fication
Time
The target position SPED Port
Execution of SPED
(independent mode) (specified number (Independent)
SPED (independent mode) Pulse +
executed again to change the of pulses) is not
Direction
target frequency. (The target
position is not changed.)
changed.
Indepen-
dent
Target fre-
quency
Change Changing Number of pulses ACC can be exe- PULS Number of
specified with PULS
speed the target Pulse frequency
Specified number of
pulses (Specified does not change. cuted during posi- pulses
smoothly speed (fre- with PULS.) tioning to change Relative or
New target frequency ACC
(with quency) the acceleration/ absolute
Target frequency
Acceleration/ (Independent)
accelera- during posi- deceleration rate deceleration rate pulse speci-
tion rate = tioning and target fre- fication
Time
decelera- (accelera- quency. ACC Port
Execution of ACC
tion rate) tion rate = (independent mode) The target position (Independent)
Pulse +
decelera- ACC (independent mode) executed
(specified number
again to change the target frequency. Direction
tion rate) (The target position is not changed,
of pulses) is not
but the acceleration/deceleration rate
Indepen-
is changed.)
changed.
dent
Accelera-
tion/decel-
eration rate
Target fre-
quency

14-56 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

Example Procedure
Operation Frequency changes Description
application Instruction Settings
Change Changing Pulse frequency Specified number of pulses PLS2 can be exe- PULS Number of
(Specified with PULS.)
speed the target New target frequency cuted during posi- pulses
smoothly speed (fre- Target frequency tioning to change Relative or
Acceleration/ ACC
(with quency) deceleration the acceleration absolute
rate (Independent)
unequal during posi- rate, deceleration pulse speci-
accelera- tioning
Time
rate, and target fre- fication
Execution of ACC
tion and (different (independent mode) quency. PLS2 Port
PLS2 executed to change the target
decelera- accelera- frequency and acceleration/deceleration
Note To prevent PLS2 Pulse +
tion rates) tion and rates.(The target position is not

decelera-
changed. The original target position is
specified again.)
the target Direction
tion rates) position from PLS2 Accelera-
being tion rate
changed

14-10 Pulse Output Details


Decelera-
intentionally, tion rate
the original
Target fre-
target posi-
quency
tion must be
specified in Starting fre-
absolute quency
coordinates.
Change Change the Pulse frequency Number of pulses
PLS2 can be exe- PULS Number of
target target posi- Secified number
changed with PLS2. cuted during posi- pulses
position tion during of pulses
tioning to change Relative or
Target frequency Acceleration/ ACC
deceleration
rate
the target position
(Independent) absolute 14
(number of pulses). pulse speci-
Time
fication
Execution of PLS2 Note When the tar-

14-10-2 Independent Mode (Positioning)


PLS2 Port
PLS2 executed to change the target get position
position.(The target frequency and a
cceleration/deceleration rates are cannot be Pulse +
not changed.)
changed Direction
without main- Accelera-
taining the tion rate
same speed Decelera-
range, an tion rate
error will
Target fre-
occur and the
quency
original oper-
ation will con- Starting fre-
tinue to the quency
original tar-
get position.

CP1E CPU Unit Software Users Manual(W480) 14-57


14 Pulse Outputs

Example Procedure
Operation applica- Frequency changes Description Instruc-
tion Settings
tion
Change Change PLS2 can be executed PULS Number of
Number of pulses
target posi- the target Pulse frequency Specified number changed with PLS2. during positioning to pulses
of pulses
tion and position New target frequency change the target position Relative or
ACC
speed and target Target frequency (number of pulses), absolute
Acceleration/ (Indepen-
smoothly speed (fre- deceleration acceleration rate, decel- pulse spec-
rate dent)
quency) eration rate, and target ification
during
Time
frequency.
Execution of PLS2 Port
positioning PLS2
PLS2 executed to change the target Note When the settings Pulse +
(multiple position, target frequency, and
acceleration/deceleration rates cannot be changed Direction
start func-
tion) without maintaining Accelera-
the same speed tion rate
range, an error will Decelera-
occur and the origi- tion rate
nal operation will
Target fre-
continue to the orig-
quency
inal target position.
Starting
frequency
Change Pulse frequency Number of pulses specified
PLS2 can be executed PLS2 Number of
by PLS2 #N.
the accel- Acceleration/
deceleration rate n during positioning (accel- pulses
eration and New target frequency Acceleration/ eration or deceleration) to Accelera-
deceleration rate 3
Target frequency Acceleration/ PLS2
decelera- deceleration rate 2 change the acceleration tion rate
Acceleration/
tion rates deceleration
rate 1
rate or deceleration rate. Decelera-
during Time
tion rate
positioning Execution of PLS2 Execution of PLS2 #N
Execution of PLS2
(multiple Execution of PLS2
start func-
tion)
Change Change Pulse frequency
PLS2 can be executed PULS Number of
direction the direc- Secified number Change of direction at the
during positioning with pulses
tion during of pulses specified deceleration rate absolute pulse specifica- Absolute
Target ACC
positioning frequency
Number of pulses (position) tion to change to absolute pulse spec-
(Indepen-
changed by PLS2
pulses and reverse direc- ification
Time dent)
tion. Port
Execution
of PLS2

Execution of PLS2 Pulse +
PLS2
Direction
PLS2 Accelera-
tion rate
PLS2 Decelera-
tion rate
Target fre-
quency
Starting
frequency
Change Not supported.
pulse out-
put method

14-58 CP1E CPU Unit Software Users Manual(W480)


14 Pulse Outputs

Stopping a Pulse Output


Example Procedure
Operation Frequency changes Description
application Instruction Settings
Stop pulse Immediate Pulse frequency
Stops the pulse output immedi- PULS Stop pulse
output stop ately and clears the number of output
(Number of Present output pulses setting.
frequency ACC or SPED
pulses set-
(Independent)
ting is not
reserved.) Time

Execution Execution INI
of SPED of INI
PLS2

14-10 Pulse Output Details



INI
Stop pulse Immediate Pulse frequency
Stops the pulse output immedi- PULS Port
output stop ately and clears the number of Indepen-
(Number of Present output pulses setting. dent
frequency SPED
pulses set-
(Independent) Target fre-
ting is not quency = 0
preserved.) Time

Execution Execution SPED
of SPED of SPED

14
Stop sloped Decelerate Pulse frequency Decelerates the pulse output PULS Port
pulse out- to a stop Present
to a stop. Indepen-
Original acceleration/

14-10-2 Independent Mode (Positioning)


put frequency deceleration rate dent
Note ACC started the opera- ACC or SPED
smoothly.
tion, the original acceler- (Independent) Target fre-
(Number of quency = 0
pulses set-
Target
frequency=0
Time ation/
ting is not Execution of ACC deceleration rate will
ACC
preserved.) remain in effect.
(Independent)
If SPED started the oper-
ation, the accelera- PLS2
tion/deceleration rate will
be invalid and the pulse ACC
output will stop immedi- (Independent)
ately.

CP1E CPU Unit Software Users Manual(W480) 14-59


14 Pulse Outputs

Switching from Continuous Mode (Speed Control) to Independent


Mode (Positioning)
Example Procedure
Frequency changes Description
application Instruction Settings
Change Outputs the number of pulses PLS2 can be executed ACC Port
from speed specified in PLS2 (Both relative and during a speed control (Continuous) Acceleration
absolute pulse specification can be
control to used.) operation started with rate
Pulse frequency
fixed dis- ACC to change to position- Deceleration
PLS2
tance posi- Target ing operation. rate
frequency
tioning
Note An error will occur if Target fre-
during
a constant speed quency
operation Time

Execution of ACC
cannot be achieved Number of
(continuous) after switching the pulses
Execution of PLS2
mode. If this hap-
pens, the instruction Note The start-
Fixed dis- ing fre-
Pulse frequency execution will be
tance feed quency is
ignored and the pre-
interrupt Present ignored.
frequency vious operation will
be continued.
Time

Execution of ACC
(continuous)
Execution of PLS2 with the following settings
 Number of pulses = number of pulses until stop
 Relative pulse specification
 Target frequency = present frequency
 Acceleration rate = Not 0
 Deceleration rate = target deceleration rate

14-60 CP1E CPU Unit Software Users Manual(W480)


PWM Outputs
This section describes the variable-duty-factor pulse outputs.

15-1 Variable-duty-factor Pulse Outputs (PWM Outputs) . . . . . . . . . . . . . . . . . 15-2


15-1-1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15-2

15

CP1E CPU Unit Software Users Manual(W480) 15-1


15 PWM Outputs

15-1 Variable-duty-factor Pulse Outputs


(PWM Outputs)
PWM outputs can be used only with the CP1E N-type CPU Unit.

15-1-1 Overview
A PWM (Pulse Width Modulation) pulse can be output with a specified duty factor. The duty factor is the
ratio of the pulses ON time and OFF time in one pulse cycle. Use the PWM instruction to generate vari-
able-duty-factor pulses from a built-in output. The duty factor can be changed during pulse output.
Application example:
Controlling temperature on a time-proportional basis using the variable-duty-factor output.
Controlling the brightness of lighting.

Built-in output

Variable-duty-factor output

100% Period is determined


by frequency
15%

Duty factor:15%

50%

Duty factor:50%

75%

Duty factor:75%

Specifications
Item Specification
Duty factor 0.0% to 100.0% in 0.1% increments
(Duty factor accuracy is +1%/-0% at 10 kHz, +5%/-0%
at 10 to 32 kHz .)
Frequency 2.0 Hz to 6,553.5 Hz (Set in 0.1-Hz increments.)*
2 Hz to 32,000 Hz (Set in 1-Hz increments.)*
Output mode Continuous mode
Instruction Pulse with variable duty factor (PWM)

* The frequency can be set up to 6553.5 Hz in the PWM instruction, but the duty factor accuracy declines signifi-
cantly at high frequencies because of limitations in the output circuit at high frequencies.

15-2 CP1E CPU Unit Software Users Manual(W480)


15 PWM Outputs

Flow of Processing
Setting pulse output port, Terminal 01 on terminal block 100CH is used for PWM
1 assigning pulse output terminals, output 0.
and wiring.

15-1 Variable-duty-factor Pulse Outputs (PWM Outputs)


2 Ladder Cyclic task,
The PWM instruction is used to control PWM outputs.
PWM outputs are stopped with the INI instruction.
programming interrupt task.

Pulse Output Port Number and Pulse Output Terminals


The following terminals can be used for pulse outputs according to the pulse output method.
Output terminal block Other functions that cannot be used at the same time
Specifications made
Terminal Terminal Pulse output method
with PWM instruction Normal output
block label number Pulse + direction
CIO 100 00 Pulse output 0, pulse Normal output 0
01 PWM output 0 Pulse output 1, pulse Normal output 1
02 Pulse output 0, direction Normal output 2
03 Pulse output 1, direction Normal output 3

Ladder Program Example with PWM Outputs 15


z Specifications and Operation

15-1-1 Overview
When the start input (CIO 0.00) turns ON in this example, pulses with a duty factor of 40% at a fre-
quency of 2,000 Hz are output from PWM output 0. When the stop input (CIO 0.01) turns ON, PWM
output 0 is stopped.

Frequency: Duty factor:


2,000 Hz, 500 s 40%, 200 s
Start input (CIO 0.00)

Stop input (CIO 0.01)

z Instructions Used
PWM
INI

z Preparations
PLC Setup
There are no settings that need to be made in the PLC Setup.
DM Area Settings
PWM Operand Settings (F and D)

CP1E CPU Unit Software Users Manual(W480) 15-3


15 PWM Outputs

Setting Operand Data


Frequency: 2,000 Hz D0 #4E20
Duty factor: 40% D1 #0190

z Ladder Diagram

0.00
@PWM
Start input #1000 PWM output 0 (Duty factor in increments of 0.1%, Frequency in increments of 0.1 Hz)
D0 Frequency setting
D1 Duty factor setting
0.01
@INI
Stop input #1000 PWM output 0
#0003 Stops pulse output
D10 Not used.

END(001)

15-4 CP1E CPU Unit Software Users Manual(W480)


Serial Communications
This section describes communications with Programmable Terminals (PTs) without
using communications programming, no-protocol communications with general compo-
nents, and connections with a Modbus-RTU Easy Master, Serial PLC Link, and host
computer.

16-1 Serial Communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-3


16-1-1 Types of CPU Units and Serial Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-3
16-1-2 Overview of Serial Communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-4
16-1-3 Built-in RS-232C Port for N-type CPU Units . . . . . . . . . . . . . . . . . . . . . . . . . 16-5
16-1-4 Optional Serial Communications Board for N-type CPU Units
with 30 or 40 I/O Points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-6
16
16-2 Wiring for Serial Communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-9
16-2-1 Recommended RS-232C Wiring Example . . . . . . . . . . . . . . . . . . . . . . . . . . 16-9
16-2-2 Recommended RS-422A/485 Wiring Examples . . . . . . . . . . . . . . . . . . . . . 16-10
16-2-3 Converting the Built-in RS-232C Port to RS-422A/485 . . . . . . . . . . . . . . . . 16-11
16-2-4 Reducing Electrical Noise for External Wiring . . . . . . . . . . . . . . . . . . . . . . . 16-14
16-3 Program-free Communications with Programmable Terminals . . . . . . 16-15
16-3-1 OVERVIEW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-15
16-3-2 Flow of Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-16
16-3-3 PLC Setup and PT System Menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-16
16-3-4 Wiring Examples for PTs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-17
16-4 No-protocol Communications with General Components . . . . . . . . . . . 16-19
16-4-1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-19
16-4-2 Flow of Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-20
16-4-3 PLC Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-20
16-4-4 Device Wiring Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-21
16-4-5 Related Auxiliary Area Bits and Words . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-23
16-5 Modbus-RTU Easy Master Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-24
16-5-1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-24
16-5-2 Flow of Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-24
16-5-3 DM Fixed Allocation Words for the Modbus-RTU Easy Master . . . . . . . . . . 16-25
16-5-4 Programming Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-27
16-6 Serial PLC Links . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-33
16-6-1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-33
16-6-2 Flow of Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-34

CP1E CPU Unit Software Users Manual(W480) 16-1


16 Serial Communications

16-6-3 PLC Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-34


16-6-4 Wiring Example for PLCs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-35
16-6-5 Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-37
16-6-6 Example Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-42
16-7 Connecting the Host Computer (Not Including Support Software) . . . . 16-44
16-7-1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-44
16-7-2 Flow of Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16-44

16-2 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

16-1 Serial Communications


Serial communications can be used only with the CP1E N-type CPU Unit.

16-1-1 Types of CPU Units and Serial Ports

z N-type CPU Unit


CPU Units with 20 I/O Points have one built-in RS-232C port. There are no option slots.
CPU Units with 30 or 40 I/O Points have one built-in RS-232C port and one option slot. An
RS-232C or RS-422A/485 Option Board can be mounted for serial communications.

z E-type CPU Unit


There is no serial port.
Standard built-in RS-232C port
Connected devices Connected devices

NS-series PT or NP-series PT NS-series PT or NP-series PT

16-1 Serial Communications


1:N NT Link
1:N NT Link

CP1E N-type CPU with 20


CPU Unit General component
General component I/O Points

One Option Board for serial communications (CP1W-


No-protocol
CIF01 RS-232C Option Board, CP1W-CIF11 RS- communications
No-protocol
communications 422A/485 Option Board, or CP1W-CIF12 RS-
422A/485 Option Board) can be mounted in the
option slot.
Inverter
Inverter
Standard built-in RS-232C port
16
Modbus-RTU Easy Modbus-RTU Easy
Master communications Master communications

16-1-1 Types of CPU Units and Serial Ports


CP-series PLC
or CJ1M PLC CP-series PLC or CJ1M PLC

Serial PLC Links* CPU Unit with 30 or 40 I/O Points


CP1E N-type Serial PLC Links*
CPU Unit

Host computer Host computer (A Programming


(A Programming Device is not required.) Device is not required.)

Host Link Host Link

* Serial PLC Links cannot be used


on two ports at the same time.

CP1E CPU Unit Software Users Manual(W480) 16-3


16 Serial Communications

16-1-2 Overview of Serial Communications


The CP1E CPU Units support the following types of serial communications.
Communications Built-in Optional
Connected devices Description
protocol RS-232C serial port
Programmable Terminal Data can be exchanged with 1:N NT Links OK OK
PTs without using a communi- (Host Link is also
NS/NP-series PT
cations program in the CPU supported.)
Unit.

Note Only one PT can be con-


RS-232C nected when using a 1:N
NT Link
NT Link. It is not possible
CP1E to connect two PTs.

General component Communicates with general No-protocol OK OK


devices, such as barcode communications
readers, with an RS-232C or
CP1E
RS-422A/485 port without a
command-response format.
RS-232C or RS-422A/485
The TXD and RXD instructions
are executed in the ladder pro-
gram in the CPU Unit to trans-
mit data from the transmission
General device with
port or read data in the recep-
serial communications tion port.
Modbus-RTU slave devices, such as invert- Data can be easily exchanged Modbus-RTU Easy OK OK
ers (Modbus-RTU Easy Master) with general devices that sup- Master Function
port Modbus-RTU slave func-
tionality (such as inverters)
CP1E
and are equipped with an RS-
RS-422A/485 Option Board
232C port or RS-422A/485
RS-232C or RS-422A/485 port.

Inverter

Data links between CPU Units Data links can be created for Serial PLC Links OK OK
up to nine CP-series or CJ1M
CPU Units, including one Poll-
CP1E CPU Unit Polling Unit
RS-422A/485 Option Board
ing Unit and up to eight Polled
RS-422A/485
Units. Up to 10 words can be
Shared data shared per Unit.
PTs set for 1:N NT Links can
also be included as Polled
Units in the same network.

CP1E CPU Unit Polled Unit CP1L CPU Unit Polled Unit Note A PT cannot be included
in the Serial PLC Links.

16-4 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

Communications Built-in Optional


Connected devices Description
protocol RS-232C serial port
Host computers PLC data can be read by the Host Link OK OK
host computer or written to the
PLC from the computer. The
Computer host computer sends a Host
(Not including the CX-Programmer and other
Support Software.)
Link command (C Mode) or a
FINS command to the CPU
RS-232C Unit to read/write I/O memory,
Host Link
change the operating mode, or
to force-set/reset bits in the
CPU Unit.
Note Connecting to the CX-
Programmer is not possi-
ble with this protocol.
Use the USB port.

16-1-3 Built-in RS-232C Port for N-type CPU Units

16-1 Serial Communications


z RS-232C Connector

16

16-1-3 Built-in RS-232C Port for N-type CPU Units


Signal
5 1 Pin Abbr. Signal name
direction
1 FG Frame ground
2 SD(TXD) Send data Output
9 6 3 RD(RXD) Receive data Input
4 RS(RTS) Request to send Output
5 CS(CTS) Clear to send Input
6 5V Power supply
7 DR(DSR) Data set ready Input
8 ER(DTR) Data terminal ready Output
9 SG(0V) Signal ground
Connector FG Frame Ground
hood

CP1E CPU Unit Software Users Manual(W480) 16-5


16 Serial Communications

16-1-4 Optional Serial Communications Board for N-type CPU Units with
30 or 40 I/O Points
The Option Board can be mounted in the option slot of a CP1E N-type CPU Unit with 30 or 40 I/O
Points.

CP1E N-type CPU Unit


with 30 or 40 I/O Points

CP1W-CIF01 CP1W-CIF11/12
RS-232C RS-422A/485
Option Board Option Board

Maximum trans-
Model number Port Connection method
mission distance
CP1W-CIF01 One RS-232C port 15m Connector (D-sub, 9 pin female)
CP1W-CIF11 One RS-422A/485 port 50m Terminal block (using ferrules)
(not isolated)
CP1W-CIF12 One RS-422A/485 port 500m Terminal block (using ferrules)
(isolated)

When mounting an Option Board, first remove the slot cover. Grasp both of the covers up/down lock
levers at the same time to unlock the cover, and then pull the cover out.
Then to mount the Option Board, check the alignment and firmly press it in until it snaps into place.

Precautions for Correct Use


Always turn OFF the power supply to the PLC before mounting or removing an Option Board.

CP1W-CIF01 RS-232C Option Board

Front Back
Communications
Status Indicator
CPU Unit Connector
COMM

RS-232C Connector

16-6 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

z RS-232C Connector
Signal
5 1 Pin Abbr. Signal name
direction
1 FG Frame ground
2 SD(TXD) Send data Output
9 6 3 RD(RXD) Receive data Input
4 RS(RTS) Request to send Output
5 CS(CTS) Clear to send Input
6 5V Power supply
7 DR(DSR) Data set ready Input
8 ER(DTR) Data terminal ready Output
9 SG(0V) Signal ground
Connector FG Frame ground
hood

CP1W-CIF11/CIF12 RS-422A/485 Option Board

16-1 Serial Communications


Front Back
LED Communications
Status Indicator
CPU Unit Connector
COMM

RDA- RDB+ SDA- SDB+ FG


DIP Switch for
Operation Settings

RS-422A/485 Connector
16
z RS-422A/485 Terminal Block

16-1-4 Optional Serial Communications Board for N-type


Tighten the terminal block screws to

CPU Units with 30 or 40 I/O Points


a torque of 0.28 Nm.
RDA- FG

RDB+ SDA- SDB+

CP1E CPU Unit Software Users Manual(W480) 16-7


16 Serial Communications

z DIP Switch for Operation Settings


Pin Settings
O
N 1 ON ON (both ends) Terminating resistance selection
OFF None
1
2
3
4
5
6
2 ON 2-wire 2-wire or 4-wire selection*1
OFF 4-wire
3 ON 2-wire 2-wire or 4-wire selection*1
OFF 4-wire
4 Not used.
5 ON RS control enabled RS control selection for RD*2
OFF RS control disabled (Data
always received.)
6 ON RS control enabled RS control selection for SD*3
OFF RS control disabled (Data
always received.)

*1 Set both pins 2 and 3 to either ON (2-wire) or OFF (4-wire).


*2 To disable the echo-back function, set pin 5 to ON (RS control enabled).
*3 When connecting to a device on the N side in a 1: N connection with the 4-wire method, set pin 6 to ON (RS
control enabled).
Also, when connecting by the 2-wire method, set pin 6 to ON (RS control enabled).

16-8 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

16-2 Wiring for Serial Communications


Serial communications can be used only with the CP1E N-type CPU Unit.

16-2-1 Recommended RS-232C Wiring Example

Recommended RS-232C Wiring Examples


We recommend the following wiring methods for RS-232C, especially in environment prone to noise.

1 Always use shielded twisted-pair cables as communications cables.


Recommended RS-232C Cables
Model Manufacturer

16-2 Wiring for Serial Communications


UL2464 AWG285P IFS-RVV-SB (UL product) Fujikura Ltd.
AWG285P IFVV-SB (non-UL product)
UL2464-SB (MA) 5P28AWG (7/0.127) (UL product) Hitachi Cable, Ltd.
CO-MA-VV-SB 5P28AWG (7/0.127) (non-UL product)

2 Combine signal wires and SG (signal ground) wires in a twisted-pair cable. At the same time,
bundle the SG wires to the connectors on Option Board and the remote device.

3 Connect the shield of the communications cable to the hood (FG) of the RS-232C connector on
the Option Board. At the same time, ground the ground (GR) terminal of the CPU Unit to 100
or less.

16
A connection example is shown below.
Example: Twisted-pair Cable Connecting SD-RD, RD-SD, and SG-SG Terminals in Host Link Mode

16-2-1 Recommended RS-232C Wiring Example


CPU Unit DOS/V computer
Signal Pin Pin Signal

FG 1 1 CD SG signal wires
SD 2 2 RD
RD 3 3 SD RS-232C
RS-232C
RS 4 4 ER interface Bundle the SG wires
interface CS 5 5 SG
5V 6 6 DR Aluminum foil
DR 7 7 RS
ER 8 8 CS
SG 9 9 CI
D-sub, 9-pin connector (male) D-sub, 9-pin connector (female) XM2S-0911-E

The following cables can be used for this connection.


Length Model
2m XW2Z-200S-CV
5m XW2Z-500S-CV

Note The hood (FG) is internally connected to the ground terminal (GR) on the CPU Unit.
Therefore, FG is grounded by grounding the power supply ground terminal (GR). Although there is conduc-
tivity between the hood (FG) and pin 1 (FG), connect the shield to both the hood and pin 1 to reduce the con-
tact resistance between the shield and FG and thus provide better noise resistance.

CP1E CPU Unit Software Users Manual(W480) 16-9


16 Serial Communications

Power supply ground terminal

Ground to RS-232C Option Board


100 or less

Refer to A-4 Wiring for Serial Communications in the CP1E Hardware Users Manual (Cat. No.
W479) for connector wiring methods.

16-2-2 Recommended RS-422A/485 Wiring Examples


Use the following wiring methods for RS-422A/485 to maintain transmission quality.

1 Use shielded twisted-pair cables as communications cables.


Recommended RS-422A/485 Cables
Model Manufacturer
CO-HC-ESV-3P7/0.2 Hirakawa Hewtech Corp.

2 Connect the shield of the communications cable to the FG terminal on the RS-422A/485 Option
Board. Also ground the ground (GR) terminal of the CPU Unit to 100 or less.

Precautions for Correct Use


Always ground the shield only at the RS-422A/485 Option Board end. Grounding both ends of
the shield may damage the device due to the potential difference between the ground terminals.

Connection examples are shown below.

z 2-Wire and 4-Wire Connections


The transmission circuits for 2-wire and 4-wire connections are different, as shown in the following
diagram.

Example of 4-Wire Example of 2-Wire


Connections Connections

2/4-wire switch 2/4-wire switch


(DPDT) Other Unit Other Unit (DPDT) Other Unit Other Unit
Option Board Option Board Not connected

Precautions for Correct Use


Use the same type of transmission circuit (2-wire or 4-wire) for all nodes.
Do not use 4-wire connections when the 2/4-wire switch on the Board is set to 2-wire.

16-10 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

z Wiring Example: 1:1 Connections


Two-wire Connections
CP1E N-type CPU Unit
RS-422A/485 Option Board Remote device

Pin Signal Signal

3 SDA- A()
4 SDB+ B(+)
1 RDA- FG
2 RDB+
5 FG Shield

Four-wire Connections
CP1E N-type CPU Unit
RS-422A/485 Option Board Remote device

Pin Signal Signal


3 SDA- RDA
4 SDB+ RDB
1 RDA- SDA
2 RDB+ SDB

16-2 Wiring for Serial Communications


5 FG FG
Shield

16-2-3 Converting the Built-in RS-232C Port to RS-422A/485


Use the following Conveter or Link Adapter to convert a built-in RS-232C port to an RS-422A port for a
CP1E N-type CPU Unit.
CJ1W-CIF11 RS-422A Converter: Maximum distance 50 m, convertible to RS-422A or RS-485.
NT-AL001 RS-232C/RS-422A Link Adapter: Maximum distance 500 m, convertible to RS-422A only.

CJ1W-CIF11 RS-422A Converter


16
The CJ1W-CIF11 RS-422A Converter is used to convert an RS-232C port to RS-422A/485. It is directly
connected to the built-in RS-232C port of the CP1E CPU Unit. The Conveter is not isolated, so the

16-2-3 Converting the Built-in RS-232C Port to RS-


maximum distance for RS-422A/485 is 50 m.

z Electrical Specifications

422A/485
RS-422A/485 Terminal Block
Signal
RDA-
RDB+
RDA- RDB+ SDA- SDB+ FG
SDA-
SDB+
RDA- RDB+ SDA- SDB+ FG
FG

CP1E CPU Unit Software Users Manual(W480) 16-11


16 Serial Communications

RS-232C Connector
Pin Signal
RS-232C port Connector pin
arrangement
1 FG
1 FG
+5V 6 2 RD
2 RD
7
8
3 SD 3 SD
4 CS
SG(0V) 9
5 RS
4 CS
5 RS
6 +5V
7,8 NC
9 SG(0V)
Hood NC (See note.)

Note The hood and the connector hood to which it is connected will have the same electrical potential.

z DIP Switch for Operation Settings


Pin Settings ON OFF
1 Terminating resistance Terminating resistance Terminating resistance
selection connected (both ends of not connected
transmission path)
2 2-wire or 4-wire selection*1 2-wrire 4-wire
3 2-wire or 4-wire selection*1 2-wrire 4-wire
4 Not used.
5 RS control selection for RS control enabled RS control disabled
RD*2 (Data always received.)
6 RS control selection for RS control enabled RS control disabled
SD*3 (Data always sent.)

*1 Set both pins 2 and 3 to either ON (2-wire) or OFF (4-wire).


*2 To disable the echo-back function, set pin 5 to ON (RS control enabled).
*3 When connecting to a device on the N side in a 1: N connection with the 4-wire method, set pin 6 to ON (RS
control enabled). Also, when connecting by the 2-wire method, set pin 6 to ON (RS control enabled).

z Dimensions
5.8 38.8 18.2
34.0

16-12 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

NT-AL001 RS-232C/RS-422A Link Adapter


The NT-AL001 RS-232C/RS-422A Link Adapter is used to connect devices with RS-232C terminals
and devices with RS-422A terminals. A cable is used to connect the built-in RS-232C port of the CP1E
CPU Unit. The Link Adapter is isolated, so the maximum distance for RS-422A is 500 m.

z DIP Switch Setting


The NT-AL001 RS-232C/RS-422A Link Adapter has a DIP switch for setting RS-422A/485 commu-
nications conditions. When connecting the Serial Communications Option Board, refer to the DIP
switch settings shown in the following table.
Factory
Pin Function
setting
1 Not used. Always set this pin to ON. ON
2 Built-in terminating resistance setting ON

16-2 Wiring for Serial Communications


ON: Connects terminating resistance.
OFF: Disconnects terminating resistance.
3 2/4-wire setting OFF
4 2-wire: Set both pins to ON. OFF
4-wire: Set both pins to OFF.
5 Transmission mode*1 ON
6 Constant transmission: Set both pins to OFF. OFF
Transmission performed when CS signal in RS-232C interface is at high level:
Set pin 5 to OFF and pin 6 to ON.
Transmission performed when CS signal in RS-232C interface is at low level:
Set pin 5 to ON and pin 6 to OFF.

*1 When connecting to a CP-series CPU Unit, turn OFF pin 5 and turn ON pin 6.
16
z Application Example

16-2-3 Converting the Built-in RS-232C Port to RS-


CP1E N-type CPU Unit
Built-in RS-232C Port or
NT-AL001 Remote device

422A/485
RS-232C Option Board
RS-422
Pin Signal RS-232C Pin Signal Signal Pin Signal
2 SD 3 RD SDA 4 RDA
3 RD 2 SD SDB 3 RDB
4 RS 4 RS RDA 6 SDA
5 CS 5 CS RDB 5 SDB
6 +5V 6 +5V GRD 1
7 DR 7 DR
8 ER 8 ER
9 SG 9 SG
Hood FG Hood FG Remote device
Shield
Signal
(See note)
RDA
RDB
SDA
SDB

FG

Note The following cables can be used for this connection.


Length Model
70cm XW2Z-070T-1
2m XW2Z-200T-1

It is recommended that one of these cables be used to connect the RS-232C port on the Option Board
to the NT-AL001 RS-232C/RS-422 Link Adapter.

CP1E CPU Unit Software Users Manual(W480) 16-13


16 Serial Communications

z Wiring for the Recommended Cables (XW2Z-070T-1 and XW2Z-200T-1)

Wiring with XW2Z-0T -1 (10 conductors)


SYSMAC PLC NT-AL001 end (inside NT-AL001)

Pin Signal Signal Pin


*Arrows indicate
1 FG Not used. 1 signal directions
2 SD RD 3
3 RD SD 2
4 RS RS 4
5 CS CS 5
Loopback
6 +5V +5V 6
7 DR DR 7
8 ER ER 8
Loopback
9 SG SG 9
Hood FG FG Hood
Shield

Precautions for Correct Use


Connecting this cable to other devices can damage them.
The XW2Z-0T-1 Connecting Cables for the NT-AL001 Link Adapter uses special wiring for
the DS and RS signals. Do not use these signals with other devices; they may be damaged.

Note The hood (FG) is internally connected to the ground terminal (GR) on the CPU Unit. There-
fore, FG is grounded by grounding the ground terminal (GR) on the power supply terminal
block.

Always turn ON the terminating resistance if the node is at the end of the RS-422A/485 transmission
path.

16-2-4 Reducing Electrical Noise for External Wiring


Observe the following precautions when wiring communications cables.
When multi-conductor signal cable is being used, avoid using I/O wires and other control wires in the
same cable.
If wiring racks are running in parallel, allow at least 300 mm between them.
Low-current cables

Communications
cables
300 mm min.
Control cables
PLC power supply
and general control
circuit wiring 300 mm min.
Power cables
Power lines

Ground to 100 or less.


If the I/O wiring and power cables must be placed in the same duct, they must be shielded from each
other using grounded steel sheet metal.

PLC power supply


and general control
Communications circuit wiring Power lines Steel sheet metal
cables

200 mm min.

Ground to 100 or less.

16-14 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

16-3 Program-free Communications with


Programmable Terminals
Programmable Terminal communications can be used only with the CP1E N-type CPU Unit.

16-3-1 OVERVIEW

16-3 Program-free Communications with Programmable Terminals


Communications without special communications programming is possible between a CP1E CPU Unit
and a Programmable Terminal (PT) by using the 1:N NT Link protocol. The CP1E CPU Unit and PT
must be connected 1:1. The serial communications mode is set to 1:N NT Link.
PT: NS, NP, or NT31/631 V3

RS-232C
1:N NT Link

CP1E N-type CPU Unit

Connectable Programmable Terminals (PTs)


High-speed NT Links (115,200 bps) can be used with NS-series, NP-series, or NT-series PTs.

Precautions for Correct Use


16
Communications are not possible for CP1E CPU Units using the 1:1 NT Link protocol.
More than one PT cannot be connected to a CP1E CPU Unit even if the 1:N NT Link protocol is

16-3-1 OVERVIEW
used. If more than one PT is connected, communications will be performed with only one of the
PTs. It cannot be predetermined with PT will be communicated with.

CP1E CPU Unit Software Users Manual(W480) 16-15


16 Serial Communications

16-3-2 Flow of Processing

CP1E CPU Unit PT (e.g. NS-series)

1 Select Serial Port 1 or Serial Port 2 in Create a project using the CX-
the PLC Setup of the CP1E CPU Unit Designer and select Serial Port A or
using the CX-Programmer. Set the CX-Designer
PLC Setup Serial Port B in the communications
serial communications mode to NT settings.
Link (1:N), set the baud rate, and set
the highest unit number to at least 1.

2 Transfer the PLC Setup.


Transfer screen data created
Transfer screen using the CX-Designer to the NS-
series PT.

3 Check the communications settings


NS-series PT in the NS-series PT on the Comm
System Menu Settings Tab Page in the system
menu.

4 Set the same communications settings in the CP1E CPU Units PLC Setup and in the NS-series PT.

5 Connect the CP1E CPU Unit and external devices using the RS-232C or RS-422A/485 ports.

16-3-3 PLC Setup and PT System Menu


Set the parameters in the PLC Setup and the PTs System Menu.

PLC Setup
Click the Serial Port 1 or Serial Port 2 Tab in the PLC Settings Dialog Box.

16-16 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

Serial Port 1 or Serial Port 2 Tab Page


Parameter Setting
Communica- Select the Custom Option and set the baud rate to 115,200 (same as the 1:N
tions Settings NT Link High-speed Mode). It is not necessary to change the format setting.
Mode Select NT Link (1:N).
NT/PC Link If only one NS-series PT (unit number 0) is connected, set this parameter to 1.
Max. In any other case, select the highest unit number (1 to 7) of the connected NS-
series PTs.

16-3 Program-free Communications with Programmable Terminals


PT System Menu
Set the PT as follows:
Example: NS-series PT

1 Select NT Links (1:N) from Serial Port A or Serial Port B on the Memory Switch Menu under the
System Menu on the PT.

2 Press the SET Touch Switch to set the baud rate to high speed. (A baud rate of 115,200 bps in
the PLC Setup is the same as setting high speed for the PT.)

Connection with Other Companys Display Devices


Select Host Link in the serial communications mode settings of the CP1E N-type CPU Unit and set all
other communications parameters to the same values as the other companys display device.

16-3-4 Wiring Examples for PTs


16
Connecting a PT and a PLC 1:1 with RS-232C Ports

16-3-4 Wiring Examples for PTs


Communications Mode: NT Link (1:N, N = 1 Unit only)
OMRON Cables with Connectors: XW2Z-200T-1: 2 m
XW2Z-500T-1: 5 m

CP1E N-type CPU Unit PT

Signal Pin Pin Signal

FG Hood Hood FG
FG 1 1
SD 2 2 SD
Built-in RD 3 3 RD RS-232C
RS-232C interface
RS 4 4 RS
port
CS 5 5 CS
5V 6 6 5V
DR 7 7
ER 8 8
SG 9 9 SG
D-sub, 9-pin connector (male) D-sub, 9-pin connector (male)

CP1E CPU Unit Software Users Manual(W480) 16-17


16 Serial Communications

Connecting PTs and a PLC 1:N with RS-422A/485 Port Using 4-wire,
RS-422A Communications
Communications mode: NT Link (1:N, N = 8 max.)
Note More than two NP-series PTs cannot be connected.

NS-series PT NS-series PT
CP1E N-type CPU Unit (Unit No. 0) (Unit No. 1)

NS-AL002 RS-422A NS-AL002 RS-422A


Conversion Unit Conversion Unit
CP1W-CIF11 or CP1W-CIF12
RS-422A/485 Option Board
1:N NT Link

z Wiring Example

NS-series PT NS-series PT
RS-422A/485 Option Board CP1E
(Unit No. 0) (Unit No. 1) NS-AL002
DIP switch for operation settings
DIP SW setting
SW1 Terminating resistance ON/OFF ON ON (RS/CS flow control) ON (RS/CS flow control) SW1 RS/CS control or always ON
SW2 2/4-wire selection switch OFF (4-wire connection) OFF (4-wire connection) OFF (4-wire connection) SW2 2/4-wire selection switch
SW3 2/4-wire selection switch OFF (4-wire connection) OFF (4-wire connection) OFF (4-wire connection) SW3 2/4-wire selection switch
SW4 Not used OFF OFF ON SW4 Terminating resistance ON/OFF
SW5 RD control OFF
SW6 SD control OFF
RDB+
RDB+

SDB+

RDB+
SDB+

SDB+
RDA-
RDA-

SDA-

RDA-
SDA-

SDA-
F6
F6

F6

Precautions for Correct Use


RS-485 ports with 2-wire connections are used for connections between NS-series or NP-series
PTs and OMRON Temperature Controllers. Do not use them for connections with PLCs. For a
PLC connection, use RS-422A ports with 4-wire connections.

16-18 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

16-4 No-protocol Communications with


General Components
Non-protocol communications can be used only with the CP1E N-type CPU Unit.

16-4-1 Overview

16-4 No-protocol Communications with General Components


CP1E CPU Units and general devices with serial communications ports can be used for no-protocol
communications.
No-protocol communications enable sending and receiving data using the TRANSMIT (TXD) and
RECEIVE (RXD) instructions without using a protocol and without data conversion (e.g., no retry pro-
cessing, data type conversion, or process branching based on received data).
The serial communications mode is set to RS-232C.

CP1E N-type CPU Unit

TXD or RXD

Sending/ RS-232C or RS422A/485


receiving data

16
General component
(e.g., barcode reader)

16-4-1 Overview
No-protocol communications are used to send data in one direction to or from general external devices
that have an RS-232C or RS-422A/485 port using TXD or RXD.
For example, simple (no-protocol) communications can be used to input data from a barcode reader or
output data to a printer.
The following table lists the no-protocol communication functions supported by CP1E PLCs.
Max. Frame format
Communica- Transfer
Method amount of Other functions
tions direction Start code End code
data
Data PLC Execution 256 bytes Yes: 00 to FF Yes: 00 to FF Send delay time (delay
transmission External of TXD in hex hex or CR+LF between TXD execution and
device the ladder No: None No: None (The sending data from specified
program amount of data port): 0 to 99,990 ms (unit: 10
to receive is ms)
specified Controlling RS and ER signals
between 1 and
Data External Execution 256 bytes Monitoring CS and DR signals
256 bytes when
reception device of RXD in
no end code is
PLC the ladder
specified.)
program

CP1E CPU Unit Software Users Manual(W480) 16-19


16 Serial Communications

16-4-2 Flow of Processing

1 Wiring communications
Connect the CP1E CPU Unit and external device using
RS-232C or RS-422A/485 ports.

2 PLC Setup
Select Serial Port 1 or Serial Port 2 in the PLC Setup
and transfer the PLC Setup from the CX-Programmer to
the CP1E CPU Unit.
(Set the serial communications mode to RS-232C, and
set the communications conditions.)

3 Ladder Cyclic tasks


PLC to External device: Execute the TXD instruction.
External device to PLC: Execute the RXD instruction.
Program
Interrupt tasks

16-4-3 PLC Setup


Click the Serial Port 1 or Serial Port 2 Tab in the PLC Settings Dialog Box.

Serial Port 1 or Serial Port 2 Tab Page


Parameter Setting
Communications Set the communications settings to the same values as the connected device.
Settings If the connected device is set to 9,600 bps, two stop bits, and even parity, select the
Custom Option, set the baud rate to 9,600 and format to 7,2,E.
Mode Select RS-232C.
End Code To specify the number of bytes of received data, select Received bytes and set the
number of bytes from 1 to 256.
To use CR+LF as the end code, set CR+LF.
To set the end code to any value between 00 to FF hex, set a value between
0x0000 and 0x00FF.

16-20 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

16-4-4 Device Wiring Examples

Connecting Devices with Built-in RS-232C Communications 1:1

z Connecting RS-232C Ports 1:1


Connections to E5CK Controller

16-4 No-protocol Communications with General Components


CP1E N-type CPU Unit
Built-in RS-232C Port or
RS-232C Option Board OMRON E5CK Controller
Signal Pin RS-232C Shield RS-232C: Terminal
FG 1 Terminal No. Signal
SD 2 13 SD
RD 3 14 RD
RS 4 1 SG
CS 5
DR 7
ER 8
SG 9
D-sub, 9-pin connector (male)

z Connecting RS-422A/485 Ports 1:N with 2-wire Connections


Device supporting
RS-422A/485
communications
CP1E N-type CPU Unit (2-wire)

Signal Pin Signal RS-422A


RS- /485
422A/485 SDA- 3 A(-) interface
Option SDB+ 4 B(+)
Board RDA- 1
RDB+ 2
FG 5
Terminal Device supporting
RS-422A/485 16
communications
(2-wire)

Signal RS-422A

16-4-4 Device Wiring Examples


/485
A(-) interface
B(+)

CP1E CPU Unit Software Users Manual(W480) 16-21


16 Serial Communications

z Connecting RS-422A/485 Ports 1:N with 4-wire Connections


Device supporting RS-
CP1E N-type CPU Unit 422A/485 Communications

Signal Pin Signal


RS- SDA- 3 RDA RS-422A/485
422A/485
SDB+ 4 RDB interface
Option
Board RDA- 1
SDA
RDB+ 2
FG 5 SDB
4-wire Terminal
Terminating
Resistance ON

Device supporting
RS-422A/485
NT-AL001 Communications

Pin Signal Signal Pin Shield Signal


RS-232C
1 GRD NC 1 FG
2 SG SD 2 SD
3 SDB RD 3 RD
RS-232C
4 SDA RS 4 RS interface
5 RDB CS 5 CS
6 RDA 5V 6
7 CSB DR 7 DR
Shield
8 CSA ER 8 ER
SG 9 SG
RS-422 RS-232
Terminal D-sub, 9-pin (+)5V
connector (male) ()Power

DIP Switch Settings


Pin 1: ON
Pin 2: ON (terminating resistance)
Pin 3: OFF
Pin 4: OFF
Pin 5: OFF
Pin 6: ON

16-22 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

16-4-5 Related Auxiliary Area Bits and Words


Address Name Details
A392.04 Built-in RS-232C Port Turns ON when a communications error occurs at the built-in RS-232C
Communications port. (Disabled in NT link mode.)
Error Flag Turns ON when a timeout error, overrun error, framing error, parity error,
or BCC error occurs in Modbus-RTU Easy Master Mode.
A392.05 Built-in RS-232C Port Send ON when the built-in RS-232C port is able to send data in no-protocol

16-4 No-protocol Communications with General Components


Ready Flag mode.
(No-protocol mode)
A392.06 Built-in RS-232C Port ON when the RS-232C port has completed the reception in no-protocol
Reception mode.
Completed Flag When the number of bytes was specified: ON when the specified
(No-protocol mode) number of bytes is received.
When the end code was specified: ON when the end code is received or
256 bytes are received.
A392.07 Built-in RS-232C Port ON when a data overflow occurred during reception through the built-in
Reception RS-232C port in no-protocol mode.
Overflow Flag When the number of bytes was specified:
(No-protocol mode) ON when more data is received after the reception was completed but
before RXD was executed.
When the end code was specified:
ON when more data is received after the end code was received but
before RXD is executed.
ON when 257 bytes are received before the end code.
If a start code is specified, ON when the end code is received after the
start code is received.
A392.12 Serial Option Port ON when a communications error has occurred at the serial option port.
Communications (Not valid in NT Link mode.)
16
Error Flag ON when a timeout error, overrun error, framing error, parity error, or
BCC error occurs in Modbus-RTU Easy Master mode.

16-4-5 Related Auxiliary Area Bits and Words


A392.13 Serial Option Port Send ON when the serial option port is able to send data in no-protocol mode.
Ready Flag
(No-protocol Mode)
A392.14 Serial Option Port ON when the serial option port has completed the reception in
Reception Completed no-protocol mode.
When the number of bytes was specified: ON when the specified
Flag (No-protocol Mode)
number of bytes is received.
When the end code was specified: ON when the end code is received or
256 bytes are received.
A392.15 Serial Option Port ON when a data overflow occurred during reception through the serial
Reception Overflow Flag option port in no-protocol mode.
(No-protocol Mode)
A393.00 to Built-in RS-232C Port The corresponding bit will be ON when the built-in RS-232C port is com-
A393.07 PT Communications Flags municating with a PT in NT Link. Bits 0 to 7 correspond to units 0 to 7.
A393.00 to Built-in RS-232C Port Indicates (in binary) the number of bytes of data received when the
A393.15 Reception Counter built-in RS-232C port is in no-protocol mode.
(No-protocol Mode) The start code and end code are not included.
A394.00 to Serial Option Port Commu- The corresponding bit will be ON when the serial option port is
A394.07 nicating with PTF lags communicating with a PT in NT link mode.
Bits 0 to 7 correspond to units 0 to 7.
A394.00 to Serial Option Port Indicates (in binary) the number of bytes of data received when the
A394.15 Reception Counter serial option port is in no-protocol mode.
(No-protocol Mode) The start code and end code are not included.

CP1E CPU Unit Software Users Manual(W480) 16-23


16 Serial Communications

16-5 Modbus-RTU Easy Master Function


The Modbus-RTU Easy Master Function can be used only with the CP1E N-type CPU Unit.

16-5-1 Overview
Using the Modbus-RTU Easy Master enables easy control of Modbus-compatible slaves, such as
inverters, using serial communications. The serial communications mode is set to Modbus-RTU Easy
Master.

15 08 07 00
D1200 - - Slave address
D1201 - - Function code
D1202 Number of communications data bytes
Communications are easily achieved
D1203
by simply turning ON A641.00 after Communications data


setting the Modbus-RTU command in
the DM fixed allocation words.

Slave address Function code Communications data

Slave address Function code Communications data


Modbus-RTU
Modbus-RTU Master Execution
Bit for Port 1 A641.00
OMRON Inverters
3G3JX, 3G3MX, 3G3RX,
3G3JV, 3G3MV, or 3G3RV

CP1E N-type CPU Unit

Modbus-RTU commands can be sent simply by turning ON a software switch after setting the Modbus
slave address, function, and data in the DM fixed allocation words for the Modbus-RTU Easy Master.
The response when received is automatically stored in the DM fixed allocation words for the Modbus-
RTU Easy Master.

16-5-2 Flow of Processing

1 Wiring communications
Connect the CP1E CPU Unit and Modbus-RTU Slave
using RS-422A/485 ports.

2 PLC Setup
Select Serial Port 1 or Serial Port 2 in the PLC Setup and
transfer the PLC Setup from the CX-Programmer to the
CP1E CPU Unit. (Set the serial communications mode to
RS-232C, and set the communications conditions.)

3 Ladder Cyclic tasks


Set the Modbus-RTU frame in the DM Fixed Allocation
Words.
Program Turn ON the Modbus-RTU Master Execution Bit
Interrupt tasks
(A640.00 or A641.00).

16-24 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

16-5-3 DM Fixed Allocation Words for the Modbus-RTU Easy Master


DM fixed allocation words and Auxiliary Area words are allocated for the Modbus-RTU Easy Master
according to the CPU Unit type and connected port as shown below.
CP1E CPU Unit serial port DM fixed allocation words Auxiliary Area bits
CP1E N-type CPU Unit Built-in RS-232C port D01300 to D01399 A640.00 to A640.02
with 20 I/O Points
CP1E N-type CPU Unit Built-in RS-232C port D01200 to D01299 A641.00 to A641.02
with 30 or 40 I/O Points Serial option port D01300 to D01399 A640.00 to A640.02

z DM Fixed Allocation Words


Word
Serial option port of

16-5 Modbus-RTU Easy Master Function


Built-in CP1E N-type CPU
RS-232C Unit with 30 or 40
port of CP1E I/O Points Bits Contents
N-type CPU
Unit with 30 Built-in RS-232C
or 40 I/O port of CP1E N-type
Points CPU Unit with 20
I/O Points
D01200 D01300 00 to 07 Command Slave address (00 to F7 hex)
08 to 15 Reserved (Always 00 hex.)
D01201 D01301 00 to 07 Function code
08 to 15 Reserved (Always 00 hex.)
D01202 D01302 00 to 15 Number of communications data bytes (0000 to
005E hex)
D01203 to D01303 to D01349 00 to 15 Communications data (94 bytes maximum) 16
D01249
D01250 D01350 00 to 07 Response Slave address (00 to F7 hex)

16-5-3 DM Fixed Allocation Words for the Modbus-RTU


08 to 15 Reserved (Always 00 hex.)
D01251 D01351 00 to 07 Function code

Easy Master
08 to 15 Reserved
D01252 D01352 00 to 07 Error code
( See error codes in the following table. )
08 to 15 Reserved (Always 00 hex.)
D01253 D01352 00 to 15 Number of response bytes (0000 to 03EA hex)
D01254 to D01354 to D01399 00 to 15 Response data (92 bytes maximum)
D01299

CP1E CPU Unit Software Users Manual(W480) 16-25


16 Serial Communications

z Error Codes
Code Description Description
00 hex Normal end
01 hex Illegal address The slave address specified in the parameter is illegal (248 or
higher).
02 hex Illegal function code The function code specified in the parameter is illegal.
03 hex Data length overflow There are more than 94 data bytes.
04 hex Serial communications mode The Modbus-RTU Easy Master function was executed when the
error serial communications mode was not the Serial Gateway Mode.
80 hex Response timeout A response was not received from the server.
81 hex Parity error A parity error occurred.
82 hex Framing error A framing error occurred.
83 hex Overrun error An overrun error occurred.
84 hex CRC error A CRC error occurred.
85 hex Incorrect confirmation address The slave address in the response is different from the one in the
request.
86 hex Incorrect confirmation function The function code in the response is different from the one in the
code request.
87 hex Response size overflow The response frame is larger than the storage area (92 bytes).
88 hex Exception response An exception response was received from the slave.
89 hex Service being executed A service is already being executed (reception traffic congestion).
8A hex Execution canceled Executing the service has been canceled.
8F hex Other error Other FINS response code was received.

z Related Auxiliary Area Words and Bits


The Modbus-RTU command set in the DM fixed allocation words for the Modbus-RTU Easy Master
is automatically sent when the Modbus-RTU Master Execution Bit is turned ON. The results (normal
or error) will be given in corresponding flags.
Word Bit Port Contents
A640 02 Serial option port of CP1E Modbus-RTU Master Execution Error Flag
N-type CPU Unit with 30 or ON: Execution error.
40 I/O Points
OFF: Execution normal or still in progress.
Built-in RS-232C port of
01 CP1E N-type CPU Unit Modbus-RTU Master Execution Normal Flag
with 20 I/O Points ON: Execution normal.
OFF: Execution error or still in progress.
00 Modbus-RTU Master Execution Bit
Turned ON: Execution started
ON: Execution in progress.
OFF: Not executed or execution completed.
A641 02 Built-in RS-232C port of Modbus-RTU Master Execution Error Flag
CP1E N-type CPU Unit ON: Execution error.
with 30 or 40 I/O Points
OFF: Execution normal or still in progress
01 Modbus-RTU Master Execution Normal Flag
ON: Execution normal.
OFF: Execution error or still in progress.
00 Modbus-RTU Master Execution Bit
Turned ON: Execution started
ON: Execution in progress.
OFF: Not executed or execution completed.

16-26 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

16-5-4 Programming Examples


A bobbin winder on a spinning machine will be used in the following example.
The speed of the bobbin winder must be controlled as the thread is wound because the speed of the
thread is constant.

16-5 Modbus-RTU Easy Master Function


Constant thread speed

Fast rotation Slow rotation

Speed

Stopped

Contact A Contact B Contact C Contact Z

16
The target speed is changed according to inputs from multiple contacts. Acceleration and deceleration
are controlled using the acceleration and deceleration of an inverter.

16-5-4 Programming Examples


Wiring Examples
The CP1E and OMRON 3G3MV Inverter are connected using RS-485 for frequency and start/stop con-
trol.

CP1E N-type CPU Unit CP1W-CIF11/12


with 30 I/O Points
Symbol
Control circuit
terminal block
50 m max. (communications
terminals)

CP1W-CIF11/12
RS-422A/485 Option Board

CP1E CPU Unit Software Users Manual(W480) 16-27


16 Serial Communications

z CP1W-CIF11/12 Settings
Set the DIP switch as shown in the following table

(Back)

CPU Unit connector


DIP switch for operation settings

No. Setting ON / OFF Description


1 Terminating resistance selection ON Connects terminating resistance
2 2/4-wire selection ON 2-wire connections
3 2/4-wire selection ON 2-wire connections
4 OFF Always OFF
5 RS control for RD ON Enabled
6 RS control for SD ON Enabled

z 3G3MV Settings
Set the DIP switch as follows:
SW2, pin 1 : ON (terminating resistance connected) Terminating resistance for RS422/485
communications
Then, set the following parameters.

No. Name Setting Description


n003 RUN command selection 2 RS-422/485 communications is enabled.
n004 Frequency reference selection 6 Frequency reference through RS-422/RS-485
n019 Acceleration time 1 5.0 Acceleration time in seconds
n020 Deceleration time 1 5.0 Deceleration time in seconds
n151 RS-422/485 communications 1 Detect timeouts, detect fatal errors, and the Inverter
timeover detection selection decelerates to a stop using deceleration time 1 (default).
n152 RS-422/485 communications 1 Select the unit for communications of frequency
frequency reference/display unit references and frequency monitoring data. Unit: 0.01Hz
selection (default).
n153 RS-422/485 communications 1 Slave address (unit number), unit number 1
Slave address
n154 RS-422/485 baud rate selection 2 Communications baud rate: 9,600 bps (default)
n155 RS-422/485 parity selection 0 Even parity
n156 RS-422/485 send wait time 10 Sets the response wait time for request messages
received from the master. 10 ms (default).
n157 RS-422/485 RTS control selection 0 RTS control enabled (default)

16-28 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

z PLC Setup
Click the Serial Port 1 or Serial Port 2 Tab in the PLC Settings Dialog Box.

16-5 Modbus-RTU Easy Master Function


Serial Port 1 or Serial Port 2 Tab Page
Parameter Settings
Communications Set the Modbus communications settings to match those of the
Settings Inverter.
If the Inverter is set to 4,800 bps, one stop bit, and no parity, select
the Custom Option and set the baud rate to 4,800. 16
Set the format to 7,1,N.
Mode Select Modbus Easy Master.

16-5-4 Programming Examples


Response Set the default value of 0100 ms.
Monitoring Time

CP1E CPU Unit Software Users Manual(W480) 16-29


16 Serial Communications

z Programming Example

Stop operation when communications starts.


RUN command (0: Stop)
Frequency reference:00.00Hz

Contact A

RUN command (1: Start)


Frequency reference: 60.00Hz(1770 Hex)

Contact B
RUN command (1: Start)
Frequency reference: 55.00Hz(157C Hex)

Contact C

RUN command (1: Start)


Frequency reference: 50.00Hz(1388 Hex)

Contact Z
RUN command (0: Stop)
Frequency reference: 00.00Hz

Start and continue Modbus communications from


1 second after turning ON the power supply.

Modbus-RTU Master Execution Bit

Modbus-RTU Master Execution Normal Flag

16-30 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

z Flags for Modbus-RTU Easy Master for Serial Port 1)

A640.00 Execution Bit

A640.01 Execution Normal Flag

A640.02 Execution Error Flag

(A)Turn ON A640.00 (Execution Bit) to send command data stored starting at D1200. For details, refer
to DM Area Data on the next page.
Words
Bits Setting
Serial Port 1

16-5 Modbus-RTU Easy Master Function


D1200 00 to 07 Command Slave address (00 to F7 hex)
08 to 15 Reserved (Always 00 hex.)
D1201 00 to 07 Function code
08 to 15 Reserved (Always 00 hex.)
D1202 00 to 15 Number of communications data bytes (0000 to
005E hex)
D1203 to D1249 00 to 15 Communications data (94 bytes max.)

(B)When a command has been sent successfully, A640.01 (Execution Normal Flag) will turn ON, and
the response data will be stored starting from D1250.
Words
Serial Port 1
Bits Setting 16
D1250 00 to 07 Response Slave address (00 to F7 hex)

16-5-4 Programming Examples


08 to 15 Reserved (Always 00 hex.)
D1251 00 to 07 Function code
08 to 15 Reserved
D1252 00 to 07 Error code
08 to 15 Reserved (Always 00 hex.)
D1253 00 to 15 Number of response bytes (0000 to 03EA hex)
D1254 to D1299 00 to 15 Response data (92 bytes max.)

(C)If a communications error occurs, A640.02 (Execution Error Flag) will turn ON, and the error code
will be stored in D1252.

CP1E CPU Unit Software Users Manual(W480) 16-31


16 Serial Communications

z DM Area Data
DM Fixed Allocation Words for Modbus-RTU Easy Master
DM Area data in words D1201 to D1205 are set before the execution of the ladder program.
D1206 and D1207 do not need to be set. They are modified by MOV instructions, and are used to
change, start, and stop frequency references.

Serial Port 1: Command

Slave Function Communications Communications data: D1203 to D1249 (maximum)


Setting
address code data bytes 94 bytes (47 words) max.

Address

Value

Data for next reigister


(e.g. set 60.0 Hz (0258
(Hex) Inverter slave
hex) for register 0002
address: 1 hex
(frequency reference))

Inverter data write: Data for starting register


10 hex (e.g. set 0001 hex for register 0001
(RUN command, see below))
Use the 9 bytes from the upper byte
of D1203 to the upper byte of D1207
Attached data size in bytes:
4 (4 bytes from lower byte of D32305
to upper byte of D32307)
Number of registers written:
2 (data for registers 0001 and 0002)
Register number for starting data write:
0001 (Specifies to start writing data to
Inverter starting at register 0001.)
RUN Command (Register 0001) Allocation and Details for Inverter 3G3MV
Bit No. Setting
0 RUN command (1: Start)
1 Normal/reverse rotation (1: Reversed)
2 External error (1: EF0)
3 Error reset (1: Error reset)
4 Multifunction input 1 (1: ON)
5 Multifunction input 2 (1: ON)
6 Multifunction input 3 (1: ON)
7 Multifunction input 4 (1: ON)
8 Multifunction input 5 (1: ON)
9 Multifunction input 6 (1: ON)
10 Multifunction input 7 (1: ON)
11 to 15 (Not used.)

For this example, only the RUN command (bit 00) will be used.

With the Modbus-RTU Easy Master, a CRC-16 checksum does not need to be set in the DM Area,
because it is calculated automatically.

16-32 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

16-6 Serial PLC Links


Serial PLC Links can be used only with the CP1E N-type CPU Unit.

16-6-1 Overview
Serial PLC Links enable exchanging data between CP1E N-type CPU Units, CP1E/CP1H CPU Units,
or CJ1M CPU Units without using special programming. The serial communications mode is set to
Serial PLC Links. Up to 9 PLCs can be linked.

Configuration

z Connecting CP1E, CP1L, CP1H, or CJ1M CPU Units 1:N (8 Nodes Maximum)

CP1E N-type CPU Unit (Polling Unit)


RS-422A/485 Option Board

RS-422A/485

16-6 Serial PLC Links


Shared data
CJ1M CPU Unit
(Polled Unit)

CP1E N-type CP1L


CPU Unit CPU Unit
(Polled Unit) (Polled Unit)

8 nodes maximum

16
z Connecting CP1E, CP1L, CP1H, or CJ1M CPU Units 1:1

16-6-1 Overview
CP1E N-type
CPU Unit
(Polling Unit)

RS-232C or RS422A/485
Shared data

CP1E or
CP1L CPU
Unit (Polled
Unit)

Precautions for Correct Use


With the CP1E CPU Units, a Programmable Terminal (PT) cannot be included in a Serial PLC
Link.

CP1E CPU Unit Software Users Manual(W480) 16-33


16 Serial Communications

16-6-2 Flow of Processing

1 Wiring communications
Connect the CP1E CPU Unit and Modbus-RTU Slave
Unit using RS-422A/485 ports.

2 PLC Setup
Set Serial Port 1 or Serial Port 2 in the PLC Setup and
transfer the PLC Setup from the CX-Programmer to the
CP1E CPU Unit. (Set the serial communications mode
to Serial PC Link (Master) or Serial PC Link (Slave) and
set the communications conditions, link words, and PLC
Link method.)

3 Start communications

Precautions for Correct Use


Both serial ports cannot be used for PLC Links at the same time.
If both serial ports are set for PLC Links (either as polling or polled nodes), a PLC Setup setting
error (nonfatal error) will occur and the PLC Setup Setting Error Flag (A402.10) will turn ON.

16-6-3 PLC Setup

Settings at the Polling Unit

16-34 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

Serial Port 1 or Serial Port 2 Tab Page


Parameter Setting
Communications Settings Set the communications settings to the same values as the connected
PLCs.
If the connected PLCs are set to 115,200 bps, two stop bits, and even
parity, select the Custom Option, set the baud rate to 115200. Set the for-
mat to 7,2,E.
Mode Select PC Link (Master).
Link Words Set to 10 (default) for the Master only. 10 words (default)
PC Link Mode Select All or Masters.
NT/PC Link Max. Set the highest unit number of the connected slaves.

Settings at the Polled Unit

16-6 Serial PLC Links


16

16-6-4 Wiring Example for PLCs


Serial Port 1 or Serial Port 2 Tab Page
Parameter Setting
Communications Settings Set the communications settings to match those of the connected PLC.
If the connected PLC is set to 115,200 bps, two stop bits, and even par-
ity, select the Customer Option and set the baud rate to 115200. Set
the format to 7,2,E.
Mode Select PC Link (Master) or PC Link (Slave).
PLC Link Unit No. Set the unit number (0 to 7).

16-6-4 Wiring Example for PLCs

Serial PLC Link Connection Examples


This section provides connection examples for using Serial PLC Links.
The communications mode setting used here is PC Link (Slave) or PC Link (Master).

CP1E CPU Unit Software Users Manual(W480) 16-35


16 Serial Communications

z Connecting an RS-422A Converter


CP1E N-type CPU Unit (Polling Unit) CP1L CPU Unit (Polled Unit No.0)
RS-422A/485 CJ1M CPU Unit (Polled Unit No.1)
Built-in RS-232C Port Option Board

RS-232C port built


into CPU Unit

CJ1W-CIF11
CJ1W-CIF11 RS-422A Converter
RS-422A Converter

Serial PLC Link


(Total transmission length: 50 m max.)

Note The CP1W-CIF11 is not isolated, so the total transmission distance for the whole
transmission path is 50 m max. If the total transmission distance is greater than 50 m, use
the NT-AL001, which is isolated, and do not use the CJ1W-CIF11. If the NT-AL001 is used,
the total transmission distance for the whole transmission path is 500 m max.

z Connection with an RS-232C Port


RS-232C connection is also possible when using a Serial PLC Link to connect two CP1E CPU
Units.

CP1E N-type CPU Unit CP1E N-type CPU Unit


Built-in RS-232C Port or RS-232C Built-in RS-232C Port or RS-232C
Option Port Option Port

Signal Pin Pin Signal


FG 1 1 FG
SD 2 2 SD
R R
RD 3 3 RD S
S
4 4 RS
-

RS
-

2 2
3 CS 5 5 CS 3
2 5V 2
5V 6 6 C
C
DR 7 7 DR
ER 8 8 ER
SG 9 9 SG

Wiring Example Using RS-422A/485 Ports with RS-422A, 4-wire Connections


CP1E N-type CPU Unit (Polling Unit) CP1E N-type CPU Unit (Polled Unit No. 0) CJ1M CPU Unit (Polled Unit No. 1)
Built-in RS-232C port
CJ1W-CIF11 RS-422A Converter CP1W-CIF11 RS-422A/485 Option Board CJ1W-CIF11 RS-422A Converter
DIP switch DIP switch DIP switch
Pin No. 1: ON (With termination resistance.) Pin No. 1: OFF (No termination resistance.) Pin No. 1: OFF (No termination resistance.)
Pin No. 2: OFF (4-wire type) Pin No. 2: OFF (4-wire type) Pin No. 2: OFF (4-wire type)
Pin No. 3: OFF (4-wire type) Pin No. 3: OFF (4-wire type) Pin No. 3: OFF (4-wire type)
Pin No. 4: OFF Pin No. 4: OFF Pin No. 4: OFF
Pin No. 5: OFF (No RS control for RD.) Pin No. 5: OFF (No RS control for RD.) Pin No. 5: OFF (No RS control for RD.)
Pin No. 6: OFF (No RS control for SD.) Pin No. 6: ON (With RS control for SD.) Pin No. 6: ON (With RS control for SD.)

RS-422A/485 interface RS-422A/485 interface RS-422A/485 interface


Signal

RDB+

RDB+

RDB+
Signal

Signal
SDB+

SDB+

SDB+
RDA-

RDA-
SDA-

SDA-

SDA-
RDA-
FG

FG

FG

Pin 1 2 3 4 5 Pin 1 2 3 4 5 Pin 1 2 3 4 5

Shield

16-36 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

Wiring Example Using RS-422A/485 Ports with RS-485, 2-wire Connections


CP1E N-type CPU Unit CP1L N-type CPU Unit (Polled Unit No. 0) CJ1M CPU Unit (Polled Unit No. 1)
Built-in RS-232C port
CJ1W-CIF11 RS-422A Converter CP1W-CIF11 RS-422A/485 Option Board CJ1W-CIF11 RS-422A Converter
DIP switch DIP switch DIP switch
Pin No. 1: ON (With termination resistance.) Pin No. 1: OFF (No termination resistance.) Pin No. 1: ON (With termination resistance.)
Pin No. 2: ON (2-wire type) Pin No. 2: ON (2-wire type) Pin No. 2: ON (2-wire type)
Pin No. 3: ON (2-wire type) Pin No. 3: ON (2-wire type) Pin No. 3: ON (2-wire type)
Pin No. 4: OFF Pin No. 4: OFF Pin No. 4: OFF
Pin No. 5: OFF (No RS control for RD.) Pin No. 5: OFF (No RS control for RD.) Pin No. 5: OFF (No RS control for RD.)
Pin No. 6: ON (With RS control for SD.) Pin No. 6: ON (With RS control for SD.) Pin No. 6: ON (With RS control for SD.)

RS-422A/485 interface RS-422A/485 interface RS-422A/485 interface


Signal

Signal

Signal
RDB+

RDB+

RDB+
SDB+

SDB+

SDB+
RDA-

RDA-

RDA-
SDA-

SDA-

SDA-
FG

FG

FG
Pin 1 2 3 4 5 Pin 1 2 3 4 5 Pin 1 2 3 4 5

Shield

16-6-5 Specifications

16-6 Serial PLC Links


Serial PLC Links can be used for both built-in RS-232C ports and serial option ports for N-type CPU
Units with 30 or 40 I/O Points. However, two serial ports cannot be used simultaneously for Serial PLC
Links.
Item Specifications
Applicable PLCs CP1E, CP1H, CP1L, CJ1M
Baud rate 9,600 bps, 38,400 bps, 115,200 bps 16
Applicable serial ports Built-in RS-232C ports and serial option ports
Both ports cannot be used for Serial PLC Links at the same time. If both

16-6-5 Specifications
ports are set for Serial PLC Links (either as polling node or polled node), a
PLC Setup setting error (nonfatal error) will occur and the PLC Setup Setting
Error Flag (A402.10) will turn ON.
Connection method RS-422A/485 or RS-232C connection via RS-422A/485 or RS-232C Option
Board.
Words allocated in CIO Area Serial PLC Link Words: CIO 200 to CIO 289 (Up to 10 words can be
allocated for each CPU Unit.)
Maximum number of Units 9 Units max., comprising 1 Polling Unit and 8 Polled Units (A PT can be
placed on the same network in an 1:N NT Link, but it must be counted as
one of the 8 Polled Units.)
Link methods (data refresh Complete link method or Polling Unit link method
methods)

CP1E CPU Unit Software Users Manual(W480) 16-37


16 Serial Communications

Data Refresh Methods


The following two methods can be used to refresh data.
Complete link method
Polling Unit link method

z Complete Link
The data from all nodes in the Serial PLC Links are reflected in both the Polling Unit and the Polled
Units.
The only exceptions are the address allocated to the connected PTs unit number and the addresses
of Polled Units that are not present in the network. These data areas are undefined in all nodes.

Example: Complete Link Method, Highest Unit Number: 3


In the following diagram, Polled Unit No. 2 is either a PT or is a Unit not present in the network, so
the area allocated for Polled Unit No. 2 is undefined in all nodes.

Polling Unit Polled Unit No. 0 Polled Unit No. 1 Polled Unit No. 3

Local area Polling Unit Polling Unit Polling Unit

Polled Unit No. 0 Local area Polled Unit No. 0 Polled Unit No. 0

Polled Unit No. 1 Polled Unit No. 1 Local area Polled Unit No. 1

Undefined Undefined Undefined Undefined

Polled Unit No. 3 Polled Unit No. 3 Polled Unit No. 3 Local area

(Not used) (Not used) (Not used) (Not used)

(Not used) (Not used) (Not used) (Not used)

(Not used) (Not used) (Not used) (Not used)

(Not used) (Not used) (Not used) (Not used)

Example for Ten Link Words (Maximum Number of Words)


Each CPU Unit (either CP1E, CP1H, or CJ1M) sends data to the same words in all other CPU Units
for the Polling Unit and all Polled Units. Data is sent between the words that are allocated to the Poll-
ing Unit and Polled Units according to unit numbers.
CP1E CPU Unit CP1E CPU Unit CP1L CPU Unit Example: CJ1M CPU Unit
(Polling Unit) (Polled Unit No. 0) (Polled Unit No. 1) (Polled Unit No. 2)

Serial PLC Link Words Serial PLC Link Words Serial PLC Link Words Serial PLC Link Words
CIO 200 to 209 CIO 200 to 209 CIO 3100 to 3109 CIO 3100 to 3109
No.0 CIO 210 to 219 No.0 CIO 210 to 219 No.0 CIO 3110 to 3119 No.0 CIO 3110 to 3119
No.1 CIO 220 to 229 No.1 CIO 220 to 229 No.1 CIO 3120 to 3129 No.1 CIO 3120 to 3129
No.2 CIO 230 to 239 No.2 CIO 230 to 239 No.2 CIO 3130 to 3139 No.2 CIO 3130 to 3139
No.3 CIO 240 to 249 No.3 CIO 240 to 249 No.3 CIO 3140 to 3149 No.3 CIO 3140 to 3149
No.4 CIO 250 to 259 No.4 CIO 250 to 259 No.4 CIO 3150 to 3159 No.4 CIO 3150 to 3159
No.5 CIO 260 to 269 No.5 CIO 260 to 269 No.5 CIO 3160 to 3169 No.5 CIO 3160 to 3169
No.6 CIO 270 to 279 No.6 CIO 270 to 279 No.6 CIO 3170 to 3179 No.6 CIO 3170 to 3179
No.7 CIO 280 to 289 No.7 CIO 280 to 289 No.7 CIO 3180 to 3189 No.7 CIO 3180 to 3189

16-38 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

z Polling Unit Link Method


The data for all the Polled Units in the Serial PLC Links are reflected in the Polling Unit only, and
each Polled Unit reflects the data of the Polling Unit only.
The advantage of the Polling Unit link method is that the addresses allocated for the local Polled Unit
data are the same in each Polled Unit, allowing data to be accessed using common ladder program-
ming.
The areas allocated for the unit numbers of the PT or Polled Units not present in the network are
undefined in the Polling Unit only.
Example: Polling Unit Link Method, Highest Unit Number: 3
In the following diagram, Polled Unit No. 2 is a PT or a Unit not participating in the network, so the
corresponding area in the Polling Unit is undefined.

Polling Unit Polled Unit No. 0 Polled Unit No. 1 Polled Unit No. 3

Local area Polling Unit Polling Unit Polling Unit

Polled Unit No. 0 Local area Local area Local area

Polled Unit No. 1 (Not used) (Not used) (Not used)

Undefined (Not used) (Not used) (Not used)

Polled Unit No. 3 (Not used) (Not used) (Not used)

(Not used) (Not used) (Not used) (Not used)

(Not used) (Not used) (Not used) (Not used)

16-6 Serial PLC Links


(Not used) (Not used) (Not used) (Not used)

(Not used) (Not used) (Not used) (Not used)

Example for Ten Link Words (Maximum Number of Words)


The CPU Unit that is the Polling Unit (either CP1E, CP1L, or CJ1M) sends its data (CIO 200 to CIO
209) to the same words (CIO 200 to CIO 209) in all other CPU Units.
The Polled Units (either CP1E, CP1L, or CJ1M) send their data (CIO 210 to CIO 219) to consecutive
sets of 10 words in the Polling Unit. 16
CP1E CPU Unit CP1E CPU Unit CP1L CPU Unit Example: CJ1M CPU Unit
(Polling Unit) (Polled Unit No. 0) (Polled Unit No. 1) (Polled Unit No. 2)

16-6-5 Specifications
Serial PLC Link Words Serial PLC Link Words Serial PLC Link Words Serial PLC Link Words
CIO 200 to 209 CIO 200 to 209 CIO 3100 to 3109 CIO 3100 to 3109
No.0 CIO 210 to 219 CIO 210 to 219 CIO 3110 to 3119 CIO 3110 to 3119
No.1 CIO 220 to 229
No.2 CIO 230 to 239
No.3 CIO 240 to 249
No.4 CIO 250 to 259
No.5 CIO 260 to 269
No.6 CIO 270 to 279
No.7 CIO 280 to 289

CP1E CPU Unit Software Users Manual(W480) 16-39


16 Serial Communications

z Allocated Words
Complete Link Method
Address Link words 1 word 2 words 3 words to 10 words
CIO 200 Polling Unit CIO 200 CIO 200 to CIO 200 to CIO 200 to
201 202 209
Polled Unit CIO 201 CIO 202 to CIO 203 to CIO 210 to
No. 0 203 205 219
Polled Unit CIO 202 CIO 204 to CIO 206 to CIO 220 to
No. 1 205 208 229
Polled Unit CIO 203 CIO 206 to CIO 209 to CIO 230 to
No. 2 207 211 239
Polled Unit CIO 204 CIO 208 to CIO 212 to CIO 240 to
Serial PLC No. 3 209 214 249
Link Area Polled Unit CIO 205 CIO 210 to CIO 215 to CIO 250 to
No. 4 211 217 259
Polled Unit CIO 206 CIO 212 to CIO 218 to CIO 260 to
No. 5 213 220 269
Polled Unit CIO 207 CIO 214 to CIO 221 to CIO 270 to
No. 6 215 223 279
Polled Unit CIO 208 CIO 216 to CIO 224 to CIO 280 to
No. 7 217 226 289
CIO 299 Not used. CIO 209 to CIO 218 to CIO 227 to CIO 290 to
299 299 299 299

Polling Unit Link Method


Address Link words 1 word 2 words 3 words to 10 words
CIO 200 Polling Unit CIO 200 CIO 200 to CIO 200 to CIO 200 to
201 202 209
Polled Unit CIO 201 CIO 202 to CIO 203 to CIO 210 to
No. 0 203 205 219
Polled Unit CIO 201 CIO 202 to CIO 203 to CIO 210 to
No. 1 203 205 219
Polled Unit CIO 201 CIO 202 to CIO 203 to CIO 210 to
No. 2 203 205 219
Polled Unit CIO 201 CIO 202 to CIO 203 to CIO 210 to
Serial PLC No. 3 203 205 219
Link Words Polled Unit CIO 201 CIO 202 to CIO 203 to CIO 210 to
No. 4 203 205 219
Polled Unit CIO 201 CIO 202 to CIO 203 to CIO 210 to
No. 5 203 205 219
Polled Unit CIO 201 CIO 202 to CIO 203 to CIO 210 to
No. 6 203 205 219
Polled Unit CIO 201 CIO 202 to CIO 203 to CIO 210 to
No. 7 203 205 219
CIO 299 Not used. CIO 202 to CIO 204 to CIO 206 to CIO 220 to
299 299 299 299

16-40 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

z Related Auxiliary Area Bits and Words


Built-in RS-232C Port
Name Address Details Read/write Refresh timing
Built-in RS-232C Port A394.00 to When built-in RS-232C port is Read Cleared when power is turned ON.
Communicating with A394.07 being used in NT link mode, the bit Turns ON the bit corresponding to the unit number
PT Flags*1 corresponding to the Unit perform- of the PT/Polled Unit that is communicating via
ing communications will be ON. Bits built-in RS-232C port in NT link mode or Serial PLC
00 to 07 correspond to unit num- Link mode.
bers 0 to 7, respectively.
Bits 00 to 07 correspond to unit numbers 0 to 7,
ON: Communicating
respectively.
OFF: Not communicating
Built-in RS-232C Port A526.01 Turn ON this bit to restart built-in Read/write Cleared when power is turned ON.
Restart Bit RS-232C port. Turn ON to restart built-in RS-232C port, (except
when communicating in peripheral bus mode).

Note The bit is automatically turned OFF by the


system when restart processing has been
completed.
Built-in RS-232C Port A528.08 to When an error occurs at built-in RS- Read/write Cleared when power is turned ON.
Error Flags A528.15 232C port, the corresponding error When an error occurs at built-in RS-232C port, the
bit is turned ON. corresponding error bit is turned ON.
Bit 08: Not used.
The flag is automatically turned OFF by the system
Bit 09: Not used.
when built-in RS-232C port is restarted.
Bit 10: Parity error
Bit 11: Framing error Disabled during peripheral bus mode.
Bit 12: Overrun error In NT link mode, only bit 05 (timeout error) is
Bit 13: Timeout error enabled.
Bit 14: Not used. In Serial PLC Link mode, only the following bits are

16-6 Serial PLC Links


Bit 15: Not used. enabled.
Errors at the Polling Unit:
Bit 05: Timeout error
Errors at Polled Units:
Bit 05: Timeout error
Bit 04: Overrun error
Bit 03: Framing error

*1 In the same way as for the existing 1:N NT Link, the status (communicating/not communicating) of PTs in
Serial PLC Links can be checked from the Polling Unit (CPU Unit) by reading the Built-in RS-232C Port Com-
municating with PT Flag (A394.00 to A394.07 for unit numbers 0 to 7) or the Serial Option Port Communicating 16
with PT Flag (A393.00 to A393.07 for unit numbers 0 to 7).
Related Auxiliary Area Bits and Words for Serial Option Port

16-6-5 Specifications
Name Address Details Read/write Refresh timing
Serial Option Port A393.00 to When serial option port is being Read Cleared when power is turned ON.
Communicating A393.07 used in NT link mode, the bit corre- Turns ON the bit corresponding to the unit number
with PT Flags*1 sponding to the Unit performing of the PT/Polled Unit that is communicating via
communications will be ON. Bits 00 serial option port in NT link mode or Serial PLC
to 07 correspond to unit numbers 0 Link mode.
to 7, respectively.
Bits 00 to 07 correspond to unit numbers 0 to 7,
ON: Communicating
respectively.
OFF: Not communicating
Serial Option Port A528.00 to When an error occurs at serial Read/Write Cleared when power is turned ON.
Error Flags A528.07 option port, the corresponding When an error occurs at serial option port, the cor-
error bit is turned ON. responding error bit is turned ON.
Bit 00: Not used.
The flag is automatically turned OFF by the system
Bit 01: Not used.
when serial option port is restarted.
Bit 02: Parity error
Bit 03: Framing error Disabled during peripheral bus mode.
Bit 04: Overrun error In NT link mode, only bit 05 (timeout error) is
Bit 05: Timeout error enabled.
Bit 06: Not used. In Serial PLC Link mode, only the following bits are
Bit 07: Not used. enabled.
Errors at the Polling Unit:
Bit 05: Timeout error
Errors at Polled Units:
Bit 05: Timeout error
Bit 04: Overrun error
Bit 03: Framing error

*1 In the same way as for the existing 1:N NT Link, the status (communicating/not communicating) of PTs in
Serial PLC Links can be checked from the Polling Unit (CPU Unit) by reading the Built-in RS-232C Port Com-
municating with PT Flag (A394.00 to A394.07 for unit numbers 0 to 7) or the Serial Option Port Communicating
with PT Flag (A393.00 to A393.07 for unit numbers 0 to 7).

CP1E CPU Unit Software Users Manual(W480) 16-41


16 Serial Communications

16-6-6 Example Application

Operation
The present temperature information is exchanged between the boilers. This information is used to
adjust the temperature control of one boiler depending on the status of the other boilers and for moni-
toring individual boilers.

Boiler A Boiler B Boiler C

z Wiring Example
Boiler A: CP1E (Polling Unit) Boiler B: CP1E (Polled Unit No. 0) Boiler C: CP1E (Polled Unit No. 1)
CP1W-TS101 CP1W-TS101 CP1W-TS101
CP1E N-type Temperature CP1E N-type Temperature CP1E N-type Temperature
CPU Unit Sensor Unit CPU Unit Sensor Unit CPU Unit Sensor Unit

CIO 2, CIO 3 CIO 2, CIO 3 CIO 2, CIO 3

Two Pt100 Sensor Inputs Two Pt100 Sensor Inputs Two Pt100 Sensor Inputs
CP1W-CIF11 CP1W-CIF11 CP1W-CIF11
RS-422A/485 RS-422A/485 RS-422A/485
Option Board Option Board Option Board

z CP1W-CIF11 RS422/485 Option Board DIP Switch Settings


(Back)

CPU Unit connector


DIP switch for operation
settings

Polling Polled Polled


No. Settings Description
Unit Unit No. 0 Unit No. 1
1 Terminating resistance selection ON OFF ON PLCs at both ends must have ter-
minating resistance connected.
2 2-wire or 4-wire selection ON ON ON 2
3 2-wire or 4-wire selection ON ON ON 2
4 OFF OFF OFF Always OFF
5 RS control selection for RD OFF OFF OFF Control enabled
6 RS control selection for SD ON ON ON Control disabled

16-42 CP1E CPU Unit Software Users Manual(W480)


16 Serial Communications

z PLC Setup
Item Boiler A (Polling Unit) Boiler B (Polled Unit No. 0) Boiler C (Polled Unit No. 1)
Communications Settings Custom
Baud Rate 115200bps
Parameters 7.2.E (default)
Mode PLC Link (Polling Unit) PLC link (Polled Unit)
Link words 10 (default)
PLC Link method All links
NT/PC Link Max. 1
PLC link polled unit no. 0 1

z Programming Example
Data in the Serial PLC Link Areas are transferred using data links by the Serial PLC Link and without
using any special programming. The ladder program is used to transfer the data that needs to be
linked to the data link area.
Boiler A Boiler B Boiler C
CP1L (Polling Unit) CP1L (Polled Unit No.1) CP1L (Polled Unit No. 0)
CIO 0
Input Bits Input Bits Input Bits
CIO 1
A_Temperature data 0 B_Temperature data 0 C_Temperature data 0

16-6 Serial PLC Links


CIO 2
CIO 3 A_Temperature data 1 B_Temperature data 1 C_Temperature data 1

CIO 100 Output Bits Output Bits Output Bits

CIO 200 A_Temperature data 0 A_Temperature data 0 A_Temperature data 0


CIO 201 A_Temperature data 1 A_Temperature data 1 A_Temperature data 1

CIO 209
16
CIO 210 B_Temperature data 0 B_Temperature data 0 B_Temperature data 0
CIO 211 B_Temperature data 1 B_Temperature data 1 B_Temperature data 1

16-6-6 Example Application


Serial PLC
Link Areas
CIO 219
CIO 220 C_Temperature data 0 C_Temperature data 0 C_Temperature data 0
CIO 221 C_Temperature data 1 C_Temperature data 1 C_Temperature data 1

CIO 299

z Ladder Diagram
Boiler A Boiler B Boiler C
CP1E N-type CPU Unit CP1E N-type CPU Unit CP1E N-type CPU Unit
(polling unit) (Polled Unit No. 0) (Polled Unit No. 1)

Transfer CIO 2 and CIO 3 to Transfer CIO 2 and CIO 3 to Transfer CIO 2 and CIO 3 to
CIO 200 and CIO 201 using a CIO 210 and CIO 211 using a CIO 220 and CIO 221 using a
BLOCK TRANSFER instruction. BLOCK TRANSFER instruction. BLOCK TRANSFER instruction

CP1E CPU Unit Software Users Manual(W480) 16-43


16 Serial Communications

16-7 Connecting the Host Computer


(Not Including Support Software)
Host computers can be connected using this method only with the CP1E N-type CPU Unit.

16-7-1 Overview
Commands are sent from a host computer (not including Support Software) to the CP1E CPU Unit to
read and write data. The serial communications mode is set to Host Link.

Precautions for Correct Use


Support Software such as the CX-Programmer cannot use the Host Link protocol. Use USB
instead.

Communica-
Command flow Command type Configuration Application Remarks
tions method
Host computer Host link Create frame Directly connect the host com- Use this
PLC command in the host puter in a 1:1 or 1:N system. method when
(C Mode) computer communicating
and send the primarily from
Host link command command to OR the host com-
the PLC. Command
puter to the
Receive the PLC.
response.
- FINS command Directly connect the host com- Use these The FINS com-
(with Host Link puter in a 1:1 system or 1:N methods when mand must be
header and system. communicating placed between
terminator) sent. primarily from a Host Link
FINS the host com- header and ter-
Host Link
header
Host Link
terminator
OR puter to PLCs minator and
Command
in the network. then sent by the
host computer.

16-7-2 Flow of Processing

1 Communications wiring
Connect the computer and CP1E CPU Unit using
RS-232C ports.

Set the PLC Setup (select Host Link for the serial
2 PLC Setup communications mode and set the communications
conditions) and transfer the PLC Setup from the
CX-Programmer to the CP1E CPU Unit.

Send the following commands from the host computer.


3 Program from host
C-mode commands
FINS commands

Refer to the SYSMAC CS/CJ-series Communications Commands Reference Manual


(Cat. No. W342) for information on Host Link and FINS commands.

16-44 CP1E CPU Unit Software Users Manual(W480)


Other Functions
This section describes PID temperature control, analog adjusters, the minimum cycle
time setting, clock functions, memory management functions, security functions, and
debugging.

17-1 PID Temperature Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-2


17-1-1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-2
17-1-2 Application Procedure for PID Temperature Control . . . . . . . . . . . . . . . . . . . 17-3
17-1-3 Ladder Programming Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-4
17-2 Analog Adjusters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-7
17-2-1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-7
17-2-2 Application Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-7
17-3 Minimum Cycle Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-8
17-3-1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-8
17-3-2 Setting the Minimum Cycle Time in PLC Setup . . . . . . . . . . . . . . . . . . . . . . . 17-8 17
17-4 Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-9
17-4-1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-9
17-5 Startup Settings and Maintenance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-11
17-5-1 Holding Settings for Operating Mode Changes and at Startup . . . . . . . . . . 17-11
17-5-2 Setting the Power OFF Detection Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-13
17-5-3 Disabling Power Interruption Processing in the Program . . . . . . . . . . . . . . . 17-14
17-6 17-15
17-6-1 17-15
17-7 Security Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-16
17-7-1 Ladder Program Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-16
17-8 Debugging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-19
17-8-1 Forced Set/Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-19
17-8-2 Online Editing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-19
17-8-3 Storing the Stop Position at Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-19
17-8-4 Failure Alarm Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-20

CP1E CPU Unit Software Users Manual(W480) 17-1


17 Other Functions

17-1 PID Temperature Control


PID temperature control can be used with any model of CP1E CPU Unit.

17-1-1 Overview
The CP1E CPU Unit supports PID instructions with the autotuning function. Ladder programs can be
written to perform PID temperature control.
Temperature input: Input from Temperature Sensor Unit to words in the Input Area.
PID control: Execute using the PIDAT instruction in ladder program.
The PIDAT instruction is used in combination with the TPO instruction (TIME-PROPOR-
TIONAL OUTPUT) to perform time-proportional control.
Control output: To connect an SSR, connect a 24-V power supply to the transistor output and output voltage
pulses.

Ladder program

PIDAT
S S: Input word
C C: First parameter word
D D: Output word

TPO
S S: Input word
C C: First parameter word
R R: Pulse output bit

Temperature Sensor Unit


Model with Thermocouple: CP1W-TS001/002
Model with Platinum Resistance Thermometer: CP1W-TS101/102

CP1E

PID

Time-proportional
transistor output
Temperature Sensor

SSR

Additional Information

Sampling Cycle
The sampling cycle set for a PIDAT instruction is between 10 ms to 99.99 s in increments of
10 ms. The actual calculation cycle is determined by the relationship with cycle time.
Refer to the Instruction Reference Manual (Cat. No. W483) for details.

17-2 CP1E CPU Unit Software Users Manual(W480)


17 Other Functions

17-1-2 Application Procedure for PID Temperature Control

1 Setting the Temperature


Sensor Unit
Set the temperature range with the rotary switch on
the front panel.

2 Wiring I/O
Connect the temperature sensor to the Tempera-
ture Sensor Unit.
Connect the SSR to the transistor output.

3 Setting PIDAT and TPO


instructions parameters
Set parameters with the MOV instruction or other
instructions.

4 Executing the PIDAT instruction


Execute the PIDAT instruction.

5 Autotuning
Execute autotuning for the PID constants.

6 Starting PID control


Start PID control.

17-1 PID Temperature Control


Inputting the Temperature Sensors PV to PID Instructions

z Temperature Sensor Unit


Setting the Temperature Range
Set the temperature range with the rotary switch on the front panel of the Temperature Sensor
Unit. If the rotary switch is set to 1 for a CP1W-TS001 Temperature Sensor Unit, the temperature
range is 0.0 to 500.0C.
Temperature Data Storage Format
Temperature data is automatically stored in words in the Input Area allocated to the Temperature 17
Input Unit as an Expansion Unit using four-digit hexadecimal.
Example: 100C is stored as 0064 hex.

17-1-2 Application Procedure for PID


When the range code is a decimal number to one decimal point, the value is multiplied by a
factor of 10 and converted to a hexadecimal number without a sign, then stored as binary Temperature Control
data.
Example: 500.0C multiplied by 10 is 5000 decimal. This is converted to 1388 in hexadecimal and
stored.
If the temperature is negative, it is stored as signed hexadecimal.
Example: -200C is stored as FF38 hex.

z PIDAT Instruction
The PIDAT instruction treats the PV as unsigned hexadecimal data (#0000 to #FFFF hex). Signed
data cannot be used, so if the temperature range includes negative values, apply scaling with the
APR instruction.

Autotuning Procedure

z Automatically Executing Autotuning When PIDAT Is Executed


To automatically autotune the PID constants, turn ON the AT Command Bit when the PIDAT instruc-
tion is executed.

CP1E CPU Unit Software Users Manual(W480) 17-3


17 Other Functions

1 Set the PID parameter in words C to C+10. Word C is specified by the second operand.
Example: Place the set value (SV) in C and place the input range in bits 08 to 11 of C+6. Turn
ON bit 15 of C+9 (AT Command Bit).

2 Turn ON the PIDAT instructions input condition.

3 The PID instruction will execute autotuning. When it has finished, the AT Command Bit (bit 15 in
C+9) will turn OFF. At the same time the proportional band (C+1), integral constant (C+2), and
derivative constant (C+3) calculated by autotuning will be stored and PID control will be started.

z Executing Autotuning for Other Conditions When PIDAT Is Executed


Here, the AT Command Bit is left OFF when the PID instruction is being executed. Later it is turned
ON by some other condition to start autotuning.

1 Set the PID parameter in words C to C+10. Word C is specified by the second operand.
Example: Place the set value (SV) in C, the proportional band in C+1, the integral constant in
C+2, the derivative constant in C+3, and the input range in bits 08 to 11 of C+6. Turn ON bit 15
of C+9 (AT Command Bit).

2 Turn ON the PIDAT instructions input condition. PID control will be started with the specified
PID constants.

3 Turn ON bit 15 in C+9 (the AT Command Bit) while the input condition for the PID instruction is
ON. Autotuning will be performed. When it has finished, the AT Command Bit (bit 15 in C+9) will
turn OFF. The proportional band (C+1), integral constant (C+2), and derivative constant (C+3)
calculated by autotuning will be stored and PID control will be started with those PID constants.

17-1-3 Ladder Programming Example

System Configuration

K thermocouple
Controlled device
Inputs connected to terminal Inputs connected to
blocks 0CH and 1CH terminal block 2CH

CP1E N-type CPU Unit with CP1W-TS001 Control


30 I/O Points Temperature Sensor Unit device
(SSR) Heater
100.00 COM + -

Temperature Stored in CIO 2 in


input the Input Area
Transistor output terminals

A K thermocouple is used for the temperature input. Use a CP1W-TS001 Temperature Sensor Unit
(thermocouple input).
The Temperature Sensor Units temperature input PV is stored in CIO 2.
The control output is the transistor output used to control the heater through the SSR using time-pro-
portional control.
The PIDAT sampling cycle is 1 second.
Control cycle: 20 s
When W0.00 turns ON, autotuning is immediately executed and PID control is started with the PID
constants calculated by autotuning.

17-4 CP1E CPU Unit Software Users Manual(W480)


17 Other Functions

Ladder Programming Example for an Input Range of 0.0 to 500.0C for


a K Thermocouple
The CP1W-TS001 Temperature Sensor Unit is used with input type of K 0.0 to 500.0C (set the rotary
switch to 1). The values 0.0 to 500.0C are multiplied by a factor of 10 to account for the decimal point
and converted to hexadecimal data without a sign (0000 to 1388 hex) and stored in CIO 2 in the Input
Area.

C:D100 &1600 Set value: 160C


W0.00 C+1:D101 &1 Proportional band: 0.1%
PIDAT C+2:D102 &1 Integral time: 0.1 s
S 2 C+3:D103 &1 Derivative time: 0.1 s
PV
C+4:D104 &100 Sampling period: 1 s
C D100
C+5:D105 #0002 Reverse operation (bit 00: OFF)/PID constants updated each
D D200 MV C+6:D106 #0395 time a sample is taken while the input condition is ON (bit 01:
ON)/2-PID parameter = 0.65 (bits 04 to 15: #000 hex)
C+7:D107 #0000 Input/Output: 13 bits (bits 00 to 03, 08 to 11: #3 hex)/Integral

TPO C+8:D108 #0000 and derivative constants: Time designation (bits 04 to 07: #9
hex)/MV limit control: No (bit 12: OFF)
C+9:D109 #8000
S D200 MV AT execution (bit 15: ON)/AT Calculation Gain = 1.00 (bits 0
C+10:D110 #000A to 11: #000 hex)
C D300
C+11:D111
D 100.00 Pulse Work Area
~

output Limit-cycle Hysteresis = 0.10%


C+40:D140 (approximately 0.8C)

17-1 PID Temperature Control


W1.00 When AT is completed, the contents of D109 is automatically
overwritten by #0000 hex and the calculated PID constants are
W1.00 input to D101 to 103.
RSET MV range: 13 bits (bits 0 to 3: #3 hex)/Input type: MV (bits 4
to 7: #1 hex), always read input (bit 8 to 11: #3 hex), output
100.00 C:D300 #0313 limit disabled (bits 12 to 15: #0 hex)

C+1:D301 &2000 Control cycle: 20.00 s


C+2:D302 &0 No upper output limit
C+3:D303 &0 No lower output limit
C+4:D304
~

Work Area
C+6:D306
17
z Description

17-1-3 Ladder Programming Example


When W0.00 turns ON, the work area in D111 to D140 is initialized (cleared) according to the
parameters set in D100 to D110. After the work area has been initialized, autotuning is started
and the PID constants are calculated from the results from changing the manipulated variable.
After AT has been completed, PID control is executed according to the calculated PID constants
set in D101 to D103. The manipulated variable is output to D200. The manipulated variable in
D200 is divided by the manipulated variable range using the TPO instruction. This value is treated
as the duty factor, which is converted to a time-proportional output and output to CIO100.00 as a
pulse output.
When W0.00 turns OFF, PID is stopped and CIO100.00 is turned OFF.

Ladder Programming Example for an Input Range of -200 to 1300C for a K


Thermocouple
The CP1W-TS001 Temperature Sensor Unit is used with an input type of K -200 to 1300C (set the
rotary switch to 0). The decimal values -200 to 1300C are converted to signed hexadecimal data (FF38
to 0514 hex) and stored in CIO 2 in the Input Area.

CP1E CPU Unit Software Users Manual(W480) 17-5


17 Other Functions

However, the PIDAT instruction can only handle unsigned hexadecimal data as the PV. The value is
thus converted from the range FF38 to 0514 to the PIDAT instruction input range of 0000 to 1FFF hex
(0 to 8191) using the APR instruction.

Specify 16-bit signed data (bit 11: 1, bit 10: OFF)/Number


of coordinates in data table: 1 (bits 0 to 7: #00 hex)
C:D500 #0800
C+1:D501 #FF38 Minimum manipulated variable input: -200 decimal
W0.00 (#FF38 hex)
C+2:D502 #0000 Minimum value in PID input range: #0000 hex
APR
C+3:D503 #0514 Maximum manipulated variable input: 1300 decimal
C D500 (#0514 hex)
C+4:D504 #1FFF Maximum value in PID input range: #1FFF hex
S 2
PV
D D600 Scale PV to C:D100 &1966 Set value: 160C (set as calculated value: 1966)
within #0000 to
#1FFF hex C+1:D101 &1 Proportional band: 0.1%
PIDAT C+2:D102 &1 Integral time: 0.1 s
C+3:D103 &1 Derivative time: 0.1 s
S D600
C+4:D104 &100 Sampling period: 1 s
C D100
C+5:D105 #0002 Reverse operation (bit 00: OFF)/PID constants updated each
D D200 MV time a sample is taken while the input condition is ON (bit 01:
C+6:D106 #0395 ON)/2-PID parameter = 0.65 (bits 04 to 15: #000 hex)
C+7:D107 #0000 Input/Output: 13 bits (bits 00 to 03, 08 to 11: #3 hex)/Integral
C+8:D108 and derivative constants: Time designation (bits 04 to 07: #9
TPO #0000
hex)/Manipulated variable limit control: No (bit 12: 0)
C+9:D109 #8000
S D200 MV AT execution (bit 15: 1)/AT Calculation Gain = 1.00
C+10:D110 #0005 (bits 0 to 11: #000 hex)
C D300
C+11:D111
D 100.00 Pulse output Work Area Limit-cycle Hysteresis = 0.05% (approximately 0.8C)
~

C+40:D140
W1.00
When autotuning is completed, the content of D109 is automatically overwritten
by #0000 hex and the calculated PID constants are input to D101 to 103.
W1.00
Manipulated variable range: 13 bits (bits 0 to 3: #3
RSET hex)/Input type: Manipulated variable (bits 4 to 7: #1 hex),
always read input (bit 8 to 11: #3 hex)/Output limit disabled
100.00 (bits 12 to 15: #0 hex)
C:D300 #0313
C+1:D301 &2000 Control cycle: 20.00 s
C+2:D302 &0 No upper output limit
C+3:D303 &0 No lower output limit
C+4:D304
~

Work Area
C+6:D306

z Description
When W0.00 turns ON, the work area in D111 to D140 is initialized (cleared) according to the
parameters set in D100 to D110. After the work area has been initialized, autotuning is started
and the PID constants are calculated from the results from changing the manipulated variable.
After autotuning has been completed, PID control is executed according to the calculated PID
constants set in D101 to D103. The manipulated variable is output to D200. The manipulated vari-
able in D200 is divided by the manipulated variable range using the TPO instruction. This value is
treated as the duty factor which is converted to a time-proportional output and output to
CIO100.00 as a pulse output.
When W0.00 turns OFF, PID is stopped and CIO100.00 turns OFF.
When W0.00 is ON, the Thermocouples PV (-200 to 1300) is scaled to the PIDAT instruction input
range (#0 to #1FFF hex). The set values must be input according to the scaled PV. For example, if
the PV is 160C, it is set as [8191/(1300+200)] (160+200) = 1966].

17-6 CP1E CPU Unit Software Users Manual(W480)


17 Other Functions

17-2 Analog Adjusters


The analog adjusters can be used with any model of CP1E CPU Unit.

17-2-1 Overview
By turning one of the analog adjusters on the CP1E CPU Unit with a Phillips screwdriver, the PV in the
Auxiliary Area can be changed to any value within a range of 0 to 255. The PVs are in the following
words.
Analog adjuster 1: A642
Analog adjuster 1: A643
Any change to a set value is reflected in the next cycle.

Phillips screwdriver

Analog adjuster

17-2 Analog Adjusters


17-2-2 Application Example
Setting the value for timer T100 in A642 makes it possible to use T100 as a variable timer with a range
of 0 to 25.5 s (0 to 255).

Start condition

TIMX
0100

T0100
A642 17
100.00

Precautions for Correct Use 17-2-1 Overview

Set values from the analog adjuster may vary with changes in the ambient temperature and the
power supply voltage. Do not use it for applications that require highly precise set values.

CP1E CPU Unit Software Users Manual(W480) 17-7


17 Other Functions

17-3 Minimum Cycle Time


The minimum cycle time function can be used with any model of CP1E CPU Unit.

17-3-1 Overview
A minimum cycle time can be set for a CP1E CPU Unit. Variations in I/O response times can be elimi-
nated by repeating the program within the minimum cycle time.

Cyclic tasks
(ladder programs)

A minimum (or fixed)


Cycle cycle time can be set

END
I/O refresh

Minimum cycle Minimum cycle Minimum cycle


time (effective) time (effective) time (effective)

Actual cycle time Actual cycle time Actual cycle time

This setting is effective only when the actual cycle time is shorter than the minimum cycle time setting.
If the actual cycle time is longer than the minimum cycle time setting, the actual cycle time will remain
unchanged.

A minimum (or fixed) A minimum (or fixed) Minimum cycle


cycle time can be set cycle time can be set time (effective)

Actual cycle time Actual cycle time Actual cycle time

17-3-2 Setting the Minimum Cycle Time in PLC Setup


A minimum cycle time can be set between 0.1 and 32,000 ms in increments of 0.1 ms in the PLC Setup.
When using the CX-Programmer for CP1E, set the minimum cycle time (Constant Cycle Time) on the
Timings Tab Page.

17-8 CP1E CPU Unit Software Users Manual(W480)


17 Other Functions

17-4 Clock
The clock can be used only with the CP1E N-type CPU Unit.

17-4-1 Overview
The clock function can be used only with CP1E N-type CPU Units.
The current data is stored in the following words in the Auxiliary Area.
Name Address Function
Clock data A351 to A354 The seconds, minutes, hour, day or month, month, year, and day of
week are stored each cycle.
A351.00 to A351.07 Seconds: 00 to 59 (BCD)
A351.08 to A351.15 Minutes: 00 to 59 (BCD)
A352.00 to A352.07 Hour: 00 to 23 (BCD)
A352.08 to A352.15 Day of the month: 01 to 31 (BCD)
A353.00 to A353.07 Month: 01 to 12 (BCD)
A353.08 to A353.15 Year: 00 to 99 (BCD)
A354.00 to A354.07 Day of the week:
00: Sunday, 01: Monday,
02: Tuesday, 03: Wednesday,
04: Thursday, 05: Friday, 06: Saturday

Additional Information

17-4 Clock
The clock cannot be used if a battery is not installed or the battery voltage is low.
If a Battery is not installed and the clock cannot be used because the power supply has been dis-
connected for longer than the I/O memory backup time, A509.13 (the I/O Memory Previous Cor-
ruption or Clock Stopped Flag (held at startup)) will turn ON.
17

17-4-1 Overview

CP1E CPU Unit Software Users Manual(W480) 17-9


17 Other Functions

z Related Auxiliary Area Bits and Words


Name Address Contents
Start-up Time A510 and A511 The time at which the power was turned ON
(day of month, hour, minutes, and seconds).
Power Interruption Time A512 and A513 The time at which the power was last interrupted
(day of month, hour, minutes, and seconds).
Power ON Clock Data 1 A720 to A722 Consecutive times at which the power was turned
Power ON Clock Data 2 A723 to A725 ON (year, month, day of month, hour, minutes, and
seconds). The times are progressively older from
Power ON Clock Data 3 A726 to A728 number 1 to number 10.
Power ON Clock Data 4 A729 to A731
Power ON Clock Data 5 A732 to A734
Power ON Clock Data 6 A735 to A737
Power ON Clock Data 7 A738 to A740
Power ON Clock Data 8 A743 to A734
Power ON Clock Data 9 A732 to A746
Power ON Clock Data 10 A747 to A749
I/O Memory Previous Corruption or A509.13 Latched ON if the power is interrupted for longer
Clock Stopped Flag than I/O memory backup time. This means the
(Held at startup.) clock cannot be used.
This flag will remain OFF until the user turns it ON.
Operation Start Time A515 to A517 The time that operation started (year, month, day
of month, hour, minutes, and seconds).
Operation End Time A518 to A520 The time that operation stopped (year, month, day
of month, hour, minutes, and seconds).
User Program Date A90 to A93 The time when the ladder programs were last over-
written (year, month, day of month, hour, minutes,
seconds, and day of week).
Parameter Date A94 to A97 The time when the parameters were last overwrit-
ten (year, month, day of month, hour, minutes, sec-
onds, and day of week).

z Time-related Instructions
Name Mnemonic Function
HOURS TO SEC Converts time data in hours/minutes/seconds format to an equiva-
SECONDS lent time in seconds only.
SECONDS TO HMS Converts seconds data to an equivalent time in hours/minutes/sec-
HOURS onds format.
CALENDAR ADD CADD Adds time to the calendar data in the specified words.
CALENDAR CSUB Subtracts time from the calendar data in the specified words.
SUBTRACT
CLOCK DATE Changes the internal clock setting to the setting in the specified
ADJUSTMENT source words.

17-10 CP1E CPU Unit Software Users Manual(W480)


17 Other Functions

17-5 Startup Settings and Maintenance

17-5-1 Holding Settings for Operating Mode Changes and at Startup

Operating Mode Changes


z Starting Program Execution
Turn ON the IOM Hold Bit (A500.12) to retain all data in I/O memory (see note) when the CPU Unit
is changed from PROGRAM mode to RUN/MONITOR mode to start program execution.

I/O memory
PROGRAM mode
Areas not normally
Retained
retained, e.g., CIO
Area
MONITOR or RUN mode

17-5 Startup Settings and Maintenance


z Stopping Program Execution
If the IOM Hold Bit (A500.12) is ON, all data in I/O memory will also be retained when the CPU Unit
is changed from RUN/MONITOR mode to PROGRAM mode to stop program execution.

I/O memory
MONITOR or RUN mode
Retained Areas not normally
retained, e.g., CIO
Area
PROGRAM mode

The following I/O memory areas are not retained: CIO Area (I/O bits), Work Area, Timer Completion
Flags, and Timer PVs.

z Related Auxiliary Area Bits and Words


17
Name Address Description
IOM Hold Bit A500.12 Turn ON this bit to retain the status of the I/O memory when shifting from

17-5-1 Holding Settings for Operating Mode


PROGRAM to RUN or MONITOR mode or vice versa.
ON: I/O memory status retained when changing the operating mode.
OFF: I/O memory status cleared when changing the operating mode. Changes and at Startup

When the IOM Hold Bit is ON, all outputs from Output Units will be retained when program execution
stops.
When the program starts again, outputs will have the same status that they had before the program
was stopped. (When the IOM Hold Bit is OFF, the status of the outputs will be cleared before instruc-
tions are executed.)

PLC Power ON
In order for all data in I/O memory to be retained when the PLC is turned ON, the IOM Hold Bit
(A500.12) must be ON and it must be protected in the PLC Setup.

I/O memory

Retained Areas not normally


Power turned ON retained, e.g., CIO
Area

CP1E CPU Unit Software Users Manual(W480) 17-11


17 Other Functions

z Related Auxiliary Area Bits and Words


Name Address Description
IOM Hold Bit A500.12 Turn this bit ON to retain the status of the I/O Memory when shifting from
PROGRAM to RUN or MONITOR mode or vice versa.
ON: I/O memory status retained when changing the operating mode.
OFF: I/O memory status cleared when changing the operating mode.

z PLC Setup Setting


When using the CX-Programmer for CP1E, select the IOM Hold Bit Check Box in the Startup Hold
Area on the Startup Tab Page to make the setting.

Precautions for Correct Use


The data in I/O memory is cleared if a power interruption lasts longer than the I/O memory
backup time (50 hours for an E-type CPU Unit and 40 hours for an N-type CPU Unit) even if the
startup hold settings that are described above are made.

17-12 CP1E CPU Unit Software Users Manual(W480)


17 Other Functions

17-5-2 Setting the Power OFF Detection Time


It is possible to increase how much of a delay there will be from when the power supply voltage drops
below 85% of the rated value (or below 80% for DC) to the confirmation of a power interruption.
By default, an AC power interruption of 10 ms or longer (2 ms or longer for a DC power interruption) will
be detected about 10 to 25 ms (2 to 5 ms for DC power supplies) after the power supply voltage drops
below 85% of the minimum rated value (80% for DC power supplies). After the delay, operation will stop,
and power OFF interrupt task will be executed if one has been created. There is a setting in the PLC
Setup that can extend this time.

z PLC Setup Setting


When using the CX-Programmer for CP1E, make the setting in the Power Off detection time Field on
the Timings Tab Page.

17-5 Startup Settings and Maintenance


17

17-5-2 Setting the Power OFF Detection Time

CP1E CPU Unit Software Users Manual(W480) 17-13


17 Other Functions

17-5-3 Disabling Power Interruption Processing in the Program


Areas of the program can be protected from power OFF interrupts so that they will be executed before
the CPU Unit is reset even if the power supply is interrupted. This is achieved by using the DISABLE
INTERRUPTS (DI) and ENABLE INTERRUPTS (EI) instructions.
This function can be used with instructions that must be executed as a group, e.g., so that execution
does not start with intermediate stored data the next time power is turned ON.

z Procedure
1) Set the Disable Setting for Power OFF Interrupts in A530 to A5A5 hex to enable disabling Power OFF
Interrupts.
2) Enable disabling Power OFF Interrupts in the PLC Setup (this is the default setting).
3) Use the DI instruction to disable interrupts before the program section to be protected and then use
the EI instruction to enable interrupts after the section.
All instructions between the DI and EI instructions will be completed before the Power OFF Interrupt
is executed even if a power interruption occurs while executing the instructions between the DI and
EI instructions.

Execution condition

DI Disables interrupt processing

Power interruption
confirmed

These instructions are executed

Interrupt processing enabled


EI
and CPU Unit reset

Power supply voltage < 85%


of rated voltage (less than Power interruption CPU Unit reset
80% for DC power) (forced end)
confirmed

D Instructions between E
I DI and EI executed I Stopped

Power OFF detection 10 ms - Power OFF


time + Power OFF detection delay (Power
detection delay OFF confirmation time)

z Related Auxiliary Area Bits and Words


Name Address Description
Disabling Power A530 Enables using the DI instruction to disable power OFF interrupt processing (except for
Interruption execution of the Power OFF Interrupt Task) until the EI instruction is executed.
Processing in the A5A5 hex: Enables using the DI instruction to disable power OFF interrupt processing.
Program Any other value: Disables using the DI instruction to disable power OFF interrupt pro-
cessing.

17-14 CP1E CPU Unit Software Users Manual(W480)


17 Other Functions

17-6
17-6-1

17-6
17

17-6-1

CP1E CPU Unit Software Users Manual(W480) 17-15


17 Other Functions

17-7 Security Functions


This section describes how to set read protection, write protection, and operation protection for
programming.
B

17-7-1 Ladder Program Protection

Read Protection
With the CX-Programmer for CP1E, it is possible to set read protection using a password for each
PLC.
When the program is read-protected using a password, it is not possible to display or edit any of the
ladder programs using the CX-Programmer for CP1E unless the password is entered in the Disable
Password Dialog Box from the CX-Programmer for CP1E.
This enables improved security for PLC data in equipment.

z Protection Procedure

1 Go online and select PLC - Protection - Release Password. The Release Read Protection
Dialog Box will be displayed.

2 Enter the registered password.


If the password is incorrect, the message shown on the right will be displayed, and protec-
tion will not be released.

17-16 CP1E CPU Unit Software Users Manual(W480)


17 Other Functions

z Auxiliary Area Bits Related to Password Protection


Status after Startup
Bit
Name Description mode hold
address
change settings
UM Read Protection A99.00 Indicates whether or not all ladder programs in Hold Hold
Status a PLC are read-protected.
OFF: UM read protection is not set.
ON: UM read protection is set.

Ladder Program Write Protection


With the CP1E, it is possible to set write protection for ladder programs and PLC Setup settings by
using A500.11 in the Auxiliary Area.

Additional Information

This function is equivalent to write protection using the DIP switch on the CPU Units in the CS/CJ
Series and the CP-series CP1H and CP1HL CPU Units.

z Procedure

17-7 Security Functions


To enable writing at any time, turn ON A500.11 with an OUT instruction using the Always ON Flag
(P_ON) in the input condition. You can also turn ON A500.11 using a SET instruction.
The status of A500.11 is retained when the power supply is cycled or when the operating mode is
changed.
To set write protection only when it is required, turn ON/OFF A500.11 from the CX-Programmer
for CP1E.

z Related Auxiliary Area Bits and Words


Status Startup 17
Name Address Description after mode hold
change settings

17-7-1 Ladder Program Protection


User Memory Write A500.11 This bit specifies whether user memory and Hold Hold
Protect Bit PLC Setup settings are to be write-protected.
ON: User memory write-protected
OFF: User memory not write-protected

CP1E CPU Unit Software Users Manual(W480) 17-17


17 Other Functions

Ladder Program Operation Protection (Checking the Manufacturing


Lot Number)
The manufacturing lot number is stored in words A310 and A311 in the Auxiliary Area of a CP1E By
using these words in the Auxiliary Area, it is possible to generate a fatal error and disable using ladder
programming with a PLC that has a different manufacturing lot number. The manufacturing lot number
cannot be changed by the user.
The manufacturing lot number is five digits. The leftmost two digits are stored in A311 and the right-
most three digits are stored in A310.

Manufacturing Lot Number (five digits)

A311 CH A310 CH

X, Y, and Z in manufacturing lot numbers will be converted to 10, 11, and 12, respectively, and stored.

z Ladder Program Example


Generating a Fatal Error If the Manufacturing Lot Number Is Not 23905

A200.11 (First Cycle Flag)


ANDL(610)
A310
#00FFFFFF
D0
<> L(306) FALS(007)
D0 1
#050923 D100

Generating a Fatal Error If the Manufacturing Lot Number Is Not ***05

A200.11 (First Cycle Flag)


ANDL(610)
A310
#00FF0000
D0
<> L(306) FALS(007)
D0 1
#50000 D100

Generating a Fatal Error If the Manufacturing Lot Number Is Not 23Y**

A200.11 (First Cycle Flag)


ANDL(610)
A310
#0000FFFF
D0
<> L(306) FALS(007)
D0 1
#1123 D100

17-18 CP1E CPU Unit Software Users Manual(W480)


17 Other Functions

17-8 Debugging

17-8-1 Forced Set/Reset

The CX-Programmer for CP1E can be used to force-set (turn ON) or force-reset (turn OFF) specified
bits in the CIO Area, Auxiliary Area or Holding Area, as well as timer and counter Completion Flags.
Forced status will take priority over status output from the program or status from I/O refreshing.
This status cannot be overwritten by instructions.
It will be retained regardless of the status of the program or external inputs until it is cleared from the
CX-Programmer for CP1E.
Force-set/reset operations are used to control the status of inputs and outputs during trial operation or
to control specific conditions during debugging.
Force-set/reset operations can be executed in either MONITOR or PROGRAM mode.
They cannot be used in RUN mode.
Bits in the following areas can be force-set and force-reset.
CIO Area (I/O bits and Serial PLC Link Bits), Work Area, Timer/Counter Completion Flag Areas, and
Holding Area.

17-8-2 Online Editing


The Online Editing function is used to add to or change part of a program in a CPU Unit directly from

17-8 Debugging
the CX-Programmer for CP1E when the CPU Unit is in MONITOR or PROGRAM mode. One or more
program sections can be added or changed at a time from the CX-Programmer for CP1E.
The function is designed for minor program changes without stopping the CPU Unit.
Online editing is possible simultaneously from more than one computer running the CX-Programmer for
CP1E as long as different tasks are edited.

17
17-8-3 Storing the Stop Position at Errors

17-8-1 Forced Set/Reset


The type of task and the current task number when a task stops execution due to a program error will
be stored as shown below.

z Task Number When Program Stopped (A294)


Type A294
Cyclic task Always 0000 hex for CPIE
Interrupt task (including extra cyclic 8000 to 80FF hex (correspond to interrupt task numbers 0 to 255)
task)

This information makes it easier to determine where the fatal error occurred.
When a fatal error is cleared, the Program Error Task will be cleared.
The program address where task operation stopped is stored in A298 (rightmost bits of the program
address) and in A299 (leftmost bits of the program address).

CP1E CPU Unit Software Users Manual(W480) 17-19


17 Other Functions

17-8-4 Failure Alarm Instructions


The FAL and FALS instructions generate user-defined errors.
FAL generates a non-fatal error and FALS generates a fatal error that stops program execution.
When a user-defined error condition (i.e., executions condition) are met, the Failure Alarm instruction
(FAL or FAL) will be executed.

17-20 CP1E CPU Unit Software Users Manual(W480)


19

CPU Unit Cycle Time


This section describes the cycle time of a CP1E CPU Unit.

19-1 Monitoring the Cycle Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19-2


19-1-1 Monitoring the Cycle Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19-2
19-2 Computing the Cycle Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19-3
19-2-1 CPU Unit Operation Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19-3
19-2-2 Cycle Time Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19-4
19-2-3 Functions Related to the Cycle Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19-5
19-2-4 I/O Refresh Times for PLC Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19-7
19-2-5 Cycle Time Calculation Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19-8
19-2-6 Increase in Cycle Time for Online Editing . . . . . . . . . . . . . . . . . . . . . . . . . . . 19-8
19-2-7 I/O Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19-9
19-2-8 Interrupt Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19-11
19-2-9 Serial PLC Link Response Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . 19-13
19-2-10 Pulse Output Start Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19-13
19-2-11 Pulse Output Change Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19-14

CP1E CPU Unit Software Users Manual(W480) 19-1


19 CPU Unit Cycle Time

19-1 Monitoring the Cycle Time

19-1-1 Monitoring the Cycle Time

The average, maximum, and minimum cycle times can be monitored when the CX-Programmer for
CP1E is connected online to a CPU Unit.

Monitoring the Average Value


While connected online to the PLC, the average cycle time is displayed in the status bar when the CPU
Unit is in any mode other than PROGRAM mode.

Monitoring Maximum and Minimum Values


Select PLC Information - Cycle Time from the PLC Menu.
The following PLC Cycle Time Dialog Box will be displayed.

The average (mean), maximum, and minimum cycle times will be displayed in order from the top.
Click the Reset Button to recalculate and display the cycle time values.

Additional Information

The cycle time average value (= present value) and maximum value are stored in the following
Auxiliary Area words.
Average cycle time (= present value) (0.1-ms increments): A264 (lower bytes) and A265
(upper bytes)
Average Cycle Time (0.01-ms increments): A266 (lower digits) and A267 (upper digits)
Maximum Cycle Time (0.1-ms increments): A262 (lower bytes) and A263 (upper bytes)

19-2 CP1E CPU Unit Software Users Manual(W480)


19 CPU Unit Cycle Time

19-2 Computing the Cycle Time


19-2 Computing the Cycle Time

19-2-1 CPU Unit Operation Flowchart

The CPU Unit processes data in repeating cycles from the overseeing processing up to peripheral
servicing as shown in the following diagram.
19
Power ON

19-2-1 CPU Unit Operation Flowchart


Startup initialization
Checks Unit connection status

Checks hardware and user


program memory

Overseeing processing
Error
Check OK?

Normal

Sets error flags

Flashing (non-
ERR/ALM fatal error)
Program execution

indicator ON or User program executed


flashing?

Lit (fatal error)


PLC cycle time

NO
End of program?

YES
Cycle time calculation

Waits until the set cycle time


has elapsed

Calculates cycle time


I/O refresh

I/O refresh
Peripheral
servicing

Peripheral servicing

CP1E CPU Unit Software Users Manual(W480) 19-3


19 CPU Unit Cycle Time

19-2-2 Cycle Time Overview


The cycle time depends on the following conditions.
Type and number of instructions in the user program (cyclic tasks and all interrupt tasks for which the
execution conditions have been satisfied)
Type and number of CP-series Expansion Units and Expansion I/O Units
Minimum (constant) cycle time setting in the PLC Setup
Use of peripheral USB and serial ports
Fixed peripheral servicing time in the PLC Setup

Precautions for Correct Use


When the mode is switched from MONITOR mode to RUN mode, the cycle time will be extended
by 10 ms (this will not, however, cause a cycle time exceeded error).

The cycle time is the total time required for the PLC to perform the operations given in the following
tables.
Cycle time = (1) + (2) + (3) + (4) + (5)
(1) Overseeing
Processing time and
Operation
fluctuation cause
Checks the I/O bus and user memory, checks for battery errors, 0.4 ms
etc.

(2) Program Execution


Processing time and
Operation
fluctuation cause
Executes the instructions in the user program. The time Total instruction execution
required is the total of the executions times for all instructions. time.

(3) Cycle Time Calculation for Minimum Cycle Time


Operation Processing time and fluctuation cause
Waits for the specified cycle When a minimum cycle time is not set, the time for step 3 is
time to elapse when a minimum approximately 0.
(constant) cycle time has been When a minimum cycle time is set, the time for step 3 is the
set in the PLC Setup. preset fixed cycle time minus the actual cycle time
Calculates the cycle time. ((1) + (2) + (4) + (5)).

(4) I/O Refreshing


Processing time
Operation and fluctuation
cause
CPU Unit built-in I/O Outputs from the CPU Unit to the I/O refresh time for
CP-series Expansion Units actual outputs are refreshed first for each Unit multiplied
and Expansion I/O Units. each Unit, and then inputs. by the number of
Units used.

19-4 CP1E CPU Unit Software Users Manual(W480)


19 CPU Unit Cycle Time

19-2 Computing the Cycle Time


(5) Peripheral Servicing
Operation Processing time and fluctuation cause
Services peripheral If a uniform peripheral servicing time hasnt been set in the PLC
USB port. Setup for this servicing, 8% of the previous cycles cycle time (calcu-
lated in step (3)) will be allowed for peripheral servicing.
Services serial port. If a uniform peripheral servicing time has been set in the PLC Setup,
servicing will be performed for the set time.
Servicing will be performed for at least 0.1 ms, however, whether the
peripheral servicing time is set or not. 19
If the ports are not connected, the servicing time is 0 ms.
Services If a uniform peripheral servicing time hasnt been set in the PLC

19-2-3 Functions Related to the Cycle Time


communications Setup for this servicing, 8% of the previous cycles cycle time (calcu-
ports. lated in step (3)) will be allowed for peripheral servicing.
If a uniform peripheral servicing time has been set in the PLC Setup,
servicing will be performed for the set time.
Servicing will be performed for at least 0.1 ms, however, whether the
peripheral servicing time is set or not.
If no communications ports are used, the servicing time is 0 ms.
Services built-in flash If a uniform peripheral servicing time hasnt been set in the PLC
memory access. Setup for this servicing, 8% of the previous cycles cycle time (calcu-
lated in step (3)) will be allowed for peripheral servicing.
If a uniform peripheral servicing time has been set in the PLC Setup,
servicing will be performed for the set time.
Servicing will be performed for at least 0.1 ms, however, whether the
peripheral servicing time is set or not.
If there is no access, the servicing time is 0 ms.

19-2-3 Functions Related to the Cycle Time

Minimum Cycle Time


Set the minimum cycle time to a non-zero value to eliminate inconsistencies in I/O responses by repeat-
edly executing the program with a consistent cycle time.

A minimum cycle time can be set in the PLC Setup between 1 and 32,000 ms in 1-ms increments.
Minimum cycle time Minimum cycle time Minimum cycle time
(When setting is (When setting is (When setting is
effective.) effective.) effective.)

Actual cycle Actual cycle Actual


time time cycle time

This setting is effective only when the actual cycle time is shorter than the minimum cycle time setting.
If the actual cycle time is longer than the minimum cycle time setting, the actual cycle time will remain
unchanged.
Minimum cycle time
Minimum cycle time Minimum cycle time (When setting is effective.)

Actual cycle time Actual cycle time Actual


cycle time

CP1E CPU Unit Software Users Manual(W480) 19-5


19 CPU Unit Cycle Time

z PLC Setup
Name Description Default
Constant Cycle Time 0000 to 7D00 hex: 1 to 32,000 0000 hex: Variable cycle time
ms in 1-ms increments

Watch Cycle Time


If the cycle time exceeds the maximum cycle time setting, the CPU Unit will stop operation. The Cycle
Time Too Long Flag (A401.08) will turn ON to indicate that the maximum cycle time has been exceeded.

z PLC Setup
Name Description Default
Watch Cycle Time enable setting 0: Default (1 s) 0000 hex: Watch
1: User setting cycle time of 1 s
Watch Cycle Time setting 001 to FA0 hex: 10 to 40,000 ms
(Valid only when bit 15 is set to 1 to (10-ms increments)
indicate a user setting.)

z Related Auxiliary Area Flags


Name Word Description
Cycle Time Too A401.08 Turns ON if the present cycle time exceeds the Watch Cycle
Long Flag Time set in the PLC Setup.

Monitoring the Cycle Time


The actual maximum cycle time is stored in A262 and A263 and the present cycle time is stored in
A264 and A265 every cycle.

z Related Auxiliary Area Flags


Name Word Description
Maximum Cycle Time A262 and These words contain the maximum cycle time since the start of PLC opera-
A263 tion in 32-bit binary. The value is updated every cycle. The value will be in
the following range.
0 to 429,496,729.5 ms (0 to FFFF FFFF hex) in 0.1-ms increments
The lower bytes are stored in A262 and the upper bytes are stored in A263.
Present Cycle Time A264 and These words contain the present cycle time in 32-bit binary. The value is
A265 updated every cycle. The value will be in the following range.
0 to 429,496,729.5 ms (0 to FFFF FFFF hex) in 0.1-ms increments
The lower bytes are stored in A264 and the upper bytes are stored in A265.

The average cycle time for the past eight cycles can be read from the CX-Programmer.

Additional Information

The following method is effective in reducing the cycle time.


Use JMP-JME instructions to skip instructions that do not need to be executed.

19-6 CP1E CPU Unit Software Users Manual(W480)


19 CPU Unit Cycle Time

19-2 Computing the Cycle Time


19-2-4 I/O Refresh Times for PLC Units

z I/O Refresh Times for CP-series Expansion Units and Expansion I/O Units
Unit name Model numbers I/O refresh time per Unit
Expansion I/O Units CP1W-40EDR 0.39ms
CPM1A-40EDR
CP1W-40EDT 0.39ms 19
CPM1A-40EDT
CP1W-40EDT1 0.39ms

19-2-4 I/O Refresh Times for PLC Units


CPM1A-40EDT1
CP1W-32ER 0.33ms
CP1W-32ET
CP1W-32ET1
CP1W-20EDR1 0.18ms
CPM1A-20EDR1
CP1W-20EDT 0.18ms
CPM1A-20EDT
CP1W-20EDT1 0.18ms
CPM1A-20EDT1
CP1W-16ER 0.25ms
CPM1A-16ER
CP1W-16ET 0.25ms
CP1W-16ET1
CP1W-8ED 0.13ms
CPM1A-8ED
CP1W-8ER 0.08ms
CPM1A-8ER
CP1W-8ET 0.08ms
CPM1A-8ET
CP1W-8ET1 0.08ms
CPM1A-8ET1
Analog Input Unit CP1W-AD041 0.61ms
CPM1A-AD041
Analog Output Unit CP1W-DA041 0.33ms
CPM1A-DA041
Analog I/O Units CP1W-MAD11 0.32ms
CPM1A-MAD11
Temperature Sensor Unit CP1W-TS001 0.25ms
CPM1A-TS001
CP1W-TS002 0.52ms
CPM1ATS002
CP1W-TS101 0.25ms
CPM1A-TS101
CP1W-TS102 0.52ms
CPM1A-TS102
CompoBus/S I/O Link Unit CP1W-SRT21 0.21ms

Additional Information

The I/O refresh time for the built-in I/O of the CPU Unit is included in overseeing processing.

CP1E CPU Unit Software Users Manual(W480) 19-7


19 CPU Unit Cycle Time

19-2-5 Cycle Time Calculation Example


The following example shows the method used to calculate the cycle time when only CP-series Expan-
sion I/O Units are connected to a CP1E CPU Unit.
Conditions
Item Description
CP1E CPU Unit 40-point I/O Unit 1 Unit
CP1W-40EDR
Ladder diagram 5K steps LD instructions: 2.5K steps
OUT instructions: 2.5K steps
Peripheral USB port connection Yes or no
Minimum cycle time processing None
Serial port connection None
Other peripheral servicing None

Calculation Example
Processing time

Process name Equation Peripheral USB


Peripheral USB
port not
port connected
connected
(1)Overseeing
(2)Program execution 0.55s2,500+1.1s2,500
(3)Cycle time calculation (Minimum cycle time not set.)
(4)I/O refreshing 0.39 ms
(5)Peripheral servicing (Only peripheral USB port connected)
Cycle time (1)+(2)+(3)+(4)+(5)

19-2-6 Increase in Cycle Time for Online Editing


When online editing is executed to change the program from the CX-Programmer while the CPU Unit is
operating in MONITOR mode, the CPU Unit will momentarily suspend operation while the program is
being changed.
The period of time that the cycle time is extended is determined by the following conditions.
Number of steps changed
Type of editing operations (insert/delete/overwrite)
The actual instructions that are edited
The cycle time extension for online editing is negligibly affected by the size of task programs.
If the maximum program size for a task is 8K steps, the online editing cycle time extension will be as fol-
lows:
CPU Unit Increase in cycle time for online editing
CP1E CPU Unit Maximum: 16 ms, Normal: 12 ms (for a program size of
8K steps)

When editing online, the cycle time will be extended according to the editing that is performed.
Note When there is one task, online editing is processed all in the cycle time following the cycle in which online
editing is executed (written). When there are multiple tasks (the cyclic task and interrupt tasks), online editing
is separated, so that for n tasks, processing is executed over n to n 2 cycles max.

19-8 CP1E CPU Unit Software Users Manual(W480)


19 CPU Unit Cycle Time

19-2 Computing the Cycle Time


19-2-7 I/O Response Time
The I/O response time is the time it takes from when an input turns ON, the data is recognized by the
CPU Unit, and the ladder programs are executed, up to the time for the result to be output to an output
terminal.
The length of the I/O response time depends on the following conditions.
Timing of Input Bit turning ON. 19
The cycle time

19-2-7 I/O Response Time


z Minimum I/O Response Time
The I/O response time is shortest when data is retrieved immediately before I/O refresh of the CPU
Unit.
The minimum I/O response time is calculated as follows:
Minimum I/O response time = Input ON delay + Cycle time + Output ON delay

Note The input and output ON delays depend on the type of terminals used on the CPU Unit or the model number
of the Unit being used.

:I/O refresh

Inputs:

Input ON response time


(Status read to
the CPU Unit.):
Cycle time Cycle time
Instruction Instruction
execution execution
Output ON delay
Outputs:

Minimum I/O
Response Time

z Maximum I/O Response Time


The I/O response time is longest when data is retrieved immediately after I/O refresh period of the
CPU Unit.
The maximum I/O response time is calculated as follows:
Maximum I/O response time = Input ON delay + (Cycle time 2) + Output ON delay

:I/O refresh

Inputs:

Input ON response time

(Status read to
the CPU Unit.):
Cycle time Cycle time
Instruction Instruction Instruction
execution execution execution
Output ON delay
Outputs:

Minimum I/O Response Time

CP1E CPU Unit Software Users Manual(W480) 19-9


19 CPU Unit Cycle Time

z Calculation Example
Conditions:
Input ON delay: 1 ms (normal input with input constant set to 0 ms)
Output ON delay: 0.1 ms (transistor output)
Cycle time: 20 ms
Minimum I/O response time = 1 ms + 20 ms + 0.1 ms = 21.1 ms
Maximum I/O response time = 1 ms + (20 ms 2) + 0.1 ms = 41.1 ms

Input Response Times


Input response times can be set in the PLC Setup.
Increasing the response time reduces the effects of chattering and noise. Decreasing the response
time allows reception of shorter input pulses, (but the pulse width must be longer than the cycle time).

Input response time


Input response time
Pulses shorter than the input
response time are not received
Inputs Inputs

I/O refresh I/O refresh

CPU Unit CPU Unit

z PLC Setup
Name Description Setting Default
Input Constant Settings Input Constants 00 hex: 8 ms 00 hex (8 ms)
10 hex: 0 ms
12 hex: 1 ms
13 hex: 2 ms
14 hex: 4 ms
15 hex: 8 ms
16 hex: 16 ms
17 hex: 32 ms

19-10 CP1E CPU Unit Software Users Manual(W480)


19 CPU Unit Cycle Time

19-2 Computing the Cycle Time


19-2-8 Interrupt Response Time

z Interrupt Response Time for Input Interrupt Tasks


The interrupt response time for input interrupt tasks is the time taken from when a built-in input has
turned ON (or OFF) until the input interrupt task has actually been executed.
The length of the interrupt response time for input interrupt tasks depends on the total of the hard-
ware interrupt response time and software interrupt response time. 19
Item Interrupt response time Counter interrupts
Hardware interrupt response time Upward differentiation: 50 s

19-2-8 Interrupt Response Time


Downward differentiation: 50 s
Software interrupt response time Minimum: 134 s Minimum: 134 s
Maximum: 336 s + Wait time* Maximum: 336 s + Wait time*

* The wait time occurs when there is competition with other interrupts.
As a guideline, the wait time will be 6 to 169 s.

Note Input interrupt tasks can be executed during execution of the user program, I/O refresh, peripheral servicing,
or overseeing. (Even if an instruction is being executed, execution of the instruction will be stopped to exe-
cute the interrupt task.)
The interrupt response time is not affected by the above processing operations during which the interrupt
inputs turns ON.
Input interrupts, however, are not executed during execution of other interrupt tasks even if the input interrupt
conditions are satisfied. Instead, the input interrupts are executed in order of priority after the current inter-
rupt task has completed execution and the software interrupt response time has elapsed.
The interrupt response time of input interrupt tasks is calculated as follows:
Input interrupt response time = Input ON delay + Software interrupt response time

Inputs:

Input ON response time


Ready to acknowledge
(Interrupt signal next interrupt signal
acknowledged.): Software interrupt response time

Interrupt task
execution:
Interrupt response Ladder program Return time
time for input execution time from input
interrupt task interrupt task
Cycle execution task
execution (main program):

The time from when execution of the input interrupt task is completed until
execution of the cycle execution task is resumed is 60 s.

CP1E CPU Unit Software Users Manual(W480) 19-11


19 CPU Unit Cycle Time

z Interrupt Response Time for Scheduled Interrupt Tasks


The interrupt response time for scheduled interrupt tasks is the time taken from after the scheduled
time specified by the MSKS instruction has elapsed until the interrupt task has actually been exe-
cuted.
The length of the interrupt response time for scheduled interrupt tasks is 0.1 ms max.
There is also an error of 80 s in the time to the first scheduled interrupt (0.5 ms min.).

Note Scheduled interrupt tasks can be executed during execution of the ladder program (even while an instruction
is being executed by stopping the execution of an instruction), I/O refresh, peripheral servicing, or overseeing.
The processing operation in which the scheduled interrupt occurs does not affect the interrupt processing
time.
Scheduled interrupts, however, are not executed during execution of other interrupt tasks even if the interrupt
conditions are satisfied. Instead, the interrupts are executed in order of priority after the current interrupt task
has completed execution and the software interrupt response time has elapsed.

Scheduled interrupt time

Internal timer:

Software interrupt response time


Scheduled
interrupt task:

19-12 CP1E CPU Unit Software Users Manual(W480)


19 CPU Unit Cycle Time

19-2 Computing the Cycle Time


19-2-9 Serial PLC Link Response Performance
The response times for CPU Units connected via a Serial PLC Link (polling unit to polled unit or polled
unit to polling unit) can be calculated as shown below.
If a PT is in the Serial PLC Link, however, the amount of communications data will not be fixed and the
values will change.
19
Maximum I/O response time (not including hardware delay) =

19-2-9 Serial PLC Link Response Performance


Polling unit cycle time + Communications cycle time + Polled unit cycle time + 4 ms
Minimum I/O response time (not including hardware delay) =
Polled unit communications time + 0.8 ms

Number of participat- The number of polled units to which links have been established within the
ing polled unit nodes maximum unit number set in the polling unit.
Number of non- The number of polled units not participating in the links within the maximum unit
participating polled number set in the polling unit.
unit nodes
Communications cycle Polled unit communications time Number of participating polled unit nodes +
time (ms) 10 Number of non-participating polled unit nodes.
Polled unit Communications time set to Standard:
communications 0.4 + 0.286 ((No. of polled units + 1) No. of link words 2 + 12)
time (ms) Communications time set to Fast:
0.4 + 0.0955 ((No. of polled units + 1) No. of link words 2 + 12)

19-2-10 Pulse Output Start Time


The pulse output start time is the time required from executing a pulse output instruction until pulses are
output externally.
This time depends on the pulse output instruction that is used and operation that is performed.

Instruction
execution Start time

Pulse output

Pulse output instruction Start time


SPED: continuous ?s
SPED: independent ?s
ACC: continuous ?s
ACC: independent, trapezoidal ?s
ACC: independent, triangular ?s
PLS2: trapezoidal ?s
PLS2: triangular ?s

CP1E CPU Unit Software Users Manual(W480) 19-13


19 CPU Unit Cycle Time

19-2-11 Pulse Output Change Response Time


The pulse output change response time is the time for any change made by executing an instruction
during pulse output to actually affect the pulse output operation.
Pulse output instruction Change response time
INI: immediate stop 63 s + 1 pulse output time
SPED: immediate stop 63 s + 1 pulse output time
ACC: deceleration stop 1 control cycle (4 ms) minimum, 2 control cycles
PLS2: deceleration stop (8 ms) maximum

SPED: speed change


ACC: speed change
PLS2: target position change in reverse direction
PLS2: target position change in same direction at
same speed
PLS2: target position change in same direction at
different speed

19-14 CP1E CPU Unit Software Users Manual(W480)


pp

App
Appendices

A-1 Summary of Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2


A-2 A-12
A-3 CP1E CPU Unit Instruction Execution Times and Number of Steps . . . . A-13
A-4 Ladder Programming Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-25
A-4-1 Shutter Control System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-25
A-5 Comparison with the CP1L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-29
A-5-1 Differences between CP1E and CP1L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-29

CP1E CPU Unit Software Users Manual(W480) A-1


Appendices

A-1 Summary of Instructions


There are 200 types of instructions can be used by CP1E.
The following table lists the instructions by function. Refer to the reference pages for the
detail of each instruction.
Instrucion FUN
Instruction Mnemonic Function Page
Type No.
Sequence LOAD LD - Indicates a logical start and creates an ON/OFF execution condition based on
Input Instruc- the ON/OFF status of the specified operand bit.
@LD -
tions
%LD -
!LD -
!@LD -
!%LD -
LOAD NOT LD NOT - Indicates a logical start and creates an ON/OFF execution condition based on
the reverse of the ON/OFF status of the specified operand bit.
@LD NOT -
%LD NOT -
!LD NOT -
!@LD NOT -
!%LD NOT -
AND AND - Takes a logical AND of the status of the specified operand bit and the current
execution condition.
@AND -
%AND -
!AND -
!@AND -
!%AND -
AND NOT AND NOT - Reverses the status of the specified operand bit and takes a logical AND with
the current execution condition.
@AND NOT -
%AND NOT -
!AND NOT -
!@AND NOT -
!%AND NOT -
OR OR - Takes a logical OR of the ON/OFF status of the specified operand bit and the
current execution condition.
@OR -
%OR -
!OR -
!@OR -
!%OR -
OR NOT OR NOT - Reverses the status of the specified bit and takes a logical OR with the current
execution condition.
@OR NOT -
%OR NOT -
!OR NOT -
!@OR NOT -
!%OR NOT -
AND LOAD AND LD - Takes a logical AND between logic blocks.
OR LOAD OR LD - Takes a logical OR between logic blocks.
NOT NOT 520 Reverses the execution condition.
CONDITION ON UP 521 UP(521) turns ON the execution condition for one cycle when the execution
condition goes from OFF to ON.
CONDITION OFF DOWN 522 DOWN(522) turns ON the execution condition for one cycle when the execution
condition goes from ON to OFF.

A-2 CP1E CPU Unit Software Users Manual(W480)


Appendices

Instrucion FUN
Instruction Mnemonic Function Page
Type No.

A-1 Summary of Instructions


Sequence OUTPUT OUT - Outputs the result (execution condition) of the logical processing to the speci-
Output fied bit.
!OUT -
Instructions
OUTPUT NOT OUT NOT - Reverses the result (execution condition) of the logical processing, and outputs
it to the specified bit.
!OUT NOT -
TR Bits TR - TR bits are used to temporarily retain the ON/OFF status of execution condi-
tions in a program when programming in mnemonic code.
KEEP KEEP 011 Operates as a latching relay.
!KEEP
DIFFERENTIATE DIFU 013 DIFU(013) turns the designated bit ON for one cycle when the execution condi-
UP tion goes from OFF to ON (rising edge).
!DIFU

App
DIFFERENTIATE DIFD 014 DIFD(014) turns the designated bit ON for one cycle when the execution condi-
DOWN tion goes from ON to OFF (falling edge).
!DIFD
SET SET - SET turns the operand bit ON when the execution condition is ON.
@SET -
%SET -
!SET -
!@SET -
!%SET -
RESET RSET - RSET turns the operand bit OFF when the execution condition is ON.
@RSET -
%RSET -
!RSET -
!@RSET -
!%RSET -
MULTIPLE BIT SET SETA 530 SETA(530) turns ON the specified number of consecutive bits.
@SETA
MULTIPLE BIT RSTA 531 RSTA(531) turns OFF the specified number of consecutive bits.
RESET
@RSTA
SINGLE BIT SET SETB 532 SETB(532) turns ON the specified bit in the specified word when the execution
condition is ON.
@SETB
Unlike the SET instruction, SETB(532) can be used to set a bit in a DM or EM
!SETB
word.
!@SETB
SINGLE BIT RESET RSTB 533 RSTB(533) turns OFF the specified bit in the specified word when the execu-
tion condition is ON.
@RSTB
Unlike the RSET instruction, RSTB(533) can be used to reset a bit in a DM or
!RSTB
EM word.
!@RSTB

CP1E CPU Unit Software Users Manual(W480) A-3


Appendices

Instrucion FUN
Instruction Mnemonic Function Page
Type No.
Sequence END END 001 Indicates the end of a program.
Control
NO OPERATION NOP 000 This instruction has no function. (No processing is performed for NOP(000).)
Instructions
INTERLOCK IL 002 Interlocks all outputs between IL(002) and ILC(003) when the execution condi-
tion for IL(002) is OFF.
INTERLOCK ILC 003 All outputs between IL(002) and ILC(003) are interlocked when the execution
CLEAR condition for IL(002) is OFF.
MULTI-INTERLOCK MILH 517 When the execution condition for MILH(517) is OFF, the outputs for all instruc-
DIFFERENTIATION tions between that MILH(517) instruction and the next MILC(519) instruction
HOLD are interlocked.
MULTI-INTERLOCK MILR 518 When the execution condition for MILR(518) is OFF, the outputs for all instruc-
DIFFERENTIATION tions between that MILR(518) instruction and the next MILC(519) instruction
RELEASE are interlocked.
MULTI-INTERLOCK MILC 519 Clears an interlock started by an MILH(517) or MILR(518) with the same inter-
CLEAR lock number.
JUMP JMP 004 When the execution condition for JMP(004) is OFF, program execution jumps
directly to the first JME(005) in the program with the same jump number.
JUMP END JME 005 Indicates the end of a jump initiated by JMP(004) or CJP(510).
CONDITIONAL CJP 510 The operation of CJP(510) is the basically the opposite of JMP(004). When the
JUMP execution condition for CJP(510) is ON, program execution jumps directly to the
first JME(005) in the program with the same jump number.
FOR LOOP FOR 512 The instructions between FOR(512) and NEXT(513) are repeated a specified
number of times.
NEXT LOOP NEXT 513 The instructions between FOR(512) and NEXT(513) are repeated a specified
number of times.
BREAK LOOP BREAK 514 Programmed in a FOR-NEXT loop to cancel the execution of the loop for a
given execution condition. The remaining instructions in the loop are processed
as NOP(000) instructions.
Timer and HUNDRED-MS TIM - TIM/TIMX(550) operates a decrementing timer with units of 0.1-s.
Counter TIMER
TIMX 550
Instructions
TEN-MS TIMER TIMH 015 TIMH(015)/TIMHX(551) operates a decrementing timer with units of 10-ms.
TIMHX 551
ONE-MS TIMER TMHH 540 TMHH(540)/TMHHX(552) operates a decrementing timer with units of 1-ms.
TMHHX 552
ACCUMULATIVE TTIM 087 TTIM(087)/TTIMX(555) operates an incrementing timer with units of 0.1-s.
TIMER
TTIMX 555
LONG TIMER TIML 542 TIML(542)/TIMLX(553) operates a decrementing timer with units of 0.1-s.
TIMLX 553
COUNTER CNT - CNT/CNTX(546) operates a decrementing counter.
CNTX 546
REVERSIBLE CNTR 012 CNTR(012)/CNTRX(548) operates a reversible counter.
COUNTER
CNTRX 548
RESET TIMER/ CNR/ 545 CNR(545)/CNRX(547) resets the timers or counters within the specified range
COUNTER @CNR of timer or counter numbers.
CNRX/ 547
@CNRX

A-4 CP1E CPU Unit Software Users Manual(W480)


Appendices

Instrucion FUN
Instruction Mnemonic Function Page
Type No.

A-1 Summary of Instructions


Comparison Symbol Comparison = , <> , < , <= , 300 Symbol comparison instructions compare two values and create an ON execu-
Instructions > , >= tion condition when the comparison condition is true.
328
Time Comparison LD, AND, 341 Time comparison instructions compare two BCD time values and create an ON
OR+=DT execution condition when the comparison condition is true.
LD, AND, 342
OR+<>DT
LD, AND, 343
OR+<DT
LD, AND, 344
OR+<=DT

App
LD, AND, 345
OR+>DT
LD, AND, 346
OR+>=DT
UNSIGNED CMP 020 Compares two unsigned binary values (constants and/or the contents of speci-
COMPARE fied words) and outputs the result to the Arithmetic Flags in the Auxiliary Area.
!CMP
DOUBLE CMPL 060 Compares two double unsigned binary values (constants and/or the contents of
UNSIGNED specified words) and outputs the result to the Arithmetic Flags in the Auxiliary
COMPARE Area.
SIGNED BINARY CPS 114 Compares two signed binary values (constants and/or the contents of specified
COMPARE words) and outputs the result to the Arithmetic Flags in the Auxiliary Area.
!CPS
DOUBLE SIGNED CPSL 115 Compares two double signed binary values (constants and/or the contents of
BINARY COMPARE specified words) and outputs the result to the Arithmetic Flags in the Auxiliary
Area.
TABLE COMPARE TCMP 085 Compares the source data to the contents of 16 words and turns ON the corre-
sponding bit in the result word when the contents are equal.
@TCMP
UNSIGNED BLOCK BCMP 068 Compares the source data to 16 ranges (defined by 16 lower limits and 16
COMPARE upper limits) and turns ON the corresponding bit in the result word when the
@BCMP
source data is within the range.
AREA RANGE ZCP 088 Compares the 16-bit unsigned binary value in CD (word contents or constant)
COMPARE to the range defined by LL and UL and outputs the results to the Arithmetic
Flags in the Auxiliary Area.
DOUBLE AREA ZCPL 116 Compares the 32-bit unsigned binary value in CD and CD+1 (word contents or
RANGE COMPARE constant) to the range defined by LL and UL and outputs the results to the
Arithmetic Flags in the Auxiliary Area.
Data Move- MOVE MOV 021 Transfers a word of data to the specified word.
ment Instruc-
@MOV
tions
!MOV
!@MOV
DOUBLE MOVE MOVL/ 498 Transfers two words of data to the specified words.
@MOVL
MOVE NOT MVN/ 022 Transfers the complement of a word of data to the specified word.
@MVN
MOVE BIT MOVB/ 082 Transfers the specified bit.
@MOVB
MOVE DIGIT MOVD/ 083 Transfers the specified digit or digits. (Each digit is made up of 4 bits.)
@MOVD
MULTIPLE BIT XFRB/ 062 Transfers the specified number of consecutive bits.
TRANSFER @XFRB
BLOCK TRANSFER XFER/ 070 Transfers the specified number of consecutive words.
@XFER
BLOCK SET BSET/ 071 Copies the same word to a range of consecutive words.
@BSET
DATA EXCHANGE XCHG/ 073 Exchanges the contents of the two specified words.
@XCHG
SINGLE WORD DIST/ 080 Transfers the source word to a destination word calculated by adding an offset
DISTRIBUTE @DIST value to the base address.
DATA COLLECT COLL/ 081 Transfers the source word (calculated by adding an offset value to the base
@COLL address) to the destination word.

CP1E CPU Unit Software Users Manual(W480) A-5


Appendices

Instrucion FUN
Instruction Mnemonic Function Page
Type No.
Data Shift SHIFT REGISTER SFT 010 Operates a shift register.
Instructions
REVERSIBLE SFTR/ 084 Creates a shift register that shifts data to either the right or the left.
SHIFT REGISTER @SFTR
WORD SHIFT WSFT/ 016 Shifts data between St and E in word units.
@WSFT
ARITHMETIC ASL/ 025
Shifts the contents of Wd one bit to the left.
SHIFT LEFT @ASL
ARITHMETIC ASR/ 026 Shifts the contents of Wd one bit to the right.
SHIFT RIGHT @ASR
ROTATE LEFT ROL/ 027 Shifts all Wd bits one bit to the left including the Carry Flag (CY).
@ROL
ROTATE RIGHT ROR/ 028 Shifts all Wd bits one bit to the right including the Carry Flag (CY).
@ROR
ONE DIGIT SHIFT SLD/ 074 Shifts data by one digit (4 bits) to the left.
LEFT @SLD
ONE DIGIT SHIFT SRD/ 075 Shifts data by one digit (4 bits) to the right.
RIGHT @SRD
SHIFT N-BITS LEFT NASL/ 580 Shifts the specified 16 bits of word data to the left by the specified number of
@NASL bits.
DOUBLE SHIFT NSLL/ 582 Shifts the specified 32 bits of word data to the left by the specified number of
N-BITS LEFT @NSLL bits.
SHIFT N-BITS NASR/ 581 Shifts the specified 16 bits of word data to the right by the specified number of
RIGHT @NASR bits.
DOUBLE SHIFT NSRL/ 583 Shifts the specified 32 bits of word data to the right by the specified number of
N-BITS RIGHT @NSRL bits.
Increment/ INCREMENT ++/ 590 Increments the 4-digit hexadecimal content of the specified word by 1.
Decrement BINARY @++
Instructions
DOUBLE INCRE- ++L/ 591 Increments the 8-digit hexadecimal content of the specified words by 1.
MENT BINARY @++L
DECREMENT --/ 592 Decrements the 4-digit hexadecimal content of the specified word by 1.
BINARY @--
DOUBLE DECRE- --L/ 593 Decrements the 8-digit hexadecimal content of the specified words by 1.
MENT BINARY @--L
INCREMENT BCD ++B/ 594 Increments the 4-digit BCD content of the specified word by 1.
@++B
DOUBLE INCRE- ++BL/ 595 Increments the 8-digit BCD content of the specified words by 1.
MENT BCD @++BL
DECREMENT BCD --B/ 596 Decrements the 4-digit BCD content of the specified word by 1.
@--B
DOUBLE DECRE- --BL/ 597 Decrements the 8-digit BCD content of the specified words by 1.
MENT BCD @--BL

A-6 CP1E CPU Unit Software Users Manual(W480)


Appendices

Instrucion FUN
Instruction Mnemonic Function Page
Type No.

A-1 Summary of Instructions


Symbol Math SIGNED BINARY +/ 400 Adds 4-digit (single-word) hexadecimal data and/or constants.
Instructions ADD WITHOUT @+
CARRY
DOUBLE SIGNED +L/ 401 Adds 8-digit (double-word) hexadecimal data and/or constants.
BINARY ADD @+L
WITHOUT CARRY
SIGNED BINARY +C/ 402 Adds 4-digit (single-word) hexadecimal data and/or constants with the Carry
ADD WITH CARRY @+C Flag (CY).
DOUBLE SIGNED +CL/ 403 Adds 8-digit (double-word) hexadecimal data and/or constants with the Carry
BINARY ADD WITH @+CL Flag (CY).
CARRY
BCD ADD +B/ 404 Adds 4-digit (single-word) BCD data and/or constants.

App
WITHOUT CARRY @+B
DOUBLE BCD ADD +BL/ 405 Adds 8-digit (double-word) BCD data and/or constants.
WITHOUT CARRY @+BL
BCD ADD WITH +BC/ 406 Adds 4-digit (single-word) BCD data and/or constants with the Carry Flag (CY).
CARRY @+BC
DOUBLE BCD ADD +BCL/ 407 Adds 8-digit (double-word) BCD data and/or constants with the Carry Flag (CY).
WITH CARRY @+BCL
SIGNED BINARY -/ 410 Subtracts 4-digit (single-word) hexadecimal data and/or constants.
SUBTRACT @-
WITHOUT CARRY
DOUBLE SIGNED -L/ 411 Subtracts 8-digit (double-word) hexadecimal data and/or constants.
BINARY @-L
SUBTRACT WITH-
OUT CARRY
SIGNED BINARY -C/ 412 Subtracts 4-digit (single-word) hexadecimal data and/or constants with the
SUBTRACT WITH @-C Carry Flag (CY).
CARRY
DOUBLE SIGNED -CL/ 413 Subtracts 8-digit (double-word) hexadecimal data and/or constants with the
BINARY WITH @-CL Carry Flag (CY).
CARRY
BCD SUBTRACT -B/ 414 Subtracts 4-digit (single-word) BCD data and/or constants.
WITHOUT CARRY @-B
DOUBLE BCD -BL/ 415 Subtracts 8-digit (double-word) BCD data and/or constants.
SUBTRACT @-BL
WITHOUT CARRY
BCD SUBTRACT -BC/ 416 Subtracts 4-digit (single-word) BCD data and/or constants with the Carry Flag
WITH CARRY @-BC (CY).
DOUBLE BCD -BCL/ 417 Subtracts 8-digit (double-word) BCD data and/or constants with the Carry Flag
SUBTRACT @-BCL (CY).
WITH CARRY
SIGNED BINARY / 420 Multiplies 4-digit signed hexadecimal data and/or constants.
MULTIPLY @
DOUBLE SIGNED L/ 421 Multiplies 8-digit signed hexadecimal data and/or constants.
BINARY MULTIPLY @L
BCD MULTIPLY B/ 424 Multiplies 4-digit (single-word) BCD data and/or constants.
@B
DOUBLE BCD BL/ 425 Multiplies 8-digit (double-word) BCD data and/or constants.
MULTIPLY @BL
SIGNED BINARY / 430 Divides 4-digit (single-word) signed hexadecimal data and/or constants.
DIVIDE @/
DOUBLE SIGNED /L 431 Divides 8-digit (double-word) signed hexadecimal data and/or constants.
BINARY DIVIDE @/L
BCD DIVIDE /B 434 Divides 4-digit (single-word) BCD data and/or constants.
@/B
DOUBLE BCD /BL 435 Divides 8-digit (double-word) BCD data and/or constants.
DIVIDE @/BL

CP1E CPU Unit Software Users Manual(W480) A-7


Appendices

Instrucion FUN
Instruction Mnemonic Function Page
Type No.
Conversion BCD TO BINARY BIN/ 023 Converts BCD data to binary data.
Instructions @BIN
DOUBLE BCD TO BINL/ 058 Converts 8-digit BCD data to 8-digit hexadecimal (32-bit binary) data.
DOUBLE BINARY @BINL
BINARY TO BCD BCD/ 024 Converts a word of binary data to a word of BCD data.
@BCD
DOUBLE BINARY BCDL/ 059 Converts 8-digit hexadecimal (32-bit binary) data to 8-digit BCD data.
TO DOUBLE BCD @BCDL
2S COMPLEMENT NEG/ 160 Calculates the 2' complement of a word of hexadecimal data.
@NEG
DATA DECODER MLPX/ 076 Reads the numerical value in the specified digit (or byte) in the source word,
@MLPX turns ON the corresponding bit in the result word (or 16-word range), and turns
OFF all other bits in the result word (or 16-word range).
DATA ENCODER DMPX/ 077 FInds the location of the first or last ON bit within the source word (or 16-word
@DMPX range), and writes that value to the specified digit (or byte) in the result word.
ASCII CONVERT ASC/ 086 Converts 4-bit hexadecimal digits in the source word into their 8-bit ASCII
@ASC equivalents.
ASCII TO HEX HEX/ 162 Converts up to 4 bytes of ASCII data in the source word to their hexadecimal
@HEX equivalents and writes these digits in the specified destination word.
Logic Instruc- LOGICAL AND ANDW/ 034 Takes the logical AND of corresponding bits in single words of word data and/or
tions @ANDW constants.
DOUBLE LOGICAL ANDL/ 610 Takes the logical AND of corresponding bits in double words of word data
AND @ANDL and/or constants.
LOGICAL OR ORW/ 035 Takes the logical OR of corresponding bits in single words of word data and/or
@ORW constants.
DOUBLE LOGICAL ORWL/ 611 Takes the logical OR of corresponding bits in double words of word data and/or
OR @ORWL constants.
EXCLUSIVE OR XORW/ 036 Takes the logical exclusive OR of corresponding bits in single words of word
@XORW data and/or constants.
DOUBLE EXCLU- XORL/ 612 Takes the logical exclusive OR of corresponding bits in double words of word
SIVE OR @XORL data and/or constants.
COMPLEMENT COM/ 029 Turns OFF all ON bits and turns ON all OFF bits in Wd.
@COM
DOUBLE COML/ 614 Turns OFF all ON bits and turns ON all OFF bits in Wd and Wd+1.
COMPLEMENT @COML
Special Math ARITHMETIC PRO- APR/ 069 Calculates the sine, cosine, or a linear extrapolation of the source data.
Instructions CESS @APR
BIT COUNTER BCNT/ 067 Counts the total number of ON bits in the specified word(s).
@BCNT

A-8 CP1E CPU Unit Software Users Manual(W480)


Appendices

Instrucion FUN
Instruction Mnemonic Function Page
Type No.

A-1 Summary of Instructions


Floating-point FLOATING TO FIX/ 450 Converts a 32-bit floating-point value to 16-bit signed binary data and places
Math Instruc- 16-BIT @FIX the result in the specified result word.
tions
FLOATING TO FIXL/ 451 Converts a 32-bit floating-point value to 32-bit signed binary data and places
32-BIT @FIXL the result in the specified result words.
16-BIT TO FLT/ 452 Converts a 16-bit signed binary value to 32-bit floating-point data and places
FLOATING @FLT the result in the specified result words.
32-BIT TO FLTL/ 453 Converts a 32-bit signed binary value to 32-bit floating-point data and places
FLOATING @FLTL the result in the specified result words.
FLOATINGPOINT +F/ 454 Adds two 32-bit floating-point numbers and places the result in the specified
ADD @+F result words.
FLOATINGPOINT -F/ 455 Subtracts one 32-bit floating-point number from another and places the result in

App
SUBTRACT @-F the specified result words.
FLOATING- F/ 456 Multiplies two 32-bit floating-point numbers and places the result in the speci-
POINT MULTIPLY @F fied result words.
FLOATING- /F 457 Divides one 32-bit floating-point number by another and places the result in the
POINT DIVIDE @/F specified result words.
FLOATING =F 329 Compares the specified single-precision data (32 bits) or constants and creates
SYMBOL an ON execution condition if the comparison result is true. Three kinds of sym-
<>F 330
COMPARISON bols can be used with the floating-point symbol comparison instructions: LD
<F 331 (Load), AND, and OR.
<=F 332
>F 333
>=F 334
FLOATING- FSTR/ 448 Converts the specified single-precision floating-point data (32-bit decimal- point
POINT TO ASCII @FSTR or exponential format) to text string data (ASCII) and outputs the result to the
destination word.
ASCII TO FVAL/ 449 Converts the specified text string (ASCII) representation of single-precision
FLOATING-POINT @FVAL floating-point data (decimal-point or exponential format) to 32-bit single-preci-
sion floating-point data and outputs the result to the destination words.
Table Data SWAP BYTES SWAP/ 637 Switches the leftmost and rightmost bytes in all of the words in the range.
Processing @SWAP
Instructions
FRAME FCS/ 180 Calculates the ASCII FCS value for the specified range.
CHECKSUM @FCS
Data Control PID CONTROL PIDAT 191 Executes PID control according to the specified parameters. The PID constants
Instructions WITH AUTOTUN- can be auto-tuned with PIDAT(191).
ING
TIME-PROPOR- TPO 685 Inputs the duty ratio or manipulated variable from the specified word, converts
TIONAL OUTPUT the duty ratio to a time-proportional output based on the specified parameters,
and outputs the result from the specified output.
SCALING SCL/ 194 Converts unsigned binary data into unsigned BCD data according to the speci-
@SCL fied linear function.
SCALING 2 SCL2/ 486 Converts signed binary data into signed BCD data according to the specified
@SCL2 linear function. An offset can be input in defining the linear function.
SCALING 3 SCL3/ 487 Converts signed BCD data into signed binary data according to the specified
@SCL3 linear function. An offset can be input in defining the linear function.
AVERAGE AVG 195 Calculates the average value of an input word for the specified number of
cycles.
Subroutine SUBROUTINE SBS/ 091 Calls the subroutine with the specified subroutine number and executes that
Instructions CALL @SBS program.
SUBROUTINE SBN 092 Indicates the beginning of the subroutine program with the specified subroutine
ENTRY number.
SUBROUTINE RET 093 Indicates the end of a subroutine program.
RETURNI
Interrupt SET INTERRUPT MSKS/ 690 Sets up interrupt processing for I/O interrupts or scheduled interrupts.
Control MASK @MSKS
Instructions
CLEAR CLI/ 691 Clears or retains recorded interrupt inputs for I/O interrupts or sets the time to
INTERRUPT @CLI the first scheduled interrupt for scheduled interrupts.
DISABLE DI/ 693 Disables execution of all interrupt tasks except the power OFF interrupt.
INTERRUPTS @DI
ENABLE EI 694 Enables execution of all interrupt tasks that were disabled with DI(693).
INTERRUPTS

CP1E CPU Unit Software Users Manual(W480) A-9


Appendices

Instrucion FUN
Instruction Mnemonic Function Page
Type No.
High-speed MODE CONTROL INI/ 880 INI(880) is used to start and stop target value comparison, to change the
Counter and @INI present value (PV) of a high-speed counter, to change the PV of an interrupt
Pulse Output input (counter mode), to change the PV of a pulse output, or to stop pulse out-
Instructions put.
HIGH-SPEED PRV/ 881 PRV(881) is used to read the present value (PV) of a highspeed counter, pulse
COUNTER PV @PRV output, or interrupt input (counter mode).
READ
COMPARISON CTBL/ 882 CTBL(882) is used to perform target value or range comparisons for the
TABLE LOAD @CTBL present value (PV) of a high-speed counter.
SPEED OUTPUT SPED/ 885 SPED(885) is used to specify the frequency and perform pulse output without
@SPED acceleration or deceleration.
SET PULSES PULS/ 886 PULS(886) is used to set the number of pulses for pulse output.
@PULS
PULSE OUTPUT PLS2/ 887 PLS2(887) is used to set the pulse frequency and acceleration/deceleration
@PLS2 rates, and to perform pulse output with acceleration/deceleration (with different
acceleration/deceleration rates). Only positioning is possible.
ACCELERATION ACC/ 888 ACC(888) is used to set the pulse frequency and acceleration/deceleration
CONTROL @ACC rates, and to perform pulse output with acceleration/deceleration (with the
same acceleration/deceleration rate). Both positioning and speed control are
possible.
ORIGIN SEARCH ORG/ 889 ORG(889) is used to perform origin searches and returns.
@ORG
PULSE WITH PWM/ 891 PWM(891) is used to output pulses with a variable duty factor.
VARIABLE DUTY @PWM

FACTOR
Step STEP START SNXT 009 SNXT(009) is used in the following three ways:
Instructions (1)To start step programming execution.
(2)To proceed to the next step control bit.
(3)To end step programming execution.
STEP DEFINE STEP 008 STEP(008) functions in following 2 ways, depending on its position and whether
or not a control bit has been specified.
(1)Starts a specific step.
(2)Ends the step programming area (i.e., step execution).
Basic I/O Unit I/O REFRESH IORF/ 097 Refreshes the specified I/O words.
Instructions @IORF
7-SEGMENT SDEC/ 078 Converts the hexadecimal contents of the designated digit(s) into 8-bit, 7-seg-
DECODER @SDEC ment display code and places it into the upper or lower 8-bits of the specified
destination words.
DIGITAL SWITCH DSW 210 Reads the value set on an external digital switch (or thumbwheel switch) con-
INPUT nected to an Input Unit or Output Unit and stores the 4-digit or 8-digit BCD data
in the specified words.
MATRIX INPUT MTR 213 Inputs up to 64 signals from an 8 8 matrix connected to an Input Unit and
Output Unit (using 8 input points and 8 output points) and stores that 64-bit data
in the 4 destination words.
7-SEGMENT DIS- 7SEG 214 Converts the source data (either 4-digit or 8-digit BCD) to 7-segment display
PLAY OUTPUT data, and outputs that data to the specified output word.
Serial Com- TRANSMIT TXD/ 236 Outputs the specified number of bytes of data from the RS-232C port built into
munications @TXD the CPU Unit or the serial port of a Serial Communications Board (version 1.2
Instructions or later).
RECEIVE RXD/ 235 Reads the specified number of bytes of data from the RS-232C port built into
@RXD the CPU Unit or the serial port of a Serial Communications Board (version 1.2
or later).
Clock CALENDAR ADD CADD/ 730 Adds time to the calendar data in the specified words.
Instructions @CADD
CALENDAR CSUB/ 731 Subtracts time from the calendar data in the specified words.
SUBTRACT @CSUB
CLOCK DATE/ 735 Changes the internal clock setting to the setting in the specified source words.
ADJUSTMENT @DATE
Failure FAILURE ALARM FAL/ 006 Generates or clears user-defined non-fatal errors.
Diagnosis @FAL
Instructions
SEVERE FAILURE FALS 007 Generates user-defined fatal errors.
ALARM

A-10 CP1E CPU Unit Software Users Manual(W480)


Appendices

Instrucion FUN
Instruction Mnemonic Function Page
Type No.

A-1 Summary of Instructions


Other SET CARRY STC/ 040 Sets the Carry Flag (CY).
Instructions @STC
CLEAR CARRY CLC/ 041 Turns OFF the Carry Flag (CY).
@CLC
EXTEND MAXIMUM WDT/ 094 Extends the maximum cycle time, but only for the cycle in which this instruction
CYCLE TIME @WDT is executed.

App

CP1E CPU Unit Software Users Manual(W480) A-11


Appendices

A-2

A-12 CP1E CPU Unit Software Users Manual(W480)


Appendices

A-3 CP1E CPU Unit Instruction Execution


A-3 CP1E CPU Unit Instruction

Times and Number of Steps


Execution Times and Number of
Steps
The following table lists the execution times for all instructions that are supported by the CPU Units.
The total execution time of instructions within one whole user program is the process time for program
execution when calculating the cycle time (See note.).

App
Note User programs are allocated tasks that can be executed within cyclic tasks and interrupt tasks
that satisfy interrupt conditions.

Execution times for most instructions differ depending on the CPU Unit used and the conditions when
the instruction is executed.
The execution time can also vary when the execution condition is OFF.
The following table also lists the length of each instruction in the Length (steps) column. The number of
steps required in the user program area for each instructions depends on the instruction and the oper-
ands used with it.
The number of steps in a program is not the same as the number of instructions.
Note 1 Most instructions are supported in differentiated form (indicated with , , @, and %).
Specifying differentiation will increase the execution times by the following amounts.
(unit:s)
CP1E CPU Unit
Symbol
CPU
or +0.5
@ or % +0.5

2 Use the following time as a guideline when instructions are not executed.
CP1E CPU Unit
CPU
0.05 0.30

CP1E CPU Unit Software Users Manual(W480) A-13


Appendices

Sequence Input Instructions


Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
LOAD LD 1
!LD 2 Increase for immediate refresh
LOAD NOT LD NOT 1
!LD NOT 2 Increase for immediate refresh
AND AND 1
!AND 2 Increase for immediate refresh
AND NOT AND NOT 1
!AND NOT 2 Increase for immediate refresh
OR OR 1
!OR 2 Increase for immediate refresh
OR NOT OR NOT 1
!OR NOT 2 Increase for immediate refresh
AND LOAD AND LD 1
OR LOAD OR LD 1
NOT NOT 520 1
CONDITION ON UP 521 3
CONDITION OFF DOWN 522 4

Note When a double-length operand is used, add 1 to the value shown in the length column in the fol-
lowing table.

Sequence Output Instructions


Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
OUTPUT OUT 1
!OUT 2 Increase for immediate refresh
OUTPUT NOT OUT NOT 1
!OUT NOT 2 Increase for immediate refresh
KEEP KEEP 011 1
DIFFERENTIATE UP DIFU 013 2
DIFFERENTIATE DOWN DIFD 014 2
SET SET 1
!SET 2 Increase for immediate refresh
RESET RSET 1 Word specified
!RSET 2 Increase for immediate refresh
MULTIPLE BIT SET SETA 530 4 With 1-bit set
With 1,000-bit set
MULTIPLE BIT RESET RSTA 531 4 With 1-bit reset
With 1,000-bit reset
SINGLE BIT SET SETB 532 2
!SETB 3 Increase for immediate refresh
SINGLE BIT OUTPUT RSTB 534 2
!RSTB 3 Increase for immediate refresh

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

A-14 CP1E CPU Unit Software Users Manual(W480)


Appendices

A-3 CP1E CPU Unit Instruction Execution


Sequence Control Instructions

Times and Number of Steps


Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
END END 001 1
NO OPERATION NOP 000 1
INTERLOCK IL 002 1
INTERLOCK CLEAR ILC 003 1
MULTI-INTERLOCK MILH 517 3 During interlock
DIFFERENTIATION HOLD Not during interlock and interlock not set

App
Not during interlock and interlock set
MULTI-INTERLOCK MILR 518 3 During interlock
DIFFERENTIATION RELEASE Not during interlock and interlock not set
Not during interlock and interlock set
MULTI-INTERLOCK CLEAR MILC 519 2 Interlock not cleared
Interlock cleared
JUMP JMP 004 2
JUMP END JME 005 2
CONDITIONAL JUMP CJP 510 2 When JMP condition is satisfied
FOR LOOP FOR 512 2 Designating a constant
BREAK LOOP BREAK 514 1
NEXT LOOP NEXT 513 1 When loop is continued
When loop is ended

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

Timer and Counter Instructions


Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
TIMER TIM - 3
TIMX 550 When loop is continued
COUNTER CNT - 3
CNTX 546 When loop is continued
HIGH-SPEED TIMER TIMH 015 3
TIMHX 551 When loop is continued
ONE-MS TIMER TMHH 540 3
TMHHX 552
ACCUMULATIVE TIMER TTIM 087 3
When resetting
When interlocking
TTIMX 555 3
When resetting
When interlocking
LONG TIMER TIML 542 4
When interlocking
TIMLX 553 4
When interlocking
REVERSIBLE COUNTER CNTR 012 3
CNTRX 548
RESET TIMER/ COUNTER CNR 545 3 When resetting 1 word
When resetting 1,000 words
CNRX 547 3 When resetting 1 word
When resetting 1,000 words

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

CP1E CPU Unit Software Users Manual(W480) A-15


Appendices

Comparison Instructions
Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
Input Comparison Instructions LD,AND,OR+= 300 4
(unsigned) LD,AND,OR+<> 305
LD,AND,OR+< 310
LD,AND,OR+<= 315
LD,AND,OR+> 320
LD,AND,OR+>= 325
Input Comparison Instructions LD,AND,OR+=+L 301 4
(double, unsigned) LD,AND,OR+<>+L 306
LD,AND,OR+<+L 311
LD,AND,OR+<=+L 316
LD,AND,OR+>+L 321
LD,AND,OR+>=+L 326
Input Comparison Instructions LD,AND,OR+=+S 302 4
(signed) LD,AND,OR+<>+S 307
LD,AND,OR+<+S 312
LD,AND,OR+<=+S 317
LD,AND,OR+>+S 322
LD,AND,OR+>=+S 327
Input Comparison Instructions LD,AND,OR+=+SL 303 4
(double, signed) LD,AND,OR+<>+SL 308
LD,AND,OR+<+SL 313
LD,AND,OR+<=+SL 318
LD,AND,OR+>+SL 323
LD,AND,OR+>=+SL 328
Time Comparison Instructions =DT 341 4
<>DT 342 4
<DT 343 4
<=DT 344 4
>DT 345 4
>=DT 346 4
COMPARE CMP 020 3
!CMP 020 7 Increase for immediate refresh
DOUBLE COMPARE CMPL 060 3
SIGNED BINARY COMPARE CPS 114 3
!CPS 114 7 Increase for immediate refresh
DOUBLE SIGNED BINARY CPSL 115 3
COMPARE
TABLE COMPARE TCMP 085 4
UNSIGNED BLOCK COMPARE BCMP 068 4
AREA RANGE COMPARE ZCP 088 3
DOUBLE AREA RANGE ZCPL 116 3
COMPARE

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

A-16 CP1E CPU Unit Software Users Manual(W480)


Appendices

A-3 CP1E CPU Unit Instruction Execution


Data Movement Instructions

Times and Number of Steps


Data Movement Instructions
Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
MOVE MOV 021 3
!MOV 021 7 Increase for immediate refresh
DOUBLE MOVE MOVL 498 3
MOVE NOT MVN 022 3
MOVE BIT MOVB 082 4

App
MOVE DIGIT MOVD 083 4
MULTIPLE BIT TRANSFER XFRB 062 Transferring 1 word
Transferring 1,000 words
BLOCK TRANSFER XFER 070 4 Transferring 1 word
Transferring 1,000 words
BLOCK SET BSET 071 4 Setting 1 word
Setting 1,000 words
DATA EXCHANGE XCHG 073 3
SINGLE WORD DISTRIBUTE DIST 080 4
DATA COLLECT COLL 081 4

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

Data Shift Instructions


Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
SHIFT REGISTER SFT 010 3 Shifting 1 word
Shifting 1,000 words
REVERSIBLE SHIFT REGISTER SFTR 084 4 Shifting 1 word
Shifting 1,000 words
WORD SHIFT WSFT 016 4 Shifting 1 word
Shifting 1,000 words
ARITHMETIC SHIFT LEFT ASL 025 2
ARITHMETIC SHIFT RIGHT ASR 026 2
ROTATE LEFT ROL 027 2
ROTATE RIGHT ROR 028 2
ONE DIGIT SHIFT LEFT SLD 074 3 Shifting 1 word
Shifting 1,000 words
ONE DIGIT SHIFT RIGHT SRD 075 3 Shifting 1 word
Shifting 1,000 words
SHIFT N-BITS LEFT NASL 580 3
DOUBLE SHIFT NBITS LEFT NSLL 582 3
SHIFT N-BITS RIGHT NASR 581 3
DOUBLE SHIFT NBITS RIGHT NSRL 583 3

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

CP1E CPU Unit Software Users Manual(W480) A-17


Appendices

Increment/Decrement Instructions
Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
INCREMENT BINARY ++ 590 2
DOUBLE INCREMENT BINARY ++L 591 2
DECREMENT BINARY -- 592 2
DOUBLE DECREMENT BINARY --L 593 2
INCREMENT BCD ++B 594 2
DOUBLE INCREMENT BCD ++BL 595 2
DECREMENT BCD --B 596 2
DOUBLE DECREMENT BCD --BL 597 2

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

Symbol Math Instructions


Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
SIGNED BINARY ADD WITHOUT CARRY + 400 4
DOUBLE SIGNED BINARY ADD WITHOUT CARRY +L 401 4
SIGNED BINARY ADD WITH CARRY +C 402 4
DOUBLE SIGNED BINARY ADD WITH CARRY +CL 403 4
BCD ADD WITHOUT CARRY +B 404 4
DOUBLE BCD ADD WITHOUT CARRY +BL 405 4
BCD ADD WITH CARRY +BC 406 4
DOUBLE BCD ADD WITH CARRY +BCL 407 4
SIGNED BINARY SUBTRACT WITHOUT CARRY - 410 4
DOUBLE SIGNED BINARY SUBTRACT WITHOUT CARRY -L 411 4
SIGNED BINARY SUBTRACT WITH CARRY -C 412 4
DOUBLE SIGNED BINARY SUBTRACT WITH CARRY -CL 413 4
BCD SUBTRACT WITHOUT CARRY -B 414 4
DOUBLE BCD SUBTRACT WITHOUT CARRY -BL 415 4
BCD SUBTRACT WITH CARRY -BC 416 4
DOUBLE BCD SUBTRACT WITH CARRY -BCL 417 4
SIGNED BINARY MULTIPLY 420 4
DOUBLE SIGNED BINARY MULTIPLY L 421 4
BCD MULTIPLY B 424 4
DOUBLE BCD MULTIPLY BL 425 4
SIGNED BINARY DIVIDE / 430 4
DOUBLE SIGNED BINARY DIVIDE /L 431 4
BCD DIVIDE /B 434 4
DOUBLE BCD DIVIDE /BL 435 4

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

A-18 CP1E CPU Unit Software Users Manual(W480)


Appendices

A-3 CP1E CPU Unit Instruction Execution


Conversion Instructions

Times and Number of Steps


Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
BCD TO BINARY BIN 023 3
DOUBLE BCD TO DOUBLE BINL 058 3
BINARY
BINARY TO BCD BCD 024 3
DOUBLE BINARY TO BCDL 059 3
DOUBLE BCD

App
2S COMPLEMENT NEG 160 3
DATA DECODER MLPX 076 4 Decoding 1 digit (4 to 16)
Decoding 4 digits (4 to 16)
Decoding 1 digit (8 to 256)
Decoding 2 digits (8 to 256)
DATA ENCODER DMPX 077 4 Encoding 1 digit (16 to 4)
Encoding 4 digits (16 to 4)
Encoding 1 digit (256 to 8)
Encoding 2 digits (256 to 8)
ASCII CONVERT ASC 086 4 Converting 1 digit into ASCII
Converting 4 digits into ASCII
ASCII TO HEX HEX 162 4 Converting 1 digit

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

Logic Instructions
Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
LOGICAL AND ANDW 034 4
DOUBLE LOGICAL AND ANDL 610 4
LOGICAL OR ORW 035 4
DOUBLE LOGICAL OR ORWL 611 4
EXCLUSIVE OR XORW 036 4
DOUBLE EXCLUSIVE OR XORL 612 4
COMPLEMENT COM 029 2
DOUBLE COMPLEMENT COML 614 2

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

CP1E CPU Unit Software Users Manual(W480) A-19


Appendices

Special Math Instructions


Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
ARITHMETIC PROCESS APR 069 4 Designating SIN and COS
Designating line-segment approximation
BIT COUNTER BCNT 067 4 Counting 1 word

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

Floating-point Math Instructions


Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
FLOATING TO 16-BIT FIX 450 3
FLOATING TO 32-BIT FIXL 451 3
16-BIT TO FLOATING FLT 452 3
32-BIT TO FLOATING FLTL 453 3
FLOATING-POINT ADD +F 454 4
FLOATING-POINT SUBTRACT -F 455 4
FLOATING-POINT DIVIDE /F 457 4
FLOATING-POINT MULTIPLY F 456 4
Floating Symbol Comparison LD,AND,OR+=F 329 3
LD,AND,OR+<>F 330
LD,AND,OR+<F 331
LD,AND,OR+<=F 332
LD,AND,OR+>F 333
LD,AND,OR+>=F 334
FLOATING- POINT TO ASCII FSTR 448 4
ASCII TO FLOATING-POINT FVAL 449 3

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

Table Data Processing Instructions


Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
SWAP BYTES SWAP 637 3 Swapping 1 word
Swapping 1,000 words
FRAME CHECKSUM FCS 180 4 For 1-word table length
For 1,000-word table length

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

A-20 CP1E CPU Unit Software Users Manual(W480)


Appendices

A-3 CP1E CPU Unit Instruction Execution


Data Control Instructions

Times and Number of Steps


Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
PID CONTROL WITH AUTOTUN- PIDAT 191 4 Initial execution of PID processing
ING
PID processing When sampling
PID processing When not sampling
Initial execution of autotuning
Autotuning when sampling
TIME-PROPORTIONAL OUTPUT TPO 685 4 OFF execution time

App
ON execution time with duty designation
or displayed output limit
ON execution time with manipulated vari-
able designation and output limit enabled
SCALING SCL 194 4
SCALING 2 SCL2 486 4
SCALING 3 SCL3 487 4
AVERAGE AVG 195 4 Average of an operation
Average of 64 operations

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

Subroutine Instructions
Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
SUBROUTINE CALL SBS 091 2
SUBROUTINE ENTRY SBN 092 2
SUBROUTINE RETURN RET 093 1

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

Interrupt Control Instructions


Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
SET INTERRUPT MASK MSKS 690 3 Set
Reset
CLEAR INTERRUPT CLI 691 3 Set
Reset
DISABLE INTERRUPTS DI 693 1
ENABLE INTERRUPTS EI 694 1

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

CP1E CPU Unit Software Users Manual(W480) A-21


Appendices

High-speed Counter and Pulse Output Instructions


Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
MODE CONTROL INI 880 4 Starting high-speed counter comparison
Stopping high-speed counter comparison
Changing pulse output PV
Changing high-speed counter PV
Stopping pulse output
Stopping PWM(891) output
HIGH-SPEED COUNTER PV PRV 881 4 Reading pulse output PV
READ Reading high-speed counter PV
Reading pulse output status
Reading high-speed counter status
Reading PWM(891) status
Reading high-speed counter range
comparison results
Reading frequency of high-speed counter 0
COUNTER FREQUENCY PRV2 883 4
CONVERT
COMPARISON TABLE LOAD CTBL 882 4 Registering target value table and starting
comparison for 1 target value
Registering target value table and starting
comparison for 16 target values
Registering range table and starting com-
parison
Only registering target value table for 1
target value
Only registering target value table for 16
target values
Only registering range table
SPEED OUTPUT SPED 885 4 Continuous mode
Independent mode
SET PULSES PULS 886 4
PULSE OUTPUT PLS2 887 5
ACCELERATION CONTROL ACC 888 4 Continuous mode
Independent mode
ORIGIN SEARCH ORG 889 3 Origin search
Origin return
PULSE WITH VARIABLE DUTY PWM 891 4
FACTOR

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

A-22 CP1E CPU Unit Software Users Manual(W480)


Appendices

A-3 CP1E CPU Unit Instruction Execution


Step Instructions

Times and Number of Steps


Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
STEP DEFINE STEP 008 2 Step control bit ON
Step control bit OFF
STEP START SNXT 009 2

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

App
I/O Unit Instructions
Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
I/O REFRESH IORF Refreshing 1 input word for CP1W
097 3
Expansion Unit
Refreshing 1 output word for CP1W
Expansion Unit
Refreshing 12 input words for CP1W
Expansion Unit
Refreshing 12 output words for CP1W
Expansion Unit
7-SEGMENT DECODER SDEC 078 4
MATRIX INPUT MTR 213 5 Data input value: 00
Data input value:FF
7-SEGMENT DISPLAY OUTPUT 7SEG 214 5 4 digits
8 digits

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

Serial Communications Instructions


Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
TRANSMIT TXD 236 4 Sending 1 byte
Sending 256 bytes
RECEIVE RXD 235 4 Storing 1 byte
Storing 256 bytes

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

CP1E CPU Unit Software Users Manual(W480) A-23


Appendices

Clock Instructions
Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
CALENDAR ADD CADD 730 4
CALENDAR SUBTRACT CSUB 731 4
CLOCK ADJUSTMENT DATE 735 2

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

Failure Diagnosis Instructions


Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
FAILURE ALARM FAL 006 3 Recording errors
Deleting errors (in order of priority)
Deleting errors (all errors)
Deleting errors (individually)
SEVERE FAILURE ALARM FALS 007 3

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

Other Instructions
Length ON execution
FUN
Instruction Mnemonic (steps) time Conditions
No.
(See note) (s)
SET CARRY STC 040 1
CLEAR CARRY CLC 041 1
EXTEND MAXIMUM CYCLE TIME WDT 094 2

Note When a double-length operand is used, add 1 to the value shown in the length column in the
following table.

A-24 CP1E CPU Unit Software Users Manual(W480)


Appendices

A-4 Ladder Programming Example


A-4 Ladder Programming Example

A-4-1 Shutter Control System

Shutter Operation

This example shows a ladder program that controls the following operation of a shutter control system.

App
A-4-1 Shutter Control System
A vehicle approaches the garage.
If the headlights are flashed three times within five seconds in front of the garage, a sensor detects
the light and sends a signal to open the shutter.
There are also buttons that can be pressed to open, close, and stop the shutter.

When the vehicle enters the garage, a sensor detects the vehicle and sends a signal to close the
shutter.
A button is pressed when the vehicle is going to exit the garage.

System Configuration
This section describes the configuration of the shutter control system.
The following control devices are used.

z PLC
CP1E CPU Unit with 20 Points and AC Power Input

CP1E CPU Unit Software Users Manual(W480) A-25


Appendices

z Software and Hardware for Programming


CX-Programmer
Personal computer
USB cable (one A-type male connector and one B-type male connector)

z Inputs
Button to open shutter: PB1
Button to stop shutter: PB2
Button to close shutter: PB3
Sensor to detect vehicle: SEN1
Sensor to detect headlights of vehicle: SEN2
Limit switch that turns ON when shutter is opened all the way: LS1
Limit switch that turns ON when shutter is closed all the way: LS2

z Outputs
Contacts to activate motor to open shutter: MO1
Contacts to activate motor to close shutter: MO2

A-26 CP1E CPU Unit Software Users Manual(W480)


Appendices

A-4 Ladder Programming Example


I/O Allocations for Shutter Control System

I/O bits in the CP1E CPU Unit are allocated to inputs and outputs.

z Inputs
Device Input Address
Open Button PB1 CIO 0.00
Stop Button PB2 CIO 0.01

App
Close Button PB3 CIO 0.02
Vehicle sensor SEN1 CIO 0.03
Headlight sensor SEN2 CIO 0.04

A-4-1 Shutter Control System


Open limit sensor LS1 CIO 0.05
Closed limit sensor LS2 CIO 0.06

z Outputs
Device Output Address
Open motor MO1 CIO 100.00
Close motor MO2 CIO 100.01

z I/O Allocations for a CP1E CPU Unit with 20 Points

8 inputs

Input bits CIO 0 (0.00~0.07)

Allocated
Output bits CIO 100 (100.00~100.05)

8 outputs

15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
CIO 0
Cannot be used Input bits: 8

CIO 100
Can be used as work bits Output bits: 8

Allocated

For a CPU Unit with 20 I/O points, a total of 8 input bits are allocated to the input terminal block. The
bits that are allocated are input bits CIO 0.00 to CIO 0.07 (i.e., bits 00 to 11 in CIO 0).
In addition, a total of 6 output bits are allocated to the output terminal block. The bits that are allo-
cated are output bits CIO 100.00 to CIO 100.05 (i.e., bits 00 to 05 in CIO 0).
The upper bits (bits 8 to 15) not used in the input words cannot be used as work bits. Only the bits
that are not used in the output words (bits 06 to 15) can be used as work bits.

CP1E CPU Unit Software Users Manual(W480) A-27


Appendices

Writing the Ladder Program


The ladder program that controls the operation of a shutter control system in this example is shown
below.

0.04 T0000 W0.00

Headlight sensor Timer Work bit

W0.00

Work bit

W0.00
TIM
Work bit 0000 Timer
#50
0.04

CNT
Headlight sensor 0000 Counters
T0000
#3

Timer

C0000

Counters

A200.11

P_First_Cycle First Cycle Flag

C0000 0.01 0.05 100.01 100.00

Counters Stop Button Open limit Close motor Open motor


sensor
0.00

Open Button

100.00

Open motor

0.02 0.01 0.06 100.00 100.01

Close Button Stop Button Close limit Open motor Close motor
sensor
100.01

Close motor

0.03

Vehicle sensor

A-28 CP1E CPU Unit Software Users Manual(W480)


Appendices

A-5 Comparison with the CP1L

A-5 Comparison with the CP1L


The following table shows the differences between the CP1E CPU Units and CP1L CPU Units.

A-5-1 Differences between CP1E and CP1L


Item CP1L CPU Units CP1E E-type CPU Units CP1E N-type CPU Units
Applicable Support Software CX-Programmer version 7.1 CX-Programmer for CP1E version 8.0
or higher The CX-Programmer cannot be used.

App
PT Programming Console Supported. Not supported. Not supported.
function Force-setting/resetting bits Force-setting/resetting bits
is possible only from the is possible only from the
CX-Programmer for CP1E CX-Programmer for CP1E

A-5-1 Differences between CP1E and CP1L


version 8.0. version 8.0.
Programming Device con- USB port or Option Board USB port only USB port only
nection port Note: A Programming
Device cannot be connected
to the RS-232C port.
Maximum program capacity CP1L L-type CPU Unit: 5K 2K steps 8K steps
steps (Not including comments, (Not including comments,
CP1L M-type CPU Unit: 10K the symbol table, and pro- the symbol table, and pro-
steps gram indexes.*) gram indexes.*)
(Not including comments,
the symbol table, and pro- * Program capacity restric- * Program capacity restric-
gram indexes.) tions are different from tions are different from
those of the CP1L CPU those of the CP1L CPU
Units. Units.
Maximum number of I/O 10 to 180 points 20 to 160 points 20 to 160 points
points
Maximum number of Expan- CP1L L-type CPU Unit: 1 CPU Unit with 20 I/O Points: CPU Unit with 20 I/O Points:
sion Units and Expansion I/O CP1L M-type CPU Unit: 3 None None
Units that can be connected CPU Unit with 30 or 40 I/O CPU Unit with 30 or 40 I/O
Points: 3 Points: 3
Output types Relay or transistor outputs Only relays outputs Relay or transistor outputs
Power supply AC or DC power supply Only AC power supply Only AC power supply
DM Area capacity 10K words or 32K words 2K words 8K words
Of these, 1,500 words can Of these, 7000 words can
be backed up to EEPROM. be backed up to EEPROM.
Instruction execution time LD: 0.55 s LD: 1.0s LD: 1.0s
MOV: 4.1 s MOV: 8s MOV: 8s
Instruction set 500 instructions 200 instructions 200 instructions
Instructions The instructions listed at the The following instructions are supported.
right are not supported. AHRLALTERNATE OUTPUT (ALT), MULTIWORD SHIFT
REGISTER (XSFT), CHECK CODE (CDD), ABSOLUTE
DRUM SEQUENCE (ADBD), HIGH-SPEED COUNTER
ABSOLUTE DRUM SEQUENCE (ABSDL),
INCREMENTAL DRUM SEQUENCE (INCD), RAMP
SIGNAL (RAMP), HOUR METER (AHR), and DOUBLE
HOUR METER (AHRL)
Refer to the following table CP1L Instructions Not Sup-
ported by the CP1E for instructions that are not supported
by the CP1E CPU Units.
Number of cyclic tasks 32 1 1

CP1E CPU Unit Software Users Manual(W480) A-29


Appendices

Item CP1L CPU Units CP1E E-type CPU Units CP1E N-type CPU Units
CP1W-ME05M Memory Applicable. Cannot be used. Cannot be used.
Cassette (The Memory Cassette can
be used to back up program
data, DM Area initial data,
and other data from the
built-in flash memory or to
copy the data to another
CP1L CPU Unit.)
Terminal block CP1L-L: Not removable. Not removable. Not removable.
CP1L-M: Removable.
Automatic transfer from Supported. Not supported. Not supported.
Memory Cassette at startup
Option Boards CP1L L-type CPU Unit: 1 Not supported. 1 Board
Board
CP1L M-type CPU Unit: 2
Boards
CP1W-DAM01 LCD Option Applicable. Cannot be used. Cannot be used.
Board

Built-in serial Not provided (an Option Not provided. Provided.


communications port Board must be added).
DIP switch on front panel Provided. Not provided. Not provided.
(UM write protections and (UM write protections and
status flag for DIP switch pin status flag for DIP switch pin
3 are not supported.) 3 are not supported.)
Battery Provided. (CJ1W-BAT01) Cannot be used. Sold separately
5 years (at ambient (CP1W-BAT01)
temperature of 25C) 5 years (at ambient
Built-in as standard feature. temperature of 25C)
Optional product.
Capacitor backup 5 minutes (at ambient 50 hours (at ambient 40 hours (at ambient
temperature of 25C) temperature of 25C) temperature of 25C)
Nonvolatile memory Built-in flash memory Built-in EEPROM Built-in EEPROM
(backup memory) (Contains the user pro- (Contains the user pro- (Contains the user pro-
grams, parameters, DM grams, parameters, con- grams, parameters, con-
Area initial values, com- tents of specified DM Area tents of specified DM Area
ment memory, and function words, and comment mem- words, and comment mem-
block programs.) ory.) ory.)

A-30 CP1E CPU Unit Software Users Manual(W480)


Appendices

Item CP1L CPU Units CP1E E-type CPU Units CP1E N-type CPU Units

A-5 Comparison with the CP1L


I/O memory 1:1 Link Area Provided. Not provided (function is not Not provided (function is not
(part of CIO CIO 3000.00 to CIO supported). supported).
Area) 3063.15
Serial PLC Link Provided. Not provided. Provided.
Area (part of CIO 3100.00 to CIO 3189.15 CIO 200.00 to CIO 289.15
CIO Area)
Work Area (W) 8,192 bits 1,600 bits 1,600 bits
W0.00 to W511.15 W0.00 to W99.15 W0.00 to W99.15
Holding Area 24,576 bits 800 bits 800 bits
(H)

App
H0.00 to H1535.15 H0.00 to H49.15 H0.00 to H49.15
Bits allocated Provided. Not provided (function is not Not provided (function is not
to function H512 to H1535 supported). supported).
blocks

A-5-1 Differences between CP1E and CP1L


Timers 4,096 timers 256 timers 256 timers
T0 to T4095 T0 to T256 T0 to T256
Counters 4,096 counters 256 counters 256 counters
C0 to C4095 C0 to C256 C0 to C256
DM Area 32K words 2K words 8K words
D0 to D32767 D0 to D2047 D0 to D8191
(All the data from the DM (Of these, the 1,500 words (Of these, the 7,000 words
Area can be backed up to from D0 to D1499 can be from D0 to D6999 can be
flash memory as initial backed up to EEPROM. backed up to EEPROM.
values for use at startup. The data is backed up when The data is backed up when
The data is backed up when power is interrupted and power is interrupted and
power is interrupted and then restored to RAM the then restored to RAM the
then restored to RAM the next time power is turned next time power is turned
next time power is turned ON.) ON.)
ON (DM Area Initialization
Function.)
Task Flag Area Provided. Not provided. Not provided.
Index Registers Provided. Not provided. Not provided.
(IR)
Data Registers Provided. Not provided. Not provided.
(DR)
Changing the PV refreshing Supported. Different instructions are Different instructions are
format (BCD or binary) for used in the same way as for used in the same way as for
timers/counters the CJ2 CPU Units. the CJ2 CPU Units.
Function block source Supported. Not supported. Not supported.
Function block and ST Provided. Not provided. Not provided.
language support
Address offsets Not supported. Supported ( in the same Supported ( in the same
way as for the CJ2 CPU way as for the CJ2 CPU
Units). Units).
Number of subroutines 256 128 128
Jump numbers 256 128 128
Trace Memory Provided. Not provided. Not provided.
Clock (RTC) Provided. Not provided. Provided.
Analog adjusters 1 2 2
External analog setting input Provided. Not provided. Not provided.
Quick-response inputs Provided (6 inputs) Provided (6 inputs) Provided (6 inputs)
Input interrupts Provided (6 inputs) Provided (6 inputs) Provided (6 inputs)
Scheduled interrupts Provided (2 interrupts) Provided (1 interrupt) Provided (1 interrupt)

CP1E CPU Unit Software Users Manual(W480) A-31


Appendices

Item CP1L CPU Units CP1E E-type CPU Units CP1E N-type CPU Units
High-speed counter Provided (256 interrupts) Provided (16 interrupts) Provided (16 interrupts)
interrupts
Bits allocated to interrupt CIO 0.04 to CIO 0.09 CIO 0.02 to CIO 0.07 CIO 0.02 to CIO 0.07
inputs and quick-response
inputs
Number of interrupt tasks 256 16 16
No.Interrupt task numbers Interrupt inputs: 2 and 3 Interrupt inputs: 1 Interrupt inputs: 1
Input interrupts (direct mode Input interrupts (direct Input interrupts (direct
or counter mode): modeonly; counter mode is modeonly; counter mode is
140 to 145 not supported): 2 to 7 not supported): 2 to 7
High-speed counter High-speed counter High-speed counter
interrupts: 0 to 255 interrupts: 0 to 15 interrupts: 0 to 15
High-speed counter inputs Increment, up/down, or Up/down or pulse plus direc- Up/down inputs: 100 kHz1
(pulse input methods) pulse plus direction inputs: tion inputs: 10 kHz2 counter, 10 kHz1 counter
100 kHz4 counters counters Pulse plus direction inputs:
Differential phases (4): 50 Increment input: 10 kHz6 100 kHz2 counters
kHz2 counters counters Increment input: 100 kHz2
(Internal direction bit added counters, 10 kHz4
for single-phase mode.) counters
Differential phases (4): (Internal direction bit added
5 kHz2 counters for single-phase mode.)
Differential phases (4): 5
kHz1 counter
High-speed Provided. Not provided. Not provided.
Counter Gate
Flag
Frequency Supported. Supported. Supported.
measurement
Measuring rota- Supported. Not supported. Not supported.
tion speed and
accumulative
rotations
Pulse Origin searches Supported. Not supported (because Supported.
outputs S-curve accel- Supported. CPU Units with transistor Not supported.
eration and outputs are not provided,
deceleration only those with relay out-
puts).
CW/CCW Supported. Not supported (pulse +
direction only)
Changing the Supported. Supported only for target
target position/ position.
speed during The target speed cannot be
position control changed.
or speed con-
trol
PWM outputs 2 outputs Not supported (because 1 output
(variable-duty- CPU Units with transistor
factor outputs) outputs are not provided,
only those with relay out-
puts).

A-32 CP1E CPU Unit Software Users Manual(W480)


Appendices

Item CP1L CPU Units CP1E E-type CPU Units CP1E N-type CPU Units

A-5 Comparison with the CP1L


Battery-free operation If power is interrupted for Operation is always battery If power is interrupted for
more than 5 minutes without free. more than 40 hours without
a Battery, only the data in If power is interrupted for a Battery, only the data in
the built-in flash memory will more than 50 hours, only the built-in EEPROM will be
be retained. the data in the built-in retained.
DM Area data after opera- EEPROM will be retained. Specified words in the DM
tion, Holding Area data, and Specified words in the DM Area can also be backed up.
counter values (flags, PV) Area can also be backed up.
will not be retained.
Power supply to external CPU Units with AC power CPU Units with 20 Points CPU Units with 20 Points
devices (service power) input provide a DC power with AC power input do not with AC power input do not

App
output. provide a DC power output. provide a DC power output.
CPU Units with 30 or 40 CPU Units with 30 or 40
Points provide a DC power Points provide a DC power
output. output.

A-5-1 Differences between CP1E and CP1L


Program transfer by task Supported. Not supported. Not supported.
from CX-Programmer for
CP1E version 8.0
Program Read protection Supported. Supported. Supported.
protection from the CX-Pro- (Read protection can be set
grammer by task.)
Write protection Supported. Write protection is possible Write protection is possible
using a DIP using the User Memory using the User Memory
switch Write Protect Bit (A500.11). Write Protect Bit (A500.11).
Enabling and Supported. Not supported. Not supported.
disabling over-
writing programs
from the CX-Pro-
grammer
Enabling and Supported. Not supported. Not supported.
disabling pro-
gram backup to
a Memory Cas-
sette

CP1E CPU Unit Software Users Manual(W480) A-33


Appendices

Item CP1L CPU Units CP1E E-type CPU Units CP1E N-type CPU Units
Serial communications Host Link,1:N NT Link, No- Not supported. Host Link,1:N NT Link, No-
protocols protocol, Serial PLC Link, protocol, Serial PLC Link,
and Modbus-RTU Easy and Modbus-RTU Easy
Master (A serial gateway is Master (A serial gateway is
used internally.) used internally.)
Note 1 CX-One (e.g., CX-
Programmer) con-
nection is not possi-
ble using the Host
Link protocol.
Unsolicited commu-
nications are not
supported for the
Host Link protocol.
2 Only one PT can be
connected for the
1:N NT Link protocol.
SPMA (screen data
transfer via a PLC)
is not possible
using the 1:N NT
Link protocol.
3 PTs cannot partici-
pate in the Serial
PLC Links.
4 A serial gateway is
provided for the
Modbus-RTU Easy
Master.
The following are supported: Not supported. The following are not sup-
serial gateway (functions for ported: serial gateway (func-
communications with tions for communications
OMRON components with OMRON components
(SAP/Smart FB) including (SAP/Smart FB)), toolbus,
Modbus-RTU Easy Master), 1:1 NT Link, 1:1 Link, PT
toolbus, 1:1 NT Link, 1:1 Programming Console func-
Link, PT Programming Con- tion with an NS-series PT.
sole function with an
NS-series PT.
Inverter positioning Supported. Not supported. Not supported.
functions

A-34 CP1E CPU Unit Software Users Manual(W480)


Appendices

CP1L Instructions That Are Not Supported by the CP1E

A-5 Comparison with the CP1L


Classification Mnemonic Classification Mnemonic Classification Mnemonic
Sequence Input Instruc- LD TST Double-precision Float- +D Display Instructions MSG
tions LD TSTN ing-point Instructions -D SCH
AND TST *D SCTRL
AND TSTN /D Clock Instructions SEC
OR TST RADD HMS
OR TSTN DEGD Debugging Instructions TRSM
ITST SIND Failure Diagnosis FPD
OUTB Instructions
COSD
Sequence Control CJPN Other Instructions CCS
TAND
Instructions JMP0 CCL
ASIND
JME0 FRMCV

App
ACOSD
Timer and Counter MTIM/MTIMX TOCV
ATAND
Instructions Block Programming BPRG
SQRTD
Comparison Instructions MCMP Instructions BEND
EXPD
BCMP2 BPPS

A-5-1 Differences between CP1E and CP1L


LOGD
Data Movement Instruc- MVNL BPRS
tions PWRD
XCGL EXIT(NOT)
LD, AND, OR +
MOVRW IF (NOT)
=D, <>D, <D, <=D,
Data Shift Instructions ASFT ELSE
>D, or >=D
ASLL
Table Data Processing SSET IEND
ASRL Instructions PUSH WAIT(NOT)
ROLL
FIFO TIMW(BCD)
RLNC
LIFO TIMWX(binary)
RLNL
DIM CNTW(BCD)
RORL
SETR CNTWX(binary)
RRNC
GETR TMHW(BCD)
RRNL
SRCH TMHWX(binary)
NSFL
MAX LOOP
NSFR
MIN LEND(NOT)
Symbol Math Instructions *U
SUM Text String Processing MOV$
*UL Instructions
SNUM +$
/U
SREAD LEFT$
/UL
SWRIT RGHT$
Conversion Instructions NEGL
SINS MID$
SIGN
SDEL FIND$
LINE
Data Control Instructions PID LEN$
COLM
LMT RPLC$
BINS
BAND DEL$
BISL
ZONE XCHG$
BCDS
Subroutine Instructions MCRO CLR$
BDSL
GSBS INS$
GRY
GSBN =$, <>$, <$,
Logic Instructions XNRW
GRET <=$,>$, >=$
XNRL Task Control Instructions TKON
Interrupt Control Instruc- MSKR
Special Math Instructions ROTB
tions TKOF
ROOT Basic I/O Unit Instruc- IORD Model Conversion XFERC
FDIV tions Instructions
IOWR DISTC
Floating-point Math RAD
TKY COLLC
Instructions DEG
HKY MOVBC
SIN
Serial Communications PMCR BCNTC
COS Instructions TXDU
TAN
RXDU
ASIN
STUP
ACOS
Network Instructions SEND
ATAN RECV
SQRT CMND
EXP
EXPLT
LOG EGATR
PWR ESATR
Double-precision Float- FIXD
ECHRD
ing-point Instructions FIXLD
ECHWR
DBL
DBLL

CP1E CPU Unit Software Users Manual(W480) A-35


Appendices

A-36 CP1E CPU Unit Software Users Manual(W480)

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