SBM COLLEGE OF ENGINEERING AND TECHNOLOGY, DINDIGUL –624005

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

Branch : ECE Subject : Digital electronics
Year : II Subject code : EC1201
Sem : III Faculty : Mrs.A.Packiam
QUESTION BANK
I.Two mark questions:
1. What are the steps for the analysis of asynchronous sequential circuit?
2. What are the steps for the design of asynchronous sequential circuit?
3. What is the significance of state assignment?
4. What are races and cycles?
5. Define critical race and noncritical race.
6. Write a short note on a)shared row statement b) one hot statement.
7. List the different techniques used for state assignment.
8. What is a critical race? Why should it be avoided?
9. How can essential hazards and static hazards eliminated?
10. Draw the logic symbol and construct the truth table of the following gates:
(a) 3 input OR gate (b) 3 input EX-NOR gate
11. Give the Boolean expression used for following gates
a) AND b) NOR C) EX-OR d) NOT e) OR
12. What do you mean by sequential circuit? explain with the help of block diagram.
13. Give the comparison between combinational and sequential circuits.
14. Give the comparison between synchronous and asynchronous circuits.
15. What do you mean by latches and flip flops?
16. What is race around condition? how it is avoided?
17. Draw and explain the block diagram of Moore model.
18. Compare Moore and mealy models.
19. Draw and explain the block diagram of Mealy model .
20. Draw the logic symbol and truth table of a D flip flop.
21. what is race around condition?
22. What is excitation table?
23. What is write cycle time?
24. What is meant by look ahead carry?
25. How many number of 4 X 16 decoders required to make an 8 X256 decoder?
26. Convert a SR flip flop into JK flip flop.
27. What is the advantage of master slave JK flip flop?
28. Write down the state table for T flip flop.
 29. Give an example for hazards in digital circuits.
30. What is called as pulse mode sequential circuit?
31. What is race?
32. Classify the registers with respect to serial and parallel input output.
33. How does a JK flip flop differ from the SR flip flop in its basic operation?
34. Define static memory.
35. Whether ROM is classified as a non volatile storage device? Why?
36. How will you convert JKFF into D and T flip flops?
37. What is critical race in asynchronous circuit?
38. What are the different types of programmable interconnects available in Xilinx FPGA?
39. Define hazards. Why do they occur?
40. Name two techniques used for making a critical race free state assignment.
41. A binary ripple counter uses 7 flip flops. How many distinct states does the counter
have? What is the largest binary number that can be stored in the ripple counter?
42. Define stepup time and hold time with respect to Flip Flop.
43. What are the functions of universal shift register?
44. Give an example of essential hazard in a digital.
45. Mention the application of pulse mode sequential circuits.
46. Draw the gate level logic diagram of a master slave JK FF.
47. Compare and contrast the features of mealy and moore machines.
48. What is memory cycle?
49. Draw the circuit diagram of a HTL NAND gate.
50. Draw the logic diagram of SR FF
II. Sixteen marks questions
1. Describe the steps in the design of asynchronous sequential circuits.apply these steps
To design a D FF. (16) [AU-MAY/JUN-06]
2. Write short on races and critical races. (8) [AU-NOV/DEC-04]
3. With examples, explain the different types of races in asynchronous sequential
circuits. (6) [AU-NOV/DEC-08]
4. Explain essential, static and dynamic hazards in digital circuit. given hazard – free
realization for the following Boolean function.f(A,B,C,D) =∑m(1,3,4,5,6,7,9,11,15) (16)
[AU-MAY/JUN-08]
5. Describe how to eliminate hazards from an asynchronous network.(8))
[AU-APR/MAY-05]
6. Design and implement a mod-5 synchronous counter using JK flip-flop. Draw the timing
diagram also. (16) [AU-NOV/DEC-09]
7. (a). Explain the working master slave JK flip-flop. (10)
 (b). Draw the diagram for a 3-bit ripple counter. (6) [AU-NOV/DEC-09]
8. (a). Design a 3 bit binary counter and write the truth table and output waveform.(8)
b). Design a 5 bit shift register using 5 master- slave SR flip flop. (8)
[AU-APR/MAY-08]
9. (a). Explain in detail a memory cell used in ROM. (8)
(b) Implement the following function using PLA:
F1 = Σm (3,6,7)
F2 = Σm (4,5,7) (8) [AU-MAY/JUN-09]
10. (a). Discuss a method used for race free assignments with example.(12)
(b). write short notes on ‘Output Specification’. (4) [AU-MAY/JUN-09]
11. (a). Design the following functions using PAL device.
F1 = Σm(0,1,3,4,5,7,9)
F2 = Σm(0,2,4,5,6) (10)
(b) . Write short notes on Xilinx – CLB block. (6) [AU-MAY/JUN-09]
12. (a).Mention the steps involved in the design of a digital combinational circuits with an
example. (6) [AU-APR/MAY-08]
(b). Using the simplified connection format of PLA, show how an 8*1 PROM could be
programmed to implement the logic functionF=Σ(1,4,5,7) 10) [AU-APR/MAY-08]
13. (a). Define static,dynamic essential hazards and sequential circuits. (8)
(b) For the state diagram shown, design a sequential circuit using JK flip-flops.(8)
[AU-NOV/DEC-09]