Professional Documents
Culture Documents
In this example, a DS12887, DS1687, or DS17287 is connected to a DS87C320. The DS87C320 high-speed
microcontroller is compatible with the industry-standard 8051 architecture. For related application notes, please
refer to the DS87C320 and the DS1687 Quick View data sheets.
PIN CONFIGURATIONS
TOP VIEW
PWR 1 24 VCC
N.C. 2 23 SQW
N.C. 3 22 VBAUX
AD0 4 21 RCLR
DS12887
AD1 5 20 N.C.
DS1687
AD2 6 19 IRQ
AD3 7 18 KS
AD4 8 17 RD
AD5 9 16 NC
AD6 10 15 WR
PDIP AD7 11 14 ALE
GND 12 13 CS
PDIP
1 of 15 REV: 022703
AN516: Using Multiplexed Bus Clocks with a Microcontroller
/**********************************************************************/
/* DSMux.c This program uses a 8051-type microcontroller to interface */
/* with a multiplexed-bus RTC such as a DS12887, DS1687 or DS17887. */
/* This is an example program only and is not supported by Dallas */
/* Semiconductor Maxim */
/* Revision 1.0 2/19/03 */
/**********************************************************************/
#pragma code symbols debug
#include <stdio.h> /* Prototypes for I/O functions */
#include <DS5000.h> /* Register declarations for DS5000 */
#include <absacc.h> /* needed to define xdata addresses */
#define RDADDR XBYTE[0x0004]
#define WR1ADDR XBYTE[0x0001]
#define WR0ADDR XBYTE[0x0000]
/************** definitions unique to high-speed micros **************/
sfr CKCON = 0x8e;
/***************************** Defines ********************************/
#define CLK_SECS XBYTE[0x0000] /* time, date & alarm regs */
#define CLK_SECS_ALM XBYTE[0x0001]
#define CLK_MINS XBYTE[0x0002]
#define CLK_MINS_ALM XBYTE[0x0003]
#define CLK_HRS XBYTE[0x0004]
#define CLK_HRS_ALM XBYTE[0x0005]
#define CLK_DOW XBYTE[0x0006]
#define CLK_DOM XBYTE[0x0007]
#define CLK_MON XBYTE[0x0008]
#define CLK_YR XBYTE[0x0009]
#define REGA XBYTE[0x000a] /* control registers */
#define REGB XBYTE[0x000b]
#define REGC XBYTE[0x000c]
#define REGD XBYTE[0x000d]
#define REG4A XBYTE[0x004a]
#define REG4B XBYTE[0x004b]
#define RS2 0x0f /* bits for sqw/periodic int rate select */
#define RS4 0x0e
#define RS8 0x0d
#define RS16 0x0c
#define RS32 0x0b
#define RS64 0x0a
#define RS128 0x09
#define RS256 0x08
#define RS512 0x07
#define RS1024 0x06
#define RS2048 0x05
#define RS4096 0x04
#define RS8192 0x03
#define VRT 0x80 /* battery low bit */
#define E32K 0x40 /* reg 4B */
#define DAYS "Sun\0Mon\0Tue\0Wed\0Thu\0Fri\0Sat\0"
#define DVX 0x01 /* bits for error message */
#define C887 0x02
#define VRT_SET 0x04
#define VRT2_SET 0x08
#define VLDMDL 0x10
#define CRCSEROK 0x20
/************************* Global Variables ***************************/
uchar model = -99, int_flg = 0;
/*********************** Function Prototypes **************************/
void ext0_int(void);
void writereg();
2 of 15
AN516: Using Multiplexed Bus Clocks with a Microcontroller
XBYTE[Add] = Data;
}
uchar updcrc(uchar crc, uchar val) /* ---------- calculate 8-bit CRC ---------- */
{
uchar inc, tmp;
printf("\nModel: ");
switch(model)
{
3 of 15
AN516: Using Multiplexed Bus Clocks with a Microcontroller
if( (REGA & 0x60) != 0x20) /* DV2=0 & DV1=1 for the RTC to keep time */
initstat = DVX; /* if they're not, assume we need to initialize
the RTC */
if( !(REGD & 0x80) ) initstat += VRT_SET; /* if VRT bit is set, warn that RTC
is N/G */
printf("\nInitializing RTC...");
if(model)
{
/* and assume we need to initialize the other control
registers */
REGA |= 0x10; /* select bank 1 */
REG4A = 0x08; /* PAB: power is active, clear KF bit */
REG4B = 0x00; /* disable everything */
REGA &= 0xef; /* select bank 0 */
}
}
printf("\ninitstat:%2.bx", initstat);
if( (initstat & 0x30) == (VLDMDL | CRCSEROK) ) /* if RTC has extended
features */
{
printf("\nInitializing bank 1...");
REGA = (0x20 | 0x10); /* select bank 1 */
if(!model) model = XBYTE[0x40]; /* save model number */
REG4A = 0x08; /* PAB: power is active, clear
KF bit */
REG4B = 0; /* disable everything */
}
REGA &= 0xef; /* go to bank 0 */
}
}
void kickstart() /* --------- test the kickstart function --------- */
{
int inc;
REG4A = 0x08; /***** power down the system by setting PAB to a 1 *****/
/* system will power down as code continues to execute -- not necessarily a
good practice */
REGA &= 0xef; /* select bank 0 */
}
5 of 15
AN516: Using Multiplexed Bus Clocks with a Microcontroller
void init_alrm() /* --------- set the alarm time & masks -------------- */
/* Note: NO error checking is done on the user entries! Assumes 24hr BCD mode */
{
uchar hr, min, sec, val;
CLK_SECS_ALM = sec;
CLK_MINS_ALM = min;
CLK_HRS_ALM = hr;
val = REGA;
val = val | 0x20; /* set AIE */
REGA = val;
}
void disp_ctrl_regs() /* ----------------------------------------- */
{
uchar oldval;
oldval = REGA;
printf("\nCRA: %02.bx CRB: %02.bx", REGA, REGB );
printf("\nCRC: %02.bx CRD: %02.bx", REGC, REGD );
REGA = (oldval | 0x10); /* select bank 1 */
printf("\nCR4A: %02.bx CR4B: %02.bx", REG4A, REG4B );
REGA = oldval; /* select bank 0 */
}
void disp_clk_regs() /* ----------------------------------------- */
{
if(REGB & 0x04) /* Binary data */
{
printf("\nDUT %02.bd %02.bd %02.bd %02.bd %02.bd:%02.bd:%02.bd ",
CLK_YR, CLK_MON, CLK_DOM, CLK_DOW, (CLK_HRS & 0x7f), CLK_MINS,
CLK_SECS);
if(!(REGB & 2) )
{
if(CLK_HRS & 0x80)
printf("PM ");
else
printf("AM ");
}
printf("%3s", DAYS + (CLK_DOW - 1)*4 );
}
else /* BCD data mode */
{
printf("\nDUT %02.bX %02.bX %02.bX %02.bX %02.bX:%02.bX:%02.bX ",
CLK_YR, CLK_MON, CLK_DOM, CLK_DOW, (CLK_HRS & 0x7f), CLK_MINS,
CLK_SECS);
if(!(REGB & 2) )
{
if(CLK_HRS & 0x80)
printf("PM ");
else
printf("AM ");
}
printf("%3s", DAYS + (CLK_DOW - 1)*4 );
6 of 15
AN516: Using Multiplexed Bus Clocks with a Microcontroller
}
void UIP_clk_rd() /* ------ display time using UIP ------ */
{
/* This routine shows how reading the clock might be implemented using the
UIP bit. In this case, the uC could perform other tasks, and periodically
execute the code to read the clock. The code would check the state of
the UIP bit, and wait if UIP is set. if UIP is low, you have at least
244us to read the time and date registers */
uchar stat;
7 of 15
AN516: Using Multiplexed Bus Clocks with a Microcontroller
uchar stat;
printf("\nBank 0");
for (j = 0; j <= 0x7f; ++j)
{
if(!(j % 16)) printf("\n%02.x ", j);
printf("%02.bx ", XBYTE[j]);
}
printf("Press any key ");
_getkey();
switch(model)
{
case 0x71: maxadd = 127; break;
case 0x72: maxadd = 2047; break;
case 0x74: maxadd = 4095; break;
case 0x78: maxadd = 8191; break;
default: maxadd = 0;
}
printf("\nExtended RAM");
10 of 15
AN516: Using Multiplexed Bus Clocks with a Microcontroller
switch(model)
{
case 0x71: maxadd = 127; break;
case 0x72: maxadd = 2047; break;
case 0x74: maxadd = 4095; break;
case 0x78: maxadd = 8191; break;
default: maxadd = 0;
}
if(maxadd == 0) return; /* if no extended RAM, exit */
}
11 of 15
AN516: Using Multiplexed Bus Clocks with a Microcontroller
CKCON &= 0xf8; /* set data memory cycle stretch value to 0 (2 clk strobe
width) */
while (1)
{
printf("\nDSmux--DS12887/DS1687/DS17887 Ver 1.0\n");
printf("CI Init RTC CP PIE clk rd\n");
printf("CU UIP clk rd CS Clock set\n");
printf("CE uiE clk rd K KS test\n");
printf("RW Write RAM RR Read RAM\n");
printf("ER Reg Read EW Reg Write\n");
printf("A Set alarm \n");
printf("Enter Menu Selection:");
M = _getkey();
switch(M)
{
case 'A':
case 'a': init_alrm(); break;
case 'C':
case 'c':
printf("\rEnter Clock Routine to run: C");
M1 = _getkey();
switch(M1)
{
case 'I':
case 'i': init_rtc(); break;
case 'E':
case 'e': UIE_clk_rd(); break;
case 'P':
case 'p': PIE_clk_rd(); break;
case 'S':
case 's': set_time(); break;
case 'U':
case 'u': UIP_clk_rd(); break;
}
break;
case 'E':
case 'e':
printf("\rEnter Register routine to run: E");
12 of 15
AN516: Using Multiplexed Bus Clocks with a Microcontroller
M1 = _getkey();
switch(M1)
{
case 'R':
case 'r': disp_ctrl_regs(); break;
case 'W':
case 'w': writereg(); break;
}
break;
case 'K':
case 'k': kickstart(); break;
case 'R':
case 'r':
printf("\rEnter Ram Routine to run: R");
M1 = _getkey();
switch(M1)
{
case 'C':
case 'c': break;
case 'R':
case 'r': BurstRamRead(); break;
case 'W':
case 'w': BurstRamWrite(); break;
}
break;
} /* end switch */
} /* end while */
}
13 of 15
1 2 3 4 5 6
VCC
AD0
R1008
4.7K
AD1
R1009
4.7K
AD2
R1010
4.7K
AD3
D R1011 D
4.7K
AD4
R1012
4.7K
AD5 VCC
U1000 R1013
4.7K
1 14 AD6
NC NC C1006 C1007 R1014 C1011 C1016
13 X1000 4.7K
VCC VCCR1000 22pF 22pF 0.1uF 0.01uF
12 AD7
32KHz OUT R1015
4 11 1M ohm 4.7K
GND GND
5 10 22.1184MHz VCC
VBAT GND
6 9
NC NC C1008
7 8
NC NC R1001 100pF C1010 C1015
32kBat DS32KHZ DIP MODULE 33K VCC 0.1uF 0.01uF U1012
DTRb
PSEN
1
ALE
RST
B1000 OE
ALE 11
BATTERY LE
32kBat AD0 2 19 A0
27
28
42
39
38
12
24
23
52
29
51
D0 Q0
ALE AD1 3 18 A1
D1 Q1
U1010 AD2 4 17 A2
C1000 D2 Q2
AD3 5 16 A3
VCC2
EA
PSEN
X1
X2
RTCX2
RTCX1
RST
VCC
ALE
VBAT
10pF D3 Q3
AD4 6 15 A4
CON1000 D4 Q4
AD5 7 14 A5
D5 Q5
5 GND 3 50 AD0 AD6 8 13 A6
P1.0/T2 P0.0/AD0 D6 Q6
9 4 49 AD1 AD7 9 12 A7
P1.1/T2EX P0.1/AD1 D7 Q7
4 DTR 5 48 AD2
P1.2/RXD1 P0.2/AD2
8 6 47 AD3 SN74AC573DW (20)
P1.3/TXD1 P0.3/AD3
3 RX 7 46 AD4
P1.4/INT2 P0.4/AD4
C 7 A16 8 45 AD5 C
P1.5/INT3 P0.5/AD5
2 TX A17 9 44 AD6 U1013 VCC C1012
P1.6/INT4 P0.6/AD6
6 A18 10 43 AD7 1 32
P1.7/INT5 P0.7/AD7 NC VCC
1 2 31 A15
A16 A15
RXD 15 30 A8 A14 3 30 0.1uF
P3.0/RXD0 P2.0/AD8 A14 NC
DB9 TXD 16 31 A9 A12 4 29
P3.1/TXD0 P2.1/AD9 A12 WE
IRQb 17 32 A10 A7 5 28 A13
P3.2/INT0 P2.2/AD10 A7 A13
18 33 A11 VCC A6 6 27 A8
C1001 P3.3/INT1 P2.3/AD11 A6 A8
+ 19 34 A12 A5 7 26 A9
C1002 10uF P3.4/T0 P2.4/AD12 A5 A9
20 35 A13 A4 8 25 A11
10uF P3.5/T1 P2.5/AD13 C1013 C1017 A4 A11
WRb 21 36 A14 A3 9 24
+ P3.6/WR P2.6/AD14 A3 OE
GND2
A1 11 22
VCC A1 CS
A0 12 21 AD7
16
A0 I/O7
2
6
41
40
14
13
11
1
I/O1 I/O5
RX 13 12 RXD Sheet2.sch AD2 15 18 AD4 U1016
V-
VCC
V+
10 7 DS1245Y-70 DTRb 2
GND T2IN T2OUT mount socket AD0-7
1 3
GND
U1003
RDb 1
C1003DS232A(16) VCC VCC
+ 4
10uF GND
DTR_TTL 2
15
U1007
DTRb 1
SN74AHC1G32 4
U1014 2
B DTRb 1 B
4 SN74AHC1G08
C1004 PSEN 2 U1015
VCC DTR 1
+
SN74AHC1G32 4
10uF WRb 2
R1002
10K S1000 SN74AHC1G32
U1004 U1005 1 2
RST 1 5 2 U1006 D1000 VCC
RST VCC VCC
2 4 4 2 OUT1 PWR
GND PBRST
3 1 4 RST
RST 1N751A C1014 C1018
1 OUT2 JP1000
DS1814C SN74AHC1G08 PWR 0.1uF 0.01uF
SN74AHC1G08 2
1
1
C
EA HIGH = INTERNAL Vcc on JP closed
4 2 8 3 2N3904
LOW = EXTERNAL VIN+VOUT1 B Vcc control JP open
PWR 5 2
SD VOUT2
E
C1005 9V AC IN C1019 7 1
1uF 22uF VTC SEN
R1005 4 6 VCC Design Engineer Date
GND VSET
BRIDGE1 4.7K
R1006 R1007 Project Manager Date
3
D D
ADDRESS
VCC
C2002
0.1uF
1
AD0 13 20 AD6 AD1 15 20 A2
DQ0 DQ6 DQ1 A2
AD1 14 19 AD5 VCC JP2001 AD0 16 19 A1
DQ1 DQ5 DQ0 A1
C AD2 15 18 AD4 3 2 A13 17 18 A0 Vbat C
4 1
DQ2 DQ4 3 2 GND A0
16 17 AD3
GND DQ3 B2001
DS1248Y JUMPER 4 BATTERY
Layout PCB for
4
surface
IRQb
mount socket
VCC
VCC
C2003
C2001 0.1uF
U2003 0.1uF U2005 JP2002
PWR 1 28 ALE 14 24 Vbat
PWR VCC ALE VCC 1 Vbat JP 2-1
X2000 2 27 WRb RDb 17 20 Vbat_DUT
B X1 WE RD VBAT 2 GND JP 2-3 B
32,768 3 26 Vbaux_DUT WRb 15 22 Vbaux_DUT
X2 VBAUX WR VBAUX 3
4 25 Vbat_DUT CE_OUT 13
RST VBAT CS
IRQb 5 24 KS AD0 4 2 X2001 Vbat
IRQ KS AD0 X1
A4 6 23 AD1 5 3 32,768 JP2003
A4 SQW AD1 X2
A3 7 22 RDb AD2 6 Vbaux
A3 OE AD2 1 Vbaux JP 2-1
A2 8 21 AD3 7 23
A2 GND AD3 SQW 2 GND JP 2-3
A1 9 20 CE_OUT AD4 8
A1 CE AD4 3
A0 10 19 AD7 AD5 9 1 PWR
A0 DQ7 AD5 PWR
AD0 11 18 AD6 AD6 10 18 KS Vbaux
DQ0 DQ6 AD6 KS R2000
AD1 12 17 AD5 AD7 11 Vbaux_DUT
DQ1 DQ5 AD7
AD2 13 16 AD4 19 IRQb S2000 S2001 470K
DQ2 DQ4 IRQ
14 15 AD3 12
GND DQ3 GND
16 21 1 2 1 2
GND RCLR
DS1501
DS1685-5
RCLR KS
AD0-7
Revision History:
Ltr: Description: Date: Approved by: Dallas Semiconductor
A New Design 9/26/02 CR
Title RTC Reference Design - R.T.C. Inf. 4401 S Beltwood Pkwy
Dallas Tx., 75491
Size: Tabloid Number:1 Revision: A
USA
Date: 8-Oct-2002 Time: 07:22:44 Sheet 2 of 2
File: F:\Boards\Applications\Rtc_ref_design.ddb - Documents\Sheet2.sch
1 2 3 4 5 6