The Promise and Pitfalls of Silicon Photonics

John Bowers
Director, Institute of Energy Efficiency
University of California, Santa Barbara
bowers@ece.ucsb.edu
http://optoelectronics.ece.ucsb.edu/ 1
 Acknowledgements

Collaborators
UCSB: Dan Blumenthal, Larry Coldren, Steve DenBaars, Nadir Dagli,
Jared Bauters, Jock Bovington, Hui-Wen Chen, Hsu Chang, Daoxin Dai, Martijn
Heck, Sid Jain, Geza Kurzveil, Phil Mages, Jon Peters, Jason Tien, Zhi Wang
Intel : Richard Jones, Yimin Kang, Mario Paniccia, Brian Koch, Hyundai Park, Matt
Sysak
Aurrion: Alex Fang, Greg Fish, Eric Hall
Hewlett Packard: Di Liang, Marco Fiorentino, Ray Beausoleil

Financial Support
DARPA MTO (Rodgers, Shah), Intel, Hewlett Packard, Rockwell Collins

2
 IEE Electronics/Photonics Group

•  Banerjee CMOS thermal management

•  Blumenthal Terabit Optical Ethernet
•  Bowers Low power silicon photonics
•  Coldren Photonic Integrated Circuits
•  Mishra High efficiency wireless transmitters
•  Rodwell High efficiency circuits
•  Rodoplu Wireless networks
•  Theogarajan Low power VLSI design
•  Yue High frequency CMOS communication circuits

Two new centers:

PICO: Photonic Integration for Coherent Optics (Coldren et al.) $4M
CTOE: Center for Terabit Optical Ethernet (Blumenthal et al.)
 Photonic Integration for Coherent Optics
(PICO)
Coldren, Bowers, Rodwell, Johansson (UCSB),
Yariv (Caltech), Koch (Lehigh), Campbell (UVA), Ram (MIT)

Goal: Create a new generation of photonic integration engines that provide

unprecedented and practical control of optical frequency and phase, driving a
level of sophistication that is routine today for RF into the optical domain.
–  Enabling revolutionary capabilities in sensing & communications
–  Advancing the intimacy of electronic and photonic integration with new monolithic and hybrid
materials as well as integration platforms

Ultra-Narrow Δν and
Tunable InP/Si Lasers
& Laser Arrays
Capability

THz-Bandwidth Chirped
Lidar & mmW Sources 256 QAM
1Tb/s Integrated Coherent PICs
Tx/Rx Capacity Epitaxial InP on Si
PICs
st
1 Gen Hybrid InP/Si
Laser Technology 100Gb/s All-Optical
Coherent Regeneration
100Gb/s Integrated
Tx/Rx Capacity 350 GHz fmax HBT
OPLL ASICs
st
1 Gen Optical
Phase-Locked Loops
QPSK Coherent
PICs

2009 2010 2011 2012 2013 2014

Ethernet Rx
LIDAR
 TOEC Organization and Scope
IEE

Materials Terabit Optical Ethernet Center (TOEC) Data Center Center

Center Faculty: Blumenthal (Director), Bowers, Fred Chong
Coldren, Dagli, Rodwell (Director)

Founding Industrial Affiliates

Collaborations

Stanford
Clean Slate
Institute-
McKeown

D. J. Blumenthal – Terabit Optical

Ethernet Center (TOEC), UCSB 5
What does silicon photonics (and PICO
and CTOE) have to do with Energy
Efficiency and IEE?

6
 The Problem: Power

•  Data centers and the Internet consume

~4% of electricity today
–  870 Billion kWhr/year
•  Traffic is doubling every 18 months.
–  3 years: 4x
–  6 years: 16x
–  9 years: 64x!!! (more than twice the total
electricity generated today).
7
 IP Traffic Growth

Internet traffic (exabit ps (1000 Tbps) Internet video to pc

File sharing

8
 Top 10 Global Web Companies

500 Million users in July, 2010

Donn Lee (Facebook) 9

 Modern Data Center
•  50 MW power
•  Million of servers
•  Tens of thousands of fibers

From Donn Lee (Facebook) 10

 A Wealth of Data to Move

Personal Media Business Medical Social Media Science

Human Genomics
7 EB/yr, 200% CAGR

Ave. Files on HD Retail Customer DB Clinical Image DB HD video forecast Physics (LHC)
54GB 600 TB ~1PB 12 EB/yr 300 EB/yr

Kiosks Medical Network Home Digital Robotics Sensors Medical In-Vehicle

Imaging Appliances Automation Signage Portable Infotainment

Aerospace Point of Sale Security IP Services Test & Transportation Energy Factory IP Media
Surveillance Measurement & Utilities Automation Phones

Estimating the Exaflood, Discovery Institute, 1/08; Amassing Digital Fortunes, a Digital Storage Study, CEA, 3/08 Courtesy: Rattner(2010)
 State-of-the Art Electronic
Terabit IP Router
•  Problem: Bandwidth demands scaling faster than both silicon and
cooling technologies
Maximum configuration for CRS-1  92 Tbps (80 racks)

~1 Megawatt!!!

Cisco CRS-1 Router

 The other problem: Power Density
10 3
R oc ket
Noz z le
P ower
Dens ity
(W/c m 2 )

Nuc lear
R eac tor

2
10 P entium ® 
4
A thlon
MP 

P entium ® 
II T horoug hbred ®
®
A MD 
K 6
A thlon
MP 

P entium
P ro ® ® P alomino ®
P entium 
III

1 P entium ® A MD ® 
K 5 Hot
P late

10

486

0 386
10
1.5μ 1.0μ 0.8μ 0.6μ 0.35μ 0.25μ 0.18μ 0.13μ
T ec hnolog y
node
 The solution to the heat problem is multiple cores
with a Terabit optical bus

14 P ower
Wall:
Module
H eat
F lux 
T rend

IB M
E S 9000
 P res cott
12 J ayhawk(dual)

Opportunities 
for
3D
and

L ow
P ower
Multi‐C ore

B ipolar C MO S
10
Module
Heat
F lux

S quadrons
T ‐R ex
Mckinley
8 F ujits u
V P 2000
IB M
G P
IB M
3090S

6 NT T
IB M
R Y 5

F ujits u
M‐780 IB M
R Y 7

P entium
4
P uls ar
4 IB M
3090
IB M
R Y 6
C D C 
C yber
205
Integ rated
C irc uit IB M
4381 IB M
R Y 4
2 1957 IB M
3081 Apache
F ujits u
M380 Merced
IB M
370 IB M
3033
V acuum IB M
360 P entium
II(D S IP )
0
1950 1960 1970 1980 1990 2000 2010
Y ear
of
A nnounc ement
 15
200 data lines x 5 GHz = 1 Tbps
 The Solution: Optical Interconnects

•  InP: dominant technology for

interconnects today.
–  Not CMOS compatible
•  Silicon photonics:
–  CMOS compatible
–  Integrable with CMOS electronics

16
 The Solution: Optical Interconnects
• 
3D layer stacking will be
prevalent in the 22nm
Enough Pitfalls?
timeframe

al I/O
•  Intra-chip optics can take
advantage of this

Optic
BUT: Silicon is reciprocal. How to make an isolator?

affic
technology

ptical tr
• Photonics layer (with
BUT: SiO2 is thermally
supporting electrical resistive. So, power dissipation of
active circuits)
devices moreis a problem, particularly for rings and DWDM
easily

o
signa ical

On-chip
integrated with high

ip opt
performance logic and

ls
BUT: Silicon is centrosymmetric (not
memory layers electro-optic)!
Photonic
Off-ch Plane
Memory Plane
So, • how to can
Layers integrate modulators?
be separately Logic Plane
optimized for performance
and yield
BUT: Silicon has an indirect gap and is a Kash,
poor absorber
“Photonics (not
in Supercomputing:

1.55 µm)! So, what about photodetectors?

the Road to Exascale,” IPNRA, 2009

BUT: Silicon has an indirect gap and doesn’t emit light!

So, how to integrate sources?
 A Half Century of Innovation
1960 Today

Lasers 50
years

First Laser Countless apps

(Schawlow and Townes)
•  Practical usages not known upon invention
• Laser has impacted industries from medicine to
manufacturing to entertainment and more
•  High speed communications is driven by lasers
Courtesy: Rattner (Intel)
 A Half Century of Integration
1959 Today

~50
Silicon years

First Silicon IC Billions of Transistors

(Noyce)

•  We have gone from 2 transistors to 2 billion

•  Integrated circuits has transformed society
•  Silicon manufacturing has made this all possible

Courtesy: Rattner (Intel)

 Bringing Si Manufacturing to the Laser

Lasers Si Manufacturing

OPTICAL
ANYWHERE,
INCREDIBLE
Very high High volume, POTENTIAL
bandwidth low cost

Long distances
InP Highly Silicon
Photonic integrated Photonic
Immunity Integrated
to Six Generations
Integrated
electrical noise
circuits Scalability circuits
Year
of
Production 1995 1998 2001 2004 2007 2010 2013 2016
DRAM
1/2
Pitch
(nm) 270 190 130 90 65 43 32 22
Wafer
Size
(mm) 150 200 200 200 300 Courtesy:
300 300
Rattner 450
(Intel)
 Why Silicon Photonics?

Utilize advanced fabrication technologies for low cost, high volume integrated photonics.
 Silicon Does Have Advantages…

•  Cheaper substrates
•  Larger substrates (>300 mm)
•  Large fabrication infrastructure (32 nm 300 mm fabs)
•  Improved process control-critical for large scale integration.
•  Reduced two photon absorption (100x less)
•  Lower loss waveguides: <0.3 dB/cm
•  Higher thermal conductivity (κ) of
–  Waveguides (Si has 30x higher κ than InGaAsP)
–  EAMs or PD Absorbers: Ge has 16x higher κ than InGaAs
•  Excellent APD characteristics
–  K factor: 0.02 versus 0.6
–  Gain bandwidth product: 850 GHz versus 160 GHz
22
 Silicon light emission – How?

•  Bulk silicon
•  Low dimension Silicon
–  Silicon nanocrystal (Pavesi, …)
–  Periodic nanopatterned crystalline silicon (Jimmy Xu)
•  Er dopants (Dal Negro,…)
•  Avoid direct interband transition
–  Raman laser (UCLA/Intel)
•  Another material for gain (hybrid approach)
–  Epitaxial
•  Ge
•  Quantum Dot
•  Pillars
•  InGaAsP (Mages)
–  Bonding
•  Dice level
•  Wafer level (BCB or Molecular) 23
Bulk silicon LED

Solar cell forward bias

~1% external quantum efficiency

M. A. Green et al., Nature 412, 805 (2001)

24
 Field effect electroluminescence

Sequential injection
of electron and hole

25
R. J. Walters, G. I. Bourianoff and H. A. Atwater, Nature Materials 4, 143 (2005)
 Nanopatterned Crystalline Silicon

26
26
S. G. Cloutier, P. A. Kossyrev and J. Xu, Nature Materials 4, 887 (2005)
 Emission mechanism

Nano-patterning creates a densely packed array of

Emissive Structural Deformation (ESD) zones in the side-
wall region of the nano-holes

J. Xu, IEEE International Conference on Group IV Photonics, Ottawa, Canada (2006), FA1. 27
 Silicon nanoclusters: waveguides

•  Si-nc embedded in SiO2 can provide optical gain (red

wavelengths);
•  Slot waveguides provide high SiO2 confinement and
small cross-section;
•  Si-nc creates localization of injected carriers at
luminescent centers (Er3+ for infrared)

28
N. Daldosso and L. Pavesi, Laser & Photon. Rev., 2009
 Silicon nanoclusters: LED

•  EL power efficiency values for LED devices:

–  0.01–0.03% for pure Si-nc;
–  0.2–0.3% for rare-earth ion doped
•  For high EL efficiency: bipolar injection needed
–  issue: electron tunneling barrier << hole barrier

29
N. Daldosso and L. Pavesi, Laser & Photon. Rev., 2009
 Rare earth doped light emitting MOS

M.E. Castagna et al., Materials Science and Engineering B 105, 83 (2003) 30

30
 Use Er:SiN
Dal Negro (Boston Univ)

•  EL centered at 1535 nm (Er 4I13/2)

–  Small peak at 980 nm (Er 4I11/2)

31

S. Yerci et al., IPR 2010

 CW Ring Raman silicon laser

Directional coupler 20
Pump A (0.22, 0.20)
B (0.21, 0.04)
15 Fit A
Laser

Laser output (mW)

Fit B
output

n-region V bias 10
23% slope efficiency
5

10
p-region Ring cavity
0 0
-10 0 50 100 150 200
Relative Power (dB)

-20 70dB Coupled Pump Power (mW)

-30
-40
-50
-60 A pump laser is still needed
-70
-80
-90
1684 1685 1686 1687
Wavelength (nm)
32
H. Rong, et al, Opt. Express 14, 6705-6712 (2006)
 Hybrid Approaches:
Use another material for gain

•  Epitaxial growth on Si substrate

–  Strained Germanium (MIT)
–  Quantum Dot (Michigan)
–  MOCVD nanopillars on Si (UC Berkeley)
–  Epitaxial layer overgrowth (Mages, Shultz,
Palmstrom, DenBaars, Bowers, UCSB)
•  Bonded III-V layers on Si substrate
–  BCB (Ghent)
–  Molecular (UCSB, Intel, Caltech, TIT)
33
 Direct Gap Transition of Ge by Tensile
Strain and n-type doping

• Efficient emission at 1550-1620 nm: 0.2-0.3% tensile strain plus

• n-type doping to compensate energy difference between Γ and L valleys.
• Threshold also observed at ~5µJ/pulse (30 kW/cm2).

Liu et al, Opt. Express. 15, 11272 (2007) MIT 34

 Quantum Dot Lasers on Silicon
Bhattacharya, University of Michigan
GaAs 0.2 µm
Al0.4Ga0.6As:Be 1.0 µm
GaAs 500 Å

region
Active
GaAs 350 Å ×5
GaAs 350 Å
GaAs 500 Å
Al0.4Ga0.6As:Si 1.0 µm
GaAs:Si 0.8 µm
GaAs 500 Å

QD buffer ×10
layer
In0.15Ga0.85As
50 Å
GaAs 500 Å
InAs
GaAs buffer 2.0 µm 180 mA
QDs
Si substrate

f-3dB = 5.5 GHz

Self-organized quantum dots, by
Ith~ 50mA
virtue of the large strain fields, 400X5µm2
can inhibit the propagation of
dislocations.

Z. Mi, J. Yang, P. Bhattacharya, Proc. IEEE 97, 1239 (2009)

 Silicon light emission – How?

•  Another material for gain (hybrid

approach)
–  Bonding: Die level
–  Flip-chip bonding

36
 Die bond lasers one at a time (Luxtera)

Flip-chip bonded lasers

wavelength 1550nm
passive alignment
non-modulated = low cost/reliable

Fiber cable plugs here

Ceramic Package
 Heterogeneous integration
Step 1: Bond InP-dies on SOI waveguide
InP III-V dies

Si
SOI-waveguide wafer
Step 2: Remove substrate
BCB or SiO2
SiO2

Si
8 lasers
Step 3: Process lasers at wafer scale

SiO2
Waveguide bundel

Si
38
 Heterogeneous integration
Two alternatives for the die-to-wafer bonding process
•  Adhesive layer bonding •  Molecular bonding
–  Planarization and bonding in single –  InP on SOI-waveguides (UCSB,
step (IMEC-Ghent University) Intel, CEA-LETI, TRACIT) [2,3]
–  Ultra-thin bonding layers (sub 200nm
demonstrated) [1]

InP-layer

Si-wire

[1] G. Roelkens et al., “Adhesive Bonding of InP/InGaAsP Dies to Processed Silicon-On-Insulator Wafers using DVS-bis-Benzocyclobutene”, J.
Electrochem. Soc., Volume 153, Issue 12, pp. G1015-G1019 (2006)
[2] D. Liang469. D. Liang, G. Roelkens, R. Baets, J. E. Bowers , "Hybrid Integrated Platforms for Silicon Photonics," Materials , 3 ( 3 ), 1782-1802 ,
March 12 , 2010 39
39
[3] M. Kostrzewa et al., 'InP dies transferred onto silicon substrate for optical interconnects application ', Sensors & Actuators A 125 (2006) 411-414
 Hybrid Silicon Photonics

–  Optical gain from III-V Material

–  Efficient coupling to silicon passive
photonic devices
–  No bonding alignment necessary: suitable
Alex Fang for high on
Silicon rib waveguide volume CMOS
SOI wafer–  All back end processing low temperature
(<350 C)
–  CW lasing to 105 C
7 lasers operating c.w.
III-V active region simultaneously
Direct Gap III-V
InGaAlAs

Silicon
A.W. Fang, et al. EEE Photonics Technology Letters , 18 ( 10 ), 1143-1145 , May 15 , 2006
Liang and Bowers, Nature Photonics, 4, 511, Aug. 2010. 40
 Scaling of Bonded Wafers
150 mm (6”)

Di Liang

100 mm (4”) 50 mm (2”)

2 cm
These wafers have patterned optical waveguides on SOI with 2 micron GaInAsP
layer on top.
Oxygen plasma enhanced bonding: 300 C, 30 minutes
• D. Liang, G. Roelkens, R. Baets, J. E. Bowers , "Hybrid Integrated Platforms for Silicon Photonics," Materials , 3 ( 3 ),
1782-1802 , March 12 , 2010
 Photoluminescence study
Epi Grown by Oakley et al.
Lincoln Labs
PL improves after bonding

Before
bonding

5.4 V 68 nm

After
bonding

5.7 V 40 nm
Wavelength Intensity FWHM
 105 C CW 1310 nm laser

•  1310 nm important for

FTTH and data
communications.
•  Max fiber coupled output
power: 5.5 mW
•  Max operation temperature:
105 °C
•  T0: 80 °C
•  Injection efficiency: 52 %

Chang et al., Optics Express 15(18), 11466, August (2007).

 Silicon Evanescent DFB Lasers

Alex Fang

44
 QWI DFB Array

On chip gain (dB)

Gain Gain

Siddharth Jain

1240 1260 1280 1300 1320 1340 1360

Wavelength (nm)
-30
Bandgap Bandgap A
-40 B

Power (dBm)
-50

-60

-70

-80

-90
1240 1260 1280 1300 1320 1340 1360

Wavelength (nm)
ISLC 2010, Kyoto , Japan
WA3 9.15 - 9.30 Integrated Broadband Hybrid Silicon DFB Laser Array using Quantum Well Intermixing
 Hybrid Silicon Microring Laser

Di Liang
Confinement: MQW: 5.5%; silicon: 52%

III-V

Si

D. Liang, et al. Optics Express , 17 ( 22 ), 20355-20364 , October 23 , 2009

 Threshold Improvement

D. Liang et al., Group IV Photonics 2009 47

 Hybrid Silicon Evanescent
Optical Amplifiers

III-V active region

Silicon waveguide on
SOI wafer

8 AMPs 8 detectors
•  Impact
–  Electrically pumped amplifiers (unlike Raman or Erbium
amplifiers)
–  Wider wavelength range than erbium amps: 1310 nm, S, C,
L band operation
•  Issues:
–  Minimize reflections at transitions for spectrally flat gain,
and high gain.
48
H. Park et al., PTL, 19(4), 230, February (2007).
 Silicon optical modulators
(1) MZ silicon modulator

Intel. A. Liu. 40Gbps IBM. W. Green. 10Gbps

(2) Microring/disk modulator

HKUST. A. Poon. 0.5 Gb/s Cornel Univ. M. Lipson. 12.5Gpbs

49
 Index Change by Carrier Depletion

Si

Si = Plasma +….
>10x
III-V = Plasma + BF + Pockels + Kerr +….

H.-W. Chen et al., “25Gbps Hybrid silicon switch using a capacitively

loaded traveling wave electrode,” Opt. Exp. 18, 1070 (2010).
 Capacitively Loaded Slotline MZI
500um long

Δv*device length(mm% )
20 35 Ω
40 Ω
50 Ω
10

Hui Wen Chen

-10

-20
•  Modulation is done by loaded “T” section
40 50 60 70 80 90 100
–  Implant is used to isolate different T sections
Filling factor(% )
•  Bragg frequency is around 10 THz
•  Velocity match and increase impedance to 50 ohm
•  25 Gbit/s Bandwidth
25 Gb/s
•  40 Gbit/s Modulation
•  500 micron long

Hui-Wen Chen, GFP 2009 51

 High Speed Hybrid Silicon Switch
13 (35ps) 14 (25ps)
40Gb/s data stream
2->4
-5 2->3
1->4
-6 1->3
BtoB
-7 Linear (1->3)
log(BER)

Linear (1->4)
Linear (2->4) 23 (35ps) 24 (25ps)
-8 Linear (2->3)
Linear (BtoB)
-9

-10

-11
-30 -29 -28 -27 -26 -25 -24 -23
Received Power (dBm)
•  BER test
–  Pattern: 231-1 NRZ PRBS at 40Gb/s
–  Switch voltage : 2V
–  Power penalty : <1.5 dB for all ports configuration

Hui-Wen Chen, IPR (2010) 52

 Power savings – Optical Switches

1.E+03
1.E+02
Energy
per
bit
(nJ)

1.E+01
1.E+00
1.E‐01
100,000x lower
1.E‐02
1.E‐03
1.E‐04
1.E‐05
1.E‐06
Inherent
 Amplified
 32
Tbit/s
 Ethernet
 Core
 PON
ONU IPTV

PIC PIC PIC
 Switch Router Server
system

•  Eliminating OEO conversion, and switching optically eliminates

about 1W per Gbit/s of information transmission. For a 1 Tbit/s
switch, that is a savings of 10 kW per node.
•  Collaboration with Luke Theogarajan (Luiz Chen)
 Hybrid Silicon Filters

Cell response with thermal tuning

Lower loss waveguides

More compact design 54
 Integrated optical buffers and
synchronizers
back-to-back

5 circulations

Geza Kurczveil

Buffer

AWG
Digital
Tunable
Laser
 Triplexers
Important for fiber to the home (FTTH) receivers
Integrated:
Laser
1310/1500 nm MUX MMI
MZI 1550/1490 MUX
Andy Chang
PDs

Chang et al. Optics Express (2010) 56

Intel Press Release July 2010 57
 58
Rattner, IPR 2009
 High Performance Computing Scaling
enabled by Optical Interconnects
10 Peta- OI at ~100 fJ/bit*
FLOPS “Peta-FLOPS in
a rack”

1 Peta-
FLOPS OI at ~1 pJ/bit
Computational Throughput

100
TFLOPS

HPC performance space

10 expanded by Chip-to-Chip
TFLOPS
Optical Interconnects
electrical inter-chip
interconnect barrier
1 overcome by OI
TFLOPS

100
GFLOPS
10 MW 1 MW 100 kW 10 kW 1 kW
Power Consumption *D. A. B. Miller, IEEE Proc., 2009

Saving power in supercomputers: Higher bisectional bandwidth

and 100 x lower power!
 Summary

FP, ML, DFB, and DBR lasers Waveguide detector and amplifier
(Fang et al., IEEE PTL, 20, 2008 )
Ring
laser
 (Park et al.,IEEE PTL,19 , 2007)

What’s Missing?
MLL
 Ultra low threshold lasers (low power is key).
High power optical amplifiers AMP
detector
Short pulse mode locked lasers
DBR

Isolators
Polarizers
Polarization Rotators Microring resonator laser
DFB
 (Liang et al.,FA5, postdealine, GFP2009)
Migration to 300 mm substrates: ELO
Hui-Wen Chen | PS 2010 | 60