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With the power electronics technology and the development of large-scale integrated
circuits, based on the integrated circuit consisting of SPWM Frequency Control System for its
simple structure, reliable operation and significant energy-saving, cost-effective to highlight the
advantages of higher and been widely used. In this paper, the variable frequency speed regulation
system based on large-scale application-specific integrated circuits as the core consisting of
HEF4752 control circuit, HEF4752 generated by the three-phase SPWM signal isolation,
amplification, the drivers posed by the three-phase IGBT inverter, so that the output SPWM
waveform, the realization of asynchronous motor VVVF.

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The whole system hardware circuit by the main circuit, control circuit, driver circuit,
protection circuits, etc., the circuit diagram shown in Figure 1.

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Main circuit for the AC / DC / AC inverter circuit by the three-phase rectifier bridge,
filter, composed of three-phase inverter. Three-phase alternating current by the bridge rectifier,
the received DC voltage by the ripple filter capacitor after the supply inverter.

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Control circuit diagram shown in Figure 2. In the control circuit, respectively, generated
by the three delayed CD4046 Clock (OCT) and the reference clock (RCT), clock frequency
control (FCT) and voltage-controlled clock (VCT) 3 clock signal supply path HEF4752, have
three-phase 6 by HEF4752 SPWM waveform Road after the adoption of PV isolation to control
the main circuit.



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HEF4752 is LOCMOS process of large-scale integrated circuits, designed to generate

three-phase SPWM signal. Its drive to enlarge the output by the isolated, the GTO and GTR can
be driven inverter, in exchange for VVVF control device in. The pin as shown in Figure 3.

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The main features are as follows:
1) to produce three pairs of complementary 120 ° phase SPWM control pulses applied to
the structure of three-phase inverter bridge;
2) the use of multi-carrier than the automatic switching mode, with the inverter output
frequency, and automatically increase the carrier-class than to suppress the output of low-
frequency harmonics due to the high torque generated by the pulse and noise, such as
adverse impact. Adjustable modulation frequency range of 0 ~ 100Hz, and can
 synchronize the inverter output voltage adjustment;
3) To prevent the inverter bridge arm straight up and down, in each inter-pulse phase
control insert dead interval, continuously adjustable interval.

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HEF4752 28 foot standard dual in-line package DIP chips, it has seven control input, four
clock input, the output drive signals 12, control output 3. Description of the pin functions as
listed in Table 1.

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Pin Name Function

1 OBC1B Switching converter with signal 1

2 OBM2B Signal of the main switch 2

3 OBM1B 1-phase main switch signal

The maximum switching frequency reference

4 RCT
clock

5 CW Phase motor control signal

6 OCT Delayed output clock

7 K Choice between delayed interlocking

8 ORM1 R-phase main switch signal 1

9 ORM2 R-phase main switch signal 2

10 ORC1 R-phase switch signal converter 1

11 ORC2 R-phase switch signal converter 2

12 FCT Clock frequency

13 A Reset input control

14 VSS Grounding terminal

 15 B Test circuit with signal

16 C Test circuit with signal

17 VCT Voltage clock

18 CSP Current sampling pulse

19 OYC2 Y-phase converter 2 switch signal

20 OYC1 Y-phase switch signal converter 1

21 OYM2 Y-phase main switch signal 2

22 OYM1 Y-phase main switch signal 1

23 RSYN R-phase synchronous signal

24 L Stop / start system

25 I Select transistor / thyristor mode

26 VAV Average voltage

27 OBC2 B-phase switch signal converter 2

28 VDD Operating voltage (10V)

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1) Enter the pin I used to determine the inverter output drives the choice of model, when the pin
when I was low, the drive mode is the transistor, when the pin I was high, the thyristor-driven
model.
2) Enter the control signal K and the clock input pin pin joint decision OCT inverter output
signal each time the interlocking postponed.
In order to prevent the same bridge inverter arm of two tubes at the same time turn-on, the
length of interlocking delayed interval mode and thyristor trigger pulse frequency and width, see
table 2.










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Interlocking delayed Trigger pulse frequency / Trigger pulse width /

K
interval / ms kHz ms

0 8/fOCT fOCT / 8 2/fOCT

1 16/fOCT fOCT/16 4/fOCT

In accordance with the requirements of the main circuit, select interlocking delayed
interval td = 10ȝs, where to buy low K, the chain cycle delay td = 8/fOCT, that is 0.01ms =
8/fOCT, it is
fOCT = 800kHz (1)
3) phase sequence input pin used to control motor turn CW when CW-pin low, the phase
sequence for R, B, Y; When the pin is high CW, the phase sequence for R, Y, B.

4) input pin used to control module L start / stop. IGBT-IPM module when there were
PM25RSK120 flow, under-voltage, short circuit or overheating, such as failure into a low-level
fault signal. So that a low level L, the blockade of all HEF4752 PWM drive output, play a role
in the protection switch. In case of trouble-free, L for the high, lifting of the embargo

5) control input pin A, B, C used in the experiments for the manufacturing process, the work
must be received pin VSS (low). But there is another pin A useful, or just electricity, the pin A
high home of the IC chip is initialized by the reset signal used.

6) clock input pin FCT and VCT for coordination and control of the inverter output frequency
and voltage. FCT pin controls the inverter output frequency fout, in order to control the motor
speed. Pin in the system clock frequency for the FCT

fFCT = 3360 × fout = 3360 × 55 = 184kHz (2)

100% modulation when the maximum output frequency fout (M) for
 fout (M) = fle (0.624Ud) / Ule = 66 × (0.624 × 530) / 380 = 58Hz (3)
Where: fle for the motor rated frequency;
Ule's rated voltage for the motor RMS.

Circuit in fFCT continuously adjustable 0 ~ 184kHz, corresponding to the range of fout

adjustable
0-58Hz

VCT is a voltage-controlled clock speed in order to ensure in the course of the main
motor for the constant flux, that is, the electrical voltage and frequency than the set up is a
constant, frequency fVCT by type (4) determined fVCT decision by the amplitude of output
waveform.

fVCT (NOM) = 6720fout (M) = 6720 × 58 = 390kHz (4)

7) input clock RCT is fixed clock, used to set the maximum inverter switching frequency fs
(MAX), here select the inverter's maximum switching frequency of 2.8kHz, the input clock
frequency of the RCT

fRCT = 280fs (MAX) = 280 × 2.8 = 780kHz (5)

To simplify the line, can fRCT = fOCT = 800kHz, which saved more than a harmonic
oscillator. It is worth noting: the ratio of fFCT / fVCT (NOM), less than 0.5 when the modulation
is sinusoidal; higher than 0.5 to the rectangular wave-wave changes, about 2.5 to achieve full
rectangular wave output; higher than 3, due to internal synchronization circuits loss of function,
waveform becomes unstable, we can see 3 of the upper limit for the frequency ratio.

In this system, fFCT check 184Hz, fVCT (NOM) from 390Hz, ratio of 184/390 = 0.47
<0.5, for sinusoidal output waveform, which can effectively reduce harmonics, reduce the motor
vibration and noise, maintaining good the mechanical properties.
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The following is the control system, that is, the waveform of Figure 2 of the sampling
and analysis, as a result of the use of power supply +12 V, so all output level +12 V.
Figure 4, respectively, of the three waveform CD4046 feet from 3 feet to 4-pin, respectively,
from the VCT, FCT, OCT and RCT of the square waveform, the cycle of 2.6ȝs, 5.4ȝs, 1.3ȝs,
corresponding to the frequency of were fVCT = 390kHz, fFCT = 184kHz, fRCT = fOCT =
800kHz
 Figure 5 is HEF4752 feet 2 feet 3 resulting SPWM waveform, which can be seen from
the diagram in the phase of the waveform is the contrary, the existence of dead time at the same
time, Figure 5 (b) to Figure 5 (a) after amplification waveform from Fig 5 (b) can be seen as a
dead time td = 10ȝs. From the pin 8, pin 9 and pin 21, pin 22 output waveform similar to this.

Figure 6 is 2 feet from the HEF4752, 9 feet of SPWM output waveform, Figure 6 (a)
Transverse to 2.5ms / cell, Figure 6 (b) for 1ms / cell. Cycle for 18ms, the output fundamental
frequency fout = 55Hz. As can be seen from Figure 2 feet 9 feet backward wave waveform 120
°. The same pin 3, pin 8; pin 9, pin 21; pin 8, pin 22 output waveform similar to this.