Analog IC Design Tecliniciues for Nanopower Biomedical

Signal Processing

Chutliain Sawigun
Analog IC Design Techniques for Nanopower Biomedical
Signal Processing

PROEFSCHRIFT

ter verkrijging van de graad van doetor

aan de T(!elniiseli<; Universiteit Delft,,
op gezag van de Reetor Magnifieus prof. ir. K . C . A . M . Luyben,
voorzitter van het College voor Promoties,
in het openbaar te verdedigen op maandag 17 maart 2014 om 12:30 nur

door

C I I U l ' H A M SAWIGUN

M.Eng. Ul Eleetrieal Engineering, Mahanakorn University of Teehnology, Thailand

geboren t(; Udonlhani, Thailand

TU Delft Library
Prometheuspiein 1
2628 ZC Delft
 D i l ])ro(;rs(:hrift is gocdgekeuixl door de promotor:
Prof.dr. .T.1^.. Long

Copromotor Dr.ir. W . A . S(;rdijn

Samenstelling inomotieeonnnissie:

Rector Maginöciis, voorzitter

Prof.dr. .7.R. Long,
Dr.ir. W . A . Serdijn,
P r o f d r . A . Deniosthcnons,
Prof.dr.ir. A . H . M . van Roerirmnd,
P r o f d r . P..L Freneh,
P r o f d r . E. Charboti,
Dr. R.F. Yazieioghi,
P r o f d r . R.B. Staszewski,
Tcchnisch<; Univc^rsiteit Delft,, promotor
Technische Universiteit D e l f t , copromotor
University College London
TechnisclK^ Universiteit Eindhoven
Tef:lniische Universiteit Delft
Teclniische Universiteit Delft
nvlEC, Belgium
T(H:lmische Uiiiver.siteit Delft, reservclid

I S B N 978-94-6180-277-8

Copyright © 2014 by Chutham Sawigrm

AU rights reserved. No part of this publication may be reproduced, stored on a retrieval system, or
transmitted i n any f o r m or by any means withont ijrior pernussioii of the copyright owner.

Print(!il in tlic^ Netherlands.

7b Xiiio Xidnn
Contents

1 Introduction 1

1.1 Motivations 1

1.1.1 Understanding the Hmnan Nei-vous System 1

1.1.2 Paradigm Shift i n Bio-Medicine 2

1.2 Analog Signal Processmg m Wearable and Implantable Devices 3

1.3 Nanopower CMOS I C Design Challenges 3

1.4 Materials and Metliods 4

1.5 Thesis Organization 5

2 R e v i e w of R e l e v a n t Techniques a n d M O S F E T M o d e l 7

2.1 Introduction 7

2.2 Switclied-Current T<:chuique 7

2.2.1 P ' and 2'"'-Geuc;ration SI M(!mory Cells 7

2.2.2 Switcluug Error Cancellation in a SI Mcniiory Cells 8

2.3 G'„, - a Fih(;rs 1Ü

2.3.1 Basie Concept mid Design CoiLsiderations 10

2.3.2 Power-Efficient 6',„ - C filters 11

2.4 TiaiLslinear Circuits 12

2.4.1 T L Principle 12

2.4.2 Exponential and suili Tianscoiiductors 13

i
ii CONTENTS

2.4.;i Ciirieiit-Mo(i(^ Analog Miilti])lior 14

2.5 E K V MOS Model for Low-Current Analog Design 15

2.5.1 Large-Sigual E(i\iatious Ki

2.5.2 Sniall-Sigual Model 17

2.(i Couehrsions 18

I Analog Sampled-Data Circuit Technique 19

3 S w i t c h e d - C u r r e n t Technique i n S u b t h r e s h o l d C M O S 21

3.1 Introduetion 21

3.2 F(-<Klback Analysis of a 2"'"'-Generation SI Memory CeU 21

3.2.1 0(X!xa.muiation of a 2"''-Gcneration SI Memory Cell 22

3.2.2 R.<;consideration of the Performance Enhancement Techniques 23

3.2.3 Stability aud ^D'ausieut T3eliavior 25

3.3 Design Consideration: Class-A aud Class-AB 27

3.3.1 Cmrent Consmnption 27

3.3.2 Signal Excursion aud Drivability 28

3.3.3 Noiso 30

3.3.4 Effects of Tr ansistor Mismatch, Input Current Imbalance and Switehüig Error
Cancellation 32

3.3.5 Supply Noise Rejection 34

3.4 Conclusions 34

4 A C l a s s - A B Current-Mode Subthreshold S H Circuit 35

4.1 Introduction 35

4.2 D('sign of a Class-AB CSH Circuit 35

4.2.1 Bias Condition 37

4.2.2 Input Current L i m i t a t i o n and Settling Behavior 37

4.3 Circuit SuniUations 39

4.4 Conclusions 42
 CONTENTS iii

II Compact Continuous-Time Filters 45

5 Nanopower B P F Using Single-Branch Biquads 47

5.1 Introduction 47

5.2 Single Bianch Filtcirs 49

5.2.1 Filter Topology Using Fe(!dback Traiisconductors 49

5.2.2 Snpply Voltage R.eciuirenient and Current Consunii)tion 51

5.2.:i Noise 52

5.,'i Cascaded Bandpass Filter 54

5.3.1 Filter Topology Considerations 54

5.3.2 Transistor Level Realization 55

5.3.3 Dyiiainic Range 55

5.3.4 Coiunion-Mode Behavior 57

5.4 Design Methodology 57

5.4.1 Filter Order 57

5.4.2 Midband Gain and Dynamic Rangr; 58

5.4.3 Center Frequency, Bias Current and Timing 58

5.4.4 'IVansLstor Dimensions 59

5.5 Measurement Results 59

5.6 ConehLsions (;(;;

6 F o l l o w e r - I n t e g r a t o r - B a s e d L P F for E G G D e t e c t i o n 69

6.1 Introduction (iq

6.2 ECG Dete<;tor L P F Design 70

6.3 Follower-hitcgrator-Based Lowpass Filter- 71

6.3.1 Conc<;pt 7I

6.3.2 TiaiLsistoi-Level Consideration 72

6.4 EGG Lowpass Filter Design 74

iv CONTENTS

().4.1 Filter Topology 74

6.4.2 Supply Voltage Requirement, Signal Swing aud Tuning 76

6.4.:i SignaTto-Noi,s(! Ratio 77

G.4.4 Supply Noise Rejection and Stalnlity 77

6.5 Design Procedur<! 78

6.5.1 Dynanric Range 78

6.5.2 Cutoff Fnxiuency, Bias Ciurent and Power Coiisuinptioii 78

6.5.3 Tuning 78

6.5.4 Tiausistor DimensioiLS 78

6.6 Measurement Results 7!)

6.7 Conclusions 85

III Very Low-Piequency Filtering and Large-Swing Multiplication 87

7 T r a n s c o n d u c t a n c e R e d u c t i o n Technique for V L F F i l t e r s 89

7.1 hitroduction 89

7.2 Rcvitnv of Tianseoudnctance Reduction Techniques 89

7.3 Wide-Luiear Range Low-G,,, Transconductor 91

7.3.1 Concept 91

7.3.2 Noise and Dyuaniic Range 92

7.3.3 Ciurent Consumption and Circuit Complexity 93

7.4 1'^ilter Design and its Measured Results 94

7.4.1 Butterworth 2"''-order L P F 94

7.4.2 Supply Voltage Rcxiuirement and Signal Swing 94

7.4.3 Design Procedure 95

7.4.4 Measurement Results 98

7.5 Conclusions 100

 CONTENTS V

8 L a i g e - S w i i i g C u r r e n t M u l t i p l i e r for A P D e t e c t i o n 103

8.1 hitroduction 103

8.2 Cla.ss-AB Current Midtijjlier 105

8.3 Subtluesliold Class-AB Building Blocks 106

8.4 Simulations 109

8.5 ConchisioiLS 110

9 Conclusions and Future W o r k 111

9.1 General GouclusioiLS Ill

9.2 List of Aeliievements 112

9.3 Future Work 113

A p p e n d i x A P h a s e - L o c k e d P e a k - P i c k i n g Speech P r o c e s s o r 115

A . 1 Introduetion 115

A.2 Sijeeeli Processing i n Cochlear Iiiii)lants 116

A.3 Review and Gomparison of Existing Proee.s.suig Strategies 117

A.3.1 CoutinuoiLS hiteik^aved Sampling 117

A.3.2 Zero-Crossuig Detection 117

A.3.3 Peak-Picking Tecimique 117

A.3.4 Race-to-Spike AsyndiroiioiLS Interleaved Saniiiluig 118

A.4 System Simulations Ug

A.5 Discr(4,e-Time Peak-Instant Detector 121

A.5.1 Switched-CmTent P I D Concept 122

A.5.2 Switclied-Curr(:nt P I D Circuit 123

A.5.3 Giixaiit Simulation 124

A. 6 Diseussion and Conclusions 126

A p p e n d i x B H a r n i o n i c Di.stortion C a l c u l a t i o n for C h a p t e r 3 129

B. 1 Cla.ss A CSH Circuit 129

B.2 Class-AB CSH Circuit L31

vi CONTENTS

Acknowledgements 133

Samenvatting 135

Suminaiy 137

A b o u t the A u t h o r 139

Bibliography 141
 Chapter 1

Introduction

1.1 Motivations

This tlicsis describes the IC design teeliiiitincs For nanopower analog signal processing ui biomedical
a p p l i e a t i o i L S presented m [1-9]. A i m i n g to iiiaxiimzc the capability of a single MOS t r a i L s i s t o r to
serve the requirements of extremely low-power operation and reasonable physical size for wear-
able and iniiilautable medical devices, both discrete and continuous-time design techniques are
investigated and developed. The thesis also emjiloys the uonhnear behavior o f conventional circuit
builduig blocks t o serve stringent reqiuremcnts such as the very low cutolf fi-equency needed for
slowly varying bio-potentiais filttaing, or the very large signal swing demanded for action potential
detection. These research activities are driven by the health-related motivations described i n the
following two subsections.

1.1.1 Understanding tlie Human Nervous System

Counting f r o m the treatment of headache aud gout for th<^ Roman Emperor Claudius by using
torpedo üsli i n AD'Ki [1(}|, i t has become ahnost two iniilennia since electricity has been used i n
uKKlicine for the first time. The early treatment o f neinal dtsorders by nicians of electricity started
without sufficiënt understanding of electricity aud the hmnan nervous system. One step forward
was made after the discovery o f tlu; Leyden Jar by Van Musschenbrocck in 1746. This was evident
f r o m the observation that electric shocks cause muscle contractions by Franklin i n 1774 (later
confirmed again by Galvairi i n 1780) and the breaktliough of electrotherapy by Cavallo in 1777 who
used electricity to treat v a r i o i L S diseases i.e., epilepsy, paralysis, deafiicss and blindness [11). A f t e r
havmg shed some light on this new way of medical treatment, ek:ctrical and (ilectronic engineering
developed a lot for almost a couple of centuries as can be seen f r o m the existence of the uiveution
of the transistor and wireless technology. Unfbrtimately, however, electrotherapy chd not progress
as rapidly as the progress ui electrical and electronic enguieermg. The main obstacle that liiudered
its progi-ess was a too limited understanduig o f the workings of the central nervous system.

A f t e r the Second World War, ad-vaiices u i semiconductor teclmology, microelectronics and micro-
electro-uicclianical systems (MEMS) allowed the use of electrical recording to study nervous systems
at both the iiitra-ceUiilar [12] and extra-cellular [i;![ levels by using iiiicroelectrodes [14]. Significant

1
2 CHAPTEU 1. INTRODUCTION

progress i n inidersianding tlie nervous system has been made f r o m these eleetronic uiterfaces and
the knowledge obtained has been applied in several medical prosthetic devices such as retinal i m -
jilauts 115], cochkar implants (GIs) [16], deep bram stunulators (DBS) J17] and functional electrical
stimulators (FES) ]18].

Nowadays, i t has b(x:oine clear both ui medicine and engineering that we have learned enough
abont the luiinan nervous system to know that there is still much more to learn. I n order to
l i e r f o n n trf'atments elteetively and minimize side effects, medical devices that allow suiinltanc:ous
iienral stimulation and recording me reiinired. Neinal responses are expected to be obsei-ved and
studied wliile the body is being stimulated, and system parameters can then be adjusted to give
appropriate stimuh ]19]. l b enable this nicchamsm, that is unfortimately not yet available i n any
current technology, smm't mrplantable neural microsystems that involve iiiicroelectrodes and ultra
low-power uitegratcd cirf:uits and systems need to be develojjed ]12|.

I n addition, the technology development n i e n t i o n c K l above is rcquircid in modern lii!althcarc to

alleviate the cost o f hiture medical t r e a t u K ü i t s as will b(^ describixl ui the next subsection.

1.1.2 Paiadigm Shiff in Bio-Medicine

Advancements i n medical technology is one reason why the world's aging poinilation is expanding
rapidly. I t has been predicted that the number of elderly people over 65 will reach 1 hiUioii globally in
20,'lü [20]. Mahitainuig or improving iiuality of life for a longer lifespan is indeed very costly. W i t h o u t
carefiil prevention and management, healthcare expenses agauist age-related chronic diseases w i l l
become a financial binden for the global society. As indicated ui the 2005 W H O Global Report,
$558, $237 and $303 billion f i o m national uicomcs (over the period of 2005-2015) of Ghina, India
and the R,ussian Federation, respectively, will be spent on the treatmiait of heart diseases, stroke
and diabetes ]21].

As a consequence, the idea of using uiformation and coimnmiication technology to mobiUze bio-
medicine to addr(\ss this problem has been developed. Traditional medicine focus(!S on diagnosis
and treatments that are centrahzed at a hospital. A n individual-centered healthcare system that
focuses on the prevention of illness by early prediction of diseases ami maintaining health on a daily
basis could reiluce healthcare costs u i the ftitm'e [22]. To enable this type o f healthcare, body-area
networks ( B A N ) (also called a body-sensor networks (BSN)) that require efiieient, low-cost wearabk)
mid implantable medical technologies and devices need to be iniplcmented ]21].

The key to success of this new paradigm is to keep the operation and iniplementatiou costs of
the aforementioned systems much lower than those of traditional mediciue. These wearable and
implantable devices need to be built fiom the cheapest technology and coiisunie extremely low
amomits o f power. This demands for research activities i n the same area as mentioned i n Section
1.1.1 as well as smart sensor systems and technology, (üiergy harvesting and u l t r a low-power signal
processing.

Driven by the motivations mentioned above, this thesis deals w i t h the design o f signal processuig
analog circuits ui c o m p l e m e n t a r y mctal-oxide-semicondnctor (CMOS) uitegrated circuit (IG) tech-
nology that serve biomedical ek:ctronic systems. Applications o f Hie design techniques presented
u i tlus thesis can be seen f r o m : 1) signal filtering in an analog C I processor, 2) signal filtering i n
an EGG detector o r oth(!r neural recorders and 3) signal i n u l t i p l i c a t k M i ui an energy-based action
potential detci:tor.
 1.2. ANALOG SIGNAL PROCESSING IN W^EALiABLE AND IMPLANTABLE DEVICES 3

Sensor/electrode

Amp~ Filter
Feature
extractor
ADC Tx
J
Figure; 1.1: Typical neiu'al recording architecture.

1.2 Analog Signal Processing in Wearable and Implantable

Devices

Apart from well-known v i t a l signs (temperatme, heart rate, respiratoi-y rate, blood pressme), more
complex biomedical (bio-i)otential) signals, i.e., eleetroeardiogranrs (ECGs), electrocorticograms
(ECoGs), electroneurograms (ENGs), and electromyograms (EMGs), can be monitored i L s i u g a
typical E x G r(H:ording .system as shown i n Fig. 1.1 [23]. A l l of the biomedical signals mentioned
manifest themselves w i t h i n the frequency range of approxnnately DC to 10 kHz. The amplitude of
sigirals obtained f r o m the recording electrode can vary i n the range of a few / i V to niV depending
on the recordmg site and type of electrode nsed. These signals w i l l be fed to an amplifier tyjiically
w i t h a voltage gain of aromid 40 dB or more [23| before relaying the greater signal amplitudes to
the next stage.

A f t e r signal amplification, the signal processing sections, i.e., filter and feature extractor are respon-
sible for discrimination between the requu'cd signal and interfermg signals aud extractmg relevant
featrrres of the signal, respectively. The extracted feature will be converted into a digital fornrat by
an analog-to-digital converter ( A D C ) before the transmLs.sion by the Ii,F transniitt(!r ( T x ) . Thi^rc
are also cases (tbimd i n wearable and portable devices) that after filtering the signal wiU be fed to
the A D C directly. I n multi-chaimel sch(!ines, extracting only relevant features can help relax the
resolutkm thereby low<!rmg power consumption of the A D C . Featme extraction therefore leads to
a reduced data rate and lower average traiisnii.ssion power [24[.

This thesis describes design techniques to reahze analog signal processors using standard CMOS
integrat(!d circiut technology i u extremely eomi)act and low-power fashions. I t tlnrs investigates the
possibiUly to:

• A t the device level: employ a single MOS device to perlbrm signal proces.sing ftmctions ui
both the continuous and discrete-tune domains.

• A t the c i r c u i t level: apply class-AB teclmiques to enhance the dynamic range of subthresh-
old CMOS circuits fiirther.

1.3 Nanopower C M O S I C Design Challenges

In CMOS technologies, irMOS and pMOS devices are used i n combination w i t h other passive devices
(i.e., resistors, capacitors and inductors) to build the re(|uired signal processing fimctions. I n this
nanopower design context, MOS devices in a circuit wUl be [)perated i n the snbtlu-esliold or weak
inversion region at very low bias currents (in the range of a few uAs down to a few tens of pAs).
This unavoidable constraint on the design leads to the following problems:
4 CHAPTER 1. INTRODUCTION

1. The voltagc-to-cuneiit characteristic of tlie transistors is governed by au (!x])oiiential huiction

which is Irighly noiJuiear |2r)|.

2. As a eoiise(iuc;nce of the (!xponeutial behavior and very low ciurent densities, the effect of
transistor uusniatch becomes mon; severe than i n strong inversion [2(i].

3. As the circuit and signal b a u d w i d t l L S can be very low, I / . / ' (Hiclter) noise becomes dominant.
To supiness the 1/f iioisi;, transistors are thus retiuired to occupy large chip area, and/or a
sain]5led-data teelniiquc, such as the auto-zeroing inc<;liaiiisin, needs to be applied [27].

Designing any analog hinction under the influence of the atbrementicmed issues is indeed challenging.
Furtli(!rinore, to serve tlie requirements of miniaturized wearable and iin])laiitable medical devices,
the degrees of freedom i n the design are even mon; limited. This th(;sis thus jiresents a design
framework that involves the following methods:

1. Keeping the cucuit complexity low by utUiziug a niininimii number of transistors, thereby
nuinmizing the chip area, source of noise/uiismatch and pow(;r cousinnption.

2. Applying unity gaui-negative feedback loops wherever possible to reduce sensitivity to internal
disturbances (transistor mismatch i n this case), as well as to enhance circuit linearity.

3. h i the case that additional circuit elements are required, applying compact low-voltage circuit
architectures that allow class-AB operation to enable large signal swhigs, thereby eiihmicing
the circuit's dynamic range and keep static power consumption low.

Following the above design framework, tliis thesis contributes to: 1) analog sanipled-data, switclicd-
cinreiit (SI) memory cells, 2) contmiions-time G „ r C filters and 3) four-quadrant analog multiphers.
For the two former circuit classes, we achieved more t h a n an order of magnitude improvement in
figme of merits (FoMs) m the designs ]7], [Gj. For the latter circuit class, the first fiiUy clas,s-AB,
foiu-quadraut multiplier i n subthreshold CMOS is obtauied ]1].

1.4 Materials and Methods

I n this thesis, some well-known techniciues, viz., "switch surrent (SI)", "transeondnctancf^capacitance
(G',„ - C ' ) " and '"ftanslmear ( T L ) " are investigated and developed fiirtlier i n order to serve biomerl-
ical signal processuig i n a nW-power r(;giiiie.

The Sl techmqui; is t r a d i t i o n a l l y c o n s i d e r ( ; d to be compact and mismatch i i L s e n s i t i v e . For this

reason, it is developed to overcome the general challenges of nanopower analog design as mentioned
in the previous section. Fmidauiciital operation and performance liiiutations of a SI circuit memory
circuit are uivcstigated. Bas(;d on these finduigs, we jirojiose the design of a SI memory cell that
offers performanci; eidiancement and power consiimption reduction. We estunate the design efficacy
by i L s u i g a figure of merit (FoM) tfiat involves relevant circuit characteristics and comparing it to
other designs reported previously.

The C'„, - C technique Ls widely used f o r filteruig biomedical signals. This techmeiue is examined
f o e i L s i n g on the iiossibility to create a nanopower continuous-tmre filter w i t h large time (tonstaiits
in a reasonably small chip area. The concept of trmisistorized G,„ — C filters (using a transistor
as a G',„ ceU) is attractive i u terms o f circuit compactness and power consumption. This thesis
1.5. THESIS ORGANIZATION

(l(^v(!k)ps tliis idea fmtli(;r to aclii<;vc a design methodology that leads to the; eliip iinplenieiitatioii
of the best-FoM, power-efheieiit, traiisistoriz(Kl G,„ ~ G lowpass and bandpass hlters for the andio
h'eqiKiiiey range and b(;low.

The traiisliiiear prineiple is coiLsklered a jiowerftil design tool for low-power einreiit-niode signal
processing. I t e.xploits th<; nonlinear large-signal cliaraeteristie of a traiisist<n- to perform varioiLS
signal processing hnictioiis ftom different ckised-looj) base-eiiiittfir jnnctioii tenninals arraiigi'.iiients
( T L loop) of B.IT devices (or gate-sonrce, gate-bidk or bnlk-sonrce terminal arrangements of MOS-
FETs). Therefore, large signal swuigs can be expected and, subsequently, a large dynamic range
becomes possible. This thesis develops a design technique that allows class-AB operation for a
subthreshold ciurent-inod(! analog multiplier. This finding is iisefiü for the design of an action
potential detector that distinguishes energy of action potentials fi-om backgroimd noise.

1.5 Thesis Organization

A f t e r tfie uitroduction in C h a p t e r 1,

C h a p t e r 2 presents a review of analog circuit teclmiques wiflely used i n low-power biomedical

signal processing a])plicatioirs (SI, G,„-C, and T L ) . Subtlicsliold MOS morlel equations, which are
eiui)loyed throughout tins thesis, are also described.

Starting from here, the thesis w i l l b(! divid(Kl uito 3 parts as follows:

Part I A n a l o g Sanipled-Data Circuit Technique

C h a p t e r 3 cxanunes the SI memory cell f r o m a feedback point of vh'.w. Fundamental features and
design consideratioiLS using MOSl-'ETs i n subthi-esliold are discussed.

C h a p t e r 4 presents the desigu and simulation of a class-AB SI uKünory cell operating in the
subthreshold region. I t wiU be sliown that employing negative feedback and class-AB operation
employing MOSFETs i n subtliresliokl can help to obtain a dynamic range of 77 dB at 28 i i W jiower
consumption.

Part I I Compact Continuous-Time Filters

C h a p t e r 5 describes the theory, design and implemeutation of 'single branch filters'. A bandpass
filter design methodology based on this filter striK:tur(^ is used to obtain tfie best F o M to date.
Measurement results for the filter cluj) m-e also reported.

C h a p t e r 6 presents a lowjiass filt(!r (LPF) design baserl on a circuit cell caUixl a 'follower integrator
( F I ) ' which is a special class of single branch filters that contains a local negative feedback loop and
allows for a cascade connection in a low-voltage environment. The L P F design will be discussed
along w i t h its ajiiihcation i n EGG recording and measmement results.
c CHAPTER 1. INTRODUCTION

P a r t I I I V e r y Low-Frequency Filtering and Large-Swing Multiplication

C h a p t e r 7 jircsents a raodulai' transconductance reduction teclnuqne dedicated to fidly-integrated

C,n-C biomedical titters w i t h cutotf frequencies in the range of 1-1(10 Hz. The chij) measur<!nient
results of the G,n~C lowpass tilter will also be discussed.

C h a p t e r 8 shows a non-linear cancellation techmeiue for realizing a class-AB fom'-quadrant cm-rent

multiplier. This tecimique utilizes subthreshold class-AB transconductors and a geometric mean
current splitter so that a four-quadrant ninltiplier w i t h (tliconitically) uiüunited signal swing is
obtained.

C h a p t e r 9 summarizes the thesis and discusses the iiossibiUties for h i t m e work.

A p p e n d i x A presents a peak instant detector ( P I D ) <lesigned for an ultra low-power analog

cochlear implant speech processor.

A p p e n d i x B provides a detailed calculation for harnionic distortioirs of the class-A and class-AB
current-mode sauiple-and-hold circuits.
Chapter 2

Review of Relevant Techniques

and MOSFET Model

2.1 Introduction

This ciiapter provides a review of eircuit teclmiques that can be usehil for the <lesign of analog
ICs to be used in biomedical apphcations. The mentioued teclmiques comprise switclied-cnrrent
(SI), traiLscouduetance-capacitor (G,„ - C) and traiislinear ( T L ) . The; fimdamental concepts and
recent progresses of these tecimique are discussed. As the weak uiversion CMOS <Ievices are basic
eleiuc;nts apiilied throughout this thesis, the descriptions of subthreshold MOS ope^ration and the
model iLsed are also provided.

2.2 Switched-Current Technique

SI is an analog sanipled-data tcchnicpie recognized Ior its iiotential of being compact and insensitive
to mismatch (28|. Thus i t is expeeted to overcome the iiaiio]K)wer design challenges mentioned ui
the thesis uitrochietion. Tins section presents the circuit descriptioiLS of two generations of SI
memory cedls. Effects o l practical MOS switches and techniques to reduce the switcliuig error are
also discussed.

2.2.1 and 2"'*-Generation S I Memory Cells

Fig. 2.1 shows two generations of Sl circuits. The l^'-generation SI memory cell [29] comprises
switch Sl controlled by a suigle i)hase clock signal and transistors Mi and A'l2, biased by constant
current sources In (see Fig. 2.1(a)). Since h'h is diode-connected, input ciurent /i„ is converted
into a voltage which w i l l be meiuorized by the gate-sour<;e parasitic capacitance Cgs2 after turning
off switch .S'l. Neglecting the channel length modulation and assuming Si is an ideal switch, ƒ;„ w i l l
be converted into /oui for the first lialf iieriod of clock signal and then, for the next half period, /„„t
will fiold tlie final value of 7i„ at the end of the previoirs half period. We thus obtain a current-mode

7
8 CHAPTER 2. REVIEW OF RELEVANT TECIINIQUES AND MOSFET MODEL

Figure; 2.1: S w i t c l u K l - c m T e n t i n c u i o r y cells: (a) P'-generation and (b) 2"'*-generation.

hall' delay or track-and-hold operation. I t should be noticed that there is no current being switched
but the gate voltage of Mi is.

The true switehed-cmrent mechanism occurs i n the 2"''-generation SI memoiy ceU shown i n Fig. 2.1(b)
[29]. Switches Si and S2 are controlled by the same clock wlrile S3 is controlled by a difierent clock
signal which is noii-ov(!rlapped w i t h the clock signal for .S'l and S2 (see Fig. 2.1). During the clock
phase that S'l arrd S2 are i.urned on, /i„ is supplied to the diode-eomiected transistor creating a
particular gate-source voltage. In the iKixt clock jjiase. Si and >?2 are tmiied off, the gate and drain
terminals of Mi aic. discoimected and the gate-soiu'ce voltage is memorized by c^s. Sunultaneously,
,93 Ls turned on supijlying 7„„t to the next stage. This mechanism is sliglitly difierent ftom the
1"'-generation cell; tliis circuit performs current sample-and-hold operation and indeed the input
and output eiurents of this circuit are being switched.

Kegardiiig cucuit compactness, mismatch error and power consumption, the 2'"*-generatioii memory
cell is superior to the P'-geueration OIK; since only one transistor is used to perform both sampling
and holding operations, and three switches which do not consume any static power. Tlierelbrx;, the
2""'-generatioii SI memory is chosen to be developed ftirther in this thesis.

2.2.2 Switching Error Cancellation in a SI Memory Cells

The major problem that degrades the accuracy and limits the high frequency performances of the SI
memory ceU is the switelimg error due; to the non-ideal characteristics eif a MOS switch viz., eJiargc
injection and cloe;k-feedthrough elfects ]30]. To muiimize the; e;ffe;cts of these switeliing errors, several
ti;cliiiiqncs have been jiroposeel.

E r r o r Voltage C a n c e l l a t i o n : Fig. 2.2(a) shows an error cancellation technique preiposed for the
P'-geueratioii iue;inory cell ]31]. A n extra switch and a voltage foUower/level slnft,e;r are inserted
Ul addition to the; e:oiiveiitioiial P'-geueration memory cell. W i t h this eircuit arrange;meut, the;
e:liarge ineluceel by switclie;s Si will be; e:e)nverted into e;rror voltages ajipesaruig at the seiurce and
gate te;riniiials eif M2. Assuming capacitaue:e;s c;, anel Cgs2 ai<; identical, the voltage error ae;re)ss
Cgs2 is tliiLS minimized. Note that tins teclniieiue can also be; applie;d to the 2"''-gi;iieratioii memory
cell. Howe;ve;r, as the; switching error is signal depe;iiele;iit, the error caneiellation canne)t be; ae:liieved
e:e)iiipletely.
2.2. SWITCHED-CURRENT TECHNIQUE 9

Figure 2.2: Switc.liiug mvor reductiou teclmiques: (a) voltage error caneellatiou, (b) two-step sani-
pliug aud (c) zero-voltage switeliiiig.
10 CHAPTER 2. REVIEW OF RELEVANT TECHNIQUES AND MOSFET MODEL

E r r o r C u r r e n t C a n c e l l a t i o n : Anotiier te<:lini(|ne aiiplied to a 2"''-generation SI inemory, called

two-step sampling (S^I) is shown i n F i g . 2.2(b) [32]. Unhke the teehmque mentioned above t h a t
reduces the voltage error at the memory capacitor, this tecimique minimizes the output current
error by introducing two more saiiii)luig steps and one more memory element. The samjihiig period
starts alter turning on switches Si and ,S':„. IVaiisistor Mj, is acting as a current source supplying a
DC current to diode coimeeteil transistor M„. Then, input currcnit I,,, Hows into the dram teriirinal
of M,,. A f t e r settling, Si„ is turned off and Su starts t u r n i n g on while 5'i remains on. A t this
moment. A/,, is UKmiorLsing 7i„ i)lus switching error eiurent (/„) induced by Sia- During this period
of time, Mj, w i l l track /„ until Sy, and Si are turned off. Right after switch S2 is turn(;d on, A/p
w i l l store and supply ƒ„ and the error current generated by Su, (li,) to the output. Note that In
is relatively smaU and less signal depend(!iit coiniiared to [32]. As 5'i,i remains off . A/,, w i l l also
snpply current Ii„+Ia to the output. By this mechanism, I„ w i l l be cancelled out and only /,,
remains.

Zero-Voltage Switching: The previous two teeluriques can only reduce the switching error t o
some extent. For high iirecision sample-and-hold operation, the SI memory cell w i t h zero-voltage
switcliiug depicted i n Fig. 2.2(c) is required ]33]. As the injected charge and clock-feedtlirongli
charge can be made constant by fixing the voltages across the drain and somce terminals of the
MOS samphng switch, voltage amphher /!„ is inserted for enhancing the loop gain aroimd the
sampling node. I n tins case, C/; is used as a memory capacitor instead of parasitic capacitance
r.g„ of a suigle transistor. During tin; sampling phase, the voltage across sampling switch Si, w i l l
be fixed at a certam reference voltage (virtual groimd) and the signal error voltage wiU be relayed
to the gate terminal of A'/i instead. To the best of our knowledgi;, oidy tins teehmque is able
to sujipress the switching error by making i t signal-iiidejicndcnt anrl allows for almost f;oiiii)lete
error cancellation in dilfereutial circuit operation. For tins reason, this tecimique is chosen to be
developixl hirther for nanopower signal processing IC design. More detail of this work is presented
Ul Part I of this thesis.

2.3 Gm C Filters

G',„ — 6' filters ]34] have been applied i n various moderate-linearity apphcatioiLS. Further resemcli,
focusing on the circuit structiue and design mothodology for the C,„ - C filters, can be iiseftil for
nanopower biomedical signal filtering. Tliis section provides the basic priiicii>le of G,„ - C filters
and a survey of the recent advance m G,„ — C topologies.

2.3.1 Basic Concept and Design Considerations

Fig. 2.3(a) shows a Cr'„, — C' integrator simply fiirmed by transcoiiductor G , „ and capacitor C. h i p u t
voltage Vin is converti;d into current I„ut accorduig to I„„i = 1 4 , i G , „ . Then, /„„t w i l l be integrated
by G resulting i u output voltagi; K,„t. A n integrator is the niahi buiding block for synthesizing
higher-order filters |34[. Fig. 2.3(b) shows how the uitegrator can bc extended to realized a P'-order
filter. The feedback traiLscoiiductor G , „ 2 is inserted to the output node thereby crisiting a lossy
integrator (or 1^'-order lowpass filter ( L P F ) ) w i t h a transfer ftmction of

H{s) (2.1)
 2.3. GM - G FILTERS 11

Figiu-e 2.3: G,„ - G filters, (a) liit(;grator, (b) P'-or(l(;r L P F and (c) compact r e o r d e r L P F .

It can be fomid f r o m (2.1) that the jjassband gain of this filter is defined by the latio of G,„i antl
G,„2. Also, the entoft' frequency is G,„2/G. In this case, UK; gain aud cutoff frequency eau be set
iud(!pendently.

I n practice, either M O S T or B . I T can be used to design a G,„ ciremt. Non-linearity of these tyjies
of transistors will affi;ct the huearity of the filter. Tims, any 6',,, circuit is an active element that
is, not only non-linear, but also noisy. Moreover, it can be seen from (2.1) that mismatch between
G,i,i and G , „ 2 degrades the precision o f t h e passband gain. For these reasons, inspecting the filter
topology closely can help selecting tlie best suitable topology for a speeifie application. Let's fticus
on circuit i n Figs. 2.:i(a) and 2.3(b) again. Assuming the transcondiietance characteristics of all of
the G'„i circuits are identical and weakly uonfinear, the distortion produced at the outputs of the
filters will depend on the voltage appearuig across the input teriuuials of the G„, circuits. For both
filter cu-cuits, we can see that the mput voltage is appUed directly to fhe uiimt terminals of tli(!
transconductors, G,„ and G,„i, and thus the uoiüinearities of the G,„ and G„,i are fiiUy responsible
to th<! distortion obtained.

Fig. 2.3(c) presents a first order L P F developed fr'oni the L P F i n Fig. 2.3(b) for G,„ = G,„, = G',„2.
I n this case the passband gain is always unity (and cannot be adjusted), h i term o l huearity, wc can
consider that V„„t is connected to the inverting input of G,„ thereby creating a unity-gain negative
feedback. For fre(|uencics well b<;low th(! cutoff fi-equency, Kjut wUi follow closely This resiüts
in a very smaU voltage appearing at the dUftaential uipiit of the G,„ circuit. As a consequence,
less distortion wiU be produced hi eomparison with the L P F i n Fig. 2.3(b). I n ternrs of power
consumption and noise, i t is clear that the L P F ui Fig. 2.3(c) coiisimi(;s less power and produces
less noise than the L P F i n Fig. 2.3(b) for the same cutoff frequency.

2.3.2 Power-EfHcient G„, - C filters

Based on tin; circuit inspeetiou mentioned above, the id<!a of disigning a comiiact L P F has been
introduced hi [35]. B y considering a single transistor as a feedback transcouductor, a differential
P'-order L P F can be reahzed usmg only two source follower circuits as shown iu Fig. 2.4(a). The
dift'crential strnctm-e is used here to maximize the filter's Unear range.

Arising fi-om Fig. 2.4(a), the biquad section shown i n Fig. 2.4(b) has been developed. This circuit
has been successhiUy employed to unplenient a 4"'-order L P F witU a 1Ü M H z cutoff frequency [35].
12 CHAPTER. 2. RE\HEW OF RELEVANT TECHNIQUES AND MOSFET MODEL

(a) Vss
(b)

Figure 2.4: Ti-ausi,storizecl G,„ - 6' filter, (a) 1="-order L P F eireuit. (b) Lowpa.ss biquad section.

Recently, a 1ÜÜ Hz L P F for biopotential re<;ording that consumes only IT) nW quiescent power
has been reported |3(i|. Unfortunately, inspecthig tlris circuit ftuther reveals tliat i t requues a D C
supply (VoD-Pss) of more than two gate-source voltagis. Moreover, cascade connection to aciiieve
a lngh(!r-order design hlter needs an even larger D C supply. Otherwise, an irMOS version of th(i
biiinad section is needed. The problem of usuig coniplementary devices i n a standard CMOS process
is that the bulk effect gives rise to perforinance degradation.

Favored by the circuit compactness, this type of C,„ - C cucuit has been developed hirther i n
order to overcome the liimtatious nientioned above and to aUow for aiiplication to the design of a
bandpass filter. Part I I of this thesis presents the details of this activity.

2.4 Ti-anslinear Circuits

The T L iiriiicipic is an efflck;nt tool for synthesizing current-mode signal processing circuits [37].
Mainly, T L circuits are designed using large-signal behaviors of M O S F E T [38[ and B,1T (bipolar
junction transistor) [37[. Therefiire, the T L cuciuts attribute large signal swing. This section
uivestigates the T L principle applied to B.IT circuits as it can be applied directly to snbtlueshold
CMOS circuits.

2.4.1 T L Principle

T L prmciple was first introduced based on the exponential relation between voltage and curnHit
foimd i n B.lTs and diodes [37]. According to the fact that the transconductance of a B J T varies
hiiearly w i t h its collector current, circuits that contain loops of base-emitter (BE) junetious aUow
current-mode signal processuig huictious to be implemented. A T L loop is characterized by an
even number of jiincti(ms. The number of clockwise-oriented ( C W ) devices equals the number
of devices witli-coimter clockmse ( C C W ) orientation. The T L principle for B J T states that "the
product of the cmrent densities in a clockwise direction equals the product of current densities in a
counter-clockwise direction" ]37]. This can be w r i t t e n as.

- U ('-^
 2.4. TU/INSLINEAR CIRCUITS 13

Figure 2.5: 4-lraiisistor traiislinear loop.

where / ( ; aud A are the coUeetor current and emitter ar(;a of the B J T , respectively.

Considering the circuit in Fig. 2 . 5 , i t can be S(;eii that there an; four tiausistors connected via
their B E junctions starting f r o m Vn through Q i , Q2, Q3 and Q4, and back to Vn again. This
arrangenient fonns the T L loop hi whieh the ekickwise e l e u H n i t s are Qi and Q3. Q2 and Q4 are the
eoiuiter-clockwise elements. From the T L loop, in f o r i i L S of voltage we can find that

VnFA 4 VBE3 = VnE2 + VBE4. (2.3)

Suppose that all the traiLsistors liav(; the same eiiiitt(;r area, applying the T L principle, the following
relationship can be found:

Ici • hn = lc2 • ICA- (2.4)

2.4.2 Exponential and sinh Tiansconductors

Fig. 2.()(a) shows a two-transistor T L loop w i t h a voltage some (V\a = Vi - V2), a so-called "traiisUii-
ear network" ( T N ) . Suimnation of the voltage aroiuid the loop yields

VM = VnFA - VnE2- (2.5)

This relationship leads to a (xiuation that Ls useftil for analysing the large signal behavior of circuits
that involve this T L network;

The exponential traiLseonductor <:ireuit shown i n Fig 2.0(b) is a good example of such a T N .
A p p l y i n g ( 2 . 0 ) and neglecting the base currents of all transistors, the voltage-to-curn!iit relationship
of the circuit i n F i g . 2.G(b) can b(! foimd as

/out = IB exp (2.7)

F i g 2.C(c) shows a class-AB nonlinear transcouductor basixl on the exiioiiential transcouductor

shown Ul F i g 2.0(b). This traiLsconductor provides a (theoretically) m ü i m i t e d output current that
14 CHAPTER 2. REVIEW OF RELEVANT TECHNIQUES AND MOSFET MODEL

Figme 2.6: Tiansliiiear networks: (a) 2-transistor T L network w i t h voltage soirrce, (b) exponential
transeonch:etor and (e) sinh transeondnetor.

benefits the design of cmrent-nrode sample-and-hold and analog midtiplier circuits (more details can
be found in Parts I and 111 of tlus tlie.sis). The voltage-to-curr(;nt relationshij) of this transcouductor
is

'out — — ha — h = 21,s sinh (2.8)

2.4.3 Current-Mode Analog Multiplier

Another application of T L circints is an analog midtiplier. Based on the 4-traiisistor T L loop shown
in Fig. 2.5, a curieiit-niode foiu'-qnadrant analog multiplier can be realized as shown i n Fig. 2.7.
A p j i l y i n g the T L principle to the loop contaiuing Q i to Q4 and a.ssniiiing the base currents of all
transistors are negligible, w(; have

{h + hi) {12 + 13) = IcJfi- rn

Re-arrangrug (2.9) gives

l c A = ' ^ + {h -\- t2) + h3- (2.10)

 2.5. EKV MOS MODEL EOR LOW-CURRENT ANALOG DESIGN 15

Vcc

Figure 2.7: Cla.ss-A, cmicut-mocle, 4-qiiadraiit ajialog iiiultiplier

Crm.sidcriiig tlie output teruüiial, we eau see that

'out = IB + '1 + «2 - /c4- (2.11)

Substituting (2.1Ü) uito (2.11) lesidts i u

•'•i«2
'„ut = j ^ . (2.12)

I t eau be seeu that a four-quadrant niiiltiphiu- is aeliieved. However, tliis ninltiplier is operated
in class-A that au input signal greater than IB eauuot be apphed. h i Part I I I of this thesis, a
class-AB foiu-quadrant multiplier that can handle iniiiit signals larger than the bias current wUl be
presented.

2.5 E K V M O S Model for Low-Current Analog Design

A compact E K V MOS transistor model [25] developed for low-current analog circuit design is de-
scribed i n this section. Focusing on subthreshold operation, only relevant parameters are smmna-
rized for practical hand calculations. As the physical structures of iiMOS and pMOS are iiitruisically
symmetrical, the bulk (or body) terimnal voltage is used as the reference potential (instead of the
conventional source terminal voltagt;) for the potential of each t(;rininal depicted i n the symbols
sliown hi Fig. 2.8. Moreover, only the iiMOS device model wiU be described, in order to avoid
repeating redtmdant descriptions of the dual pMOS. Phnvever, the model description for the pMOS
device can be obtained by applying an oiijiosite sign i n the tlueshold voltage and applying the
symmetik: condition that

fo ( V G B , VDB, VSB) for uMOS = -Ir, ( - K G B , - I - D B , - K s B ) f o r pMOS, (2.13)

where is tlu; drain ctirrent of each (k;vice, VGB, VSB mid VDB are the gate-bulk, source-bulk and
draiii-tiiilk voltages, rcsiieclivcly.
16 CHAPTEI! 2. RE\HEW OF RELEVANT TECHNIQUES AND MOSFET MODEL

Figure 2.8: M O S F E T 4-teruiirial syuiliols: (a) iiMOS and (b) pMOS.

2.5.1 Large-Signal Equations

As iuditated i u (2.13), the draui curreut is a fimetiou ef all terminal voltages. For mi irMOS device,
the E K V model propo.ses a general equation for the drain cnrrent valid for all operating regions as

ID - , 2 1 , ,
Isn h i ( l + e x p (
I V G D - V T H n - »»VsB
hi'' 1 + exp
VGB - VTHII -
nnVr
"n^D

(2.14)

virherc Is,, = 2'n„A:„(HVL)K^ is the s|)ecific current, n„ is the subthreshold slope lactor and VTHH
is the tlu-eshold voltage of the iiMOS, while Vr is the well-known thermal voltage, k„ is the pro-
c(-ss transconductance ]iaranieter, aud W and L are the channel w i d t h and length of the uMOS,
respectively.

Under the subthreshold condition that VGB < VTHU, tbe drain current behavior can be divided into
different operating regions as follows.

Weak Inversion Conduction: This region is defined supposuig that VSB (and VDB) > (VGB -
KTHn)/"7i- Then, (2.14) can be reduced to

VGB - VT -VSB -VDD

ID = Isn exp o.xp - (!Xp (2.15)
T„VT VT

I t ean be s(x;ii f r o m (2.f5) that ID of this region is controUed, not oidy by the gate voltagi;, but
also the voltage across tlu; drain aud source terminals. I n other words, tin; iiMOS is acting as a
voltage-<;oiitrolled uonluiear conductor.

Weak Inversion Reverse Saturation: This region is found when (VSB - V D B ) > VT and (2.14)
can be simplified as

VGD - VTH, -VDB

ID = -f.S',. oxp exp (2.16)
"„VT VT

I n tills case, ID wiU flow i n an opposite direction compared w i t h the previous case and it wiU reach
0 when VDB is approximately larger than 4 V T .
 2.5. EKV MOS MODEL FOB. LOW-CUURENT ANALOG DESIGN 17

W e a k I n v e r s i o n F o r w a r d S a t u r a t i o n : Tliis ri^gioii is found when {VUB - V^B) > VT (U

jiraetice, VDS > 'IVT is sutfieieut). Then, (2.14) ean be simplified to

/VGB -Vsi
ID =- hn exp exj) (2.17)
V n„VT VT

For pMOS devices iLsed ui this thesis, the souree and bulk terimnals are connected together thereby
avoiding the bulk efi'ect in standard CMOS teehnology. B y doing so, (2.17) can be simplified hirther
and using the .syimnelrie <:oiiditioii as (kHcribed i n (2.13), we have

VSG-|VTHPI VSG
f n = I •S';, e x p = ƒ .s-,, exp exj) Gjiiexi) (2.18)
/I.„VT n„VT n,.VT

where /on = ^ . S p c x p ' ) = Jso{W/L) is the zero-biased current of the p M O S T obtained by

settuig Ves = 0 while Iso is defined here as the zero-biased current for a u m t transistor obtained
fi-om conditions: VQS = 0 and W = L. Vmp and n,, are the tliresliold voltage and slope factor
of the pMOS device, respectively. Note that smce this operating region is often irsed, the more
appropriate term "weak inversion saturation" is used i n tlris thesis to denote this region.

2.5.2 Small-Signal Model

Fig. 2.9 shows the static (low-fiixiuency) small-sigiial model of the 4-terrauial transistor. Tianscon-
ductances 3,„„ (gate trancoriductanei;), (drain trauseonductance) and ry,,,, (sourei; transconduc-
tance) contribute to the drain current variation when siiiaU variatioiLS of the respective voltages,
V G B , I^DB arid Vsu are apphed. For the weak uiversion saturation iiMOS, i t can be found that

d h , ID
Hn,,, (2.19)
OVGB «„VT'

. . , „ . ^ | ^ ^ « (A/.), (2.20)

and

dip
hi (2.21)
OVsi VT'

Note that the cliamiel length modulation ( C L M ) that leads to the drain condnetion i n the weak
inversion saturation region is neglected. I f i t is included, g,,,,, w i l l become as shown hetween brackets
hi (2.20), where A is the C L M parameter [25].
18 CIIAPTER 2. REWEW OF RELEVANT TECHNIQUES AND MOSFET MODEL

B _

+ 9D

+ is
VSB

Figm-e 2.9: Static (low-frequoüicy) small-.signal ecniival(;nt circuit,

2.6 Conclusions

Tiuee u.seful analog design techniques have bc<;n described vin., SI, 6 ' , „ - C and T L . The discirssions
o f the ijerforniance l i n i i t a t i o i L S and advantages of the circuits based on these t e c h n i q u e s have heen
given. Also a siniplification of the compact E K V MOS model has been presented iu order provide
a few relevant nomenclatiues tliat help the hiterested reader to foUow the consecutive chapters
conveniently. The information shown in tbis chapter is employed as huidamental material Ior the
nanopower design teclmiques ])resentc<l i n the ivst o f this thesis.
 Part I

Analog Sampled-Data Circuit

Technique

19
 Chapter 3

Switched-Current Technique in
Subthreshold CMOS

3.1 Introduction

Processing electrical signals in the voltage domain using CMOS circuits is encountering the problem
of limited voltage headroom. This residts h o m CMOS process seahng that re<luces the supply
voltage and thereby forces the maxunuui signal voltage swing to go down |39J. To recover the
signal-to-uoise ratio (SNB,) and the dynamic range (DR.), current-mode signal processmg has become
attractive since the nonlinear behavior of the devices, i.e., the; square and exponential laws for strong
and weak inversion behaviors, respectively, provide a compressive voltage swing. A wide range of
eirrrent signal swings can thus be obtained fi-om a low supply voltage [28].

h i the area of biomedical electronics that focuses on the ckisign of portable, wearable and implantable
devices, minimizuig power and area consumption are major r(!(iuirenieiits. This is to keep the device
sizes fit fi)r such applicatioiLS and to prolong the lifetime of the batt<;ry used. To operate circuits
at verly low ciurent consuiuptiou (in the range of uA) and a supply voltage below 1 V , the CMOS
devices will be forced into their wealt inversion region, winch creates a design (hfficulty i n terms
of noise and mismatch [40,41]. Large clup area is reciuired for capacitors and trausistors us<;d in
a circuit to m i n ü n ü z e noise and uusniatch. Therefore, a suitable circuit tecimique that can satisfy
the i-cquirements and overcome the problem of noise and luismatch is needed.

This chapter exaiiunes the feasibility to perform signal processing ftmctions w i t i i i n a small sihcon
area to achieve SNR and D R lugher than 70 dB wliile consmuing very little electrical pow<!r. As
it was introduced w i t h the distinct feature of small ari^a and mismatch uisensitive sampled data
operation, the analog current-mode technique caUed 'switched current' (SI) is re-examined i n rletail
Ibeusing on its ftmdmneutal euciut operation. R.elc-vant elfects of circuit and device non-kleahties
are also discussed.

3.2 Feedback Analysis of a 2"'^-Generation SI Memory Cell

This section presents a feedback analysis, review of perforinance enhanc(!inent trxjmiqnes mid sta-
bility analysis of a 2"''-g(;iiei-ation SI memory cell.

21
 CIIjiPTER 3. SWITCHED-CURRENT TECHNIQUE IN SUBTHRESHOLD CMOS

3.2.1 Reexamination of a 'i'^'-Generation S I Memory Cell

Fig. 3.1(a) sliows a 2"'' goiiorat.ioii SI iii(!inoiy cell [28]. I t comprises only one transistor biased
by constant current IB and .switches Si — S^ controlled by two nomoverlapping clock signals.
Consid(;ring sniall-signal operation and iiichiding channel length modulation, the circuit in Fig.
3.1(a) can be modeled as shown i n Fig. 3.1(b), where Ro and 6',„ represent the output resistance
(output resistance of IB in parallel w i t h that of the traiLsistor) and transconductance lactor of the
transistor, resiicctively.

(a) (b)

Figure 3.1: Second-generation SI memory cell, (a) circuit schematic, (b) smaU-signal model.

During the sanipliug phase (6'i and S2 are closed ami .S3 is o])ened), the gate and drain terimnals
of the transistor are connected creating a feedback looj) as shown in the block diagiam i n Fig. 3.2.
As one can see, the error current resulting ftom /i„—//, (where Ii^ and I j represent the iniint and
feedback currents, resiicctively) will flow into input impedance Z, = R„{1 -|- s C f ; / ï „ ) ^ \ thereby
creating voltage Vn which is the input voltage of transcouductor G„,. Voltage V// wUl bc; converted
into cmrent I j by 6',„.

VH

Figure 3.2; Feedback block diagram of the second-generation Sl memory cell

From tli(! bkick diagram, the looji gain (LG) of the system ean be found as

LG = a,„z, = ^ , (3.1)

where G;; etiuals the parasitic gate-source capacitance; Cg, of the t r a i L s i s t o r . I n this case, LG equals
the intrinsic gain of a siiigk; transistor which is becoming small(;r i n deep snbmicron technology [42[.
The; iiiiiut iin])edaiK:e o f the circuit can b e also found to be

- - 1 4 LG - G,„ (1 + fil) • (

I t can be seen fi-om (3.1) and (3.2) that H„ directly contributes to L G but affects Zi^ insignificantly.
On the other hand, R„ plays a role when tli<; fi;edback loop is broken during the hold jiliase ( S i
and S2 are opened and .^s is closed). I t defines the outi>ut rcsistaiic(; o f t h e memory cell since the
gat(; voltage of the transistor is h(;ld coiLstaut by the charge stored on memory capacitor Cgg.
 a.2. FEEDBACK ANALYSIS OF A 2^"-GENERATION SI MEMORY CELL 23

3.2.2 Reconsideration of tlie Performance Enhancement Techniques

As we can see fiom tfi<! previous sul)seetion Üiat tfii; operation o f a 2"''-gl jnemory cell Ls a unity-
gaui negative feedback system, tlie system's L G can be nsed to define tlie precision of the SI ciremt.
For tills r < ; a s o i i , the L G defined by (,3.1) sliould IK; (^nliaueed fiirthiu- to imiirove t h e currtnit-mode
sample and hold (CSH) operation.

There are two difierent ap])roaclies to enhance the L G : 1) increasing R^ by cascoding transistors [43|
and 2) increasing G,,, by cascading G,„ stages |3,6,33,44 46|. A t first glance, tfi(S(! two solutions
seem to provide a satisfactory iiiiprovcmeut as long as the L G is enhanced sufficiently. This Ls true
oidy for the case of a continuons-time signal for which the feedback loop is always maintamed.
Although cascodes are used i n many switdied capacitor circuits, e.g., a folded-cascode opamp,
for the sample and hold operation i n wliich the finxlback-loop is being .switched and the swichiug
mechanism is performed by IVIOS switches, the latter solution is preferable. Tins is because i t gives
the possibility to supjiress the error fiom charge injeetiou and clock-feedthroiigh effects. As we
have seen f r o m (2.2), t:ascodiiig [Iocs not fielp regidating the voltage swing at the sampling node.
The voltage at the switching node Vu varies according to l\n/G„, inducuig a signal-dependent
charg(; injection error winch leads to output signal distortion [47]. This signal-dependent error is
a residt of the charge uijection and clock-feedthrongh via the gate-soince and gate-drain parasitic
capacitances of a practical MOS device that forms switch S2 which Ls jilaced at the eircuit node w i t h
signal-dependent voltage fluctuation ]30]. Having a larger Zi^ due to lower G,„, leads to a gi'eater
VH swing and, subs(!<in(;iitly, a more signakdependeut error is obtained. On the other hand, f o r a
larger G,„, a smaller voltage swing is what we obtain f r o m (2.2) and this helps the charge injection
error to be<:oine less signal-dependent such that i t can be possibly c a n c e l l e d out by operating the
CSH c i r c u i t i n a dilfijreiitial I'asluon. However, to have higher G,„, more power c o i L s u m p t i o n need
to be sacrificed.

The G,„ euhmicenient tecliiu(iu(; can be realized as shown hi Fig. 3.3. I n Fig. 3.3(a), a voltage
amplifier A„ is i i L s e r t e d in fiont o l the G „ , . This results i n a higher effective transconductance
(hnt = A„G„,, which can be made very large. B y douig so, the ( i r r o r cmrent is forc(xl to be
very sniaU by the larger L G resulting i n a very small variation o f Vji. Instead, the large voltage
swing (V„u rge — A^Vii) is now rela,y(;d to the output o f amplifier A„ which L> not where the
switch is placed. Therefore the charge uijef:tion error can be considered sigual-uidepeuflent. To
realize voltage amphfier A„, another G,„ stage is u s c i d and uidortunal,(4y at k;ast one additional
time-constant is introduced by the para,sitic resistances and capacitances of all the active elements,
wluch may lead to instability. Pole splittuig can be applied to stabUize the system by changing
the location of the holding capacitor Gn (winch is now used as a Miller capacitor i n the sampling
phase) and the polarities of amiilifiers /!„ and G„, as .shown iu Fig. 3.3(b) J33,45]. For proper
fi equeney compensation, the bandwidth of the CSH w ü l be Imuterl. Tins is a finidamental trade oft'
of a low-distortion CSH circuit. Although the charge injection error o f the single-ended circuit h i
Fig. 3.3(b) can IK; made almost constant by the feedback tecimique mentioned above, the distortion
still remains as long as the G,„ used Ls nonlinear.

To get rid of the charge injection error thereby minimizuig distortion of the output signal, a fidly
dift'erential structure, as shown ui Fig. 3.4, is deshable. h i the case that the pair of switches
S2 is identical and the pair of liolduig caiiacitors C// are perfectly matched, the same amounts
of constant charge injection error voltages wiU appi^ar at the input tenninals of the G,„ w i t h the
same amiilitude and phase. These error voltages are therefore seen as a common-mode signal and
suppressed by the connnon-mode rejection capability of the G,„. As a result, a lugh linearity CSH
eircuit is obtained 13,44,47,48]. It is worth uotuig that even in the situation that both G,„ circints
are uonluiear, the complete error canc(4latioii meutionefl above can be achieved as long as capacitors
Cu and switches S2 are identical aud the former are linear, and the sampling period is sufliciently
 CHAPTER 3. SWTTCHED-CURRENT TECHNIQUE IN SUBTHRESHOLD CMOS

(b)

Figure 3 . C S H circuit w i t h LG eiüiancement w i t h (a) grouuded liolchug capacitor aud (b) Miller
holding capacitor.

Figure 3.4: FuUy dittereutial CSH circuit.

 3.2. FEEDBACK ANALYSIS OF A 2''^^-GENEBATION Sl MEMORY CELL 25

long for complete settling of V,,. Uiilbrtmiafely, for tlm cas(; that botli capacitors C„ are weakly
nonlinear and/or switches .S'^ an; not matched p(;rfectly, the cliaige iiije<:tioii error voltages can
only be caneeUed out pm-tially. Subsetiuently, output distortion will be generated f r o m the residual
input offset of G',,,2. Effeets o f t h i s imperfection w i l l be discussed analytically i n Sec. ;i.:i.4.

3.2.3 Stability and Tiansicnt Behavior

I n practice, the voltage amphficn- w i t h u i the feedback loop of Fig. 3.4 can be formed by a transcou-
ductor w i t h high resistive loads, and the D C voltage levels at the mternal nodes iieetl to be; stabilized
by common-mode feedback ( C M F B ) circuits. Including pm-asitic capacitances and resistances, a
more practical CSH circuit can be represented by the macro-model shown in Fig. 3.5. A.ssuinuig
aU the circuit elements are linear, omitting thi; C M F B circuits and breaking the looji at the input
of G',,,2, the; cucuit can be redrawn as i n Fig. 3.6 to find t k ; circuit's L G . It can be seen that the
circuit is now i n the f o r m of a generic two stage amplifier and tfie L G can be found to be [49]

V,' ^ 4G„.iG,„2/?i/r;2(l-f|fff)
(3.3)
" i ^ " s'^RiRa (G1G2 + GiiGi + GnCi) + sG„aRJhG„ + 1

Its open-loop u n i t y gain frequency, pok;s and R H P zero ean be approximated to be

w„ = G „ , 2 / G „ , (3.4)

t^p2 = - G , „ i / ( C ' i - t G s ) , (3.5)

and

w^i=G,„i/G„, (3.6)

respectively.

Capacitors C„ arc; now serving two piirioosc;s: I ) the; holding capacitors and, 2) iiole-splitting
compensation capacitors. I n this c:ase, the; latter pmpose d(;fines the value o l G„ to mauitain
stabüity. To achieve a phase margin (</>M) of 6Ü ", we set ajp2 > 2.2w„ aud G „ < C'l 4- G2.

To estimate; lieiw fast a cloe;k signal can be; ap])he;d t o this CSH circuit, the sel44ing time, /.., of the;
closed-loop response of the; system i n Fig. 3.5 ne;cds to be; fiamd. W i t h i n the; range of an acceptable
normalized output setthng e;rror (e), ft om (,3.3) we e;an find that [50|

^ ^ 27rG„
G,„2\/4tan?!.A, ( I - t a n 0 „ ) ' ^''''^^

where the setthng error is ai)j)re)xiinati;d as

e = exp(-7r\/tau?iM/(4 - tan^w) . (3.8)

Thus, we find the maximum samphng fiequeney o f tins sample and hole! as ./;._„,„x < 0.5^7^ Note
that tlris analysis is based on the assinnption that the oii-resistances o f aU MOS switejies and
parasitic resistaiice;s miel capacitances o f the C M F B chcuits are small enough to create very small
time; constants compare;d to CV//G,„2, and i t is vallei f o r (jy^, gre;ater than 45 ° . Note; that, u i this
case, G,„2 Is a large-signal t r a i L s c o n d n e t a n c e which is not eiemstant but elependeut on the i n p u t
signal amiilitude as shown in (3.19) or (3.20).
CIIArTEll 3. SmTCHED-CURRENT TECHNIQUE IN SUBTHRESHOLD CMOS

Figure 3.6; Brokeu k)op eireuit for L G aualysi.s.

 DESIGN CONSlDEnATION: GLASS-A AND CLASS-AD 2i

0.5/BIV VO.S/B,

(a) (b)

Figiiii! ,'!.7: Subtlire.shold traiisc.oiuluctors. (a) Class-A. (b) Class-AB.

3.3 Design Consideration: Class-A and Class-AB

For low-voltag(; design, defined by VDD < 2Kti, [51], there are two choices of snlj-tlntshold cu-cuit
c^ells to replace G,,,^ in the previous section to form a CSH circuit: class-A mid class-AB traiiscon-
duc;tors [6[, as shown i n Figures. 3.7(a) and .3.7(b), respectively. A.ssmuing all the transistors are
working i n weak inversion saturation ( V ^ s < Vth and VDS > 4 V T ) |25[, the large-signal characteris-
tics o f t h e elas.s-A and class-AB transconduetors can be expressed by

/„.i = i - ^ ^ ^ t a i i h f * ^ ± ^ ^ t a i i h f ^ (3.9)
2 2 V "inrVr 2 V2'"pVr

anil

/,„, = ^ ^ ^ ^ ^ = 21,2 shdi f - 21,2 sinh ( ^ (3.10)

2 V "/'VT / V"/'VT

respectively, where np is tli<; subthreshold slope factor of the pMOSTs and VV = kT/q is the
thermal voltage.

To cteign the CSH to be power ellicieiit and to liandk; an input signal as large as possible, the
large-signal chara<-,teristics of (3.9) and (3.10) should be nciither neglected nor even approximated.
In this section, we provide coin[)arative disciLssions on several design aspects between class-A and
class-AB CSH f:ircuits.

3.3.1 Current Consumption

Considering current consumption, we divide the circuit operation into two cases: I ) static, which is
flefined as the situation i u which there is uo incoming signal, and 2) dynamic, wliich is the situation
in which the cm-rent consumption varies w i t h the uiput signal. For the class-A circuit (Fig. 3.7(a)),
till! current consumption can be found for both situations to be

/^staticA — ^ l y n a i i i i c A — hii- (3.11)

28 CHAPTER 3. SWITCHED-CURRENT TECHNIQUE IN SUBTHRESHOLD CMOS

By contrast, the class-AB circuit (Fig. .'!.7(b)) allows the curreut to go higher than its quiescent
cnrrent level for the dyuaniic situation. This <;ntails a more complex circuit and hence leads to
more dynamic ciu'rent consumption ( / d y n a m i c A B ) as shown helow [ti]

f.ly,iai,iicAB = 27B2 + 2702 exp ( — - \ - 2/^2 exp — ^

The static power eonsiunption of this class-AB chcmt ean be found f r o m (3.12) by settiug VJa to
zero. This results i u

/ s t a t i c A B = ('hn- (3.13)

In order t o come to a reasonable eomparison betw(;en tli(!se classes of chcuit operation, we use the
condiiion ihal. jirovides a static condition with the same oj,, and (pM- This comlition can be satisfied
by cqnatuig the small-signal transconductance gains of both circnits, i.e., _(y„,/i = g„u\B-

From (3.9) and (3.10) and by considering small-signal operation, we can approximate that

and

y„iAB = T1-- (3.15)

npVr

F'or g,„A = HmAB, we then have Ipi = S / B 2 , arid tins leads to

/ s t a t i r A B =^ 0.75/staticA• (3.16)

From now on, we will iLse tins condition to analyze the circuit performance.

3.3.2 Signal Exclusion and Drivability

A f t e r setting Ipi = ^IB2, let's consider (3.9) and (3.10) again. I n the case that the circuits i n
Figs. 3.7(a) and 3.7(b) are working as transconduetors and that the input terniuials are driven by
the same dift'erential uiput voltage, Vi,i, tlic output currents, lad, for b o t h cases are shown i n Fig.
3.8 ( i i j i — SIB2 = S i i A ) . I t can be seen, as expected, that for a siiiaU Vui both circuits behave
hnearly giving the same trancoiiductance. For Via > 25 ni"V, the output curreut o l the cla.ss-A circuit
starts saturatuig but, lor the class-AB circuit, i t keeps increasuig exponentially. This implies that,
for the CSH circiut using class-A circuitry, we can not apply an in|)iit current larger than its bias
current. However, using class-AB cu-cniti-y the input current magiutiide can be higher than i n the
case o f t h e ela.ss-A circuit.
3.3. DESIGN CONSIDERATION: CLASS-A AND CLASS-AD

20 T 1

Class-AB /

10 / Class-A -

T3

-10 -

-20
-0.1 -0.05 0 0.05 0.1
Vid.V
Figure 3.8: I - V trau.sfer characteristics o l tlie subthiushold transconduetors.

Tins ar-gninent becomes clearer when we operate the transeondiictors as non-hnear transimpedance
amplihers based ou the inverse functions o l (3.9) aud (3.10). Ih;nce, we apply input current and
observe the behavior of output voltage Vod for th(! entire range of the varied ha- Here, we re-define
variables /id->/,v and K d H - V y to be used i n the inverse fimction o l (3.9) aud (3.10). Now, the
output currents and the input voltages of the transconduetors become ininit and output variables
of the traiLsimpedance ani|)lifiers, respectively, as shown below.

Vy = 2».„Vrtaiih-> f ^ ) (3.17)

and

VY = n,VT^m\C'[Jf-^ , (3.18)

f o r the case of class-A and class-AB, respectively.

These trairsfiir characteristics are plotted and shown in Fig. 3.9. This situation can happeen ideally
when negative feedback is appfied and the L G is large enough to make the voltage at the uiput
nodes constant. Then input current lx can be apphed (see Fig. 3.5). As Ix comes close to 1 BI
(8 u A ) , the voltage is driven to the snjiply voltage f o r a class-A ciicnit. This is an undeshed feature;
fiir low voltage circuits in general since this largo voltage excursion will push some chcuit e l e u K m t s
(transistors i n this case) out o l their proper operating region and eventually degrades the entire
c:ircuit iierformance. For elas,s-AB, the eircuit behaves in an opposite way such that, although the
cmrent goes h i g h , the voltage can be kept low. This results f r o m the compressive nature of class-AB
operation i i M h c a t e d by (3.18).

Another ü n p o r t a n t design parameter t h a t should be jiairl atteul ion to is t h e largij-signal traiiscou-

ductance Gm- This parameter influences t h e dynamic ciremt's L G . Taking t h e first derivatives w i t h
respect to Vd o l (3.9), (3.10) a n d substituting (3.17) and (3.18) into tlie results, we can find that

and

Gu.AB - -^%^cosli f s i i d r ' f K T ^ l ) . (.'i-SO)

 CHAPTER 3. SmTCHED-CURRENT TECHNIQUE IN SUDTHRESIIOLD CMOS

for class-A and class-AB circuits, rcsjicctively.

To give uiore iusiglit, (3.19) and (3.2Ü) arc sliown g T a p l i i c a l l y i u Fig. 3.10. As one can see, G,nA
decreases wli<;n |/ia| > 1 uA goes high wliile G,„AB is eidianccd. From these curves, we can predict
that the accuracy (charge injection error canceUatiou) and bandwitlth (see Eq. 3.4) of the clas.s-A
CSH circuit w i l l be degraded when a large is apjihed since tin; L G becomes smaller. For tlu;
class-AB CSH eircuit, the accuracy and bandwidth will be enhanced to some extent. I f Tui keeps
increasing the ciremt will requhe a longer setthng time and even oscillation can occiu (more detads
w i l l be given i n the next chapter). This Is a serious problem so that the maxunum magnitude of
needs to be identified. This w i l l be explained i n the next chapter as weU.

3.3.3 Noise

Since b o t h the clas.s-A and A B CSH circuit share the same G,„i stage, tmly the noise contribution
fi'om G',,,2 will be considered here. The flicker noise is neglected Ior simplicity since i t is assimred
that i t wifl be uuUified by an aiito-zeroing meelianism o f t h e CSH ciremt [52]. Only the ciuTent shot
noise, that is associated w i t h the drain and source barriers that control the carrier concentration
hi the charmel of the transistors, is considered here [25]. Since the spectral rleirsity of this type of
noise is white, i t camiot be uuUified by the; auto-zerouig niechanism. The output cmrent shot noise
of G,„2 will be smnpled and stored on G;,. Tin; stored noise will be converted into current noise
agam at the output d i n u i g the hold phase. This sampled noise will be added to the noise generated
by Gn,2 dnring the hold phase. Due to aliashig, this type of noise becomes dominant [52].
 3.3. DESIGN CONSIDERATION CLASS-A AND CLASS-AD 31

(a) (b)

Figure 3.11: Trauseouduetors w i t h uotse sources: (a) class-A and (b) dass-AB half cu-cuit.

Considering Fig. 3.7 and assunung each ciu'rent source to lx; formed by a single transistor operating
iu weak inversion saturation, th(! respective circuit schematics w i t h their ecuuvalent shot noise
sources are shown i n Figs. 3.11(a) and 3.11(b) for the cla.ss-A transcouductor and the half cucuit of
the class-AB transcouductor. For the class-A case, the average output cmrent noise power spectral
density ean be found to b(!

s,„.M.n = '"-(f)^^-'-(-n-^^-M.n + s.„.in ^^^^^

where q r<;pre,sents the (l(x-tron eharge and 5 , „ i ( / ) is the shot noise spectral density of each transistor
according to the circuit ui Fig. 3.11(a). The output current noise from the upptir current source
can be neglected at the output since i t appears as a conmron-mode phenomenon only.

Let's now consider Fig. 3.11(b). For the static eondition, due to the negative feedback formed by
M„ and M/, and its large L G , noise j„,i does not contribute to the output. Noise sources i„,j and
i„7 can be referre<l to the gate termmal of Mi, and relayed to the out|)nt via the trairsistors i n the
middle and the right branches. This leads to

S,„„tArs (./) =

= 2 \S.„j i f ) + S,„, (J)] +

I [S„,H U ) + S,„io i f ) + S,„ii (ƒ) - t ,S',-„i2 ( ƒ ) ! (3.22)

- 12r//B2,

wh(!re SjauiABif) is the output current noise .s])ectral density of the class-AB transcouductor
aud .S',;„i(/) is the shot noise spectral density of each transistor corresponding to the circiut h i
Fig. 3.11(b).

I t can be seen from a comiiarisoii of (3.21) and (3.22) that the class-AB circuit produces 50% more
noise power than the class-A circiut for the static condition.
:!2 CHAPTER 3. SWn'CHED-CURIiENT TECHNIQUE IN SUBTHRESHOLD CMOS

NoU'. that (3.22) i(;])r(i.seiits the output current noLse power si)eetral density after negfectiug noise
generated from C'„,i. I n fact, b o t l i C„a and G„,2 eoiitribnte noise to the output and G'„,i acts as an
input stage with a high voltage gain (typically more than 4() dB) and subsequently dominates the
oiitjint noise jiower lor the static situation. We know f i o m tlu; last S(!ctioii that when an input signal
LS apphed, the drain cmrents of the transistors i n the nriddle and right brmiches of F i g . 3.11(b)
( G „ , 2 ) can Ix; many times larger than IB2 (whik; there is no input cnrrent flowing into G,„i but
ordy its bias eiurent) and, as a consequence, more output noise power w i l l be generated. Therefore,
for the dynamic situation w i t h Iiigh iiqiut modulation index {l\d/hn), the m a j o r i t y o l output noise
power w i l l come f i o m G,n2 instead of G,„i. However, when the input current amphtude increases
beyond IB2, tbe signal power increases quadratically while the noise [lower spectral deiLsity increases
linearly, and, as a consequence, an enhanced output S N I l and DR. are thus obtainable for high input
modulation indices.

3.3.4 Effects of Transistor Mismatch, Input Current Imbalance and Switch-

ing Error Cancellation

There are several causes of CSH perfonnanci; d(;gTadation. They are catagorizcd and discussed
here.

S t a t i c O f f s e t V o l t a g e : Tiausistor niisniatch creates an offset voltage that can be modeled at the

iiqint of G „ , 2 . As ui the case of flicker noise, this offset to a large extent can be miniinized by the
CSII anto-z(Uoiug uieehanism.

I n p u t C u r r e n t I m b a l a n c e : The hilly differential strnctin-e o f t h e CSH circuit requires a balanced

differential input current defined by:

W = -'m- = (3.23)

I I (3.23) can not be maintaincxl, there will be a couimon-mode current flowing into tfie circiut. Tills
eommon-mode ciu'rent w i l l bc nullified by the C M F B circuit, thereby sliilting either up or down
the voltage at the input node corresiionding to the; direction of the eommou-mode current. For a
smafl imbalance, this w i l l m o d i f y the oii-resistauces of switches Si and S2 and, as a consequence,
leads to a settling time variation o l the switches. For a very large unbalance, operation faUure cmi
occur.

S w i t c h i n g E r r o r O f f s e t : A t the end of the sanipfing phase, the uonhnearity of, the mismatch
between capacitors Cu, the mismateh betweiiu switches S2 and an insufficient L G lead to incomplete
switching error comiiensation. Also, this residual error can bo modeled as au input ofl'set voltage
Kifisw to G , „ 2 , which ap|ieares d i u m g the hold pliase oidy and equals

V„HSW = V c F T + - VcFT-, (3-24)

where VbFT+ arid VQFT- are error voltages induced by charge injection and clock-fiH!dtlirougli i41ef:ts
of the MOS switches [30| apiiearing the non-inverting and inverting t<!riiunals o l G , „ 2 , respectively.
Effects o l K.BSW w i l l be shown for the class-A and class-AB circuits, respectively, i n the followuig
paragraph.

Duruig the hold phase K>flsw is added t o the difterential input voltage, Vn, leadmg to
 3.3. DESIGN CONSIDERATTON: CLASS-A AND CLASS-AD 33

/„d = Iin t a i i l i I — - — , (3.25)

and

/... = 2 / . „ s i „ h ( ' ^ ^ i ± ^ ) , (3.2(i)

/,.., = 2/„o.si.ili f ~

for the elass-A and ela.ss-AB eircuits, re.seetively.

Low-order liarmonie di.stortion eomponents can be found for the class-A circuit to be equal t o

' K.iisw ^
M
HD^., = ^
l^tanh^ 1 V
" ^ \ , ,' , v../ (Mil) , (3.27)
1 - t anh^ (y2n 1
„VT )

aud

tanh'' 1 K.frsw ) 1I^taidi

HD,,., = ' \ / ^ ^(MI,)-', (3.29)
1 - tauli^ 1(v. ifSW ^
VVT )

where M I , = 1\A/1BI is the modulation uidex of the cla,ss-A transcoiiductor and / M represents the
amplitude of the sinusoidal input current 1;^. More detail of the distortion analysis for b o t h class-A
and class-AB circuits is presented iu Aiipeudix B .

For the case of the class-AB CSH circuit, i t can be found that

and

tnmD, ,,, , „, „ =^ - ^ t a . d i f ^ ) ( M l 2 ) - ' ,

25(i V "PVT

where M I 2 = IM/TBI is the modulation index o f t h e cla.s.s-AB transeondnetor.

As after expanding 3.2(i, a signal-dependent term of cosh ^ ^ ; ^ ^ ) which is an even hmction w i l l be

obtained (see Appendix B ) . Henc(!, there is no HD,-) for tlus case. For the casi; of K.HSW = 5 niV,
VT = 26 niV and n,, -= 1.6, we can Hnd that HD2/1 = 0.048, HDa^i ^ 0.0014, HD4^ = 0.27 X 10""
wlule HDa/iij = 0.0092 and H D , | ^ i j = 2.4 x 10"'' for IVHi = M a = 0.8. I n tins case, HD2.4 Is
approximatily hve times greater than H D 2 / I B and HDa^ camiot be ignored while b o t h I I D 4 4 ancl
HD,i/,B are negligible.

Note that the distortion analysis here is obtained by ignoring the nonlinearity of the C M F B circuits
which may hirther degrade the huearity of the CSH circuit. However, for comparison, this residt is
sidlicient to support that the class-AB transeondnetor jirovides less iindisired harmonie coiii]ionents.
34 CHAPTER 3. SmTCHED-CURRENT TECHNIQUE IN SUBTHRESHOLD CMOS

3.3.5 Supply Noise Rejection

I f we e o i L s i d e r the (4ass-A eircuit i n Fig. .3.7(a), noise Irom snpply voltage V D D can be seen as a
current flowing through cnrrent source Ini- The ciurent noise wUl be split equally and flow through
the source ternunals of transistors appearuig at the oiit])ut nodes as coiimioimiode components.
EventuaUy, these conmioii-mode components wiU b e mininnzed by the diflerential operation.

For the class-AB circuit hi Fig. 3.7(1)), assuming the ciremt is iierfcctly syimuetrical and thus
comprising two identical subcircuits (cacti formed by the set of transistors A'/„, Mi, and M,,, and
Ini), noise f r o m V D D wifl flow through identical t r a i L s i s t o r s M„ in an eiiiial manner. Then the noise
will split equally and flow through transistors Mi, to the output. B y assuming that the unity-gain
current mirrors M^ are ideal, the noise wifl be uiiiumizcd at the output noiles while any residue
noise becomes a coiiuiioii-inode phenomenon oidy.

3.4 Conclusions

Considering a SI inc;iiiory cell fiom a feedback point of view reveals that a large loop gain and
a fidly diflerential circuit coiifignratioii are reqmred to achieve a lugh precision sample-and-hold
circuit i n the current domain. I t can be also seen that when transistor lcv(4 circuits and non-
idealities o l MOS switches are considered, the cla.s.s-AB transconductor is preferred to be used i n
the design of the current-mode sauiplc-and-hold circuit suice the internal voltage signal swuig where
the switches are placed can be kept almost constant while the input eirrrent can go higher than
the bias cnrrent. I n addition, when i t comes to circiut liiuarity, the elass-AB chcuit produces
lower harmomc compouents. Therelore, regardless of stabUity consideratkms, more than an order
of riiagrutnde larger D R can be expeeted for the elass-AB sample-and-hold circuit despite 50% more
noise contribution from the class-AB transeondnetor.
 Chapter 4

A Class-AB Current-Mode
Subthreshold SH Circuit

4.1 Introduction

As indicated i i i Chapter 3, to aciiieve power-efficient high-precision CSH operation, a subthreshold

cla.ss-AB transeondnetor should be utihzed. This chapter discirsses several aspects of clas.s-AB CSH
circiut design. The objective is to obtain a high dyuanuc range of more than 70 dB f r o m a supply
voltage of less than 1 V and power coirsiunption of less than 1 / / W based on the two-stage hdly-
differeiitial approach presented i n the previoirs chapter. Simidation results using 0.13-/im CMOS
model parameters are also given w i t h a eomparison to designs published |)revionsly. This CSH
cu-cuit is expeeted to be useful i n the discrete-time approach of peak d(4,ection that can benefit an
analog biomc ear processor in terms of circuit complexity and type of sound produced (more d(;tail
about the peak detector circuit and bionie ear processor wiU be presented iu Ap])endix A ) .

4.2 Design of a Class-AB C S H Circuit

Replacuig C';/ by PMOS capacitors (A'/,.„|,) to reduce sUicon area, as .shown in Fig. 4.1, th(! M,,„p
need to be biased i n strong inversion to maximize therr capacitances. To do so, the uiput and output
nodes of active element A must hv, biased sii(4i as to acconunodate the threshold voltage of A'f,.»,,.
Since wc would like to kee[) the noise power low, and we don't need a high cmrent driving caiiability
fiir this stage but rather a high voltage gaui, the class-A folded-caseode transcouductor shown i n
Fig. 4.2(a) is chosen to realize element A. Its common-mode output voltage can bt: controlled by the
C M F B I eircuit shown i n Fig. 4.2(b), where k = 0.05 is a seahng factor to save current consumptioii.
The clas.s-AB circuit i n Fig. 4.3(a) is usetl for active element AB and ils C M F B 2 circuit is shown
Fig. 4.3(b). The bias current i n this case is not scaled down since 1,2 is set low already {I,s2 =
0.4 iiA) to iiunfinize noise and satisfy the stability condition, and by sealing it down fiirther it may
become difficult to make i t precise.

35
36 CHAPTER 4. A CLASS-AB CURRENT-MODE SUBTHBESHOLD SH CmCUIT

Figure 4.3: a) Subtlue^sliold class-AB t r a i L s c o n d u c t o r a n d b ) i t s c o n n n o n - m o d e f c ^ e d b a c k eircuit.

 4.2. DESIGN OF A CLASS-AD CSH CLRCUIT 37

4.2.1 Bias Condition

To keep all tiansLst,ors working in weak inversion salnratioii the following bia.s eonditioiiH are set,

Vrei2 = 4Vr and V^.n = Kr.,f2 I \V,„\, (4.I)

and
VDD = V.n + KsG3 + 4Vr + K,„i„K. (4.2)

wluire Ki„i„|, is the internal voltage swing that follows f r o m the relationship of (3.18).

To satisfy the desire for snffieient phase margin, 0^,, > fi()°, > 2.2w„ mnst be arranged. In order
to hdfill this eondition, the bias currents are set to

= 25/B2. (4.3)

Tins leads to a total current consumiition (excluding bias circuit) of

.f/Jtotal = 4 . 1 / i j 4- 12/02 ^ 114.5/02. (4.4)

4.2.2 Input Current Limitation and Settling Behavior

As nientioned in the |)revious chapter, a G0° |diase margin cannot ht: niaiiitaiued for the entires range
of lid. As uidicatcd by (2.15), C,„AB changes according to 7i,i and this leads to eircuit iustabihty
for large amphtudes of W(! set the safety hunt at a <^A, = 45°, for wliicJi w„ = oj,,2. Ih;iice, the
maximmn 1;^ that we can apply w i t l u i i this safety hunt can be fomid as

/i.iinax = 2 / / j 2 s i i ü i ^cosh ' ^3.125^, . (4.5)

For / i d larger than /id„,ax, the phase margin w d l become smalkïr than 4 5 ° .

Fig. 4.4 shows a M A T L A B suiiulatioii p l o l of ify^ versus input current amplitude, lli, for the
following realistic parameters, /^^ = 10 ILA, /^a = 0.4 uA, n„ = 1.6, Vr = 26 mV, ll, ^ 400 MÜ,
/ ? 2 = 120 M O , C\ = 0.2 pF, C2 = 0.32 p F mid C„ = 0.25 iiF. 11 can be seen that for uiput mnplitudes
greater than 0.5 i i A 0A; decreases rapklly.

The settling tiuK^ o f t h i s ckised-loop system behaves consistently w i t h t f , ^ . Fig. 4.5 shows a plot
of t,, versns ha w i t h £ -= 0.02. The system response goes f r o m overdamped to critically damped and
decreases when lia increases. For ha slightly gTeater than 1 i i A , the system response moves to
the imderdaiiiped case and a ripple on /,,. occurs [53]. Finally, i , goes u|) rapidly as ha approaches
10 uA since the system enters the nndamped situation. This imphes that the maxunum sain]iling
fteriuency of this CSH eircuit depends on ha and, i n this particular example, the samphng interval
shoidd be longer than 20 //s l o cover ha fiom 0.1 i i A up to 5 11 A. Also for higher amplitudes (5 u A
< /id < 10 u A ) , the reqmred sampUug period rises rapidly and reaches 0.1 ms at / • d = 10 uA.
38 CHAPTER 4. A CLASS-AB CURRENT-MODE SUBTHBESHOLD SH CIRCUIT

0.1 1 10
Input c u r r e n t a m p l i t u d e , n A

Figure 4.4: Simulated pha.se margin versns i n j m t eurrrmt ampUtnde for IB = 10 iiA, IB2 = 0.4 n A ,
/tp = VT = 2f) mV, Ri = 400 M H , R2= 120 M O , C i = 0.2 pF, C2 -= 0.32 |)F and C„ = 0.25 pF.

Fignre 4.5: Simidated settling time versns input cnrrent amphtude for In = 10 uA, IB2 = 0.4 uA,
11,, = 1.6, VT = 20 raV, « 1 = 400 M O , « 2 = 120 M O , f A = 0.2 pF, C2 = 0.32 pF mid CH = 0.25 pF.
 4.3. CIR.CUIT SIMULATIONS 39

Tabk; 4.1: T R A N S I S T O R D I M E N S I O N S

MOSFET W [/im] /. l/mi]

A-/, 2 0.5
A'/2 1.5 0.5
A'h 0.25 1.5
Mr, 0.5 1
MM 20 1
Mi,2, Mi 1 1
A-/,„„(0.25 pF) 10 10

1 1 1 1 1 1 I I 1 I I I
0 0.2 0.4 0.6 0.8 1
Time, m s

Figure 4.6: Transient input and output currents: Iia = /i,isin(20 007rt), ƒ•<! = 10 uA and f„= 10 kS/s.

4.3 Circuit Simulations

The CSH circuit has been designed and sunulated ui Cadence S p c e t r e - R F ™ using T S M C 0.I3-/;,in
CMOS process paraniet(!rs. TraiLsistor sizes are shown m Table 4.1. 1/DD= 0.6 V , Kr„[i= 0.42 V ,
Ker2 = 0.1 V and Cn = 0.25 pF. Biasuig currents In = 10 iiA and 1,2 ^ 0.4 uA arc set lor (;,„i
and 6',„2, resijectivcly. A l l switches are realized as iiMOSTs w i t h a threshold voltage of V,,, = 0.3 V
and driven by clock signals switching between VDD and groiuid. The dimensions of the switches are
identical and chosen to be as small as the proi:ess allows to muiimize eliarge-injection and cloek-
feedthrough efl(«ts (W= 0.15 /tin ami / . = 0.13 / j i n ) . T I K ; (Hiieseeiit power coiLsumptioii of the entire
circnit (!quals 27.5 nW.

Fig. 4.6 shows the transient input and ontimt currents fiir an i i i i m t amphtude and Ire(|neucy o i
10 iiA and I kHz w l u n tfie CSH is sampled by a 10 kS/s clock signal w i t f i a ris(! and 1'aU time of
50 ns. The large glitclie,s appearing at the beginning of the hold phase arc induced by a sudden
change o f t h e CSH eucuit's output rtsistance as a consequence o f t h e di.scontiiuuty o f t h e LG. The
nou-ov(!rlai)i)ing clock transition (from switcliiug ofi' ,92 to .switching on .?3) allows large transient
voltages (products of the held curnints and the large output resistances) to be produced at the
output terimnals of G,„2- R leads to large voltage differences across switches ,S';) (assunung they
are loaded by a similar CSH circuit having a fixral uipnt voltage). Switcliiug on S^ will bring down
the high voltages to the voltages at the input nodes of the next stage. Tins process happens across
the drain-source para,sitic capacitances of S-.^ lor a very short jieriod of time, when the traiLsient
40 CHAPTER 4. A CLASS-AB CURRENT-MODE SUBTHBESHOLD SH CIBCUIT

Time, m s

Figure 4.7: luterufil uod<; voltage swings at different input amplitudes.

X 10"

0.1 1 10
I n p u t Ml

Figure 4.8: Integrated noise pow(!r f r o m I IIz-IO kHz as a fimetiou of the modulation index ( M I ) .

currents flowing through the output i u addition t o the desired output current are generated. This
mechanism not oidy produces the glitches but also deteriorates the eucuit's linearity. A t the moment
that the output voltages suddenly go low before completely closing S3, small charges (fed through
the para.sitic gate dram capacitances of M3) wUl be add(xl to 6 ' „ giving a held voltage; error |29].
However, there are; two ways to reduce these glitcluis, thereby enhancing the circmt's linearity:
I ) t r y m g to ehminate tfie non-overlapping moment by employing a special clock scheme [,54], 2)
creating k)w impedance output nodes by iutroducing eirrrent followers at the output terminals of
6'„,2. This ean be done at eircuit level by cascoding output transistor M3 [43]. However, since the
linearity of the CSH is not severely degiaded, we have not adopted eitlu^r of these; solutions for our
flcsign.

The internal differential voltage swings at the input o l G,„2 are shown i n Fig. 4.7. For a I kHz
sinusoidal input current w i t h an amphtude of 2 i i A , the; CSH circuit responds slowly since C,„2 and
aj„ are low anel tlie;re is nei riiiging d m i n g the e;iitire cycle. For the ea.se o l a higher input curremt
amplitude (10 u A ) , the ringing appears when Vui reaches 0.09 V . This is because; ^ , „ 2 is e;iihanccd
accorchug t o (3.20) and as uj„ iuove;s closer to oj,,2: the phase margin and setthng t i m e o l the; CSH
eircuit are degi aekxl.

Noise and lhie;arity performance were; verified using perioehe steady state (PSS) and pe;riodie noise;
(PNOISE) analyses for 12 liarmomcs. A 1 kHz sinusiodal input signal w i t h its amphtude varying
 4.3. CIRCUIT SIMULATIONS 41

73dB

Figure; 4.9: Spectral performance metrics as a function of the modirlation index ( M I ) . D R of 77 dB

is found f r o m tlie distance between M l that starts to bring the signal above the noise lloor (SNR
=- 0 (IB) and M I that brings SFDR down to 40 d B .

from 40 pA to 11.5 nA was apphed w i t h a 20 kS/s sampling rate. Fig. 4.8 shows the output noise
power integrated from 1 Hz to 10 kHz as a hmetion of M I {II\/IB2)- I t can be seen that the iioLse
power remauis constant i u the range (d'O.l < M I < I . For M I liiglier than 1, the noise increases. This
is i n line w i t h what we predicted i n the previous chapter, namely that the input current inodidates
the drain currents o l the transistors i n the class-AB transeondnetor, thereby creating more shot
noise.

The spurious-free dynamic range (SFDR), SNR, and signal to noise plus distortion ratio (SNDR) are
plotted and shown in Fig. 4.9. From this plot, a DR, (measured up to a 40 dB SFDR correspoiiduig
to a total harmonic distortion, T H D , of 1%) of 77 dB is obtained and an SNDR, of 59.3 dB can be
aclueved at a 2.25 irA input amplitude. This leads to an effective niunber of bits of

E N O B . ^ ^ " ^ . 9 . 0 b i t s . (4.«)

Therefore, a figure of merit that embraces the (ïftccts of distortion, sampling spewed, and jiower
cousinnption, of

^""^./•,.2ENOD = l - ' ^ " W / M H z (4.7)

is obtaiiKxl, where / ' represiüits the average power eonsiunption and ƒ, is the samphng rate.

To see the effi;ct o f transistor mismatch o n the circuit huearity, a Monte-Carlo trairsient simulation
using a 97f).G Hz, 10 uA a m p l i t i K k ; sinusoidal /ja (corresiionding to M I = 25, wliich is the luaxhnuni
amphtude that can be applied before oseillation, see Fig. 3.9) and ƒ , = 20 kS/s has been done. The
results are shown in Fig. 4.10. For IOO runs, a mean value of the T H D o f 45 dB is obtauied w i t h
a standard deviation o f 3.92 d B .

Fig. 4.11 shows the CSH circuit's simidated SFDR versus M I fiir exlreiiK! proe(;ss, tempcratun; and
supply voltage conditions w i t h the same setup as i L s e d tor the above M o i i t o C a r l o sfinnlatiou. I t can
•\2 CHAPTER 4. A CLASS-AD CURRENT-MODE SUBTHRESHOLD SH CIRCUIT

-60 -50 ^0 -30 -20 -10

THD, d B

Figur(; 4.10: Monte-Cailo simulation of the T I I D for mi input M I of 25.

be seen that llie minimmn operating supply voltage that the eireuit can haiidh; is O.ti V . From this
supply voltage, rnnning slow transistors at a high temperature (80 " C) gives the; jioorest nwnlts.
For M I greater than 1.5, the SFDR, falls from 40 dB to around 30 d B . For higher supply voltages,
better linearity is obtained for all proeess and temperatme corners. The results obtauied f r o m these
process and temperature eoniers are uot inuch different. Further investigation is required to know
whether inoci;ss or temperature, has more influence on SFDR.

A iicrlorinance comparison w i t h prcvkiusly reported CSH circnits is presented ui Table 4.2. I n

addition to the suuidatioirs mentioned above, we also tested the CSH cneiut lor higher input and
sampling frequencies (50 kHz and I MS/s, respectively). To do so, the bias current levels were
changed to Im = 25/^2 ^ SdO uA. To handle the larger gate-source voltages o l aU trairsistors, we
increased the supply voltage t o V D D = 0.8 V . The residts are smmnarized i n the last right cohmm.
A t this bias point, transistors that f o n n G',„i entcn- moderate inversion for both static and dynamic
situations. For the dynamic situation w i t h lugh input modulation uidcx, some transistors that
form G,i,2 w i l l be forced into moderate uiversion as well. As a conse<iueiice, parasitic capacitances
C'lS become bigger and C2S change dynamicaUy aecorihng to the m p u t amphtude. This afl'ects
the dynanric stabihty condition and results i n a reduced allowable signal swmg. The D R obtained
becomes 2 dB less than the low-power, low-fre(iuency operation purely based on weak inversion
operation, h i terms of linearity, T I I D better than - 40 dB is obtauied when M I is lower than 22
whUe the same level of T H D can be achieved for M I up to 27 in the lower-power, low-fr equency case.
I n comparison m t l i other designs, as can be dcdnf:ed f r o m the SNH,,„„x of [55], ]56], and [57], class-A
operation provides us at most 00 dB of dynamic range. As we ean see f r o m [41[ (weak inversion
class-AB SI inemory cells) aud this work, to reach higher than 70 d B D R , elass-AB operation is
requhed.

4.4 Conclusions

The design of a subthreshold elass-AB CSH cucuit has been ])reseiited. Benefitting f r o m negative
feedback and the exponential behavior of the trairsistors u i weak inversion, the jiroposed CSH eircuit
can be operated from a 0.(i V supply aud coiisuiues 28 nW qiuescent power. I n addition t o that,
SNR, and D R of lugher than 70 d B , and a F o M of 1.9 u W / M I I z are obtained. Monte-Carlo and
eoriKir siinulalions also coiifir-in that a good linearity of the cucuit can be maintained when realistic
imsmateh, process, voltage and temperatme variations are taken into aceoimt.
4.4. CONCLUSIONS 43

Input Ml Input Ml

(a): Typical (b): Slow

Input Ml

(c): Fast

Figure 4.11: SFDR versus input modulation index P V T simulations: a) typical at 40 ° C; b) slow
at 80 • C; and e) fast at 0 " C cases.

Table 4.2: P E R F O R M A N C E C O M P A R I S O N

Reference [41] * [55]* [56]** [57]** This work*

Tecli. [;jm| 0.35t o.istt 0.35 0.35 0.35 0.13 0.13
1'DDIV] 1 0.35 3.3 1 2 0.6 0.8
Static P |W] 5.8 n 2.6 fj 6 m 3 m 6 m 28 n 1.84 Id
ƒ. [MS/sJ 1 1 13 35 too 0.02 1
S N R „ a , , [dB] 60 56 60 73 72
ENOB [bit] - - - 9.6 9.6 8.7
DR [dB] 73 68.2 60 56 - 77 76
T H D [dB]@/i„ [Hz], - 41® na - 38.6® na - 66@1.3 M - 5561.32 M - 7791 M - 40®1 k - 40@50 k
MI 1 1 0.98 0.9 0.9 27 22

*simulation,**measurement, tcascoded SI cell, ttS^I cell.

 Part I I

Compact Continuous-Time Filters

 Chapter 5

Nanopower BPF Using

Single-Branch Biquads

5.1 Introduction

Analog filters are indispensable cu'cnit budding bloeks i u eleetronic systems. They sejiarate desired
signals from other signals aud noise by maldng use of difterences i n their energy spectra. I n order
to be able to compare various filters, a figure of UKnit (FoM) that <:ombiues several (tircuil or signal
parameters to a single nuniber is oft,eu helpful. Adapting the concept of m i m m u m po.ssible energy
per <:ycle and per frequency jiole [58] to the design of a bandpass filter (BPF) ciremt, a FoM can
be defined as

wfiere N, f c and D R are the power consumption, filter order, center frequency and dyuanuc
range of the filter, respectively. I t is elear fi om (5.1) that the cost (numerator) over the performance
(denominator) shoidd be as low as iiossibki. As it is commonly known that P is the product of
cm-rent and voltage, and D R is the ratio of maxinnmi signal power (limited by distortion of the
filter) over the nunimum signal power (defined by tlie noise floor of the filter) that can be appfied
to the filter, to enhance the F o M , the following conditions should be met:

1. The filter circnit s l i o u l d contain the least number of cnrrent branches and operate fr'oni the
lowest possible supply v o l t a g e ( I - D D ) for a g i v e n N, f c a n d DR..

2. The filter topology should contain a imniminn number of aetivi; (noisy) elements per tiuKv
eoiLstaut.

17
48 ciiArTim r,. NANOPonn^R DPF USING SINGLE-BRANCH BIQUADS

Hl'
O
[611,1 CAS-I 09

10'
[63], J S S

c
^ < ^ [ 6 0 ] , TBioCAS 07
0
[59], I S S C 0 3
l&2], E L 10
C)
10'
This wor i
iu'
I 2
VDD.V

Figure .5.1: Figure of merit eomparison of 6'„, - G bandpass filters developed for bioniedieal ap[)li-
eatioirs eoUeeted ov<!r 200,3-2012, and this work.

For the F o M of biomedieal B P F designs that have a center frequency in tho anrho range (and below)
and a [ ) O w e r eonsmn[)tion kss than 1 / i W [,59 63(, V D D bas been added into the numerator of (5.1)
as |r.o[

As a eoihse<[uence, VUD is aceomited for twice and becomes the most important factor i n this
modified defiintion. Although i t has been commoidy used in recently reported BPFs [ f i l 03] as
redueuig VDD is consideirïd a virtue, the huidamental basis for this modified F o M is quistionable.
I n this work, we therefore consider the defimtion of (5.1) [58[ uistead o l the modified F o M introihiced
ur [G0|.

Fig. 5.1 shows a plot of F O M B P versus KDD using (5.1) for various biomedical BPFs collected from
2003 to 2012 [59-G3[. The second best B P F is the design [iresentcd i n [59]. Its topology satisfies
the first eondition for eidiancuig F o M (more details on the filter topology w i l l lie given i n Sec. 5.3).
The worst FoM belongs to the B P F mtroduced i n [61]. This is because the design of [Gf[ uses a
state-space filter toiiology that reqmres many G,„ cells to reahze b o t h leedforward and feedback
filter coefficients and integrators. Obvioirsly, this violates couditkm No. 1. The BPFs introduced
in [6()[ and [63[ nse veiy similar filter to[)ologies (based on element substitution of a passive LG
ladder [irototypc) and provide ahnost the same FoMs (2.13 x 1 0 " " ' and 2.15 x 10""', respectively).
It should b(! noted that LC ladder filter topologies possess an advantage o l low seiisititvity to
parameter variations that is superior to otfier type of filters. Tliis feature is not aceomited lor i n
tlie t k ^ m t i o n o l (5.1).

These numbers show a coirsiderable FoM hnprovement w i t h respeet to the design of [61[, but are
stiU worse than that of [59]. The rea.son for this is that substituting one fioating uiductor i n G,,, - C
filters requirts 4 G,„ cells and a grounded capacitor. Although the mmiber of active elements is
less than reqmred in the state-space filter of [61], tins is not fii line w i t h condition 1, either. A
significant unprovement can hc seen for the filter presented in ]G2], for which ahnost an order of
magiutude improvement w i t h respect to the filter of ]591 is aclueved. This disign uses the same
filter topology as used i n ]59], and adopts a compact, pow(!r elficieut 6'„, - G bk[iiad structure at
transistor level that requires ordy two branches of current eonsuiiiption from [35]. The conditions
fiir FoM enhancement have almost been hilfiUe<l i n this disign. Howeviu-, since the filter toiiologies
 5.2. SINCLE BRANCH FILTERS

used i n |59| and [(i2] rcqnii e a voltage follower eirenit l o rednce loading (effeets, a n d the transistor
eircuit o f the; biquad section used in |35| and |f)2| cannot be ojHuated at a v(!ry low VDD, there is
still a possibility for the F o M to be eidianeed further.

l u this chapter, wc; d(;veloi) HK; C,„ - C B P F toj)ology fnrth(;r to aehi(;ve a siguiH<;ant F o M i n i -
provenrent w i t l h u the context of low-ftef|u<;iiey int(;grated filt(;is f o r biomedical a p p l i c a t i o i L S . I n
Ibis conti;xt, very large r(;sistors would occupy a large; chip area aud would lx; sever(;ly liuut(;d iu
bandwidth and should lx; avoid(;d. We propose:

. A n(;w uiacn>mod(;l: a low-voltage 2"''-order hlter tojjology that has a nunimum nmulx;r o f
active (noisy) el(;ments and can be cascaded without the expeirsc of a voltage buffer.

• A new transistor-level circrut: a low-voltag(;, pow<;r-effieient, single branch circiut structure

using a smgk; transistor as a C,„ c<;II that can be ht into the filter topology inentioned above.

By doing so, a 'r^'-order B P F w i t h F o M unprovement ean be succcssfiiUy rc;alizi;d. Measurement

results o f the ])roposed B P F fabricated i n A M S 0.18-/(m CMOS teclmology eonfirm om- conce]it.

I t shoidd also be noted that then; are two po.ssible disadvantages o f this ni(;tliod: 1) the filter's
huearity is hunted, resulting in a m a x i m m n signal swing o l a fi;w milli-volts, and 2) tlu; BPF's
(luality factor is limited l o the maximum valiu; of 0.5. Howev(;r, these limitations do not prevent
this filt(;r f r o m being applied i n various biomedical applications, such as, e.g., a filt(;r for coclilear
implant speech processing [59] |G4[ [65[. This chapter is develop(;d from [7[ by adduig a more
detailed p<;rfonnance analysis and measmement results.

I n tlie next section, the idea of rcjilizing filtering ftmctions ftom a single branch circuit structun;
aud lli(;ir p(;rforniaiice wifi be discussed. The i)ro|ioscd B P F design, including the d(;tails o l the
filter topology selection, transistor level arelutectnres, huearity, c o u n i i o i i - n i o d e behavior and design
iii(;thodology will l x ; presented ui Section 5.3. Section 5.5 pres(;nts ineasurein<;nt residts and a
detailed comparison w i t h previously published rlcsigirs. ConchLsions w i f i be given i n the last section.

5.2 Single Branch Filters

To achieve a compact power efficient filter circnit structure, tliis section explores the feasibdity of
realizing contuinous-time filters from cu-cuit slructures that contain a miuiuium number of transis-
tors. M<n-cover, the V D D rc(iiured fiir the filter cucuits is less tfian two gate-source voltages ( V G S )
plus one satm-atiou voltage (Vossat) and the filter employs only on(; branch of bias current.

5.2.1 Filter Topology Using Feedback Transconduetors

For a M O S F E T that is biased i n w(;ak uiversion saturation, when tfie bidk and source ternunals
are comiected to each other to luimimzc the body eft'ect, the symbol of a fbiir-t(;rnunal (k;vice as
shown i n 5.2(a) can be reduced to become tlir(;(;-t(;rniuial as shown i n Fig. 5.2(b). A differenlial
(j,„ cell connected i n n(;gative feedback fashion (as shown i n Fig. 5.2) can be obtauied from the
small-signal op(;ratioii of the transistor.

Since the bulk effect, also known as body effi;ct, is unwanted, a pMOS device in an n-well CMOS
process tliat allows tlie souree to be conected to the bulk is prefi;rred ui this design. Biased by
50 CHAPTFAl 5. NANOPOnVJl BPF USING SINGLE-BRANCH BIQUADS

1 O 1)

i r
1 D
n
(a) (h) (c)

Figure 5.2: Single tran.sistor (a) four-terminal symbol, (b) tlrree-teriiunal symbol and (e) its macro-
model.

DC d r a i n - s o u r c i ; eurrent IB, the transconductance of the transistor w i t h zero VBS (bulk and source
terminals comieeteil together) and neglecting channel length modulation is given by [25]

>Ln = ^ , (r..:^)

where iip and V T rejiresent the sub-thr<;shold slope factor of the pMOS device |25] and the thermal
voltage;, re.spe<:tively. Usmg this macro-model, several hlter tojiokigies can be found from circuit
strnctiu'cs having a single bias curreut brmich.

Fig. 5.;i shows po.ssible reahzations of single-branch G,„ - C filters. A lowpass (LP) filter can be
obtained f i o m tlic circuits i u Figs. 5.:{(a) and 5.;i(b), a liighpass (HP) filter ( f t o m tlie former) and
a bandpass (BP) filter ( f t o m tlie latter).

Voo Voo

Vss Vss

(a) (b)

Figure 5.3: Single-branch filter circints. (a) k='-order L P and HP fihers. (b) l='-order L P and
2"''-order BP filters.

Figure 5.4: Single-branch filter small-signal luoflels.

Tlie circuits i n Fig. 5.3 are all formed by a cascode connection of trmisistors Mi and M2 and
capacitors between source and A C ground ternunals. Both transfstors share the same bias current
5.2. SINGLE BRANCH FHTEBS 51

/;;. Replacing M, anel M2 hy the macro-niodd ot Fig. 5.2 results hi the siiialFsignal iiiacro-
iiiodel shown i n Fig. 5.4. Assiuiiiiig that the values of C'l and C2 are iiiuch greater than jiarasitic
gate-soiu-ce and gate-drahi capacitances Cga and c^a of M i and M2, we can show that:

W i t h o u t capacitor C2, we obtain the followuig I I P transfer hui<:tion

B y adding C2 to the former HP output node, the following B P transfer huiction can be aclueved:

^/BP(.S) = ^ = -. ^ (5.(i)

I t can be seen that there are three filter circuits obtauied fi'om tills .single branch structm-e. A p a r t
f r o m the potential fiir low current consumption, another advantage of these filters is tfiat they
feature a high impedauee ui])ut node (being the gate termfiial of Mi). As a residt, tfiere Is no
severe loading elfect for cascade connections of these filters assunung that the IVIOS parasitics Cgsi
and Cgtii are sidficiently small.

Since the filters are operating u i weak uiversion saturation and the cutoff or center fi-e(iueiicy can
be adjusted by the value o l y,„ and fj^, winch are proportional to I , i n weak inversion saturation,
a wkle tuning range of the filter's cutoft' fiequeney via controlling I , can be expected.

5.2.2 Supply Voltage Requirement and Current Consumption

Considering the circuits in Fig. 5.3(b) i n eonjunction w i t h the traiLsfer fimction of (5.G), a eurrent
coiLsuiiiption of 0.5/n per filter ]iole is found. To create projicr bias points i n weak inversion
saturation, tfie supply voltage I-DD and eommon-mode level VCM shoidd be considered. For the
stacked circuit shown i n Fig. 5.3 and setting Vgs ^ Ü V , the supply voltage reriuircd must be at
least KDD = kin,>p 4- VSG2 t 2KsD.sHt (assuming that Tn reqmres sunilar VSD«-M as Mi). To satisfy
the condition of weak inversion satiuation that V D . S H I = 4VV' , tins can be re-arranged to

l^DD = Vinpp 4- VT (^8 + n„ In ( ^ - ^ ) ^ , (5.7)

where hm and Kinpp are the zero-biased ciu'rent of the transistors and input (peak-to-peak) voltage
swing, r(;spcctiv(4y.

I t can be seen Irom (5.7) that there is a fixed term of WT = 200 niV and a bias cniTcnt related
term. The latter term is directly related to the cutoff' fi-eqnency of the filter. I n the ease of cascading
H P and B P filters, V C M of each stage should equal

VCM = Vss 4- VsG2, (5.8)

52 CHAPTER 5. JVANOPOTVEfi. DPF USING SINGLE-BRANCH BIQUADS

to iiiaintaiii tho saiiH; signal swing range lor all easearlerl stages.

This eondition on VCM creates a n<;w re(|nireinent for VUD to be at least 2KsG + l4;Daat (assiniung
Vticn = VsG2 and fosat — 4 1 ^ ), or i n a f o n n simdar to (5.7);

VDD = Vnpp + 2 ^ 2 I n„ In (5.9)

^ . 0.3

0.1

0.1 1.0 10
IB, n A

Figure 5.5: Supply voltage requir(;ment for different bias currents.

h i this extremely low-power design context, an I , in the range of f ) . l to 10 u A is nsed to accorn-

niodate cutoff' frequencies ranguig f r o m 100 Hz to 10 kHz. Therefore, either (5.7) or (5.9) can be
bigher, and the highest one is the ininiinmii V D D rtxiuired for the cascaded stage. For the 0.18-/im
CMOS teclmtdogy i L s e d i n this work. Ion = 230 pA and rij, = 1.6 is obtained for \¥/1, — 10. Fig. 5.5
shows a detad of the required V D D for Ki,,,,,, = 25 mV and difh;rent valnes of I , accoidiug to (5.7)
and (5.9). The grey hne mdicates the level of VDD requued. For IB less t h m i 3 n A , (5.8) defines
VDD wluch can be set as low as 0.2 V at I , = 0.1 uA. For I , greater than 3 uA, VDD is defined
by (5.9). Fronr this plot, VDD = ".5 V is confirmed to b(! sullicieirt for the whole range of 1, (from
0.1 iiA to 10 i i A ) .

Ou the other hand, any cascade connection that uses the LP filter uicreases the reqrured VDD as
the output is taken ftom the source terminal and tin; input is applied at the gate terminal (unless
a comijlemciitary (iiMOS) version of the single-branch LP filter is applied [35]). Tins will make
eitiier tlie rcriuued VDD eventuaUy exceed the available siqiply voltage or the filter suff'ers from the
body effect. Another way to solve this problem is using a level shift,er as an interface block to slrrft
the source voltage of A'/] down before cascading the ucxt stage of L P F , thereby maintaining the
same reqiured VDD- This, however, leads to more power consumption and more noise contribution.
For tlus reason, the L P filter will no longer be considered.

5.2.3 Noise

Fig. 5.6(a) shows a singkvbraiicli B P F biquad circuit and its noise sources. I n ijractici;, I , can be
f'ormcfl by a single transistor MB biased by VB- The transistor's weak inversion uoisi; behavior will
be dominated by its shot noise assuming that, for simplicity, VB is noiseless, each transistor is sized
large enough and its drain current is low enough to keep the I / / noise; corn<;r &-equeiicy below the
 5.2. SINGLE BUANCH FILTERS 53

VDD
Vt
A 4>

<HI-

Vss
(a) (b)
Figure 5.6: B P F witli noise sonrees. (a) IVansistor eirenit. (b) Equivalent model.

fiequeney of interest. Etiiuvalent current noises („B, 'i„i and j„2 wdl have the same power spectral
density of 5'i„i = 2f/7,j [25|.

Fig. 5.6(b) illustrates a suniilified equivalent model for the noise calculation that realistically as-
sumes the drain-source conductanee of each transistor is ii<:gligible compared to its g,,,. First noise
cmrent i„h and i„i are eombined aud How through the L P network comprising C'l and II, ( = (/,7,J).
The resulting noise voltage wiU be converted into output current noise; by ry,„i aud will condiuie with
—/,ii and /j,2 and together fiow through another L P network, C'2 and R2 ( = .'/.a'). Snbse(iu(;ntly,
output voltagr; noise ?i„„ ajipears at the; output port. Note that the eurrent noise of appears
at both the hiput and the output ports of (/,„i («„i and i„i, respectively), leading to two current
sources that are hdly correlated hi the circiut model of Fig. 5.6(b).

Followmg the aforementioned mechaiusm and approxunatiug (/,„i = (1^2 =<Jm2 = TTvrr» average
out|)ut noise [lower can be found from

/ (A',„„|//H(.s-)|'-iS,„2|f/2(.s-)|' 1 s,„i\ih{s)f)di; (5.10)

where
9„,l
(5.11)
D{s) - i + J c ^ + c ^ ) ^ , 2 ( ^ 2 i C ^ y
V-'''"' .«'"2/ v-'''"'-''">2y

//2(.) = ^ (5.12)

and

//l(.5)=//ö(.S-)-//2(.s) = (5.13)
Dis)

After some mathematical remTangement, this residts in vl„ = ïjpfcT/Ca.

Note that (5.10 - 5.1,3) ean be ajiplied to the HP filter of Fig. 5.3(a) by re[ilaciiig C2 by the gate-
source iiara.sitic capacitance of ('•g.s2) since Cgs2 will bypass the output voltage to gioimd at very
high frequencies eventually forming a B P response.
54 CHAPTER 5. NANOPOWER BPF USING SINGLE-BRANCH BIQUADS

2"''-order s e c t i o n 2'"'-order s e c t i o n

(h)

Figmo 5.7: Cascaded 4"'-order BPFs. (a) Topology of |59]. (h) Topology used i n this work.

5.3 Cascaded Bandpass Filter

This seetion discusses the hlter's topology selection, transistor-level circiut and relevant eircuit
characteristics.

5.3.1 Filter Topology Considerations

Fig. 5.7(a) shows the 4"'-order B P F topology used i n [59] and [62]. I t is composed of two identical
2*''-ordcr sections comiected i n cascade. Ca])acitor C'l w i t h transcouductor G„a and 6 2 w i t h G„,2
f o r m the HP and L P cutoff frequencies of each 2"'-order section, respectively.

To prevent loading by the input iiupedanc:e of ttie subsequent stage, a voltage follower is inserted.
This leads to more chip area and power cousinnption. I n tins work, we develop this structme hirther
uistead o l the structures used i n [6Ü[, [ 0 I | and [63], because tliis topology has a small number o l
active (and noisy) elements (G,n ceUs) per noiseless elements (G). Therefore, lower noise and power
consumiition ean be expeeted from this topology. I n order to fru tlier enhance the filter's F o M , we
need to efiminate tlie voltage butter.

The proposed B P F biquad sectkm i n Fig. 5.4 is compatible w i t h the above requirement. Fig. 5.7(b)
shows the single-ended 4"'-order B P F constituted by the two identical G,„ - C biquad sections
proposed. The transfer fimction of ea<4i tiiiinad section can be found by rearranging (5.6) to

(5.14)
4-s a,„
C.2 C1C2

For G„a = G,„2 = G,„ we have.

 5.3. CASCADED BANDPASS FU.TER 55

V C'l 6*2
Q K
C'l + 6'2'

where jjaraiueters w„, Q and K stand ftir the center heciiunicy, the (luahty factor and the mid-band
gain, respectively As this strnetme has a higli-unpedaiiee uipnt p o r l , the casca<le comiection for
lugher order reahzation does not need an additional buffer cir<;uit as long as the eommon-mode bias
r(x|uirement is satisfied.

Note that this topology can only realize real poles and, as a eoiLse(|uenee, its tinality factor is limited
to Q = 0.5. Howev(;r, for a plethora o f biomedieal apphcatioirs, e.g., i n cochlear implant channels
that require very low pow(!r corrsnmjition and electronk; adju.stabihty, this Q is acceptable [59|, [64].

5.3.2 Tiansistor Level Realization

A t the transistor level, the filter topology fir Fig. 5.7(b) can be finmed directly using the single-
branch B P F of Fig. 5.;i(b) t o implement the 2'"^-ord(!r se<;tions. A center ftetiuency that can lx;
linearly adjusted by bias curreut Tn is achieved. Transistors and A'h arc acting as G'„,i aud
C',,,2, respectively. Note that the eriuivalent operation o f t h e jiroposed filter topology aud the circrut
is valid only for the small-signal condition. As a consequence, a dilfereutial structure as showu hi
Fig. 5.8 LS requhed to maximize the filter's dyuanuc; range. The power consmnption and output
average noise power dcfinerl i n (5.10 - 5.i:i) will double here as well as the vofiage sigmal swing for
the dift'erential version h i Fig. 5.8. I n this ease bias current T, defines the transeonductmice

(5.16)
2npVT

I n IUK; w i t h (5.15), is Imearly adjustable via T

V„^rM,A /Wis 1^2

ss

Fignre 5.8: Ditt'(;rential version of the shigle branch B P F .

5.3.3 Dynamic Range

We estimate the D R of the B P F shown m Fig. 5.7(b) from the harnionic com|ionents of the filter
indnc(;d by the nonlinear ((;xpoiieiitial) behavior of inimt transistors i \ - / i ^ and Mm when an input
 CHAPTER 5. NANOPOWTiR BPF USING SINGLE-BBANCH BIQUADS

signal w i t h frequency (ƒ]„) e<iual to f c of the hlter is apphed. Ojierating at tins friKiuency, the
inipcxlanee of 6'i is close to zero. This caiLses the source terniuials of MIA Mm to bc <:oiiiiected
together. For this reason, KGSI/I and V Q S I H will (Lxiierience the largest uiput signal amplitude
coni])ared to the case in which an input voltage w i t h a lower frc(|neiicy but w i t h the same amphtude
is apphed. For higher fr(K|iieiicies, siimlar harmonic eomponents will be generated by M,A and
MiB, bowewir, they w d l be filtered out by M2A and M2B and 6'^. As a eonsequenee, tfic liarmonie
eomponents tliat appear at tfie output wdl bc the highest whciii f\n = fc-

Now MiA and Mi, can be scim as a somce-eonpled pair transeondnetor biasixl by a current source
that e(iuals 2IB- Assmning MIA and Mis are matched perfectly and operated i n weak inversion
saturation, we ean find tliat

fod = UnB - h n A -= 2IB tanfi • ("'-l^)

ThLs differential currcuit is injectcxl into an active load, comprising M2A and M2B and capacitor
C 2 , and a differential output voltage K„l w d l bc ])ro<luced. Hence, the distortion of V„d is <:ansed
by the uonluiear behaviors of both f„d and the active load. By setting G, > WC2 to achieve a K
close t o gm!U^ = n^^, voltage swing at the output is always less than the vofiage swuig at the
uiput. h i order to estimate the hnear m p u t range of the filter, we assmne ftirther t h a t this output
voltage swing is sufficiently small for M2A and M2B to produce negligible harmonic components,
and that fod <^aii I " ' eonsidered the dominant source of distortion.

Applying a Taylor series expaiLsiim to (5.17) and coirsideriiig only the first two terms, we liavc

/„d Vui 1 / Ki. (5.18)

21B n„VT 12 \npVT

I n thf! case that a sinusoidal Ki.i w i t h amplitude V,, is applied to (5.18), the li^'-barnionic distortion
can be calculated to be

48 \n,,VrJ

For HD.T of 1%, V,, = 0.69/1,,Vr (i.e., I . I V T for = 1.6). Hence, we cmi find tfie maximum input
signal power of a siiiusoklal output signal w i t l i .An = f c as

Refcrring to Sec. 5.2.8, the output noise power for the circiut in Fig. 5.8 can tie fbiind to be
v l ^ f = 2npkT/G2- Then wc; can approximate the D R of the B P F ciremt shown i n Fig. 5.8 as

/'0.24C'2l'5\ _ /0.07.5C'2l-'.;^\ , , ,.
DR_„d lOkig ( ^ - ^ J ^ lOlog [ - ^ 7 J ^ ) ^ f - » . - (-21)
 5.4. DESIGN METHODOLOGY 57

For the 'l"'-or<lcr B P F obtained l)y ea.seading two identical 2"''-order sections of Fig. 5.8 w i t h Kj
for each stage, the output uois<! power of the entire hlter circuit can bc found f r o m

•".•oFourlh - ''L.Diff -< <,Biti'<l = "n.,Diff ( l + ') • (•"••22)

Tlnrs, the DR of the 4"'-or<ler B P F can be calculated to IK;:

5.3.4 Common-Mode Behavior

It is uiteresting to analyze the coiimioii-mode behavior of the differential circuit that provides two
filteruig ftmctions in Fig. 5.8. For the L P F , the output voltages are taken f i o m the source terminals
of the circuit configiued as source followers. In the pass-baud the output voltages w d l follow the
input voltages regardless whether diflereutial-mode or common-mode signals are apphed. There is
no common-mode rejection at all.
On the otluir hand, the output voltages of the B P F are taken ftom the rlrain ternunals of Mj and
as a result, assunung MIA and Mm are matched perfectly, high eonmion-mode rejection capability
can be expected. Theoretically, under the condition that each cmrent source I , has infinite outiiut
iin]iedaiie(! and neglecting tlie cliaiuKd length modulation effect of M i , tlu; output eomnion-modc
and differential mode signal will be completely isolated thus featuring an uifinite counuon-iuode
rejection ratio.
I n practice, a low-fre(iucncy counuon-mode gain of this ciremt can be foimd for the case i u whieJi
Ml aud M 2 are perfectly matched, which equals /1CM = -HiH.y^l, where g„r_ represents the output
conductance of ciUTent source In. Eubancing the eonmiou-mode rejection ratio (CMRR.) can IK:
done by miproviiig the output impedance of I,- Besides, dne to mismateh between traiLsistor pairs
M l and M2, eonmioii-niodc to differential-mode conversion w d l occur and the C M R R will IK; fiirther
degraded.

5.4 Design Methodology

This section presents the design procediue fiir a B P F Ibr application i n an analog bionie ear proces-
sor. I n this particular application, tin; following issues shoidd be considered: filter order, midband
gain, D R and fc-

5.4.1 Filter Order

For the ]iractical use of a BPF h i a bioiiic ear processor as was suggested i n |59], a transition bmid
rcdloff of 40 dB per decade is suffici(!iit. For tlus reason, tfie filter topology shown i n Fig. 5.7(b)
can be employed and its 2'"'-order section replaced by the B P F eircuit shown h i Fig. 5.8. Thus, a
4"'-order B P F w i t h a total current eonsumptioii of 41 u is formed.
58 CIIArTER 5. NANOPCnmR ni'F USING SINGLE-BRANCH BIQUADS

5.4.2 Midband Gain and Dynamic R^angc

For practical ii.sc of this B P F iu a biouic car, a logaritluuic compressor circuit block will be placed
m front of the B P F . This is to inutate the biological operation of thi; cochlear outer hair cell tliat
can handle a large dyuaniic range (more than 100 dB) of the in<:oining sound pressure |(i5|. For this
reason, a B P F filter w i t h moderate dynamic range of around 40 d B should be sufiicient to handle
the output signal of the logarithnuc compressor.

To obtain a D l i of 40 d B , a G2 of approximately 0.5 pF is caleulated f r o m (5.2,'i). However, tlu;

value of C2 shoidd be chosen higher than the calculated value to compensate for the error from this
approxunation. Hence, a C'2 of 0.0 pF is used. To make the D R approximatkin valid, K needs to be
maximized. Coiisideruig the midband gain of the 2"''-order s{;ctioii hi (5.15), fiir a cascaded B P F

structure used h(;re, we found that K = ( t ^ + f e j ) • We thus set d = IKh = 6.6 pF. W i t h tins
settmg a quahty factor Q of 0.28 is obtained using (5.15). This is a huidamental tradeoff between
midband gain and quality factor for this B P F .

5.4.3 Center Frequency, Bias Current and Tuning

I n a coddear speech processor, the target frequency range for the B P F is from 100 Hz to 10 kHz.
As the capacitances have been specified already above, Jc is now controfied by In- I t can be found
from (5.15) and (5.16) that

For Jc = 1 kHz, we obtain 1, = 1 " A from (5.24) and In can lie adjusted hnearly to obtain other
values of Jc ( i e , O.I irA and 10 iiA fiir Jc of IOO Hz and 10 kHz, respectivily).

Due to process variations, around 30% Jc variation uiiglit be obtained after labrlcation. 10% of
these variations can originate f r o m uitegi-ated capacitors and 20% ft'oin transconductance values
of the trmisistor [66]. For application in a bionie car B P F that does not require a very precise
value fiir its center ft-equency. We suggest that 10% variation of Jc should bc acceptable. Hence,
a tuning loop that utilizes a fix«l external resistor, R,^t, to calibrate tlie value of bias cmrent I , ,
tliereby regulating the variation of Jc w i t h i n 10% (resultuig fiom tlic fiitegrated capacitor oidy)
is recommeuded. Fig. 5.9(a) shows the tuning loop that can be used. A precise /Jext is connected
oft'-cliip. ii,nT is an extra traiiscoiidiictor having the smiie transeonductanee as the transeondnetor
used iu the B P F circuit. I I the current fiowfiig tiirough ttext is not identical to the output eurrent
of (y,„T, the resulting error cmrent w i f i be integrated by capacitor G resultmg i n voltage V^u- V-xr
wiU adjust the omeliip bias circuit to generate bias current Isms to update the value of ry,„r. A f t e r
settling, the relationship </,„./. = ft.T^' w d l be obtauied. A t the same time, / « , which is the bias
current o f t h e B P F w d l be updated as well. Eventually the transconductance of the trairsistors irserl
i n the B P F circuit w i l l be controUed by the more reliabk; external resistor /A,xt i " a master-slave
lashion and an Jc variation o l approximately 10% can be obtained. Tiansconductor ry,,,-,. can IK;
reahzed by the circ;iut in Fig. 5.9(b). I f A-fi^ and Miu arc matched and identical to the pMOS
transistor pair i n Fig. 5.8, tins circuit yields suffieient perlormance.
 5.5. MEASUREMENT Tt ESULTS r,<)

(b)
Figure 5.9: Po.ssible fc tuning, (a) Tunning loop and (b) controlled g„a circuit

5.4.4 Ti-ansistor Dimensions

To make all of the design assumptions valid, all transistors used should be sized such as to have
noise corner frequency (where the flicker noise and shot noise have the same spectral density)
below 0.1 fc- Since the dimensions of the transistors are (theoretically) orthogonal to other filter
specifications, we can set them mu'easonably large at first and then rednce them, while still meeting
all specifications i n circuit simulation. B y doing so, we obtain a transistor w i d t h (1'K) and length
(L) of 10 ^ l u and 2.5 fjm, respectively, for MIA, MIB, MIA arid M2B- For transistors that forirr
current source TB, we set W = 24 /mr and L = 6 /un. This is also to have a good matching among
the transistors used i n the bias circuit.

5.5 Measurement Results

The proposed 4"'-order B P F shown i n Fig. 5.7(b) has been fabricated i n 0.18-/;m A M S CMOS
technolog)' w i t h a nominal threshold voltage of Vtp = -0.42 V . The filter chip photo is shown i n
Fig. 5.10. Including the filter core (pMOS transistors and M I M capacitors Ci= IIC'2 = 6.6 pF),
the bias eircuit (formed by simple current mirror circuits) and som-ee follower buffers to drive the
off chip capacitive load (formed by the pads, chip package, P C B and instrument probes), the chip
occupies 64 fim x 225 /tm. The following results were measured using a dynamic signal analyzer
(SR785) under the condition of KDD = 0.5 V for the B P F and bias circuits, V D D = 1-8 V for the
buffers and V C M set to 0.15 V . A n external bias current is supplied from a precision current source
(Keithley 6430).
CHAPTER 5. NANOPOWER BPF USING SINGLE-BRANCH BIQUADS

(b) Zoomed-in area of the BPF

Figure 5.10: Cliip photo.

 5.5. MEASUREMENT RESULTS fil

order;:

M
/
— RimiilAtpd .
— measured 111 ]^

m
Frequency, Hz

Figure 5.11: Mea,surcd and simulated magnitude responses of the proposed BPFs.

The measured magmtude responses of the 2"''-order and the 4"'-order BPFs compared w i t h the
simulated results are shown i n Fig. 5.11. Bias current IB was set to 1 n A to obtain a 1 kHz Jc-
From the measurement (black line), mid-band gains K o f - 1 . 5 4 dB and -2.63 dB are observed for
the 2""^-order and 4*''-ordor filters, respectively. These values include the loss of the source follower
buffers, estimated to be around -0.45 dB by comparing w i t h the simulations without buffer (gray
line).

Fig. 5.12 shows the measured (black line) and the simulated (gray line) magnitude responses of
the 4*''-order B P F for IB ranging fronr 0.125 n A to 16 nA. Jc moves almost hnearly for 7 octaves,
starting f r o m 124 Hz to 15.8 kHz. We can observe fi'onr the measured results that, for IB lower than
0.5 n A , K starts deereasing. A t these values of bias current, diode-connected M^ is forced to leave
the weak inversion saturation region as its drain-som-ce voltage is beiirg reduced \yj IB- I t affects the
magnitude response and gives a lower limit to the filter's adjustability. The upper limit is defined by
VQQ. When IB goes high, the gate-source voltages of all transistors will go up, and after it reaches
a certain value, the source voltage of M j and VDD wiU start forcing MB out of its satm-ation region.
This implies that the tuning range for higher frequency can be widened by supplying more V^DD-
Unfortunately, these behaviors cannot be predicted precisely by simulations. Also noise from the
measurement setup ean be noticed at a magnitude o l around -60 dB at frequencies lower t h a n
200 Hz. This is because the signal amplitude was set very small (10 m V ) w i t h i n the linear range of
the B P F . Low fi'cquency noise w i t h peak values around 10 / t V affect the measured results i n tins
range.

To see the tuuability of tho 4*''-order B P F i n more detail, center frequencies obtained for different
values of IB have been eollected and plotted i n Fig. 5.13. Linear tmiability of the proposed filter
is obtained for 7 octaves (more than 2 decades). As has been discussed i n the previous paragraph,
although the linear adjustability is confirmed for .fc, mid-band gain K cannot be maintained
constant over the whole tuning range. This phenomenon can be seen more clearly fr'om Fig. 5.14,
in whieh values of K have been eollected and plotted for the same conditions as for the results
obtained i n Fig. 5.14,. For IB less than I nA, K drops below -3 dB. On the other hand, for higher
IB, a K higher than -3 dB can be maintained.

Fig. 5.15 shows the measured and simulated output noise voltage spectral densities of both BPFs
for 7B = I uA and Jc = 1 kHz. A t frequencies lower than Jc, both shot noise and flicker noise
contribute to the output. This flicker noise is f r o m the souree follower buffers that are biased by
a D C cnrrent of 10 /tA to drive offehip loads so the noise corner frequency of the source follower
transistors is higher than that off the transistors i n the B P F . For fi-equencies higher than 1 kHz,
 CHAPTER 5. NANOPOWER BPF USING SINGLE-BRANCH BIQUADS

Or

10 100 Ik 10k look

Frequency, Hz

Figure 5.12: Measured and simulated magnitude responses of the 4"'-order B P F for dilferent bias
current ranging fi'om 0.125 n A to 16 n A .

0.1 1.0 10
IB, nA

Figme 5.13: Measm'e center fiequeney versus bias current.

-2r-

IB, nA

Figure 5.14: Measured midband gain versus bias current.

only shot noise plays a role and i t is suppressed by the filter's transfer function. Integrated over
tfie entire bandwidtli, measured output noise voltages of 54 /iVrms and 57.4 jiVrms are obtained for
the 2""*-order and 4*''-order BPFs, respectively. Approximately 3 dB difference i n tfie shot noise
can be observed fiom the measurement and simidation.
 MEASUREMENT RESULTS (i3

• -tunjKitrr,....,,,,, ,„..

measured 2"^-order
measured 4"'-order
• simulated 2'^-order wilh buffer
simulated 4""-order with buffer
simulated 2"^^ïrder without buffer
simulated 4"'-order without buffer

100 Ik
Frequency, Hz

Figure 5.15: Mea.siucd and sinndated output noise voltage speetral density for I , = 1 i i A and ƒ„
= 1 kHz.

)o = 0.125 nA, f,=125 Hz

-120

100 1k 10k
Frequency, Hz

Figure 5.lfi: Measured and simidated output noise voltage s|ieefral d e i L s i t y for different center
frequencies.

Measm-ed and simulated output noise voltage speetral densities of the 4"'-order B P F for different
f a (adjusted by changing In) are presented i n Fig. 5.16. The hlter noise density goes lower for
high<!r / „ (higher f c and bandwidth). This meciianism maintains the same uitegrated shot noise
power for ddfereiit values of In-

The huearity of the filter lias been tested by applying a sinusoidal input voltage to the filt(!r w i t l i
input fiequeney / j , , =Jc and observing its output .spectrimi. For tlie case of / „ = 1 iiA (1 kHz f c ) ,
the measured results for iniint amphtudes (Vinp) of 25 niV and 58 mV are illirstrated i n Fig. 5.17.
Since tlie projiosed filter operates iu a difterential fashion, the 3"' harmonic component was found
to be the main harmonie component. The ,3"' harmonie ffistortioirs (HD;)) were fiiniid at -40.7 dB
and -26.1 d B fiir 25 mV and 58 mV Vn|,s, respectivdy. Tliesi; vahies are associated w f t h a total
04 CHAPTER 5. NANOPOWER DPF USING SINGLF^BRANCII BIQUADS

liarmonie distortion ( T H D ) of 1% mid 5%, respeetiv(4y.

r — ;58 mVp input

26.1 dB \ ;25 mVp input

40. 7da \

2k 4k CU
F r e q u e n c y , Hz

Figure ,5.17: Output voltage spectra of the 4"'-order B P F for ƒ;„ = J,. = I kHz.

Fig. 5.18 provides the values of second harmomc distortion H D 2 and H D 3 of both the 2"''-order
and the 4"'-order filters for diftenmt Vl,,,, at ƒ,„ = f c = 1 kHz. For tfie range of 20 m V < V;„p <
GO mV, H D 2 appeared more tfian 20 dB bidow H D 3 for b o t h cases. For tlus rea.son HD;i can he
considered to hc responsible for the T H D . d l i e HD:, for the 4"^-order B P F was found 3 d B worse
than that of the 2"''-order B P F for the entire range of V„j,. As the filter's jiass band is quite flat
and the transition band roU-ofl' is not sharp, the third order intermodulation riistortkin (IMD3)
can be estimated by calculating i t fiom tfie exponential behavior of transistor pair M,. For Vn,, =
25 niV and Vr = 2G mV, i t is calculated to be IMD:i fa -28.5 dBc. This value is inliiic; w i t f i the
vahie of HD:, found i n 5.17 (IMD;,5^ l O d B l - H D s ) .

Other relevant filter parameters at IB ^ 1 u A were also tested and me snmmarizcd for the 2"'' and
4"'-order BPFs i n Table 5.1. I t can be seen that all the filter ciiaracteristics of tfie 2""'-order BPFs
ar(; better tlian tfiose of tlie 4*''-order one except the filter selectivity. Tins is due to the niunbers
of transistors and bias eurrent branches i n the 2'"'-order B P F are less than i n the 4"'-order B P F .
More detail on the 4"'-order B P F characteristics are smmnarized i n Table 5.2 for three dfifereiit
cutoft' frequencies.

Table 5..3 shows a ])ei4'oriiiance comparison among existing biomedical BPFs coUected f r o m journal

30 40 50
Input amplitude, mVp

Figure 5.18: Harmonic components versus input amphtude for 1 kHz ƒ[„ and / , j = 1 irA
{Jc = 1 kHz).
 Table 5 . 1 : M E A S U R E D F I L T E R P E R F O R M A N C E F O R 1 kHz C E N T E R F R E Q U E N C Y

Filter 2"''-order (measured) 4"'-order (measmed) 2'^'^-order (simulated) 4 ' -order (simulated)
Total eurrent [nA] 2 [2IB) 4 (27B) 2 {21 B) 4 (2/s)
UDD [V] ; P [nW] 0.5 ; 1 0.5 ; 2 0.5 ; 1 0.5 ; 2
K [dB] -1.54 -2.63 -1.03 -2.05
BW i f l - h ) [Hz] 290 - 3.49 k 4 2 0 - 2.55 k 2 9 0 - 3.5 k 4 2 0 - 2.55 k
Knp@l% ; 5 % T H D [mV] 29 ; 68 25 ; 58 27:65 26:58

*Output noise [/^.V^ms] 54 57 37 40

DR@ 1 % ; 5 % T H D [dB] 50 ; 58 4 7 ; 55 54 ; 62 53 ; 6 0

* Integrated over B W
 CHAPTER 5. JVANOPOITOR BPF USING SINGLE-BRANCH BIQUADS

Table 5.2; M E A S U R E D P E R F O R M A N C E S U M M A R Y OF T H E PROPOSED F I U F E R

/ „ |iiA| 0.125 1 8
fc |H/,] 124 1 k 7.84 k
B W (./•, - ./•/,) [Hz| 48-345 420-2.55 k 3.15 k-lt).7 k
K [dB] 7.85 2.63 2.55
*Outpiit noise [/tVn„s| 51 57.4 (i7
111]). r<;l'eired noise [/(Vr,„s] 120 78 90
Vi„„m% ; 5% T H D [niV| 27 ; 67 25 ; 58 25 ; 59
DR,@1% ; 5% T H D [dB] 44 ; 52 47 ; 55 46 ; 53
F o M @ l % ; 5% T H D ] 1 0 - ' M ] 20 ; 3.2 10 ; 1.6 12.8 ; 2.6
* Integrat<;d over B W

articles w i t h nicasnrenient residts. The main distinct fcatmes of this design are the 0.5 V V D D ,
snrall(;st chip area and FoMs of 9.98 x 10 ^« .J and 1.58 X 10-'"* ,7 mi;asnred at 1% T H D and 5% T H D ,
respectively. The latter value Is approximately an ord(;r of magiutude better than that of ]62], the
k)west mmiber reported u n t i l recently. Also our B P F occupies approxnnately 10 times smaller chip
area compared w i t h that of ]62]. The B P F of [62[ and ours are comparable i n cir(;uit compl(;xity
and process teclmology but the pMOS 2"''-order circiut ceU of [62[ carmot be connected i n cascade
without consid(;rable loading elfect and the eircuit itself requires a lugher UDD " f 2USG 4- UsDsai- Il-
ls also int(;resting to sei; that thi; 7"'-order B P F of [63[ consumes extr(;mely httle power of 60 p W
which is almost 45 times smaller than that of our design, but i t does uot jirovide the best F o M
since its f c is only 2 Hz. I t is w o r t h mentioiung t h a t the F o M used may be too sunplistic when
the other parameters of the filters, i.e, sensitivity, type of magnitude response, application, etc.,
are considered. As can hi; seen f r o m [63[ that presents a sojihisticated wavelet filter consnnung
almost z<;ro power, F o M obtained is still worse tfian tins design wliicfi only implements a sfinple
4"'-order transfer fimction. Tiierefore, a better figure of merit sliould be developed to make a more
reasonable comparison.

5.6 Conclusions

A smart choice of the filter topology and a very compact circuit tfiat operates fi'oin a very low supply
voltage are t he keys to the d(;sign of a B P F that achieves a good F o M . Measurement results of the
proposed B P F filter, designed accorthug to the keys in(;iitioned above, show a consklerablc F o M
improvement w i t h respect to other existfiig designs. The propi)S<;d B P F filt(;r can find its application
in midti-chaimel cochlear implant speech processors that require very low pow(;r consmnption and
more than 6 octaves t u n i n g ability ranging ftom 100 Hz to 10 kHz |59[. A l t l i o u g l i tlie D R of
tills proposed B P F is not as liigh as that of the B P F i n [59[, i n combinatkin w i t h a logaritlmue
compressor as recently suggested in |65[, a sufficient overall D R can hi; obtained.
 O

2;

Table 5.3: P E R F O R M A N C E S U M M A R Y A N D C O M P A R I S O N

Referenee [59], 2003 [60], 2007 [61] , 2009 [62], 2010 [63], 2011 This work
CMOS tech. [fim] 1.5 0.35 0.18 0.18 'i.:!5 0.18
Order 4 6 8 4 7 4
Chip area [mm-] NA 0.234 0.11 0.132 0.216 0.0144
/c[Hz] 141 671 3.5 k 732 2 1 k
P [nW] 230 68 875 14.4 0.06 2
UDD[V] 2.8 1 1.2 1 1 0.5
Inp. referred noise [/(Vj.n,s] 776 50 NA 50 51 78
T H D [%] 5 NA NA 1 0.3 1 5
D R [dB[ 67.5 49 37 55 43 47 55
FoM [10^1**J] 72.5 213 6240 15.6 215 9.98 1.58
Dedicated application cochlear implant breathing detector Gabor transform biopotential recorder waveiet t r a n f o r m cochlear implant
 Chapter 6

Follower-Integrator-Based LPF for

ECG Detection

"The most eom|iheated skUl is to be suiiijki."

— Dejan Stojaiiovic

6.1 Introduction

h i tiie design of fiilly-iiitegrated C„, - C liioniedical filters, realizing very large thne constants is
one of tlie major eliallenges. Using conventional strong inversion CMOS devices, eitiier capacitance
mnltipfier [fi7] or traiiscondnctance rednctiou (08] teclmiques iii;ed to bi; apphed to obtain a laitoft'
fi-eqnency of kss than a few hniidred hertz. Due to the device's operating region that conducts
current i n the range of //.A and the ti^hiiiques irsed, which give rise to the filter's circuit c o m p l e x i t y ,
power e o n s u m p t i o i L s in the range of few / t W are reriiiired for tfiese kinds of filters.

To reduce power consumption, subthreshold CMOSTs that conduct less cm-rent can be irsed without
the aforementioned techniques. Since the transeonductanee of a single transeondnetor i n subtlnesh-
olds is suflfcicutly low, forming large time constants witli on clup capacitors becomes pos.sible (59].
Unfortimately, however, nonlinearity, noise and mismatch i u weak inversion are more severe com-
pared to those aspects i n strong uiversion [40]. Recently, the systematic design of a L P F for portable
ECG applications has been fiitroduced [70[. Tlie filter provides a good figiire-of-nierit (FoM) and
consumes a very low pow(;r of 45;! iiW. ffowever, the filter in [70] ndies on a linearized G',„ that
comprises several transistors and suffers f r o m a high amount of noise and nnsinatcli-indne«l noii-
hnearity. To maintain ttie filter's dynmiiic range (DR) ui tfic; noisy circuit structure, the power
consumption cannot be rerluced further.

Tlus chapter describes a L P F that docs not reciiure transcouductor hnearization. The filtcir thus
benefits f r o m few<;r noise sources mid fewer current consuming branches. Fm thermore, a nonliiiear
y,„ w i t h negative feedback is used to create a U'-ord(!r L P F before fonning the lughcr-order filter

09
7ü CHAPTER 6. EOLLOHTiR-INTEGRATOR-BASED LPF FOR ECG DETECTION

10* 1
O |68] 2002
10^ [ R 7 I iimn A
)
[BE 2005
10'"
[71 ] 2009
c)
10'^

Th s wor t
10"

0 1 2 3
Voo [V]

Figure; 6.1: F o M coiiiparisoii of liioiiiodical LPFs

by a ca.scade coiiiioctioii of 6 identical stag&s. Due to this local feedback topology, good lin(;arity is
expected i n the hlter's passband. For this reason, the desir(;d D R of the tilter can be obtained w i t h
lower power eoiisiiiiii)tion compared to |70]. Note that r/,„ is nsed here to indicate the small-signal
transcondnctance of the nonlinear transeondnetor, which is different h o m the transcondnctance
6',„ of the lin(;arized transeondnetor that can handle a wider linear range.

A t eii cuit k;vel, a follower integrator (FI) [71], wluch is a special class o l the single brancli filters
presented i n Ciiapter 4, is (;in)iloyed as tlie l'''-ord(;r S(;ctiou ]9]. B y doing so, linear adjustability
of tfie cutoft' frequency can be obtained using its bias current. I'lie filter lias been fabricated in
A M S l).18-//iii CMOS teelinology. The hlter clup has been mcasined wlule operating ftom supply
voltages ( V D D ) of 0.5 V , 0.6 'V and 0.7 "V. Filter characteristics including power consumption ( P ) ,
order (Af), D R , and bmidwidth (ƒ(.) have been collected to estimate the filti;r's FoMs according to
the fiiUowing fiirmula:

P
FoM = (6.1)
N • f,rDR'

Fig. 6.1 sliows tfie FoMs obtained for tfiree dift'cr(;iit values o l VDD coini)ari;d to otli(;r existing
biomedical LPFs. For all cases, the proposed hlter provides almost tiuee orders of luagmtnde
uni)rov(;ineiit w i t h respect to a state-ol-tlie-art design [70|.

I n the next seetion, backgroimd iidoriuation required to understand the design of a L P F as rerinircd
hi an E C G r(;cording system will be presented. Sec. (i.'S shows the basic concept of the F I circuit
along w i t h a discirssion of its transistor level realizations. I n Si;c. 6.4, the 6"'-order L P F design w i f i
be described together w i t h its performance mialysis and design iiietlioilology. Measurement results
ar-e discu,ss(xl and compared to other existing designs i n Sec. 6.6. Finally, Sec. 6.7 smmnarizes tlic;
work on Fl-based LPFs.

6.2 E C G Detector L P F Design

Fig. 6.2 s h o w s a g e n e r a l b l o c k iliagraiii of a p o r t a b l e E C G d e t ( ; c t i o n s y s t e m . I t c o m p r i s e s a low

iioLse a m p l i f i e r , a c o n t i i u i o i L S - t i n i e L P F (tins d e s i g n ) , a n a n a l o g t o d i g i t a l c o n v e r t ( ; r ( A D C ) and
a d i g i t a l signal p r o c e s s o r (DSP). Tfie l o w - n o i s e a n i p f i f i ( ; r i s u s e d t o a m p l i f y t l i e v e r y weak E G G
ü.3. FOLLOWER-TNTEGRATOR-BASED LOWPASS FUSTER 71

signal D(!i>ending on tlio electrodes used, Ilu; ECG signal amplitudes ean range f i o m 50 / i V to
approxiinately 4 iiiV (se(; Fig. 0.,3) [72]. Next, higli ficqueiicy eomponeuts i n the EGG signal are
filtereil out to decrease the out-of-haud nois(!. The recoimuended lowiiass cutoft' ftequeneies are
150 Hz and 250 Hz for adults and chddren, res|i(;ctively ]7;i], ]74]. Afterwards, an A D C Ls utilized
in which the analog input signal Is quantized and converted uito digital values as needed for the;
subse<[ueut DSP.

This warif

Figure 6.2: Portable EGG detection concept.

Since th(;re is a large variation i u the expected amiilitude of the input signal, the amplifier and filter
are reqmred to have a minfinal DR, accordfiig to ]70] and ]75], of

™ - ' " - & ) - - - ( ^ ) - « " °

To avoid aliasing, the L P F should provide as much attenuation i n the stop-band as possible. More-
over, a constant group delay over the passbaiid response of the fiftcr slioidd be obtained to mimnuze
pliasc distortion ]70].

6.3 Follower-Integrator-Based Lowpass Filter

This section provides a ftmdamental concept of the; F l and discusses the F I circuit realization at
transistor level.

6.3.1 Concept

The F I is shown h i Fig. 6.4(a). I t comprises a transeondnetor and a gromided capacitor connected
in a negative-feedback fasliion. R.esistor R„ represents tlie output resistance of the transeondnetor

0.1 1 10 100 1k
F r e q u e n c y [Hz]

Figme 6.3: Dift'(;reiit bio-potential voltages versus fictiiieiicy spectrum. Adapted ftom ]72].
72 CHAPTER 6. FOLUnmn-INTEGRATOR-DASED LPE EOR ECC DETECTION

gmZo

Figiu'c G.4: Followt; r integrator, (a) Macro-model and (b) feedback block diagram.

to gronnd (which Ls iisnaUy many times larger than y,,/ ) . We can a.Lso represent the eircuit in the
form of the feedback block diagram shown i n Fig. ().4(b), where Z„ represents a parahel connection
of C and Ro- I t can be seen that the circuit's loop gain (LG) <!quals G,„Zo.

Assunung (j,„ Ro > 1, the; transfer fmiction of thLs circuit is given by

^""'(•^^ ^ LG ^ !J,n^o _ ^ '+«••• ^° , for <y,„ Ro » 1. (0.3)

Ih (s)
i/i„(.s) 1 + LG i+a,nZo I t T O T i +

As can be seen ftom (6.3), the F I provides a lowpass ftequcncy response w i t h a passband gain and
cutolf frequency of K = I and J,- = !h„l2-KG , re.sp(!ctively According to this characteristic, l/„„t
is following V„ closely for input signal fr<»iuencies below fc- I n other words, the differential input
voltage of the ƒ/„, block is kept smah, which helps the fifrer to sidler less Irom the nonluiearity
of the fl,„ itself. I t shoidd be noted here that benefitting from the fact mentioned above, fiigfi
D R LPFs reahzed fiom transconduetors witiiout hnearization have be(;ii successftilly implemented
in [77] mid ]35]. Hence, without linearization, tlu; G„, can be made compact and low noise and
low-power eonsiunption can be expected, while a good linearity can be achieved dnc to the large
loop gain at low fiaiiiencie.s.

6.3.2 Ti-ansistoi-Level Consideration

The most compact solution to realize the F I is shown i u Fig. 6.5(a). The eoncept o f single branch
filt<;rs in Ciiapter 5 is extended liere. Source follower (SF) M , and its bias current 0 . 5 / ö kirni
the iiegativi; feedback 6',„. Requiring only one current source to supply its single branch makes
tins circiut siutablc for v(;ry low power design. However, the voltage swing at the circiut input is
fiiiuted to a lew luVs by the uoidincarity of A / i . To enlarge the signal swing, a dittereutial vei s k n i
Is reqiured, as shown i n Fig. 6.5(b). Compared w i t h tin; singlc-branch SF topokigy, the; difterential
version quadruples the power coirsiunption to aciiieve the same cutoff fiixineiicy f r o m tlie same value
of capacitor G. Tliis is due to tfic fact tliat tlie transconductaiices of Mi and M2 (operating ur
weak inversion satiuation) are linemdy proportional to their drain enrrcnts, and to aclueve the same
effective transeonductanee as the suigle-braueh SF, the bias currents o f Mi and M2 in Fig. 6.5(b)
mnst be changed ftom 0.5/B to hi- As a c o i L s e r i u e n e e o f tlus bias point setting, the input-referred
average noise powers of the single-ended and the difterential versions are identical.

For the higli-ordcir filter application presented i n this chapter, a cascade connection of cucuit cells i n
Figs. 6.5(a) and 6.5(b) is needed. However, (as already discussed in the previoirs chapter) sinee tlic
common-mode levcds o f input and output signals are different, cascading these ceUs directly cannot
be made without the requirement for either a higher supply voltage ( V D D ) or irsuig coiiipkiineiitary
ü.3. FOLLOM'ER-INTEGllATOR-DASED LOWPASS FILTER

Figiu'c 6.5; F I circuits using: (a) singic-ijrauch SF, (b) differeutial SF and (c) source-couplcd pair
(SCP) trauscouductor.

devices that liave different transcondiietanees for the same drain current. As a consequence, uus-
niatch between the slope factors of irMOS and pMOS d(;vices w i l l introduce an error in the hlter's
fr(;(iueiicy resiionse.

To allow for the cascaded connection of the Fls to realize a high-order filter, tfie dift'erential pair
transcouductor comiected i n a negative fiHulback fashion w i t h capacitive load C shown in Fig. 6.5(c)
can b(! employed |71|. Note that the negative leedbaek also exists i n the SF topologies i n Fignres. 6.5
(a) and (b) but it is not exjilicit. The negative feedback mechanism ha])]ieus at the source terminal
of a single transistor. For the circuit in Fig. 6.5(c), transistors M^-M^ w i t h bias cm-rent In form
an o])cii-loop transcouductor. The explicit eoimection between the drain and gate terminals of M2
provides negative feedback.

As the even-order harmonic eomponents do not exist i n the large-signal characteristic of the source-
coupled pair (SCP) transeondnetor operating i n weak inversion saturation (defined by tlie liyperbolic
tangent fimction aft(;r neglecting all non-idealities of the current imrror active load), this circuit
Is equivalent to the dift'erential SF lowpass filter ui Fig. 6.5(b) fii terms of linearity. To achieve
the same as the SF L P F h i Fig. 6.5(a) ftom tlie same value of C, this cucuit donblis current
consumption and quadruples noise power. Obviously, the SCP-based F I outperforms the eircuit
shown i n Fig. 6.5(b) in terms of power consuni])tion, but the output noise power is <iiiadruplcd. For
this rlcsign, a cascade conueetion operating ftom a very low supply voltage Is reijuired and therelore
the F I circuit i n Fig. 6.5(c) is chosen.

Let's exaniiiic the F l circuit Fig. 6.5(c) in more detail. I t comprises a difterential pair Mi - M2
biased by ciurent somce In w i t h a current imrror active load, M3 — M4, and a gi-ounded cajiacitor,
C. Neglecting cliaiuiel length modidatiou, the curreut flowing through caiiacitor C can be loiuid to
be

(6.4)
74 CHAPTER 6. EOLLOWER-INTEGRATOR.DASED LPF FOR ECG DETECTION

A t low fiequ(;ncics, U; = 0 and consctinontly, Vn, and K,,,,! are foreiul to be e(iual by the mnty gain
negative i'eedbaclc nie(4iaru.sin. Tlie hyperbolic tangent Idiietion will not |irodiK;(! any distortion in
tins ease. For lugher frequencies, the phase difterence between Vn, and V„n\ becomes gi-eater and
more distortion wiU be produced.

Assuming the slope factors of uMOS and jiMOS an; identical, i.e., n,, = n „ = n , at low frcKpiency,
the power spectral density of the ontput iioLse voltage can be fomid as

SnUr . 2 ( K,..„ , Kp„

where Kp„ and /f;,',, arc the; flicker noise parameters of the iiMOS and pMOS devices, respectively.
A l l the other symbols have their usual meanings, l-FLj = l'FL2, WL^ = WL4 and iy,„ = IB/'2VVT •

For ECG applications that deal w i t h input frequencks below a few hundred hertz, the filter's noise
power is not only contributed by the shot noi.si; i n weak inversion but also by 1/f noise;. From ((i.5),
the noisi; corner frequency where the pow<;r spectral density of the ! / ƒ noise ami the shot noise arc
equal is given by
r - ( ' ^ + - ^ " l ((i.(i)
HiriMlf \WLi WLs

We can s(;e from (fi.ö) that the F I requires large area transistors and a low bias curreut to keep
./•(•ornfir loW.

6.4 E C G Lowpass Filter Design

This section discusses the EGG filter topology, analyzes tlie filter performance and presents the
filter design nietfiodology.

6.4.1 Filter Topology

Tfie requirements of the hlter mentioned i n Section ().2 can be met by cascading G identical F l
stages as shown i n Fig. G.G. Formed by identical cucuit elements, this structure provides a transfer
hmction of

Va„t(s) (G.7)
H{s) = litis)
Vinis) 1 + s-
1+.

This fimction gives a D G gain of approximately unify. Assuming that all of the circuit elements
in,,, ami G) in afi of the F I stagiis are identical, the -3 dB bandwidth of the L P F i n Fig. G.G wdl
shrink f r o m that of the single F I to

,;;.|;^,/2l7^.0.35|-^0.055G^. (G.8)
ü.4. ECG LOWPASS FILTER DESIGN 7S

Figure 6.G: ()*''-or(ler Fl-based L P F .

Tlie filter's sensitivity to eapaeitanee and trauseouduetaii<:(! variations ean be found to be

,"(3) _ c.'^(..) Q"I(S)

(6.9)

where •S'^[j''j is the seirsitivity o f t h e EGG L P F to the t r a n s f e r h m e t i o n of a smgle F I , fiS"^^ ^ is the

sensitivity ofthe EGG L P F ' s DG gam (numerator of //i(s)) to eapaeitanee and traiLseonduetauee

v a r i a l l o i L S and dS^^^^ J'" represents t h e sensitivity of the deuonunator of to e a p a e i t a n e e and

transeondnetanee variations, respeetively.

It ean be seen fiom (G.3) tliat K eiiuals (j,„R„{l + (j,„R„) ' . Tfiis leads to

5'/f = S ] P ^ - = 0, ((i.fO)

and
^ O l l L , ^ ^ iLHmPg (!J„Jl't - [l + y,nPo) Po\ ^ -1
((i.II)

We can aiso find tfiat

sG
(6.12)
fiC + (/„

Also fi-om (6.8), the seiisititvity of ƒ„ to capacitance variation (5^; ) and to transeondnetanee vari-
ation (5'^^^^) can be found as

0.0556
(6.i;i)
dg,„ 0.05569,,, G

and

ƒ„ _ C df,: _ G^ 0.0556(7,,
O^, — -1, (0.14)
fr. OG 0.0556fl,„ f;2
7G CHAPTFAi 0. FOLLOW'ER-INTEGItATOR-BASED LPF FOR ECG DETECTION

It can bc seen that the D C gain of tlic E C G L P F is insensitive to capacitance and transconductance
variations, but tlic cutolf frequency of the EGG L P F is hdly-seusitivc to these same variations.
Besides, the denominator of / / ( s j is G times more sciusitive to capacitance and transeondnetanee
variations than the cutoff frequency.

The advmitages of this hlter topology are the fohowuig:

• The linearity of the hlter is less siisceptibl(! t o niismatcb than other open-loop structures due
to the luiity gaui leedbaek i n each P'-order section.

• The internal nodi; voltage swings are all identical i n the passband. Hence, the filter distor-
tionless output swing is maximized |78].

• Tlie <;ontributioiis of all (/,„ stages to tlic overall output noise are almost equal. Hence, the
filter output noise is luininuzed [78].

• Constant group delay can be expected i n the passbaiid Irequeucy rmige.

The drawback of this topology is that the transition band roll-oft' is less steep compared to other filter
types. For a cutoff fiequeney of 150 Hz to 250 Hz, rcaUziiig tlus filt(;r circuit w i t l i f i i a reasonable
cliip area (i.e., entire filter area uot domfiiated by capacitors only but also by tlie area of trmisistors,
as b o t f i arc counted i n tlie cost of fabrication) and obtaining a power consumption of less tfian I nW
are I'easible.

6.4.2 Supply Voltage Requirement, Signal Swing and Timing

Since aU the traiLseouductors are connected in a negative feedback fashion, the mput terminals m'c
fiiUowiug each other. I n the filt(;r's passbaiid, tlie transcondnctor's conunon mode rmige (CIvIR,) can
be us(;d to approxiinately define tlie maximmn filter voUage swung. I t can bi; lound fiom Fig. G.5(c)
tfiat

0.5/jj
CMR. ^ Ko, 8 + n„ fir (G.15)
T^
, '^P 1,2/

wfiere Is,, is tlie zero-bias current for a imit transistor (I'V = I,) of pMOS devices M i and A'h, and
V,,,,swing is the desired maximum veiltage swmg. For a signal swing of less than 50 mV,, and I , in
the sub-irA range, V D D = O.G 'V should be; sulhcient for the 0.I8-/nii process used hi tlus design.
Note; that the maximura supply voltage; aUoweel fiir tlus process is 1.8 'V, O.G V e;e|uals einly one t h i r d
o l that.

Moreover, I , can be varied t o adjust ƒ,; (as is liiie;arly proportional to y,,,) tei compensate for
C anel (/,„ variatioirs. From tlie last te;rin of (G.15) we e:an see tliat tlie voltage reeiiured for tliis
t i m u i g (tlie; last term eif (G.15) tiine;s VT) e;lianges logaritlimlcaUy w i t l i In- Tfiis also impfies that
VDD = C.G 'V is sidlicient to allow for Jc adjustment to aclueve the desired fc (of 150 Hz or 250 Hz).
 G.4. ECG LOWrASS FILTER DESIGN 77

6.4.3 Signal-to-Noise Ratio

As the hlter is forured by cascading 6 identical l^'-order stages w i t l i a transfer hinction defined by
(G.7), the integrated ontpnt shot noise voltage r a n be exjiresscd as (a,ssiniiing the slope factors of
irMOS and jiMOS to bc equal, i.e., n,, = n,, = n)

^ = ^ ƒ { i H A M f + m : i ^ ) f + • • • \ n u . M \ y ^ - ((i.io)
(1

Subtituting the transfer function of (6..'1) nito ( 6 . l f i ) , we obtain

< ! s = ^ ^ ( 1 - " + 0.79 + 0.59 +().49 +(1.42 +0.:S7) ?^ ''•'^'"f (0.17)

AtklitionaUy, tlie flicker noise can be foimd fiy integratuig (6.17) f r o m 0.1 Hz to ƒ,, (a.ssnming tfie
flicker noise lies i n tlie filter's passband) and becomes

We call approximate the filter's signal to noise ratio (SNR) for input frequencies less tlian as

SNR = 1 0 log " . (6.19)

V "noS -I "uuF /

I t can be seeu f r o m (6.17) to (6.19) tfiat large transistor dimensions, capacitor values and a high
siip])ly voltage are required to obtain a high SNR, as cxiicctetl.

6.4.4 Supply Noise Rejection and Stability

I n the case that Ks.s is connected to gronnd, any siqiply noise that leaks through current soiuce
IB wiU split and flow uito the source terimnals of and i n Fig. 6.ri(c) equally (a.ssuniing the
source impedances of M j and M2 are identical). Eventually, as they are fidly corrdated, tlie .split
noise som-ces that flow tlirougli trairsistors Mi and M2 wfil be niuiuiiizcd at the output node w i t h
help o f t h e luuty-gain ciu'rcnt nurror formed by M3 and M4. For frequencies w i t h i n the bandwidth
of the current mirror, the supply noise ean bc canceUed ont almost completely.

Since the entire E C G L P F is formed tiy cascaduig 6 identical stages o l Fls without global fi;cdback,
the stabihty of the filter can be iirspected fi-om tlie F I of each stage. Considering Fig. 6.5(c) again, by
neglecting the gate-drain parasitic capacitances (c^,,) of M3 and M4, the loop gain o l this circuit can
be found i n the Ibriii o l a 2""'-order transfiir ftmction w i t h donuuant and sixiond poles at -(GRo)^^
and - ( y , „ ( 2 c , , s ) " \ respectively, where is the drain-source resistance of M2 and M4 couneeted ui
parallel. To maintain circiut stability by griaranteefiig 60° phase inargui, G > 4.4cgs is recjuired,
assuming R„ » 17,7,'. h i practice, as the F I is supposed to be a l='-order filter, tfie design eondition
o l G > 10%s slioidd to be made to avoid the uiflueiice of the 2"'* pole ou the reipiired filter transfta-
ftmction. For tliis reason, the EGG filter sliould be always stable.
78 CHAPTER 0. FOLLOn^R-INTEGRATOR-nASED LPF FOR ECC DETECTION

6.5 Design Procedure

In order t o design a L P F to meet reqidrements the the EGG detection mentioned in See. G.2, the
fohowing design me^tliods are; reeommeaieled.

6.5.1 Dynamic Range

From (f).I9), we; can approximate; tliat S N R = D R and «„„F = 0 (we assmne ,/„,r,„.r is l)e;le)W I Hz
and 1 / / noise is negligible), we; e:aii cale;nlate the value eif e;apaeite)r 6' by approximating tliat
n„ ~ rip = n = 1.4. To aclueve 44 dB DR at reioni teuipe;ratiire w i t h Kpp.,„i„g = IOO niV,
6' = 0.6;i pF is require;(l. This le-aels t o a total e:apacitaiie:e; o l 3.78 pF for the; e;ntire L P F . I n the;
CMOS process we; used, 4 metal lay(;rs and elual M I M capacitors (each dual M I M capacitor has an
e:xf,ra lay(;r betwe;e;n the teip and the 3"' nie;tal layers providing lugher capacitane;(; per unit area
than a regular M I M cajiacitor) are available.

6.5.2 Cutoff Frequency, Bias Current and Power Consumption

A f t e r obtauung the value of eapae;itor C, (6.9) can be used to find the value of the transe;onductance
g,n of each transeondnetor iise;el. Rcfi;rring t o the transeondnetor i n Fig. 6.5(c), the transeonduc-
tanee can be found f r o m (y„, = lri/'2nVr- For this re'ason, an In of O.f 2 n A and 0.21 nA is lound at
room temperatm-e for cutoff fi exiiiencies of 150 Hz mid 250 Hz, respectively. As indicated i n Fig. 6.6,
the; total e:niTeut e;emsiiniption is 6//?. I n the previous sectiein, we found that a supply voltage of
0.6 V is sufiicient for Vpp.^wing = 100 luV. Tlier(;fore, the power cousmnptioii ( P - O / R V D D ) o f t h e
EGG L P F can be found to be 0.43 nW and 0.76 nW Ibr cutolf ficeiuencies of 150 Hz and 250 Hz,
respee;tiv(;ly.

6.5.3 Tuning

As meiitioii(;d i u the; previous e;liai)te;r, around 30% cutoft' frequeiie;y variation can bc e;xpected dne
to proc(;ss variations |06]. 10% eil tliese; variations ean originate ftom the integrated capacitors
aud 20% ste;ins ft om transconductance valnes o l the transistors. Although the cutotf freeiuency is
specified to 150 Hz anel 250 Hz fiir this EGG L P F , these; values are; not strict. As e;an be se;e;ii
from the block diagram o l the EGG dctee;tor i n Fig. 0.2, the L P F performs anti-aliasing for the;
consecutive A D C . h i general, an anti-ahasiiig filter w i t h a cutotf fiequeney sufliciently sinalka than
the sampling rate o f t h e A D C , 10% variation of ƒ„ is allowexl [G6|. Feir this re;a.seiii, the; tuning loeip
and circuit dcse;ribeel i n the pre;vioiis chapter can be applie;d here as weU.

6.5.4 Transistor Dimensions

The se;lectioii of the; transistor elinieiisions to implement the transeondnetor hi Fig. 6.5(c) is i i i f i u -
ene;e;el by flie;ker noise;, stabifity and e;onuiioii-iiiode range. Dimcnsieins of tlie transistors are; set
large t o produe;e; little fik:ker neiise but they cannot become; too large; i n orde;r not to violate the;
coueUtion eif C' > lOCg.,. By means of circuit siniidatioiis, we f'enuiel W/L^^i = 2 . 5 / j i n / 1 0 / i i n . W i t h
tins value, C^^^^A of 0.04() p F is obtaliieel. Tlie;n, W/Li_2 = 1 0 / n n / 2 . 5 / f i n is set to have suffieient
headroom for the signal swing as shown i n (6.15). For tran.sistors that form IB, their dimensiems
are larger than the; transisteir iiscel i n the F I cucuits te) iniiiiiiiize mismatch.
6.6. MEASUREMENT RESULTS 70

6.6 Measurement Results

The hlter has been fabrieated i n the 0.18-/im CMOS proce,s.s of A M S . Identical dual M I M capacitors
of 0.63 pF are nsed for each F I stage. The filter's area (bias circuit, transconduetors and capacitors)
ecjuals 145 /tm x 160 //m. The chip mierophotograph is shown i n Fig. 6.7. The <;„, eircuit i n
Fig. 6.5(c) was used w i t h transistor dimensions of W/Li = l'K/^2 = l O / m r / 2 . 5 / ; m , W/L3 =
\'V/L4 = 2 . 5 / m i / I O / i m and W/Ln = I 2 / u n / 6 / n n . Bias current TB was supphed through a simple
on-chip current mirror circuit by an external eurrent source (Keithley 6430). To drive a large
parasitic ofl'-chip capacitor (formed by the pads, package, P C B and measurement probe), a large
area P M O S SF was placed at the output of the filter. This SF can affect the filter's linearity so i t
was biased by a D C current of 10 / i A to be able to drive tfie load and to have a bandwidth many
times higher than f^, thereby minimizing its influence on the filter's linearity. For the nominal test
condition, the filter's VDD was set to 0.6 V and tfie common-mode voltage V C M to 0.32 V . The
following results were obtained using a SR785 dynamic signal analyzer.

Fig. 6.8 shows the frequency response of the L P F adjusted to cover the E C G frequency range (up
to 150 Hz - 250 Hz) by Tp. For an IB of 0.14 n A and 0.22 uA (see Fig. 6.8(a)), an of 148 Hz
and 252 Hz were obtained, respectively. A passband gain of —0.59 dB was found for both cases.
This value is 0.34 dB below the value obtained f r o m the simulation ( - 0 . 2 5 d B ) . I n Fig. 6.8(b),
the phase responses are shown on both log and linear scales. I t can be seen that over the filter
bandwidtfi (0 — 148 Hz and 0 — 252 Hz), tfie phase shifts almost linearly and constant group delays
(in the passband) of 0.5 ms and 0.85 ms were found for the cases of TB = 0.14 n A and 0.22 uA,
respectively. A t these values of bias currents, the filter core (excluding tfie bias eircuit) consumes
504 p W and 792 p W power, respectively.

Fig. 6.9 illustrates the adjustability of the L P F for different values of TB ranging f r o m 0.1 uA to
10 u A compared w i t h simulations. I t can be seen that the filter's cutoff frequency can be adjusted
almost linearly over more than two decades (116 Hz-10.5 kHz) and that the largest deviations from
the simulated results can be observed for bias currents of 1 nA and 3 n A .

The output noise voltage density for TB equal to 0.14 nA and 0.22 n A (associated w i t h Jc of 148 Hz
and 252 Hz) were measured f r o m 0.5 Hz to 400.5 Hz. The results are plotted along w i t h the
simulated results i n Fig. 6.10. A f t e r integrating and referring to the filter's input, we obtain a
187 /lYrma and 175 /i.Vrms input referred noise for IB = 0.14 u A and TB = 0.22 n A , respeetively.
These value are around 35% higher than the value obtained from simulations for both eases.

For the case of fc = 252 Hz [IB = 0.22 n A ) , the linearity of the filter was tested by applying a
50 Hz sinusoidal input signal and measuring harmonic distortion at the output. We tested huearity
of tho filter at this frequency to compare w i t h the previously reported EGG filter of [70]. For higher
frequencies, the linearity of our filter is expected to be poorer, and better Unearity can be expected
at lower frequencies, because the loop gain of each F I used is frequency-dependent. For input
amplitudes of 50 m V and 115 mV, respeetively, the output power spectra are shown i n Fig. 6.11.
The second harmonic is the main component and it was found at 49 dB and 40.1 dB below the
ftmdamental components for 50 m V and 115 m V input amplitudes, respectively. Note that the 2""^
harmonic is dominant here since the signal swing is limited by the C M R of the F I cell, instead of
the tanh fimction that does not produce any even harmonic component. Total harmonic distortion
( T H D ) has been also measured and found at -49 dB and -40 dB for 50 m V and 115 m V input
amplitudes, respectively. I n the former case (Vnp = 50 m V ) , the higher harmonic components are
much smaller than the 2'"* harmonic component so that the T H D is thus mostly influenced by the
2'^'' harmonic component.
CHAPTEB 6. FOLLOWEB-INTEGRATOR-BASED LPF FOR ECG DETEGTION

(a) Entire cllip

(b) Zoomed-in area of tlie ECG L P F

Figure 6.7: Cllip plioto of the ECG L P F .

6.6. MEASUnEMENT liESULTS

-200 I I I .

1 10 100 1k lOk
F r e q u e n c y [Hz]

Figure 6.8: Measured frequeuey respoirse. (a) Maguitude resjioirse aud (1)) phase rc;.spoiLso.
82 CHAPTER ü. EOLLOnTiR-mTEGRATOR-BASED LPF FOR ECC DETECTION

115mVp

50 mVp V„

S -80

200
F r e q u e n c y [Hz]

Figure Measured output voltage spectra of the L P F for differeut iirput auiplitudes.
 G.ü. MEASUREMENT RESUUTS 83

Relevant eliai-aeteristies of the filter ineluding DR, (SNR at 1% T H D ) aud uiaximuui amphtude
fi)r a siuusoidal m p u t sigual (Ki,,,,) wer(! also investigated tbr different input hequencies (ƒ,„). The
residts have been eollected and plotted i n Fig. 6.12. As hierea.ses, DR, (Fig. 6.12(c)), and 14,,,,
(Fig. 6.12(b)) deenjase fiom around 53 dB and 120 uiV, respeetively, down to slightly higher than
35 d B and 18 luV at the filter's cutoft' fiequencies fijr botli ƒ,, ^ 148 Hz and 252 Hz. F i g . 6.12(a)
sliows the output amphtude that decreases according to Vi,,,, ap|)licd as widl as the filter's transfer
ftmction. This is the result of the reduced loop gain and the widened phase difference between Vn
and Vn,„. A t frequeueies beyond both DR, and l ^ , , , , rise agaui sinee the output amplitude and
harmonie components arc both attenuated but at dilferent rates. The higher fre()uency components
arc attenuated more than the ftmdamental componeiit according to the L P F transfer ftmction.
Beyond this ftcquency range, the results arc no longer me^nhigfid. Ncvertlieless, i t can be said that
the proposed L P F performs worse fiir ƒ,,, at around f,. w l i i d i is a conunon phenomenon for lowpass
filters |79|.

I n order to lest tfie perforinance .spread of tlie L P F , ten packaged chips were tested fiir two cases:
magnitude response and harmomc distortion. Fig. 6.13 shows the filter's magnitude responses o l
ten smnples for I , = 0.22 iiA aud VDD = 0.6 "V (targeting 250 Hz ƒ,,). The measured ƒ,. spreads
firom 233 Hz to 256 Hz, while the range of 237 Hz to 255 Hz was predicted Irom 10 Monte-Cario
( M C ) iiusniatcli simidatioiLS. The D C gain was found to be 0.59 dB for all ( - 0.25 dB was seen
for 10 M C mismatch siniidatioiis). I t can be seen that the DC gain is less seirsitivc than the /'^
since i t is regidated by the large loop gain i n the passbaiid. The is sensitive mainly to trairskstor
uusniatch i n the bias cueiut and t/,,, circnits i n the filter core.
84 CWiPTER G. FOLLOWER-INTEGRATOR.~Dy\.SED LPF FOR ECG DETECTION

'J

2,
•O

•80

-80
10 100 Ik
F r e q u e n c y [Hz]

Figure 6.13: ]VIea.surecl luagrütude rispoirse.s eollected from ten samples. The inset shows the
enlarged Y axis ( i n d i c a t e d at t h e r i g h t h a n d s i d e a x i s of t h e iirset) w h i l e its X axis remains the
s a m e as for the m a i n plot.

-20

i
I c
-60

i -80

-100

0 100 200 300 400

F r e q u e n c y [Hz]

F i g u r e 6.14: M e a s m e d o n t p u t v o l t a g e s p e c t r a c o l l e c t e d f r o m t e n s a m p l e s f o r Vi„p = 115 m V , /in =

5 0 H z , VDD = 0.6 V a n d / „ ^ 0.22 uA.

U s i n g t h e s a m e s e t - u p a s f o r tli<; m e a s u r e m e n t o f F i g . 6 . 1 1 , a 5 0 H z s i n u s o i d a l i n p i d . w a s a p p l i e d to
the h l t e r w i t h 115 m V Vnp ( t a r g e t i n g - 4 0 d B T H D ) . T h e o u t p u t s p e c t r a o f t e n s a m ] d e s a r e s h o w n
in F i g . 0.14. T h e d d h a e n c e i n t h e o u t i n i t s j j e c t r u m f o r e a c h c l u p c a n b e s e e n f r o m t h e 3"^ and
5"' h a r m o n i c c o m p o n e n t s . However, smce the m a u i distortion components a r ( ! t h e 2"'^ h a r m o n i c s
w h i c h a r e close to e a c h o t h e r for a U cases (as t h e y v a r y less t h a n 0.25 d B ) , the T H D d o e s not vary
nnuli from 4 0 d B . T h e w o r s t c a s e is f o i m d at - 3 9 . 8 dB.

The main filter c h a r a c t e r i s t i c s m e a s u r e d for the p r o p o s e d E C GL P F a r e s m m n a r i z e d for the case of

VDD = 0.6 V i n T a b l e 6.1. B i a s c u r r e n t s w e r e set to h a v e c u t o f f f r e q u e n c e s of 150 H z a n d 2 5 0 H z ,
respectively. F o r m e a s u r i n g t h e d y n a m i c d i a r a e t e r i s t i c s ( D R , T H D , V u , , a n d F o M ) of (;ach case,
the input fi-equency w a s set t o .A,, = 0.2/c. Tlie F o M s were calculated using the formula adapted
fiom [80| a s s h o w n i n ( 0 . 1 ) . It c a n be seen from the table that the iiroposcd L P F jirovides FoMs
for b o t h cases (ƒ„ = 148 H z a n d = 252 H z ) ai>proxiinately three orders o l iiiagiiitude better than
t h a t o l t h e s t a t e - o f - t h e - a r t E G G filter i n |70|.

F o r different values of VDD, t h e filter p e r f o r m a n c e lias b e e n also e x a u u n c d . T l i e results a r e s f i o w n i n

T a b l i ; 6.2. C o i m n o i i - i i i o d e voltages w e r e set to give the lughest V,,,,. A s expected, the sigiial-.swing
 6.7. CONCLUSIONS 85

Ta,l>l<; 6.1: ECG L P F P E R F O R M A N C E S U M M A R Y F O R Kn (1.6 V

0.14 irA 0.22 i i A

1' |iiW] 0.504 0.792
.r,: [Hz| 148 ; *150 252 ; t250
THD@50 mVp [dB| - 51.:) (,30 f I z ƒ,„) - 49 d B (50 Hz ./•„ )
t ^ n p [mV| 120 (30 Hz ,/i„) 115 (50 Hz /i„)
DC gain [dB] - 0.5!) ; to - 0.59 ; to
*Ontpnt, noise vollage 166 /tVr,„s 155 / , , V , „ „
Ininit referred noise 178 / / , V „ „ , 166 //,Vr„,s
tDR ]dB] 53.6 ; 144 (30 Hz ,/•„) 53.8 ; t44 (50 Hz ƒ;„)
"FoM ]J] 10.5x10-'=' 9.7x10-
inlated nsing (6.1), ttargeted value.

Table 0.2: EGG F I L T E R P E R F O R M A N C E A T D I F F E R E N T KDD A N D / „ = 0.22 uA

VDD [VJ 0.5 0.6 0.7

VCM [ V [ 0.20 0.32 0.37
P |nW] 0.06 0.79 0.92
.fc iHz] 246 252 250
DC gain [dB] - 0.63 -0.59 -0.55
*K„p [uiV[ 75 115 150
' D R [dB] 49.6 53.8 55.7
"FoM ]1| 9.2x10- 9.7x10-1''^ 11.1x10^1^
_
^Tested at / „ ^ 50 Hz and 1% T H D , ''"''ealeidated using (6.1)

related performanee including I4„p and D R mcrease w i t h K D D . B u t as the P varies proportionally

w i t h K D D , according to (6.1), the FoM of all cases are comparabh;.

Table 6.3 provides relevant characteristics of L P F ( k s i g i L S for biomedical apphcatioirs collected

from journal articles (from 2000 to 2012) w i t h measiu'emenl results. The filters of ]67]- [69] and J70]
provide greater DR, and better T H D tiian this design. However, the proposed filter can operate
fiom KDD < 1 V, consmnes the k^a.st power aud occu]iics the smallest area. As a residt, the F o M of
the proposed EGG L P F is superior to the other existing LPFs by almost tinee orders of magmtude.

6.7 Conclusions

The concept o l single branch filter i n Chapter 5 has been extenfk;(l to the design of an EGG L P F to
obtain a m a j o r F o M improvianent. This achievement conies from using a eoniiiact circuit structure
w i t h local negative feedback. Tfie measurement residts reportcxl confirm tlie L P F performance hi
low-voltage and very low-power euvlronments. As the cutoft' fi-equeuey can be adjusted over two
decades, tlie L P F cannot oidy be used for EGG application, but also fiir otlua- tyiic;s of neural
recordfiig .systems that arc based on a shnilar concept as tlie one deiiicted ui tlie block diagram of
Fig. 6.2.
 CHAPTER 6. EOLLCm^R-INTEGRATOR-DASED LPF FOR ECG DETECTION

Table (i.:i: P E R F O R M A N C E C O M P A R I S O N W I T H O T H E R DESIGNS

R(;I., Year [()7|, 2I)U0 [08[, 2002 [09], 2005 [70[, 2009 Tlds work, 2012

±1.5 ±1.35 ±1.5 1 0.0

Vbi) [V]
CMOS teeh. ().8-//rii I.2-/tui 0.35-//.111 ().18-/mi 0.18-//.111

A^ 6 2 2 5 6

2.1 0.:! 37 250 252

L: \m
T H D [dB] -5Ü -45 48.5 -49.7 -40

D R ]dB] (iO 70.5 57 *50 (40.3) 53.8

P ]W1 10 / I 8.18 //, 11 II. 453 n 792 p

Area [nmi^[ 1 0.00 0.25 0.135 0.023

" F o M [.![: ((i.1) i.2xicr** 1.9x10-'' 1x10-=' *7.3 (8.99) x I O - 9.3x10-"^

* I t Is indicated m Table 6.3 o l |5| tbat DR = 50 d B . Tlus number is ineorreet (see See. V of [5]),
the correct value Is showu here between brackets. Hence, the correct nnmber o l F o M is also shown
b(4,ween brackets.
 Part I I I

Very Low-Frequency Filtering and

Large-Swing Multiplication

87
 Chapter 7

Transconductance Reduction
Technique for V L F Filters

7.1 Introduction

Driven hy the requirements f o r very small size and very low-i)ow(;r eoirsumption of portablt; and
iinidantable medical devices, sub-threshold C,,, - C hlters have been widely used for filtermg low
fi-equency biomedieal signals |81]. Conductmg a very low-cmriiut in snbtlueshold operation results
in a very low transconductance for a single transistor that helps i n dcHiguing a very low-fi-equ(!ncy
( V L F ) C,„ - C filtcir.

Unfortmiately, generating very low bias currents on chip cannot be achieved reliably because of the
poor mateliing between transistors operating i n weak inversion [82]. I t can be seen from Chapt(!rs 5
and fi that the reliable center mid cutofi' fi-equencies of tlie bandpass and lowpass filters, respectively,
are nmiimaUy located around IOO Hz fi-om bias currents o l fs 0.2 uA. l u order to obtain a lower
center/cutoff fiequeney witiiout reducing the bias cmrent further, a circuit teeluuque that reduces
the t r a i L s c i m d n c t a n c e of any G,„ cell enqiloyed is required [83[.

Tlus chapter investigates traiLsconductauce reduction teclmiques and projroses a more rehable re-
alization that provides a modular design and a cutoft' fiequeney ranging from 100 IIz down to 1 Hz
in a n!asonable cliip area. Tlie proposctl traiLsconductor circuit can be fiirmed by compact identical
cu-cult eeUs and offers both linear range expansion and trMiscondiictance reduction, which makes
i t siutablc fiir very low-ficqnency, large-dynamic range, low-power, tunable G,„ - G filters.

Sec. 7.2 gives a review o l existfiig techniques for traiisconductaiice reduction. The proposed tech-
nique w i t h relevant performance analyses w i l l bc presented i n Sec. 7.3. A n apphcation to the design
of a lowjiass filter (LPF) witli tunable cutolf frequency is shown ui See. 7.4. Sec. 7.5 pro-vides
measmement residts mid a performance comparison between the proposed cucuit and previoirsly
reportcil designs. Conclusions are given i n the last section.

7.2 Review of Tr ansconductance Reduction Techniques

In this work, we elassdy the traiisconductaiice reduction tcclink|nc iuto three categories: I ) curreut
attemiation: Fig. 7.1(a), 2) current canceUatiou: Fig. 7.1(b) and 3) voltage attiaiuation: Fig. 7.1(c).
90 CHAPTER 7. TRANSCONDUCTANCE REDUCTION TECIINIQUE FOR VLF FILTERS

"sr.

Figure 7.2: Ba.sie sul)tliresliold traiLseoiMhiet.or.

I l l most o f t l i e eases, i^aeli C',„ eell is built ftom an ordinary ddfereiitial pair circuit sncli as the one
shown m Fig. 7.2. For subthreshold operation (weak inversion satiuation), the transconductor of
Fig. 7.2 provides a nonhnear transfer accorduig to

f„,.i = / « t a n h f % ^ y (7.1)

where n,, and VT are the subthreshold slope factor of piVIOS devices Mi and M2, and the thermal
voltage, respectively.

The circiut of Fig. 7.2 is cousklered the main source of distortion for the following reasons:

• I n the case of Fig. 7.1(a), input voltage Vin is applied to the G,„ ceU and w d l be subsequently
converted into a current before being attenuated liy current attenuator K, which can bc
formed by ciurent nurror circuits [84]. Harmonic components are mainly generated by the
(7,n cell, and .since K provides hrieai' current si:aling, the ratios of ftmdmneutal and harmonic
compouents me niaiutained. H(uice, ui this case, the overah transcoiidnctance is reduced
successftdly to K • C,,,, but the harnioiuc distortion Is milbrtunately preserved. Moreover,
additional noise contributed by K is iniavoidable, which degrades the ciremt dynamic range
even more.

. Cnrrent cauceUatioii, as shown i n Fig. 7.1 (b) provides transcondnctance reduction by creating
an extra cmrent generated by C,„2 that is subtracted Irom the main output current fi-om G,,,!.
Eft'ectively, the overall transeonductmice is reduced to C,„i - G',,,2, which (theoretically) can
bc made extrenudy small. In practice, the subtraction meehaiiism is limited by trairsistor
mismatch, and again, more noise is added [85[.
 7.3. WIDE-LINEAR RANGE LOW-GM TRANSGONDUCTOR

. N stages
' .
Figure 7.3: Proposed trauseouduetor design concept.

• To i!xtend tlie linear input range of the transconductor as well as to reduce the transeonduc-
tauc<!, the voltage attenuation techmeiue showu i n Fig. 7.1(c) is employed. Voltage attenuator
K can be madi; hnear by a capacitive dividing network |86| |5!)|. The overaU trairsconduc-
tance i n this case equals K • G,„, as was also the eas<; when (nuploying eurreid, attenuation,
but now the linear range is wider without additional noise contribution (only i f a noisdcss
attenuation is ILSIKI). Howev<;r, D C offset becomes a probkan and the ojicrating point must bc
set ac(;urat(ly by additional circuitry for this tccluutiui; to become effective |59]. Moreover,
the capacitive dividmg network retjuircs a large chip area.

Elaborating finther on the voltage attenuation method, we jircseut a trarLsconductanee reduction

teclmi(iuc in the next s(H:tion which relaxes the design of bias circuits and provkles modularity to
the overall design.

7.3 Wide-Linear Range Low-G,„ Transconductor

This section presents the concept of the transconductance reduction teeluuque and relevant char-
acteristics of the transconductor arc analyzed.

7.3.1 Concept

Fig. 7.3 shows a macro-model of the proposed transconductor. I t is couqjose-d of an TV-stage cascadi;
of linear voltage attenuators (attenuation by a factor of 3 in each of N stages) and an ordinary,
nonhnear sidjthreshold traiLsconductor, G,„ (Fig. 7.2).

F'igure 7.4: Linear voltage attenuator.

92 CHAPTER 7. TRANSCONDUCTANCE REDUCTION TECIINIQUE FOR VLF FILTERS

By doing so, ini)nl, voltage V„ w i l l hc. attenuated by a iaetor of 3'^ at llie iuiiut p o r l of G'„,. Since; the
amplitude of the voltage appivaruig at the u i p u t p o r l of the iioidiiiear clement becomes smaller, this
mechanism effectively leads t o luiear iiiiiut range extension as well as transeondnetanee reduction
by a factor of 3™. T i n ; hnear attenuatioii is reahzed by the ii(;twork shown ui Fig. 7.4.

The attenuation ii(;twork coiilaiiis four ideiiti(;al iioidinear traiLscoudiiclors, f,'„,i lo6',„,i. A l l of
tli(;in ns(; local negativi; leedbaek. G,„i and G'„„) act as the input transconduetors l h a t snpply
uoiduiear curr(;nl passing through a nonhnear network formed by the back-to-back connection
of G,„2 and G,,,^. W i t h this type of feedback comiection, the current flowuig through tli<; network
of G,„2 and G'„,:i (/;„) is dependent on the vollagi; across i t ( V J i - K i ) . I t can also be s(;cii lhat
G„,2 and G',„,-i together are actuig as a nonlinear r(;sislive load lor G'„,i and G',„,i. Assuming that
the voltage-to-current relationship of each transconductor is a monotonically Increasing nonlinear
hmction w i t h odd-symmetry, i.i;.,

I..ni = .r{V+-V^) = -f{V^-V+), (7.2)

w<; have

I . = .f (Vl - V-s) = .! (V( - Ki) = ƒ (K4 - V2). (7.3)

From (7.3), we can derive:

Vl -= 2 K - V i , (7.4)

V2 = 2V4 - V3. (7.5)

Subtracting (7.5) h o m (7.4), the foUowing hnear relatioirslup bctw<;en input and output voltagiis Is
found

K „ . i ^ V . - K . ^ ^ - f . (7.0)

I t can be s(;(;n that this linear attenuation can be budt fi om a network o l any nonlinear transcondue-
tors that comply w i t h (7.2). I n practice, b o t h hypcrbohc sine and liyperbohe tangent snbtlir(;sliold
traneonductors may be used t o unplemcul this concept.

7.3.2 Noise and Dynamic Range

Although the input liii(;ar range is eiilarg(;d, this unlortimately also holds for the inpiit-rcferred
iioisi;. Consider the attenuator circuit shown i n Fig. 7.5 where each transconductor is assimied t o
have an output noise current w i t h a power sp(;ctral density of 5'„,(./ ), the power spectral density of
the output noise voltage can be f o i m d t o be

s„„M) -= s,„n,p(.r) + s,noN{.r)

s,„i{.n + .s'„.2(.f) + A-,-„;i(./-) + s,„4{.n ^ 4,s'„.(/)
(7.7)
32G?„ 9 '
 7.3. WIDE-LINEAR RANGE LOW-GM TRANSCONDUCTOR 98

Figuro 7.5: Linear attenuator w i t h noi.se som'ces.

where ^'„„„p and .S'i„i„N are tlie output voltage noise speetral densities at nodes Vs and V4, r e s p « >
tively.

For N easeaded stages, we have

S„u,Ur) = j : ^ ^ - (7.8)
j= 0

111 contrast to the case of a cascade of voltage amplifiers, tlie m a j o r i t y of uolse i n tliis case Ls
giaierated fiom stage N urstead of tfie first stage. The noise i n (7.8) appears at the input of the
main transconductor and wiU finally be converted into an output noise cmrent iu addition to the
noise generated f i o n i the main trau.sconductor itself The output noise current spectral density then
becomes

(./) sun + t{s.M) + ' i ^ L ' ^ + ^ (7.9)

f.r.5,„ (,/•).

This leads to a slightly more than 3,3% reduction h i dyuainic range (DR.) com|)ared t o the basie
transeondnetor.

D R ^ (7.10)

7.3.3 Current Consumption and Circuit Complexity

Tli(! transeondnetanee reduction in this case Is obtained not only by sacriheuig the D R but also by
increasing the power eonsuiiiption and the eircuit complexity. Since each transconductor ojieratra
in class A and consunies a bias eurrent In, the total current eonsiunption is (dW + l ) / / ; . For
eoinplexity, we count the euciut elements G,„ and obtain a total number o l (deiiicnts of 4A'' + I .
94 CIIAPTER 7. TRANSCONDUCTANCE REDUCTION TECIINIQUE EOR. VLF FILTERS

Figme 7.6: Pseiitlo differential 2"''-order lowpass Hltijr.

B o t h the enrr(!nt and complexity increase by the .same factor of dTV 4-1 to obtain transconductance
nxluction K of 3'^.

Now i t is clear that t o save chip area occupied by on-chip capacitors usuig this teclnuqne we need
to saerihee DR, and power. Moreover, i f N is large enough, the area occupied by the traascondnctor
can be <lonunant. For tins reason, the nnniniuin TV can be determined by the nruiunum eurrent
that can b(! reproduced rehably on cliip u i practice.

7.4 Filter Design and its Measured Results

7.4.1 Butterworth 2"'i-order L P F

h i this work, a pseudo differential 2"'^-order L P F w i t h a transfer hinction of

K.iit(-'i) ^ G,„iG,„2 1

its basic topology shown i n Fig. 7.(1, is employed [87,88|. The differential stnicture is chosen to
widen the signal swuig a.s well as the Hlter's dynamic range. As the output terminal is fed back
directly t o the invertuig teriiunaLs of Cmi aiid G,„2, a precise following bebavkir b(4ween Vj,, and
Kout is obtained i n the hlter's passbaiid due to the filter's large looi>-gaiu. This niechanism attaiiLS
good liiK^arity for input ft-ciiueiieies well below the filter's cutoft' ft cquency [87].

By setting G',,,! = G',„2 = G'„,, we w d l fiave a u n i t y passbaiid gain A = 1 , cutoff ft-cqu(!ney

ƒ,' = G „ , / 4 7 r \ / G T C Ï mid (|uality factor Q = ^/C\/G2.

7.4.2 Supply Voltage Requirement and Signal Swing

The ddfereutial mput voltage of each transconductor i n the filter topology fii Fig. 7.6 is forced by
the filter's loop-gain t o be very small at ft'(!qucncies mueli lower tliaii ƒ„. T I K ; common-mode range
( C M R ) of tlie trmiscoiiductor i u Fig. 7.2 can be used to a])proxiniate the maximum filter voltage
 7.4. FILTER DESIGN AND ITS MEASURED RESULTS 95

swing (KppswinK) instead of tlie tianseoiidnetoi's linear range, lieferring to the transeondnetor i n
Fig. 7.2, the inaxininni (K.iax) and niinuiinni (K„i„) hiimt voltages that ean be apphed are

K„ax = VDD - VsD„„,B - VsGi,2 - VDD - 4VT - TI^VT In ( " ) , (7.12)

{-17)1,2/

and

Kni„ = Vis + KGSS + l''sDsHii,2 - VsGi,2 = Vi.s + 4Vr - (n„ - n^) Vr hi ( " \ , (7.i;i)
\ ' ' n x ) i , 2 /

assruiung that all trairsistors are operated i n the weak inversion saturation regime.

Theridorc, CiVIR and Vpps„iiig ean be found from

c ^ m = Vpp,„i,., = v,„„,-v,„i„

= V l D - ViDsHtB - Vss - VGS.T

0.5/,;
— VDD — Vss — V r (7.14)

when; is the zero-biased eiuTent for a unit transistor (obtainerl from eonditioiis Ves = 0, I I^DS | >
4 V , - and W = L) of jiMOS deviees A / j and M2, n„ is the slope hietor of i i M O S , and VsD.,ai is the
nuiumum voltage reqiured t o keep a transistor ni weak inversion saturation (t,y|)ieally, Vsosat = 4 V T ) .
A f t e r s(4(;eting / „ for I4ie required valiiis of ƒ,„ supply voltage levels VDD and VSS can then be ehosim
to satisfy the reiiuired filter's voltage signal swfiig at fi-equeneies mucfi lower than f^.

I t Is worth noting that the extended luiear range obtaIiK;d f r o m the eireuit i u F i g . 7.2 and the CMR,
in ( 7 . 1 4 ) define tin; iiiaximimr signal swing of tin; filter. Tfie maximum signal swing of tfie filter at
fi-equeneies aroimd is linn ted by tlie om; wliicli is the smallest.

7.4.3 Design Procedure

We employ the filter topology i n Fig. 7.6 and tfie transeondnetor of l'4g. 7.3 w i t l i att(;iiiiators as
sliown i n Fig. 7.4 to design a L P F w i t h ƒ„ i n the raiigi; from 1 Hz to IOO Hz. We keep the chip
area low by l i m i t i n g tin; total eapaeitanee to 50 pF. To obtain more than 44 dB DR, as i-<;quired
fin- ECG signals ( Chapter 6), the fiillowlng design stejis ean to help aecomphsh the requirements.
96 CHAPTER. 7. TRANSCONDUCTANCE REDUCTION TECIINIQUE EOR VLF FILTERS

Passband Gain

From tlie 2"''-order tiaiisler fmietioii express(!d in (7.15), a B u t t e r w o r t h iriagiiitiide response ean
be obtained by settuig Q to ^/2. Hence;, condition d - 2C2 is satisfied. As the t o t a l capacitance
is limited to d + C'2 < 50 pF, d =- 2C2 -= 32 pF are efioscu. B y doing so, we can expect the
filter's passband response to be flat irom D C to w i t h a gaui of 0 d B . Also, a - 4 0 dB/decade
roU-oft' should be be obtained. W i t h this settuig, the proposed L P F i n F i g . 7.0 eau also b(; s(Xiii
as a dittereutial voltage follower i n which the output voltage ibUows the iiii>ut voltage (dosely in
the passpaiid. This fiiUowiug mecliauisui helps to im])rove f l u ; huearity of the L P F , since the
voltage across the iuiiut lermfiials of eacli transconductor is miuiimzed by tlie muty-gaui fi;edbaek
connection. As a eoirseqnence, tlie distortion is miniimzed as well fiir frequencies wefi below fc.

M i n i m u m B i a s C m r e n t a n d N u m b e r of Stages

As diseussed previously tliat a bias curnmt of less tlian 0.1 i i A cannot be made precise, the m i n i m m n
value of bias eurrent hi is lunited to 0.2 irA to alleviate the error f r o m transistor nusmatch i n
current mirrors. For this reason, w i ; need to find tlie value of G,„ required first, and tlien the
mmiber of stages (/V). As C,„ = 2 7 r , / ; v / C i d , values hi the rmige of 0.14 i i A / V to 14 i i A / V result
for the values of fc r i K i i i i r e d . For I , = 0.2 uA, Hp = 1.0, VT = 26 uiV and trmiscoiidiietaiice
g,„ .= l/(2/i.,,\'7.) fiir thl! traiiscoiuhietor used (Fig. 7.2), the ratio ry,„/G,„= 8 =- 3~ is obtained.
Thus, W = 2 is chosen. The total bias ciuTcnt reqiured fiir tlie entire L P F equals 2 8 / B .

Recovering D R

As the modular transconduetors usetl i n this design are simdar to the one usetl i n Chapter 6, the
same transistor thmensions (W/Li_2 = U) /nii/2.5 / n i l mid I K / L i . z = 2.5 /nu/10 /mi) are used here as
well. I n this frequency range, the flicker noise can be tiomparabk; to tlie sliot noise in weak inversion.
Tills d(;grades the filter D R fin tlu;r i n addition to the 30% D R reduction fiom tlic attenuator circuit.
T l u ; loss in DR. can be recovereil by the foUowmg actioirs:

• Using a tlifterential eonfigmation. By tloing so, approximately 0 d B D R unprovement should

be obtained. Another beneht is a 50% retluction i n the size o l capacitors used, fiir tin; same
cutott" h-ctjuency. However, the power consumption needs to be double.

. Increase KDD from 0.0 V (as used for tin; E G G L P F i n Chapter 0) to I V to aUow fiir a lugher
common-mode range o l the transconductor used, thcridiy allowuig larger signal voltage swuig
(sec (7.14)). This also leads to mort; power eonsumptioii.

Bias Circnit

As we can sec that i n total 28 bias eumuit branches are rc(|iured fiir tlic L P F , budding a eurnmt
mu-ror ciremt to supply the bias current to each transeoiidiietor is recommended. A large transistor
area is selected to nunimizi! mismatch between the transistors usetl. Also an intcrthgitatiid layout
is apphed. For these reasons, we set W = 24 /un and L = 0 /tm Ior the transistors that perlorm
eurrent inuToring i n the bias circuit. I u this case, approximately 35% of the chip area is occupied
by tin; fiias circuit (see Fig. 7.7(b)).
FILTER DESIGN AND ITS MEASURED RESULTS

(b) Zoomed-in filter area

Figure 7.7: Chip photo.

98 CHAPTER 7. TRANSCONDUCTANCE REDUCTION TECHNIQUE FOR VLF FILTERS

TAA Measurement Results

The proposed filter fias been fabrieated i n A M S 0.18 - / m i CMOS teelinology. I n tfiis proeess, dual
nietal-iiisulation-metal ( M I M ) capacitors (the M I M capacitor w i t h the extra layer to enhance the
capacitance density) are available and they were utilized in this design. The transconduetors shown
in Fig. 7.6 are implemented by the modular approaeh described i n Sec. 0.,3 for A^ = 2 (attenuating
factor of 9). The total current consumption of the proposed filter core is 3 6 / f l . Tho output voltages
are buffered via source followers. Fig. 7.7 shows tho pliotogi-aph of the chip, which contains the
transconductor eircuits, bias circuits and dual M I M capacitors C\ and C2. The capacitors overlap
some of the active area on the I C . This saves some space and, as a result, the total chip area is only
0.043 imn^. A Keithley 6430 precision current souree has been used to supply D C bias eurrent to
the on-chip current mirror that distributes bias currents to the transconduetors i n the filter core.
Tfic following results were measured using an SR785 dynamic signal analyzer under the condition
of VSS = 0 V , VDD = I V and Vss = 0 V , VDD = 1.8 V for the filter core and the source follower
buft'ers, respeetively. The differential input voltage has a common-mode level ( F C M ) of 0.5 V .

Fig. 7.8 shows the measured and simulated magnitude responses of the proposed L P F obtained
by adjusting IB to 0.2 uA, 2 n A and 20 n A . This results i n a measured of 1 Hz, 11.2 Hz and
107 Hz while the simulated h is 1.5 Hz, 12 Hz and 110 Hz at the 3 respective bias points set by
7/5. A measured passband gain (K) of -0.89 dB ean be observed for I , = 0.2 uA. For the case
of IB = 2 n A and IB = 20 n A , the same value of K = -0.62 dB is obtained. I t can be observed
for the case of IB = 0.2 n A that the deviation between the simulation and measurement results
is more than the error for the results obtained for the higher bias currents. This might be due t o
the diode-connected transistors i n the filter circuit (i.e., M 3 of F i g . 7.2 and some transistor i n the
bias circuit) are pushed out of their weak inversion saturation at this current level for this realistic
case, but they remain i n weak inversion saturation for the case of simulation. As a consequence,
tho drain-source resistances of the transistors decrease as well as the filter's loop gain.

F r e q u e n c y , Hz

Figuro 7.8: Magnitude responses of the L P F .

The measured and simulated output noise power spectral densities of the filter for the same biasing
conditions and cutoff ftequeneies as used to obtain tfic results of Fig. 7.8 are shown ur F i g . 7.9.
From these results, the input-referred noise (IRN) voltages, integi'ated fi-om 1 inHz t o 4/„ are
133 /tVrms, 234 fjYrms and 270 /iVr^s for IB equal to 0.2 nA, 2 i i A and 20 n A , respectively The
simulation prediction of the noise provides over-pessimistic results. The flicker noise obtained fiom
 7.4. FILTER. DESIGN AND ITS MEASURED RESULTS 99

simulations coveis the entire passband for all eas<;s wlide the noise cxaner freiiueneies observed
from the measm-em<;nts are bidow ƒ,. for all i-ases. The simulations of the int(!grated noise priKliet
more than 60% lugh(u- noise than the results obtained by the measurements (se<! Table 7.1). This
nught stem f r o m that the fhcker noise eoefheient i n the transistor model provided by the foundry
is over-pe.ssimistie. I t ean also tie noticed from Fig. 7.9 that for frequencies lower than 2 Hz, the
noise densities for all cases converge. This is most probably a measmement artifact. To mcasm-e
the noise behavior hi this frequency range more preclsidy, a longer observation time w i t h a higher
frequency resolution is re(|uircd.

F r e q u e n c y , Hz

Figm-e 7.9: Output noise power speetral den.sity for different cutoff frequencies.

The luiearity of the filter has been tested by applying a sinusoidal input voltage w i t h input frequency
./hi = .fc and observfiig tfic filter's output speetrmn. For diftereiit input amphtudes, the total
harnionic distortion ( T H D ) has been coUected and plotted as .shown i n Fig. 7.10. For o l 0.2 n A ,
2 uA and 20 iiA (corresponding to of I Hz, 11.2 I I z and 107 Hz, respectively), the ineasurcil input
amphtudes that induce 1% T H D arc 520 uiV, 050 niV and 790 mV, respectively, while 520 iiiV,
700 inV and 700 luV, respectively, are obtained from sunulatloirs. Taldng into account the iiiiiut
referred noise voltages inentioned hi the jircvioiLS jiaragraph, input dyuanuc ranges of 68.8 d B ,
00.2 dB aud 66.2 tIB are achieved, respectively W i t h the noise obtained from the simulations, i t
fiillows that the simidated D R Is maximally 7 dB difierent fiom the measured DR..

Table 7.1 presents a pi^rlormauce summary of the filter tested at difierent cutoff frequencies. The
D R of the filter is larger tlian 60 dB fiir tlie entire range of ƒ,, tested. The jiower consumption of
tlie filter varies w i t h ƒ,„ and the hlter consumes oidy 720 nW at the highest ƒ„. For the figm-e of
merit (FoM) rlefined by

FoM = , (7 KA

wfiere P is the power eonsnmption and M is the filter order, w(; aclueve a F o M between 1.9 anrl
2 fJ foi- all eases.

Tabic 7.2 compares measurement results for the proposed L P F w i t h previously reported very low-
frequency LPFs. The proposed fiher outperforms tfie others i u terms of chip area and F o M . R.cgard-
ing i)ow(;r consinnption, this filter docs not coiisuiiK! as little as the hlter jiroposed i n |89]. However,
l ü ü CHAPTER. 7. TRANSCONDUCTANCE REDUCTION TECHNIQUE EOR VLF FILTERS

0.2 0.4 0.6 0.8

Input amplitude, V

Figuro 7.10; Total harnionic distortion versus input amplitude.

Tabk; 7.1: P E F O R M A N C E S U M M A R Y

Filter characteristic Measured Simulated

ID [>IA1 0.2 2 20 0.2 2 20

I< |dB| - 0.89 - 0.02 - 0.62 -0.35 -0.31 -0.29

/ 3 d B |Hzl 1 1 1.2 107 1.5 12 110

*Output noise [/iVmiH] 120 2U9 257 287 366 -1(10

TRN | , , V r „ „ | 133 224 276 299 379 414

t/,,@l% T H D |V1 0.52@1 HZ 0.65@10 Hz 0.798100 Hz 0.5261 Hz 0.7@10 Hz 0.76@100 Hz

D R [dB] 08.8 66.2 66.2 61.8 62.2 62.3

i Power |nW] 7.2 72 720 7.2 72 720

FoM [fJ] 0.48 0.77 0.8 1.6 1.8 1,9

* Integrated from 10 niHz to ipMB- te.xcludiilg bias circuit

the hlter of [89] is not perfornung eutuely in the eontinnous-thne domain. liist(;ad, a switching
teebnitine is utilized to synthesizi; a very large thne constant. Compared w i t h the 2"''-order Butter-
worth structme i n ]88] (irsuig the approach most siimlar to our design), our filter provides a tuning
range that is om; deeade larger wliik; the power consmnption of our filter is more than tlirci; orders
of magnitude lower.

7.5 Conclusions

A niodidar trauseoiidui:tmrce reduction tedinitiue has been developed to successfiilly finplemeut a

fuUy-integrated, v(;ry low-ft(;(iuency 2""'-order B u t t e r w o r t f i L P F in A M S 0.18 /i.in CMOS process.
B y using an ordinary subthreshold differential pair transcouductor as a basic niodidt;, the filt(;r
aelu(;vos a (;utott' fretiueney tuning range of two decades at a power eonsiunption mucfi lower tlian
one fiW for tlie lugliest For lower ƒ,,, tlie power consumption scales down linearly. Ba.sod on its
FoM antl clup area, the proposed filter also provides tfie best r(;sidt coiupared to other existing v(;ry
7,5, CONCLUSIONS

Table 7.2: M E A S U R E D P E R F O R M A N C E S U M M A R Y A N D C O M P A R I S O N

Reference ]67] ]90] [91] ]92] [88] [89| This work

year 2000 2003 2004 2006 2007 2011 2012
CMOS tech. [^m] 0.8 0.5 0.8 0.8 0.35 0.35 0.18
Order ; topology 6 ; SE 1; SE 1 ; SE 1; SE 2 ; SE 1 ; SE 2; D F
Chip area [mm'^] 1 0.035 0.1 0.2 0.336 0.07 0.043
Capacitance per pole [pF] 5 15 70 50 52.5 40 24.18
Minimum /,-. |Hz] 2.4 0.18 0.1 0.3 1.5 0.02 1
J' |W] 10 ,1 77.4 11 230 n 113 n 165 5 n 7.2 n
I'DDIVI 3 3 3 - 3.3 1 1
THD |%] 1 - - 1 0.96 1
D R [dB] 60 61.4 - 65.4 60 63.8 68.8
FoM JfJ] 694 312 109 5500 104 0.48

S E = single ended, DF = differential

low-frequeiiey 6',„ - C LPFs. For these reasons, the area-efficient filter iiroposcd i n fliis cfiapter
can bc usefiil for very low-frequeney biomedical applications.
 Chapter 8

Large-Swing Current Multiplier

for A P Detection

"Tlie eiievfiy ofthe mind ii tlu; essence of life.

Aristotle

8.1 Introduction

A n action potential (AP) or spike detector is an inijiortant part of neural recording im])lants |93|.
Tlic detector pcrlbrnis on-chip data reduction by t r y m g to capture only relevant information (real
oecurrenc&s of the action potential) from the re<;orded signals. This data selection is usefid lor
reducing the data rate of the neural seirsor wireless transniis.sion, which eventually k;ads to a
reduction i n ojieratuig power [93]. To locate the real-time occurrences of aetion potentials i n iiorsy
enviromnents, a 'uoiduiear energy operator, ( N E O ) ' [94], has been widely used to diseriuunate
between action potentials and the noise i n wlu<li their energies are eonsidered dilferent ]95]. Tl»;
NEO provides real-tmie energy detection aud takes into aceomit both amplitude and frequency of
the signal of interist. The N E O algoritlnu is described by

(8.1)

where x(l.) represents the signal of uitcrcst i n the time domain and j/(t) is the real-time energy of

To examphfy that this algoritlmi involves not oidy the amplitude, but also the fr-cqiuiucy of the
.signal, one can substitute .(;(/,) = A eos(wJ) into (8.1). The residt of *(.i;(<)) =A'^LJ'^ will be obtained,
where A and uj stand hir the aiiqilitude and angular frixinency of :i,(/,), respectively.

103
1Ü4 CHAPTER S. LARGE-SttTNG CURRENT MULTIPUER FOR AP DETECTION

d V d
dt dt

FiKiui! 8.1: Noiiliii(;ar energy operator (NEO).

I t ean be seen f r o m (8.1) that the N E O algoritlmi itself is eompaet smce only ditlereiitiatiou,
mnltiplieation, and snbtraetion are required. Therefore, the use of analog circints to realize the
N E O is being considered h i the field of ultra low-power intcgratiHl cu'ciut design Ibr implantable
devices |96-98|.

Equation 8.1 can idso be represented ui the form of a block diagram as shown i n Fig. 8.1. I t
conqirises two diffiueiitiators, two imdtipliers, and a subtraction block. Tlic latter operation is
simply reahzed i n an analog lashion by representing the signals m term of currents mid using a
current mirror to perlorm the subtraction. So the differentiators and the analog midtiplicrs are tlu;
mam design cliaffenges. The differentiator suppresses low fiequeney components i n :!;(*) wldlc, on
the other hand, high fiequeney conipoiKmts of .^•(^), will be enhanced. This is because the variation
of the amplitude over time ( ^ ^ ^ or the .slope) of higli-&e(|iiency signals is faster than that of
low-&e(iuency signals. Carefiil consideration o l tfie fretinency content o[ x{l) ami tlie differentiator
circuit time constant, power conisniription, and dynamic range, is tlius reqiured.

Focusing on tlie first differentiator at the input, its output signal is supplied to both the lower
niultipher and tin; seeond differentiator. The output signal amplitude of the second differentiator
(identical to the first one) w i l l be amphhed again for high-frequency signals that have been amplified
by the first differentiator. On the other hmid, the amplitude o l low-freciiieiicy signals tfiat fiave
been suppressed by the first tliff'cnintiator wall be supjiressed fiirtlier by this dift'ereiitiator. These
twice suppressed and amidihed signals wiU be supplied to one of the mput signals for the upper
multiplier. Now i t is clear that the multiplier for the NEO-bas(;d spike detector needs to handle
a wide signal range (i.e., small amplitudes of low-fieqiiency signals and large amphtudes of high-
frequency signals). To keep tlie operating power low and to maiiitaui a wide input signal range,
class-AB operation, current-mode signal processing |99|, and MOSFETs operating ui weak uiversion
are coirsidercd Ior tfie undtiplier design.

Based on tfie well known cx])oneiitial cfiaracteiistics of B.lTs or weak uiversion MOSFETs, four-
quadrant current multiplier circuits have been designed using dilferent principles, e.g., transcou-
ductor/conveyor based [fOO], and transliuiMr ciremt based [101] current multipliers. Most of them
are restricted to clas.s-A ojieration, which does not allow the input signals swing to exceed the
bias currents. To handle large iiqiiit sigual amplitudes, a class-A cnrrent multiplier rcf|uues large
bias currents, which subsequently results in high power eonsumptioii. I n tins chapter, a class-AB
four-quadrant analog current nmltiplier is presented. The proposed multiplier is formed by a dual
output current amplifier which is biased by controlled currents generated f r o m a current splitter.
B o t h the ainplifi(;r and splitter circuits can be realized f r o m the same basic circuit block, caUed
 S.2. CLASS-AB CURBENT MULTIPLLER

lo

Figure 8.2: Ciurent multiplier block diagram.

a sinh transconductor h;aturiug class-AB operation. Therefore, overaU elass-AB operation for the
miiltiiiUer is obtained. As a result, th(; miiltiphcr circuit can be designed to process lugh input signal
amplitudes while its bias current can be kept low. Cucuit simidation using a 0.13-/tni transistor
model shows that, for a 0.5 uA bias current, input current amplitudes of 5 u A <:an be applied to
the nndtipUer circuit, and good fom-quadrant inultiplication is achieved.

8.2 Class-AB Current Multiplier

Fig. 8.2 shows the block diagram of the proposed niultipher. I t comprises three identical current-
controlled noidinear transconduetors, G„, C'A , C,i and a class-AB current siililtcr, K, that supplies
signal-dependent currents I A and 1, to bias trmrsconductors CA and Gn . Let's assume that the
I ~V characteristic of each transconductor is a strictly monotonie huiction described by

/o„t-/,J(V+-VC), (8.2)

where l„ is the bias current apphed to the bias node of the traiLsconductor.

Using (8.2), voltage Vj i n Fig. 8.2 can be found as

K : ^ . r ^ ( ^ ) - K , . (8.,3)

Unhke G„ that is biased by D C current / „ , G'A and G'n arc biased by signakdependeiit cmrents
IA and Jn, resiicctively. Subtitiithig (8.3) into (8.2) for GA and Gn, the outiiiit currents of both
transconduetors are:

^oiitl — ^ J i i i l , (8.4)
U)(i CIIAPTER 8. LARCE-SWTNC CURRENT MULTIPLIER EOR AP DETECTION

and

It, is clear fi-om (8.4) and (8.5) that the monotonie hmetion shown on the right hand side of (8.2),
whi(4i, i n practice, arises from tlu; nonhnear liehavior of tli(! senueonductor deviees irsed to imple-
ment the transeondnetor, has disappeared. This resuls in linear relationships between the i i i i i u l
aud output currents. Thcindbre, the output current of the multiplier can be found to be

I n tins case, I„ is a constant cnrrent but IA and In are generated from input current / i u 2 , via the
cmrent splitter, according to the foUowing relation

fin2=A;(i„-ƒ«). (8-7)

Substitntuig (8.7) uito (8.6), we arrive at

f„,.l = ^ ^ = ^-/inlA,.2. m

I t can be seeu from (8.8) that a fom-quadrant multiplication is obtained from the circuit i n Fig. 8.2
w i t h a conversion gain of A = (kh.Y ^ This allows us t o adjust the gain electronically by varying
bias cnrrent /„.

h i comparison w i t h the w(41-known Gilbert niultipher, tli<; huidamental dUferenee is that the Gdbert
undtipher usis a transconductor to convert the uiput voltage into currents first, and tlie cucuit
operation Is limited t o class A . I n this (dass-AB structure, the input signals are currents and one
o l them is converted into voltage first, and anotiier one is split into two enrrcut components.
Tho sunilarity between tlicin is that there is a pair o l traiLseouductors having their bias currents
modulated by one of the mput signals, and the ontput currents of both midtiplier circuits are
obtained from the smnmatioii of the output currents of the trrnrsconductor pairs.

I n GMOS technology, the multiplier can be designed to operate i n class-AB at a power consumption
down to a few nW. The exponential behavior of subthreshold GMOS devicis is cinploy(;<l to design
the trmiseonductors and the current sphtter. They are operated from a low supply voltage (less
than 1 V ) and are described i n the next section.

8.3 Subthreshold Class-AB Building Blocks

Fig. 8.3(a) shows tho nonlinear (da,ss-AB trmiscoiiductor wluch can bo dfrectly substituted fiir 6'„,
GA and G, o l Fig. 8.2. Using tlie ex|)oiioiitial relationslüp of M O S F E T i operating iu weak fiiversion
satiuation [40], for VSB = 0 (source and body teriuuials are comiected), i t foUows t h a t
 8.3. SUBTHRESHOLD CLASS-AB BUILDING BLOCKS 1Ü7

r,, = Iimv-w(J~^ , (8.9)

wliert

/ « ) =/.VII y (8.10)

Current /.so is the zero-biasefl eun<mt for a unit transistor ( I K -= L) obtained by setthig KSG = 0, rt,,
is the subtluiisliold sIo]ie factor of ttic p]\10S and Vr is tlie theriual voltage. W and L reiiresent the
w i d t h and k^ngtli, VSB is the sourcc--bulk voltage, and VSG the gate-soiuee voltage of the trairsistor.

As the set of cascode transistors M.u\-M4i) forms a uuity-gaiu eurrent unrror, we can irse (8.9) to
Hnd the iniiut-ontput relation of eaeh transeondnetor as [102]

,„,,.2/„slnh(^:±-^) («•")

This relationslüp complies w i t h (8.2) and provides class-AB operation. Note that m the case; of
VSB 7^ 0 for the set of transistors M2, the bulk elfect w i l l not affect the relationslüp of (8.11) but
wiU modify the value of 7,5-, and hir this reason, the transconductor may require a higher siqiply
voltage to mauitain the same operating c<iudition.

Fig. 8.:i(b) shows the current siditter d r c u i t . It is formed by tin; same cucuit topology as the
transconductor i n Fig. 8.;i(a). Current mirror ciremts Mi^A — Mr,A - M;,n and M,;, - Mr,a - Mr,n
are inserted to implement the output branches, and I A, respectively. The negative feedback is
apphed to the input node to allow input cmrent /i„2 üowiiig into the transhiiear loop hirnied by
transistors M2A to M^D. A f t e r entering the loop, /i„2 w i l l be split into two components /„ and
/,,. W i t h help f r o m the unity-gain cascode current mirror M^A-Mir) and the additional cunent
imrrors M,,.A - M;,A - Vh,B and - Mr,c - Mr>i>, 1„ and /(, can be conveyed to the output by
h\ = Wo Lla) and lB = KIo + h,)-

Consider the traiislmear loop comprising M2A to Ma/; agaui, according to the translincar priuciple
[103], the following relationships ean be formed.

/i,i2 = /„ - /(, = IA - In (8.12)

and
ll = Ink- (8.13)

The output currents, I A and In w d l be dehveretl to GA and Gn i n the hill current midtiplier circuit,
respectively, w i t h sealing factor k defined by tl»; dimcnsioiLS of and M,..

Other possible ways to design tlie suifi trmiscoiiductor and ciu'rent sphtter are shown in Figs. 8.3(c)
and 8.3(d), respectively. Tlds approach employs coni])lciiieiitary deviees to implement the .same
translinear-loo]) equations as obtained from tfie circuit in Figs. 8.3(a) and 8.;!(b). However, they
sufter fronr diftereiit siibllu-esliold slopes due to the body effect on the iiMOS and pMOS devices,
somethmg which is unavoidable i n standard CIVIOS processes [102]. For tlds reason, wc choose the
circuits i n Figures 8.3(a) and 8.3(b) to validate our design.
KKS CHAPTER 8. LARÜl^SWING CURRENT MULTH'LIER FOR AP DETECTION

Figure 8.3: Cucuit l)uildiug liloelffi. (a) siuli trairscouduetor. (I)) aiidi-based eIas.s-AB curreut
splitter, (e) Compleuientary sinli transconductor. (d) Couipleuientary siidi-bascd class-AB current
splitter.
 8.4. SIMULATIONS 109

-20 ^ ' ' ' 1

0 2.5 5 7.5 10
Time [ms]

Figjne. 8.4: Simulated tran.si(;nt respou.se of the uiultiplier. /i„i = siu (27r/i/.) aud Ii„2 =
/pSin(27r/2/.), where ,h = 1ÜÜ Hz, ƒ2 = 2 kHz and t„ ^ 5 n A .

2 4 6 8 10
M o d u l a t i o n i n d e x (Ml)

Figure 8.5: Sininlaliul total harmonic distortion.

8.4 Simulations

The multiplier i n Fig. 8.1 was designed employing the <:iremt blocks iu Figs. 8.2(a) and 8.2(b) mid
sinndated using Spc;ctre RF aud T S M C 0.13-/i,ni CMOS model parameters. Tiausistor widtlis (W)
and lengths {L) arc given i n Table 8.1. KDD and V„,! were set to (1.05 V and 0.4 V , respectively A
bias current of 0.5 uA was used. The (luiescent power of the entu-e circiut is 12.4 uW.

The transient rcsiionsc illustrating the fonr-<iuadrant multi])lieatioii of a 5 uA, 2 kHz, siniLsoidal
eurrent /;„! (this value mrplies a uiodidation uidex ( M I ) , which Is the ratio of the signal amplitude
over bias current / „ , of 10) and a 5 uA, 100 Hz, suursoidal cm-rent Ii,a ( M I ^ 1 0 ) produced by the
proposed undtipher is shown i n Fig. 8.4. I t is seen that the circuit perhirms the multiplication
fimction w d l i n the time domain for these very high input signal modulation uidices.

To examine the circuit liiK^arity, a circnit simulation o l the t o t a l harmonic distortion ( T H D ) has been
performed by vmying the amplitude of the 2 kHz sinusoidal /i„i fiom I iiA to 5 u A (2 < M I < 10),
keeping 1^,2 constant at 5 uA. Tfie results shown i n Fig. 8.5 reveal that at a M I of fO, the proposed
ninltiplier provides aiiproximately —30 d B T H D .

Table 8.1: T R A N S I S T O R D I M E N S I O N S

MOSFET MlA-D MT,A-D MhA-is

\'V/L [//rii///m| 4/4 1/1 l/IO 2/2 2/2 2/4
llü CIIAPTER 8. LARGE-SWTNG CURRENT MULTIPLIER FOR AP DETECTION

8.5 Conclusions

A low-voltag(;, ultra-low-powcr CMOS foui-quadraiit ciincut, multipli(!r has bmm described. By

using a wealc inversion sinh traascou(hictor as a basic cell, tlu; hrst fidly class-AB multiplier is
obtauied. The multiplier processes input signals w i t h a modulation indc^x of 1Ü wlule the circuit
D C power consumption can be kept very low. I t must be noted that mider large-signal drive, power
consumption w d l increase. This multiplier is suitable not only Ior realizing a NEO-based action
potential detector, but also for other implantable systems that need to bc operated from a veiy
low-supply voltage w i t h very little power eonsumptioii.
 Chapter 9

Conclusions and Future Work

" A]i])lav.d my friends, Üw comedy is over... "

— Ludwig vau Beetliovon [ou lus death bed[

Tlus tluisis has described IC design teehuiiiues for nanopower analog signal processing i n biomedical
applications. The work has attempted to serve the reqiru'ements of extremely low-power operation
and r(;asonable physical size for wearabk; and implantable medical devices by maxinnng t l u ; ca-
pability of a single iVIOS trairsistor. Discrete and coiitiniioii.s-tiiiie design techniques have been
addressed. The thesis has also dealt w i t h the nonlinear behavior of conventional circnit building
bloeks i n severe requirements such as the very low cutoff fre(|ueiicy needed to hlter very slowly
varying bio-potentials, or the very large signal swing demanded by energy-based aetion potential
detection.

9.1 General Conclusions

Part I of tins work presented the uivcstigation of a subthreshold, switehed-current memory ccll f r o m
a feedback point of view. Including switcluug iionideahties and large-signal characteristics of the
transconductor, i t has been revcakxl hi Chapter 3 that using a MOS transistor as a C,„ cell alone
camiot provide sirfficient performauee, shice eharge injection and clock feedthrongh effeets cannot
bi; suppressed completely. To uunhnize the performance degradation and eidiaiice circuit dyuanuc
range at very low jiower consmnption, a very large loop gain (as can be obtauied f r o m a two-stage
circuit), a fidly-dilferential arcliiteetun! and class-AB ciremt operation are required. The design
presented hi Chapter 4 demoirstratcd a cla.ss-AB SI memory eell that follows on ft om the hndings
obtauied in Chapter 3. The curreut-domaui memory eell characterized i n simulation can handle
very large input amphtudes w i t h high dynamic range for a wide range of input frequencies (up
to 50 kHz ƒ;„, I M S / s ,/'s). In terms of figure-of-merit, tins proposed design has advanced beyond
existfiig designs by more than an order of magnitude.

Unfiirtunatcly, an osciUation appears when handling uiput signal levels tliat overload the memory
cell input due to tli(! perfromance constraint, 4 j , „ a x = 2Tri2 sinh ('acosli h.Ur, ^,'^^^[.]'\ o f t h e

III
112 CHAPTER 9. CONCLUSIONS AND EUTURE WORK

transcouductor employed iu the twostage ui<;uiory cell to])ology whi;u driven large signal. I n
addition, the overall cir<:nit complexity is relatively high becanse the two-stage fully-dillerential
topology reqiures eonnntm-nrode fccilback circuits. However, its applicahility (assuming that the
stabihty problem can be solved hy tlu; solution proposed m See. 9.3) hi a cochlear implant (CI)
speech processor w i l l be discussed i n greater detad m Appendix A .

Part I I of this thesis established the concept o l a single MOS eircuit d(!sigu via the implementation
of smgle-brauch tiltcrs. Chapter 5 described a single branch B P F that realizes 2 time constants
usmg ordy 2 MOS trausistors aud 2 capacitors, and that consumes only one branch of bias current.
The concept has been verified by experimental measurement of a 4"'-ord(!r B P F labricated in a
0.I8-/im CMOS IC technology. The filter outperforms existing BPFs by an order of magiutude iu
FoM. The power consumption of this filter is a finv iiW, and tfie area occupied is smaller tlian otfier
designs. The center frequency of the filter is also adjustable by more tfian (i octaves, covering tfie
audio range requued iu C I processors. Cfiapter 6 applied tlie single-branch eoncept to implement a
L P F that fits the requuenreiits fi)r a pratable E C G detector. Experimental results f r o m a 6"'-order
EGG L P F prototype labricated in a 0.I8-/tin CMOS technology show that the design methodology
develoi)ed i u tlus work reduces filter power consmnption by more than two orders o l magmtude.
The area occupied by the circiut on chip has also been reduced by more than a lactor o f two
coiuparral to existing implementations.

The two filters presented in Part I I of this thesis have successftdly met tlie power and size reduction
targets required by medical devices. A limitation o l these two filters is that they cannot reahze
complex conjugate poles. Therefore, the t r a i L s i t i o i i band roU-ofl' found i n tiieir magnitude response
is not as steep as for a filter w i t h eomplex poles.

Part I I I presented teclmirinfs for the design of analog ciremts to iiic(4 the extreme rctiiureineiits
found ÜI biomedical appUcations. These requhements have been met by applying both negative
feedback and large-signal nonlinear cancellation. Chapter 7 discussed a modular technique for
realizing a very low cutofi" frequency G,„ - C I J P F . This t e c l m i t i i K ! irses the concept of voltage
attenuation, which not only reduces the transcoiidiictance, but also enlarges the Imear uiput range
of the transconductor. The voltage attenuation is linear and realized using a network comprised
of a haudhil of ordinaiy iioidiiiear transconduetors. Verdied experimentally for a 2"''-order L P F
fabrieated i n a 0.18-/tiu GMOS teclmology, tlus design tccluuiine achieves v(;ry low cutoft' frequencies
(IOO Hz down to I Hz) Irom reasonably high bias currents (20-0.2 uA) ami reasonable chip area
(0.034 nmi^). I n coniparison w i t h other very low-ft'cqnency i u t e g T a t e d LPFs reported hi the rccinit
hteraturi;, this design attains the best FoM and the smaUest physical dunensions. Chapter 8
discussed a foiu-quadrant cmrent multiplier operatmg i u weak inversion that meets the wide input
signal swing r(xpureiiiciit for an energy-based spike detector. Foriirfiig a network o l uonfinear circuit
blocks including siidi trauseouduetors and a current sphtter, the first demonstration o l a <4ass-AB
fbur-qnadrant analog midtipfier is obtained. Tlie correct operation of tlie multiplier lias been verifiixl
by eirenit simulations using 0.13-/im GMOS model parameters. Gonsmuing only a lew uW of static
power, input ciu'rents can be as high as 10 times the circuit bias current, while acceptable huearity
can be maintained.

9.2 List of Achievements

T h e oiitcoiiies of tin; research work ur this thesis can be sunuum'ized as follows;

. A ftdly-ddl'ereiitial, class-AB, ciUTent-modc, sample-and-liokl cficuit operatuig tlie CMOS

transistor in weak inversion has been designed and verihed by circuit sumdatious. Com-
9.3. FUTURE WORK I l:!

])ar(;(l to otiior designs repoit(;d in tli(! recent literature, more than an ordiu- of magnitude
improvement in FoM is achitwed.

• A 4"'-ordcr B P F suitable for a C l processor has Ix-en im|dcmeuted i n the A M S f).18 /;rn
CMOS technology. L i comparison to other BPFs reported to date, an order of magriitud<;
improvement i n tiie FoM and the smallest occupied chip area ar(; achieved.

• A (i"'-ord(;r L P F dedicated to E C G detection has also been inrpleiiicnted i n the A M S (1.18 / i m

CMOS technology. Measurement r(!snlts show that the L P F meets the rc<iuirenients for E G G
recordhig w i t h a]iproxiinately ,'! orders of magnitude improvement ui FoM compared to other
recently reported LPFs.

. A hdly-iiitegratcd, 1-1ÜÜ Hz, 2"''-order G , „ - 6 ' L P F has been implemented hi tlie A M S 0.18 /ini
CMOS t<!(liiiology. The L P F attains the best F o M (by approxunately two orders of magnitude
improvement) and the smallest chip area m coniparison w i t h other vey-low frerineucy filt(!rs
K^iiorfiid in the literature.

. The iiutial coiiciqit and design of a subtlu-eshold-biascd, class-AB four-<iuadrant multiplier

circuit operating i n the current-mode has been uitroduced hi this work. As verified f r o m
circiut sunidations, the nrultipher can handle input current auiiihtudes as liigli as 10 times
the bias current whilst consnmuig just a few i i W of quiescent power.

9.3 Future Work

The lollowing items can be dcvdoiied hirther:

. The instabdity of the SI memory cell at larger iniint amplitudes reported i n Part T should
he elmiuiatcd. Tlris could bc accomplished through an adaptive biasing scheme. The uiput
signal modulating the operating point of the main transconductor can be tracked and fed back
to set the bias cmrent of the inimt anqilihcr. By doing so, the plia.sc margm of the overall
circuit's loop gain is expected to be maintained constant across the eiitin; input signal range
and a sample-and-hold operation w i t h a D R of more than 80 dB can be expected.

• The eurrent memory ccll coidd bc applied to the design of a peak detector (see the Appendix
A ) . Tins can aid the design of an analog C l processor by being able to convey the fine structure
of tlic iiicomiug sound to tlie stimulator fii a very compact and low power fa.sliion.

. For the filter bank section of a G l processor, wluch is combined w i t h a logaritlmue compressor,
the B P F reported i n Chapter 5 can be utilized. Very low jiowcr consumiition can be expected.

• T i l l ! L P F hi Cfiapter 6 sfiould be developed to aUow fiir the realization of complex poles.

IiLstead of only using a F I as a building bloi;k of tlie filter, we sfiould allow a second-order
section w i t l i complex poliM to be a building block as wefi. As a result o l tliis development,
a low(^r-or<ler L P F with sufiicient transition band attenuation shoidd become possible. This
c:au help reducing overall power cousmnptioii and chip area hu'ther.
 Appendix A

Phase-Locked Peak-Picking Speech

Processor

A.1 Introduction

R.ecovcriiig human hearing iKirception via electrical stiuinlatiou is the irltiniate goal of contem-
porary Bionie Ear (BE) or Cochlear Implant (Cl) devices. To somi; extiait tins goal has been
achieved hy thv. invention o l a speech processing strategy caUed 'Contuiuons Interleaved Sampluig,
(CIS)' [I04|. I t rongldy enudates the behavior of the basilar membrane and inner and outer hair
cells, and successfijUy prevents .simultaneous interactions between electrodes irsing hx(xl-rate i n -
terleaved amplitude-modulated stimuli. CIS has liccn enii)loyed as a defaidt strategy i n several
commercially available C l devices f r o m different manufactnrers, i.e., M E D - E L GmbH, Cochlear
L t d . aud Advanced Bionie Corp. The results obtained from clurical experinrents have shown to
offer reliable understanding of sentences m quiet envu'onurents hut poor results obtained for simple
melodies. L i typical noisy envuonmenls, the jjaticuts (GI recipients) are stdl havuig difficulties
to understand both sentences aud melodies [I05|. These indications imply that the tenqioral fine
structure (TFS: fast varying components of the somid) is not being conveyed to the braur

In normal mammalian auditory uc.rvv. fibers, the spike trains synchronize with the stimulus waveform
periodicity up to 5 IcHz [lOfi]. Beyond that Inxinency range, the spike trahrs are generated randomly
[107]. The aforementioned mccliarnsirLS are nussing i n the GIS processor sinee the pulse stimulation
rate is fixed. To gain tfie perception of tonal languages and music, an eftbrt of realk-dng a B E
processor tfiat imitates tfie inner hair cells and the auditory nerve behavior more precisely is being
corrsidered. For this reason, the 'Hilbert Ti-anslorui, ( H T ) ' iias been introduced t o the B E proce,ssor
to extract t(!mporal envelope, iirstautaueoirs frequency and phase, and thereby the TFS [108].
Although extraction can be achieved, conveying all of the inlormation t o the brain via electrical pidse
trams is still a chaUenge that remains. Besides, perfornung the H T requires a large computational
cost for both digital (109) and analog ]1I0] pror:essors.

This appendix explores smue (!iivelo|)(^-based processuig strategies that reqmre the conrputation-
aUy i i i t e i L s i v ( ! and power hungry H T , including CIS, asynchronous interk-aved samphng (AIS),
phase-locked zero-cros.sing detection (PL-ZCD) and phase-locked iicak-picking (PL-PP). We t r y to
optimally balance the quality of the sound that can be conveyed via a set of pulse traiirs to the
stimidation electrodes aud hardware <;oniplexity of the processors. Then wc will hnd that, to reahze

115
IKi APPENDIX A. PHASELLOCKED PEAK-PICKING SPEECH PROCESSOR

Sound
signal'

Figure A . 1 : General bloek diagrain for envelopcv-based speech processuig.

a G I jirocessor based on PL-PP strategy, an (iiivdojie detector (ED) is no longer required. Tins
leads to a great reduction hi hardware complexity mid power consmniition.

1x1 Section A.2, the general concept behind all existing GI processors is dascribed. Using this general
concept, all the ditfereiit processmg stratcgk:s are cxmniiied and compared hi tcrnrs of complexity
and cinality o l tli(^ coded waveforms i n Section A.Ji. To estimate the sonnd coding performance, the
spike-based reconstruction tecludque [ I I I ] is applied to hnd the correlation factors o f t h e input signal
mid the coded output pidse sequences. The results are discussed in Section A.4. Section A.,") presents
a CMOS subthreshold switched current (Sl) pcak-uistant detector as a basic c d l Ibr compact PI^PP
analog bionie ear processors. FinaUy, the conclusions are given ui Section A.C.

A.2 Speech Processing in Cochlear Implants

Fig. A . 1 shows a geueral block diagrmn that can be used to describ(! all strategies that are beiug
considered. The processor comprises three layers of operation. O n Layer-1, mdicated by the white
background boxes, the inconung somid is prc-emphasized by either amplifyuig or filtering or both
befiirc entering a baidc of bandpass filters (BPFs). This meehaiiism is adapted f r o m the role of the
outer hair cells that map the wide range of the inconung soimd pressure onto the liiiuted dynaune
range of the ear.

The B P F bank roughly uiiinics the ba.sdar membrane behavior by decomposing the signal into a
lindted ninnber (N) of heiiiiency bands (chaimels). The signal strength o l each channel will be
extracted i n the form of the temporal envelope (a process wluch roiigldy emulates the role of mner
hah- cell) and then modidated w i t h the generated pulse trains to hirther stimulate the nerve fibers.
This is common for all envelope-based processors.

The spiking pattern somewhat depends on the input frequency so that Layer-2 (indicated by the
gray boxes) is introdneed. Particular features (Irequeucy, jibasc, TFS) of the output waveform of
each (4ianiiel will be detected and combined w i t h the envelope to dehne the siutablc stimulation
pidse features. On this layer, the pulses generated f r o m each chaiiii(l are iiKkqiendent f r o m each
other and the stochastic spdcuig behavior of the auditory nerve is ignored.
 A.s. REVIEW AND COMPARISON OE EXISTING PROCESSINC STRATEGIES I 17

Layer-:] is tlu^retbrc^ added to include tins plienonienon by somdiow conditiomng tbe features de-
tected from ditferent channels to create; a stimulation pattern that avoids electrode interaction and
preserves the relevant extracted features. Note that the; a t t e m p t to convey a l l the features of the
incomhig signal to the stimulation electrode is based on th(; assmniitiou that the brain can interpret
this rnformation but i n practice there arc factors that deviate from what really happens along the
auditory pathway. So the nnndier of layers (system complexity) d o c s n o t guarantee the quahty of
perception i n real patients [112| but staves ordy as a first ordcn- estimation.

A.3 Review and Comparison of Existing Processing Strate-

gies

A.3.1 Continuous Interleaved Sampling

From the defaidt setting of several C I models [105], it c a n be said tliat CIS is the most successhd
strategy to date. CIS employes the I " ' layer of operation. There is some evidence that the quality of
speech perception obtained from a CIS processor strongly depends on the precision o l the extracted
envelopes [108, I I 3 | . Accordingly, an attempt to K i j i l a c c the shiiple E D c o m p r L s i u g a rectifier and
a lowpa.ss filter (LPF) by a I I T based E D is of interest. Tlus issue needs to be earcfiilly considered
fiir an analog processor siiici; iu o r d e r to perform tlie H T , a lugfi complexity of its constituting
electronic circuitry is unavoidable [110].

Fig. A.2(a) s f i o w s a fraction o l tlie speecfi .signal f r o m tlie w o r d 'die' a f t e r 4"'-ordcr butterworth
BP filtiiriiig w i t h a centi^r frequency o f 150 Hz. The envelopes are extracted by a simple ED w i t h
200 Hz L P F c u t o t f frequency (the p i n k line of Figs. A.2(b)-A.2(c) and A.2(e)) and by the H T - E D
(green l i n e of Figs. A.2(b)-A.2(e)). The positive pulse train generated within the CIS p r o c i M s o r Is
represented by the b l u e l i n e ui Fig. A.2(b). h i t h i s c a s e , we c a n clearly see that the aecuracy of the
amphtude of the pidses highly depends on the accuracy o l the E D . Also, it is hardly possible that
the brain ean recognize frequency, phase and TFS ftom the fixed t i m i n g interval o f tlie pidse train.

A.3.2 Zero-Crossing Detection

In tins strategy, tlie 2'"' layer Is put on to|i of tlie fi" layer to introduce a phase locking amplitude
modidated pidse t r a i n [114]. A t tlie moment that the input signal crosses zero f r o m negative to
positive values, a pulse is generated and will be modulated with the momentary value of the envelope
at that moment to create the stuniilation pidse t r a i n . I t can be seen ft om the blue line of Fig. A.2(c)
that the pulse magnitufles are also defined by tlie quality of tlie E D but the real-time jicriod of the
fiuidamcutal frequency {/„) can be roughly encoded. Tlus jiroeessor thus re<|iurcs lugh precision
zero crossing iirstaut and high aecuracy envelope detectors.

A.3.3 Peak-Picking Technique

This strategy also contains two layers of oiieratiou ( I and 2). B u t uistead o l detecting the zero-
crossing moments to create the phase-locked pulse train, the occiuTences of peaks i n the input signal
arc detected JUS]. Then; an; two main features difierent fr'oiii the P L - Z C D . First, the nuniber o l
peaks detected is lugher than the number o l zero crossing moments which can be seen ftom tlie blue
118 APPENDIX A. PIIASE^LOCKED PEAK-PICKING SPEECH PROCESSOR

Hues i u Figs. A.2(c) and A.2(d) during 0.;)5s < /, < O.iiTs. This unpHes that more histautaneons
frequency information other than fu can be conveyed to th(; s ü m n l a t i o n electrodes. Second, as we
can see f r o m tlu; jiealfs that always toueh the Hilbert (uivcJope, the B P F output signal and the
detected peaking moments can lx; irsed to generate the .stimulation pulses chreetly w i t h o u t tin; need
lor an E D . For this reason, the precision of the stimidation pulse amphtudes is relayed onto the
precision of a peak-instant detector.

A.3.4 Race-to-Spike Asynchronous Interleaved Sampling

I n this case the '.V^ layer is introduced. I t has been proposed i u [ I I I ] that to aclueve the stocliastie
stimulation behavior, the gray boxes o l Fig. A . 1 arc rci)laced by half-wave rectifier cu-cuits. Then, at
particular repetitive time instants, the amplitudes fiom afi cfiaimels wdl be sent to a winner takes
all ( W T A ) network letting only the strongest amplitude pass to enable the pidse generator. To
avoid sneecssive stimidation w i t h i n one channel that violates the bio-realism spiking behavior [116],
additional circuit bloeks are ins(!rtc<l to create an inhibition. A t the moment that a stimulation
pidse is being generated, there w d l be a signal created and apphed to mlubit the signal f r o m the
half-wave rectifier (witlrui tfie cliaiinel that is being stimulated), so that i t wUl not be processed by
the W T A network at the next time step. Even i f the signal strength of that eliamiel is lughest, it will
be ignored. W i t f i i n tills processor, the amphtude of each pulse is still specified by tlie E D of eacli
cliaiuiel but the location of the stimulated electrode is defined by the strength of the signal at that
moment. The pidse waveform obtained fiom this processor is shovm by the bine fine h i Fig. A.2(e).
To some extent, encoding soinid using tins strategy can emulate tfie random s]iiking beliavior of
tlic uoniial auditory nerve fiber and the perception of music Is expected. I t is uirfortunate that the
system is very complicated, requiring two more additional circuits bloeks.

A.4 System Simulations

M A T L A B was used to simulate afi encoding strategies. Three kinds of sounds were picked up
lor the simulation w i t h a samiilfiig frequency of 11,025 Hz inclndnig the word 'die', the sentence
'the discrele Fourier Iransforni oJ a real value siynal is eonjmiaLe symmetric' and the sung pluase
'Halleluiah'. A n 8-cliamiel 4"'-order B u t t e r w o r t h B P F bank is used for afi strategies w i t h center
frequencies ranging fiom 150 Hz to 4,000 Hz arranged according to the E R B scheme [117].

Each envelope detector is formed by a hiU-wave rectifier followed by a 4"'-order Cliebyshev L P F

w i t h 200 Hz cutolf fiequeney. Tfie envelope detector is appfied lor all processors except PL-PP
since this strategy does not need one. The stuuidation pulses obtainal fi-om cliaimds I to 8 o l
all strategies (sliown i n Fig. A.2 only for the channel) are collected for reconstruction usuig
the spike-based teeluuque [1I1[ (ui this context, spike rcfi:rs to pulse sigual). This teehmque has
its foundation i n prior ncïmopliysiology work showing that the original analog wavcfiirm can be
accmately reconstructed from a S]iikiug wavcfiirm [I18[. W(! therefore use this tecimique for the
signal reconstruction.

Fig. A.3 shows a bloek diagram of this reconstruction teciinique. The stnnulation pulses of each
chamiel are iiiultiplied by luiilormly distributed random noise before injectuig into the B P F w i t h
the same center fi-equency as i n tlie processor. Tlie resulting signals from aU chaimels were added
to produce the outiiut sound.

To exemplify the reconstructed waveforms. Figs. A.4 and A.5 show the reconstrneted soimds of
the word 'die' from the CIS and PL-PP strategies, respectively. The original and reconstructed
A.4. SYSTEM SIMULATIONS 119

(a) Ch.1 output signal

0.00

0.04

-0.08
0.1
(b) CIS

^ A /\ A A r\ f \ A r\ /X

(c) PL-ZCD

(0) race-to.5pike AIS

^. A A A A /A / \ A /-X

0.35 0.36 0.37 0.38 0.39 0.4 0.41 0.42 0.43 0.44
Time, s
LPFanvolope- - . - . . Hilbert envelope Ch.1 signal Stimulation pulses

Figizi'c A.2: Waveforms obtained f r o m different strategies.

Random
noise

Ch.1
Stimulation pulse

Ch2 Reconstructed
Stimulation pulse' ^ BPF 2 H S — ^ sound

Ch.N
BPFN /
Stimulation pulse

Figure A.3: Spike-based reconstruction

120 APPENDIX A. PHASE-LOCKED PEAK-PICKING SPEECH PBOCESSOB

0.6

. 0.4
i
3. 0.2
E ,4-< '!)/' i'^iC'tii i ii'Vi It
w
Tl 0

I -0.2

Z -0.4

-0.6

•0.0
0.1 0.2 0.3 0.4 0.5 0.6 0.7

Time, s

Figure A.4: Reconstructed waveform of the word 'die' f r o m the CIS.

Figure A.5: Reconstructed waveform of the word 'die' f r o m the PL-PP.

signals are represented by the green and blue lines, respectively. Roughly, i t is visible that the
reconstructed signal f r o m PL-PP is closer t o its origin than that of CIS.

The correlation factor ( r ) between the original signal and the reconstructed signal was used t o
estimate the quality of the signals encoded f r o m different strategies. The correlation coefficient is
computed f r o m tfie following equation

J2{X,-X)iYt-Y)
1=0
(A.1)

i=0 V !=0

where Xi, Yi, X and Y are the original, the reconstructed signals, the mean value of X , and the
mean value of Yi, respectively.
 A.r,. DISCRETE-TIME PEAIi-INSTANT DETECTOR 121

Tahk^ A . 1 : C O R R E L A T I O N F O R D I F F E R E N T S T R A T E G I E S

Stralogy 'dw.' Sentence 'hallebijali'

CIS 0.11 0.05 0.02
PL-ZCD 0.30 0.14 0.50
PL-PP 0.47 0.25 0.59
iace-to-K])ik(! AIS 0.49 0.38 0.52

The eorrtJation eo(;thcient varies i n the range of -1 l o I , where 1 indicates a [icrfect correlation, - I
shows the inversely perh;ct correlalkm and 0 re])rcseiits non correlation. The residting correlation
cocfheients obtained Irom different strategies arc shown i n Table A . I . I t Is elear that GIS performs
worst o l aU. Besides, w i t i i i n the results from CIS, the values of r depimd on the complexily of the
original sounds. The highest value o l »• = Ü.1I is from the simpk; word (single tone) and the lowest
7- = 0.02 is f r o m the song wluch contains several tones that CIS could not capture. A m o n g the P L
processors, as expected from the coding mechmiism that conveys more instantaneous iuformatioii
without loss from the non-ideality of the E D (see Fig. A.2(d)), the PL-PP jirovides a better value
of r than P L - Z C D for all cases. The race-to-spike AIS processor gives the best values of r for less
complicated sounds (word and sentence) but for multi-tone sounds (song), the highest value of r is
given by thi! PL-PP iirocessor.

A.5 Discrete-Time Peak-Instant Detector

The comparative study u i the previous section suggests that the PL-PP strategy provides a compact
solution to partially convey the T F S suitable for an ultra,-low-pow(;r analog B E processor. This
section presents a possible compact realization o l a ciictiiit called 'peak-instant detector ( P I D ) '
nsing the Sl tcchniqne outhned i u Part I .

Fig. A.O shows a block diagram of the PL-PP speech processing strategy. I t com|irises four main
elements; a pre-eiupliasis block, a bmid pass fiffer (BPF) bank, a number of PIDs, mid modidators.
The uicoimng sound is pre-eniphasized by nou-linearly auipldyuig i t before entering the bank o l
BPFs. This mechamsm Is adapted from the role of the outer hah' cells that map the wido range of the
iuconiing sonnd pressme onto the limited dynamic range of the ear. The B P F bank roughly mliiucs
the basilar mombrano behavior by decomposing the signal iuto a hmited number (N) o l frequency
bands (cliannek). The peaks of the signal conung from B P F of cac:li clianii(4 w i l l be extracted by
the P I D enabhug the modulator to perform inidti|ilication of a rectangular indse signal and the
peak ampUtu(k;. This results h i a set of rectangular stuiiulatiou pulses of wluch the amplitude is
defined by the peak of the signal of each channel and the pidse fr-equency change according to tlie
spee(4i signal of eacli elianncd.

Note tfiat there Ls a iio.ssibility tbat the residtuig stinndation pulses fidiu different channels can
appear at the same time iutroducing simultaneous hiteractions between stfiiiulation electrodes wliich
degrades the hearing perception. This midcsired nreehaiiisui stdl needs to be eliminated.

Fig. A . 7 shows a ftaction of the .speech signal ft-om the word 'die' after 4"'-order butter-worth B P
filteruig w i t h a center fi-equency of 150 Hz (Ch. 1 of the block diagram i n Fig. A.O). The signal
obtained fronr Ch. 1 of the B P F baidc is represented by the da.slicd line. The H T (wluch is uot part
of the PL-PP strategy) is apphed to tbe dashed line signal and the envidoiie is extracted and shown
by the dotted line. The resulting pidses taken from the output of the modidator are represented by
122 APPENDIX A. PHASE-LOCKED PEAK-PICKINC SPEECH PROCESSOR.

B P F bank

Figure A.G: PL-PP .speech processing bloek diagraur

1 r

Figure A.7: Wavidbrnrs obtained ftom PL-PP strategies.

the solid Ihu;. As we ean see ft-om the peaks that always touch the Hdbert envelope, the detected
peakiug moments of the B P F ontpnt signal can be used to generate the stimulation pulses directly
without the need for a very pnieise envelope detector. T I K ; | 5 r e c i s i o i i reqmrement of the sthnulation
pidse amiilitndes is relayed onto the precision of a P I D instead.

A.5.1 Switched-Current P I D Concept

The basic idea of the proposed P I D is shown by the block diagram i n Fig. A.8(a) [119,120]. I n p u t
signal :),•( is split into two signal paths. First, it goes to the sample and hold ampliher, SHA, (with
a luiity gain) generatuig a half delayed signal, .t,,;. Second, i t goes to the suuunuig node. The
samiik; and hold time period are controUed by a clock signal w i t h 50% duty cycle indicated as the
middle trace o l Figs. A.8(b) and A.8(c). The subtracted result o l .r, aud :r,,/ at the holding period
will <;liange its polarity when ;);(,; rcachis its maximmn and m i i u m u m values. For tlus reason, the
coiii]iarator can decide on its logical output y, according to its uiiiiit sign rcversmg moment. Since
the incoming signal is random, this eoneeiit gives irs two extreme eases of delay time (assnmuig the
comiiarator is ideal).
 A.s. DISCRETKTIME PEAK-INSTANT DETECTOR
12:!

Firstly, tho minhiiiun delay time ( t j ) oce.ms when tho falling edge of tho clock signal is located
exactly at the peak of:!,-, (See Fig. A.8(b)). In this ca.se, the detected y, w i l l not be delayed.

Secondly, the nraxummi delay tim<; ocenrs when tho rising edge of th<; clock is located exactly at
tho peak (Sco Fig. A.8(c)). I n this ease, becomes a h a l l jieriod o l the clock signal. I n practice,
the charge injection error and ontput noise of the; SHA and nuiumum detectable input signal and
delay timo of the comparator introduce adchtkiiial errors, h i eircuit level dejiign, the architectiu'o of
the SHA needs to bo iirsensitivo to the switch eharge injection error aud the resolution and speed
of the comparator need t o be sufficiently good to deckle on its logical out|)ut w i t h i n a half clock
period.

A.5.2 Switched-Current P I D Circuit

Fig. A.9 shows a macro-model o f the proposed P I D . I t comprises a ftilly dilfereutial SI-SHA and
a voltage comparator. The P I D is controlled by two non-overlapping clock phases S, (sampling)
and .^2 (holding). W f i e n the set o f switches S, turns on, the dift'erential input ciuTcnt wiU be
converted into voltages across C'„. h i the next phase, 6', turirs off and the set o f switches 62 turns
on. Both identical C'a w i l l memorize tho voltagi's across them iiroduciiig a c o i L s t a i i t diff'erontial
cmrent via transconductor G',„. The menrorizod cmrent wiU bc compared w i t h the uiiiut current
and converted into a differential voltage at the input nodes of the comparator. The comparator
w i l l make a decision w i t h i n tins phase and generate binary out])ut voltage K„,„. Due to the large
loop gain provided liy voltage ain])lifior tlie voltages across switches S, arc forced to be fixed
at the input common mode level. This loads to signal-Independent charge injection errors after the
(practical MOS) switchcw are turned off and thus w d l be cancelled out by the dift'erential operation
at the input o f the comparator [3|.

The sub-cireiuts used to realize all active elements in Fig. A.9 are shown i n Fig. A.1(1. /!„ is Ibriued
by the eircidt o f Fig. A.10(a) and its output coumion-modc level Vc2 is controlled by the common-
mode feedback ( C M F B ) circuit depicted i n Fig. A.IO(b). G,„ is realized by the circuit i n Fig.A.10(c)
and its output c o u n i K i n - m o d e level Va is controUed by the C M F B <Ircuit i n Fig. A. 10(d). Stability
o f the feedback loop can be maintained liy settuig a fixed ratio o l bias eurrent 1,2 and Im and a
value of C„ t h a t needs to be bigger than the parasitic capacitances present at the input nodes of
A„ and those of 6',,, when the loop is elos(;d |110]. This cmidition can be satisfied by settfiig 1,2
124 APPENDIX A. PIIASKLÜCKED PEAK-PICKING SPEECH PROCESSOR

Figure A.9: Macrouiod<4 of tlu; SI peak-instant detector.

Tabk; A.2: TRANSISTOI^. D I M E N S I O N S

MOSFET W l/tm] L [/un]

A'/i, A'f4, MG, Mg 24 6
h'h, Ms, Mr,, Mr, Ms, Mw 3 3
N M O S MH (CH) II 11
Mil (i 3
A'/l2 3 3
M i 3 , MM, MI;,, MU; 0.5 0.35

= 2.27«i = 220 uA and realizing d by N M O S capacitors liiased i n strong inversion region. We

thus set supply voltage VDD - 1-2 V , counuon-niode voltages Vci I V aud Vc2 = 0.2 V . A h the
transistors hi the entire circuit arc working i n weak uiversion as their parasitic capacitances are
sinaUer compared to those of MOS transistors i n .strong uivc^rsioii region for the same device size.

The comparator is reahzed by the ciremt shown iu F i g . A.11. It is composed o l a differential m p u t

stage followed by a chain o l CMOS inverters to cidiance the overall gahi. Input parasitic capacitors
Cip and Ci,, are employed to memorize the input voltage throughout the whcde sampling period
(switches .S2 are tmiie(koil). I t is w o r t h to mentiomng that the comparator employed here is jnst a
simple lugh gain open-loop amplifier which docs not provide lugh speed and high sensitivity B(4,ler
results can be expected f r o m using a more sophisticated comparator circuit, i f needed.

A.5.3 Circuit Simulation

The P I D eircuit has been designed irsing A M I S 0.35-/i.in CMOS process teclmology parameters. The
bias current of the comparator is set t o IBS^ fiO " A . The total bias current becomes 722 iiA (ex-
cluding that of the bias generator ciremt). This results i n a static power consumption of 806.4 n W .
Dimensions of the MOS transistors used are listed i n Table. A . 2 . Large area transistors are used to
alleviate the mismatch problem of MOS transistors i n weak inversion.

Fig. A. 12 demonstrates the transient response of the proposixl P I D circuit i n the worst case detection
(see Fig. A.8(c)) for a sinusoidal differential input current w i t h an ampUtude of 80 i i A , a 5 kHz
ft-cquency mid a IOO kS/s samphng fiequeney. The input eurrent and the liokhng current arc shown
on the top by the dotted and solid lines, respeetively. There arc large transient ghtches appearuig
at the beginnuig of the holding phases but they do not atleet tlie correct circiut operation. I n tlic
middle grapfi, we can sec that tlu; voltages at tlie input nodes of the comparator are swinghig up
and down crossing each other w i t h i n the first liolduig period after the peak occurred. This operation
yl.5. DISCRETH-TIMË PEAK-INSTANT DETECTOR 125

(c) (d)

Figure A.10: Sub-eircuits of the SHA. (a) Ti-anseonduetor G',„, (b) C M F B eireuit for C,„, (c)
voltage amplifier A„ and (d) C M F B eircuit fi)r /!„.
12(i APPENDIX A. PHASE-LOCKED PEAK-PICKING SPEECH PROCESSOR.

100 r
'hold

m ÜJUUü\n

1Ü0 200 400

Time, us

Figiue A.12: Signal swings within the proijosed P I D ehenit.

is eonsistent w i t h the theory explained earlier but, as we can see from the output wavefornr V„ut
shown m the b o t t o m graph, the conrpmator produces an additional time delay. Also i t cmi be seen
that the delay time for the negative peak is slightly shorter.

I n Fig. A.13, i t Is indicated that the delay times o l the P I D eircuit for both positive and negative
peaks depend on the input amphtude. For very siuaU Input amplitudes less than 50 n A the jiroixised
circuit gives a delay time bigger than 10 /is which is 5% of the peidod of the input signal. Tlus is dne
to the limited resolution of the comparator. For the range of mput amplitude of 50 u A to 100 uA,
the delay time remains less than 5% of the input signal period. The delay time goes up again for
mput amplitudes larger than 100 u A . This is not because of a liimtation of the comparator but of
the SHA. As the internal voltage swings at the uiput o l C,„ go too high, the chargr; injection error
cannot be completely cmiceUed out leading to a wrong decision o l the comparator.

Since the mismatch i n weak inversion is worse than i n strong inversion, a Monte Carlo simulation
has been performed to verify the ciremt operation. For the same condition of the transient re^sponse
shown i n Fig. A.12, w i t h 300 runs, i t gives a nicaii valnes {{x)) and a standard deviation (o) of
8.8 //s and 2.10 /is Ibr the positive p(;ak and (.):> = 8.2 /is and a ^ 2.4 //s for the negative; one.
These unmbers indicate that the delays spread around 5% of the input signal's period.

A.6 Discussion and Conclusions

The system comiilexity and (luality of the recoustrnctcd signals from different signal processing
strategies have been investigated and compared. Tmgeting the desigu of a frilly implantable analog
AM. DISCUSSION AND CONCLUSIONS 127

311

....o... p o s i t i v e pealt
—n— negative peak

30 no 00 Vi) «0 90 100 110 120

Input c u r r e n t a m p l i t u d e , n A

Figure A . l . ' i : P I D delay time versus iuijut amplitude

biouic ear w i t b au ability of tone reeogiutiou, the PL-PP stratcigy provides us the best sohd,ion,
both i n terms o l com]5aetness and coirelation laetors. Sinee the uiformation of hequeney, phase
and TFS cannot be conveyed to the stuniilation electrodes by CIS, it is really hard to believe that
the brain can recognize any tone without proper input inforinatiou. CIS is therefore removed from
o i u consideration.

One may object that the vahies of the correlation factor cannot IOü% guarantee the quahty o l
hearing perception in real B E recipients. We are still optiniLstic that the brain can interpret i i i i d t i -
toiic soiuids from the fast varying information conveyed to the stimulation electrodes by the rest
of the strategies aud that, alter long term training, the patients woidd be able to recognize tonal
languages and melodies.

Regarding the hardware iuipleineutation, an ultra-low-power P I D designed for a PL-PP B E pro-

cessor has been also presented. The instants detecterl m'c delayed within less than one clock period
even 11 the transistors' nusmatch is taken uito account. Either the rising or the falhng edges of
the output signal togrtlicr w i t h the input signal amplitude are expected to be used as control pa-
rameters Ul a stimulator lor coeldi^ar epical electrodes which operates i n the frequency range of
;)()() Hz-f) kHz.

Combining the aforementioned abdity of extracting TFS w i t h the feasibihty of building nltra-low-
power analog hardware, the PL-PP has proven itself as a suitable iirocessor for a coutemporary
fidly uiiplantable analog biomc ear.
 Appendix B

Harmonic Distortion Calculation

for Chapter 3

A t the end of the; sampluig phase;, the nonlinearity of, and the mismateh b(;tweeii eapaeitors Cn,
the mismateh between switches .S'2 and an insufficient L G lead to incomplete switching error com-
pensation. This residual error can b(; niodcl(;d as an in|iut ofrs(;t voltage K,nsvv to G „ , 2 , which
appears during the hold phase only and (;(iuaLs

VoBSVi = VcFT+ - KcFT- (B.1)

where V C F T + and V C F T - are error voltag&s inrhiced by charge; injeetiou and clock-feedtlu'ough effeets
of the M O S switches appearing on the 11011-iuvertuig and inverthig terminals of G',n2, respectively.
Effi;cts of K.Hsw will be shown for the elas.s-A and class-AB circints, respectively, ui the following
Iiaragraph.

During tbe hold phase K,nsw is added to the; differ(;ntial input voltage, M,,, leading t o

/„.^f.itanh(^%ijp), (B.2)

and

/„, = 2 / „ , s i n h ( ' ^ ^ i i ^ ) . (B.:!)

B.1 Class A C S H Circuit

Considering (B.2) we can hnd that

129
130 APPENDIX U. HARMONIC DISTORTION CALCULATION EOR CHAPTER 3

y,„i =- y „ i tanli '„ ] = IBI

(B.4)

where A ^ tanh ( 5 ^ ) = ^ and B = taidi ^ ^

Applying a Taylor series expansion to (B.4), we have

loa = IBI [ « + A {1 - + A' {B' - B) + A' {B' - B ' ) + A-* [B^' - I I ' ) + • • • ] . (B.5)

Aa A^ p>- and B -= -j^, (B.5), ean be arranged to

Ln 'lu

„. . . « = (1 - i - t f ) - - ((fe)' -fe). .... ((fe)" ' (fe)') «..' -

...-((fe)"Afe)")-

Snbstitnting i i j = 4i<'os(w/.) into (B.0), we found lhat

fi.l
cos (ujt)
IBI 'HI
2

( l + cos(2wt))

:i
(3cos(ajt) + COS (3w/.))

/ fu ^ (B.7)
+ 2 cos (2a);.) + cos (4aj<) ) +
I fm

The second, t h u d and fourth harmonic distortions (HD2A, HD34 and H D 4 ^ ) can be exlraclcd from
(B.7) as
 D.2. CLASS-AD CSH CUiCmT 131

HD, (A'/7i),
4(11 4 0,1
"1

and

) .'BI; ..^ I ' M

HD4,4 = (Mil)''
4(ii 4 (Jl
JB,]

A.s =^ taidi (vfc) = ( ^ ï v f ) . if' ''an also be found tliat

tank K.ir.s\v 1 ^.anh^ ' K,flBW ^

V2II„1'T ; 1
H D . , = — ^ : — - (Mil)
1 - taiili^ 1^ K.IIKW \
\2„„Vr J

HD,,„=tanli^U^!i^ (Mlif

and

2n,,VTn - f
HD44 = -(Mil)-'
l-tanli , , , ,.iisw ^
F,4^,J

where M I i = Lni/Jni fs the modulatkin index of the elass-A transeondnetor and /J^j represents the
ainplitiide o f t h e sinusoidal input eurrent ] \ , \ .

B.2 Class-AB C S H Circuit

Considering (B.2), i t can bc expanded that

/od = 27 JJ2 siidi osh ( ^ ) - t cosh f ^ ) . shih f % ^ ) (B.8)

„.„VT \npVr / ynpVrJ \ "„VT J

Since sinh (vft) = 2Lt a"'' ^ ' ' - i " " ' tl'al (^ÏÏKr) = 2 ^ . <•«>> be; rearranged to
132 APPENDIX B. HARMONIC DISTORTION CALCULATION FOR CIIAPTER 3

As VM =- n „ K r a sinh ( 2 ^ ) , (B.9) IxKionics

/n2 //i2 V "7'KT y h n \ \ i i B 2 J J

Applying a Taylor series oxparrsion to (B.1Ü), we have

where ^ ^ ^ 2sinh ( ^ ) , =^ eosh ( ^ ) , 62 ^ ^ ( ^ ^ ) ^ ( ^ ) , = " - d

128 V''J2/

Substituting Aa ^ 4 i e o s ( w t ) into ( B . 1 1 ) , we found that

jlm) 'l "2 ( ) £ , , ( KnHS

/fl5

and

where M I 2 = ?id//r!2 is the uiodidation index of the elas,s-AB transconduetor.

 Acknowledgements

There are many people aud histitutions involved w i t h this PhD research and should be aclmowleged.

First, 1 woidd like to thank Mahanakorn University of Technology, Tliadand, hir my 4-year PhD
s])ousorslup. 1 am also tliaiikhd to Prof, .lirayutli Mahattanakul for lus encouragement and sup-
ports.

I thank S T W and SMAC-it projeet for financing my chip falirications and many conference partic-
ipations.

M y gratitude needs to IK; <;xpressed to Prof. Wouter A . Serdijn, my copromotor, who is more than
a supcrvi.sor, but fiieiid and lamily to me. Under fiis supervision, my imagination that sometimes
seemed absurd could be bended back to be usefid. Apart f r o m his guklance i n research, I have
k;mn(!d and enjoyed a lot f r o m Ins sense of moral and inirsic. Being a part of Biomedical Electroiucs
Group is my valuable ex|iericuee.

I am gratefid to P r o f .lolin Long, my promotor for his professional giiidance throughout the process
of tlus tlKsis writing.

I thank Marion de Vhegcr, E L G A secretary, for her helps u i many aspects, i.e., accomodation, visa,
paper works. I also received many liel]is f r o m Schie, A.F.P. van (Lock) and f^aichoidu, A . (Ali) for
solving computer and Gadeiice-related problenrs. Thanks a lot Lock and A l i .

I receiv(xl supports and fricudslups f r o m the followuig folks: Vaibhav Maheshvari, Gunjan Mandal,
Waughua W u , Y i Zhao, Vincent Bleeker and Michiel Grasluus, ,lin Yaiiyu, Morteza Alavi, Soiiad
Hiseiii, M a r i j n van Dongen, M a r k Stoopman, Duan Zhao, Waiuiaya Ngamkliam/Gee.s-.Taroen Bes,
Yongjia L i , Meiino Vastenholt, W u Gin W h i g , Hossem Tajeddin, Jose M a r i a del Pozo, Yao L i u and
Andre Mansano. I t was really fim worldng w i t h tlicni. Thank you a l l my filends.

K i n d hcljis fiom Senad Iliscni to deal w i t l i tills manuscript preparation are highly appreciated.
Also, the Dutch translation of the thesis suiiimary is made by M a r i j n van Dongen, my ofiico mate.
I am thairkfiil to l u m .

Luca Giangraiide and Susamia Valeiiti, and "Rainbow" band iiiciiibers: Ralubow, Florrie, Sophia
and Anne shoidd also bc nientioned. I thank them for thier w a r m ft-iendsblps and the humy song
that the band wrote for mc.

K i n d supports fi-om my iiarenls and faiiidy membiirs also contribution to my PlrD life. I am indebted
to them.

Finally, my special thmiks go to X i Zhang, who )irovides me love, helps and miderstanding.

fi;!
 Samenvatting

De eisen ten nua/Aca van laag vennogensveibmik en zeer kleine afiiretüigen in draagbare en i m -
planteerbare rnedisebe systemen pldtc^n voor het toepassen van geintegreerde eirenit ontwerpteeli-
lueken die gebnuk maken van MOSFETs die in het subthreshold nigime werkzaam zijn. D i t proef-
schrift behandelt een aantal bekende cu-ciut teclnueken zoals switehed-emTcnt, transcouductanee-
ca])acitance en translineaire circuits, maar past hiervoor CMOS elementen toe <he werkzaam zijn i n
het subthreshokl regime om op die niamer nano-power gdntegreerde circnit ontwerpen te realiseren.
Op basis van de resultaten van d i t onderzoek is een nanopower elass-AB current-mode sample-and-
hold eircuit ontwddteld. Circuit s ü m d a t i e s op basis van ü.l,'i-/nn CMOS model parameters laten
een orde van grootte verbetering zien i n de figin-e of m(!rit vergelclani met andere state-of-the-art
ontwerpen. Daarnaast is het single-branch hlter concept beschreven en de tocjpassing daarvan i n
een banddoorlaat hlter voor audiofrequenties eu een laagdoorlaatfilter voor E C G detectie is onder-
zocfit. Het banddoorlaat- en laagdoorlaatfilter zijn gefabrk:ecrd i n A M S 0.18-/mi CMOS technolo-
gie en metingen laten zien dat de filters werken nw.t ecu voedingsspanning van nundc-r dan 1 V (!n
een statisch verniogensverbruik van slechts enkele n W voor het banddoorlaatfilter (!n nnnder dan
1 n W voor fiet laagdoorllaat filter. Bovendien zijn de figures of nrerit voor liet banddoorlaat- van
laagdoorlaatfilter respcctk;velijk één en drie orden van grootte beter dan andere ontwerpen uit de
recente hteratum'. M e t het oog op de zeer trage variaties i n biomedische signalen is ecu laagdoor-
laatfilter ni<;t een kantclfrcquentie van 1-lOÜHz gerealiseerd dat gebnuk maakt van een modulaire
trausconductantie reductie techniek. Het laagdoorlaatfilter is gefabriceerd i n A M S 0.18-//nr CMOS
technologie. Vergeleken met andere filters voor zeer lage fietiuentics zijn de afiuetingen van deze
eluj) fiet kleinst <;u m(;ting(;n laten een dynairriseh bereik van meer dan 60 dB zien. Teirslottc is dc
ceiste nanopower class-AB current-mode four-quadrant analoge midtiplier ontworpen om ecu zeer
groot signaalb(!reik mogelijk te maken i u een energy-based adiepotentiaal detector. De midtiplier
is gebassficrd op het translineaire pruieiple waarbij gebruik wordt gemaakt van de groot signaal
karakteristieken van CMOS deviees die werkzaam zijn i n het subtlu'csbold regime. Op basis van
eirciut simidaties met 0.13-/iin CMOS modellen kan een ingangsstroom worden verkregen waarvan
de amphtude 10 maal hoger is dan die van de iirstelstroom van het niultipher circiut. De resultaten
van d i t proefschrift, hebben ver.selidleiide bouwstenen (zoaks een sample-and-liold circuit, filters en
een analoge midtiplier) voor systemen voortgcjbraelit. Een volgende stap omvat het toepassen van
deze circuits i n ])raktisehe jirototypes voor biomedische .systemen.
i
 Summary

The reqiuremeiitH for low power cousniiiption and very smaU physical dhueusions i u portable, wear-
able aud implautable medical devices are eaUing for iutegi'ated cu'ciut desigu tecluuques using
MOSFETs operating in the subthreshold regune. This thesis revfsits some well-known circuit tech-
niques, including switclied-ciurent, trarisconductance-eapaeitauce and Iransliuear, but uses CMOS
devices biased i n subthreshold i n order to establish nano-power integrated cucuit designs.

Based ou the findings of this study, a nanopower jiower clas.s-AB curreut-uiode sani])k:-an(khold
ch-cuit has been developed. Circuit sinudations, using Ü.13-//.m CMOS rnodel parameters, show au
order of magmtude improvement i n the figure of merit compared w i t h other state-of-the-art designs.
Also, the concept of suigle-brancli hlters has been formulated, and its apidicatiou to the; design of
a bandpass filter for andio fi-equency, and a low|iass filter dedicated to ECG detection fias been
investigated. Measmemeid.s on tlie bandpass ami lowpass filters fabricated ui A M S 0.18-/mi CMOS
teclmology demonstrate that the filt<!rs operate from a D C siijijdy of less t f i a n 1 V, and consmne a
static power of only a few nW for the bandpa.ss and less than 1 nW for the lowpass filter. Moreover,
tfie figures of merit for tfie bandpass and lowpass filters are found to be one and tiiree orders of
luagnitude, respectively, better t f i m i otiier designs reported i n tlie recent literature.

h i order to deal w i t h very slowly varying biomedical signals, a modidar traiLscondnetance reduction
teehniqiie applied to a lowpa.ss filter w i t l i a cutofi' ficqneucy i n tlie range of 1-100 I f z is imple-
mented. The lowpass filter has been fabricated in A M S 0.18-/jni CMOS technology. The filter chip
measurements show that a dynamic range of more than GO dB can be obtained w i t h the smallest
area oceupk«:l coiupared to other filters designed for very low frequencies.

Fuially, to serve the requircuKiut fiir a very large signal swing i n an energy-based action potential
detector, the first nairopower elass-AB current-mode four-quadrant analog luufiipfier fias been de-
signed. The finidamental operation of the multiplier is based on the traiislinear principle employing
the largosignal characteristics of subtlireshold-biased CMOS devices. A n input current amplitude
10 times higher than the bias em-rent of the multiplier circiut is verified from circuit simulations
using 0.13-/im CMOS model parameters.

As the invcutions foinid fii tliis tfi(sis produced only stand-alone elements (sainpk;-and-hold eir-
cuit, filters, analog multiplier), fiitme work sliould encompass developuig tfie circuits in practical
biomedical system prototypes.

i;i7
About the Author

Chutliain Sawigmi was b o m i n Ucloniliani, Thailand on August 15"', 1978. Ho rocoived tho B.Eug.
and M.Eng. both hi Eloctiical Engineering fiom Uboiiratcliathanee University and Malianakorii
Uruversity of Technology, i n f999 aud 2002, resjioetivoly. From 2003-2007 he was a leetiuer at the
Dopmtiiient of Electromc Engineering, Mahanakorn University of Technology ( M U T ) , Thailand.
Dnring 2007-2012, ho spent time for his PhD study i n the area of low-power analog I C design for
biomedical applications at Biomedieal El«;tronics Group, Electronics Eesearcli Laboratory, Delft
University of Tixlmology. Currently, ho is w i t h tlic! Centre for Bioelectronic hitegrated Systems
and the Department of Elretronie Engfiicering, M U T , Thailand.

139
Bibliography

[1| C. Sawigun aud W . Serdiju, "Ultra-low-power, ela.ss-AB, CMOS l'our-(|uadrant eiurent mul-
tiplier," Eleclronir.a IMte.vH, vol. Aï,, uo. 10, pp. 483-484, 2009.

[2] C. Sawigim and W . A. Serdiju, " A nano-power ela.s.s-AB eurrent multiplier for energy-based
action potential dcjtcctor," in Froc. linropmn Conference on Circuil. Theorij and Desii/n (liC-
CTD 2009), pp. 417 420, Aug. 2009.

[3] C. Sawigun and W . A. Serdijn, " A 24-nW, 0.05-V, 74-dB S N D l l , 83-dB DI?,, clas.s-AB curnmt-
mode sampli! and hold eirciut," in Proc. 30W IEEE International Symposium, on Circuits and
Systems (ISCAS), pp. 3132-3135, ,Iunc 2010.

[4| C. Sawigun, W . Ngamkham, aud W . A. Serdijn, "Comparison o l speech processing strategies

for the design of an idtra low-power analog bionie ear," hi Proc. 2010 Ann.ual International
Conference of the lEEF Enyineeriny in Medicine and Bioloijy Society (EMIIC), [ip 1374¬
1377, Sep. 2010.

|5l C. Sawigun, W . Ngamkham, and W . A . Serdiju, " A n ultra low-power peak-iiistaiit detector
for a peak picking cochlear implant processor," i n Proc. 2010 IEEE Biomedical Circuits and
Systems Conference (BioCAS), pp. 222-225, Nov. 2010.

[0| C. Sawigun and W . Serdijn, "Analysis and design of a low-voltage, low-power, lugli-precision,
class-AB eurrciit-niode subthreshold CMOS sample and hold cucuit," IEEE Tmnsac.lions on
Circuits and Systems I: Rcyalar Paper.i, vol. 58, pp. 1615-1620, .lune 2 0 I I .

|7| C. Sawigun, W . Nganddiam, and W . Serdiju, " A 2.6-iiW, 0.5-V, 52-dB-DR, 4"'-order 6',„-
C B P F : Moving closer to the FoM's huidaiuental linut," in Proc. 2012 IEEE International
Symposium on Circuits and Systerns (ISCAS), pp. 056 -059, May 2012.

[8] C. Sawigun and W . A. Serdiju, " A modular t r a i L s c o n d n e t a n c e reduction technique Ior very
low-Irc(iueiicy 6',„-6' filters," fii Froc. 2012 IEEE International Symposium on Circuits and
Systems (ISCAS), pp. II83-1180, May 2012.

|9| C. Sa.wigiin, S. Hlseni, and W . A . Serdijn, "A 0.45-nW, 0.5-V, 59-dB DR, C ' , „ - C lowpa.ss fiher
for portable ECG recordfiig," in Proc. International Conference on Biomedical Electronics and
Devices, pp. 1 4, Fell. 2012.

|10| H. Fodstad and M . Hariz, "Electricity in the treatment of nervous system disease," in Op-
erative Neuroniodulution (D. Sakas, B. Sunpson, and E. Kraines, eds.), vol. 97/1 of Acta
Neurochirimiica Supplements, pp. 11 19, Springer Viemia, 2007.

[11] Cavallo, "A eonqilete treatise on electricity, i u theory and practice, w i t h original exiicriments."
Iitti)://arcluve.org/detads/coin])letctreatise03cavauoft, 1777.

Ill
142 DIDLIOGRAPIIY

[12| K . Wis<!, A . Sodagar, Y . Yao, M . Gulari, G. Porlin, and K . Najad, "Microolcctrodcs, micro-
electronics, and implantable neural nuerosystems," Proa'.edings of the IEEE, vol. 96, pp. 1184
1202, j u l y 2008.

[13] O. Schanne, M . Lavallc(!, R. Laprade, and S. Gagne, "Electrical properties of glass nucroelee-
trodes," FrocKedings of Ihe IEEE, vol. 56, pp. 1072 1082, juue 1968.

|14] D . Robinsou, "The elc<4rieal properties of metal microclcetrodcs," Procecdimia of the IEEE,
v(d. 56, pp. 1065 - 1071, juue 1908.

]15] M . Ortmauns, A . Rocke, M . Gehrke, and H.-.l. Tiedtke, " A 232-channel epiretinal stimidator
ASIG," IEEE Jourmd of Solid-Slate Cin:wits, vol. 42, pp. 2946 -2959, dec. 2007.

]1G] B. S. Wilson aud M . F . Dormau, "Gocldear implants: A ri;rnarkable past and a brilliant
future," llearimi Research, vol. 242, pp. 3 - 21, 2008.

]17] S. Breit, J. B . Schulz, and A . - L . Benabid, "Deep brain stmiidatiou," Cell and Tissue Research,
vol. 318, pp. 275 288, 2004.

[18] P. R.. Troyk and N . d. N . Donaldsou, "Implantable FES stimidation systems: W h a t is

needed?," Neuromodulalion: Technology at the Neural Interface, vol. 4, no. 4, pp. 196 204,
2001.

]I9] D. Kipkc, W . Shain, G. Buzsaki, E. Fetz, J. Henderson, ,1. Hetkc, aud G. Sdialk, "Advmiced
iiem ot<x:lmologIes for chronic neural interfaces: New horizons and chnical opportmuties," The
Journal of Neuroscience, vol. 28, no. 40, pp. 1I83Ü 11838, 2008.

]20] X . - F . Teng, Y . - T . Zhang, G. Poon, and P. Bonato, "Wearable medical systems for p-health,"
IEEE Reviews in Biomedical Engineering, vol. 1, pp. 02 -74, 2008.

]21] W . H . Organization, "Preventmg chronic diseases: A v i t a l investment.," teeh. rep., W H O

Global Report, 2005.

]22] A . Lymberis and A . D i t t m a r , "Advanced wearable liealth systems and applications-research

and development eilorts i n the Europcian luiioii," IEEE Engineering in Medicine mid Biology
Magazine, vol. 20, no. 3, pp. 29 33, 2007.

]23] R. Harrison, "The desigu o l integrated circuits to observe brain activity," Proceedings of the
IEEE, vol. 96, no. 7, pp. 1203-1210, 2008.

[24[ R,. Harrison, R. Kier, G. Clicstek, V . Gilja, P. Niiyujukian, S. Ryu, B. Grcger, F . Solzbaclier,
and K . Slienoy, "Wirdcss neural recording w i t h suigle low-power uitegrated circuit," IEEE
Ihinsact.ions on Neural Systems and Rehabilitation Engineering, vol. 17, pp. 322 -329, ang.
2009.

[25[ G. G. Eiiz, F. KrnmmenaclKir, and E. A . Vittoz, " A n analytical MOS transistor model vahd
in aU regions of operation and dedicated to low-voltage and low-cm-rent appli<:atious," Analog
Integrated Circuits and .Signal Rroa:ssiny, vol. 8, no. 1, pp. 83 114, 1995.

[26] P. Kiiiget, "Device mismatch aud tradeoffs iu the design of analog cuciuts," IEEE Journal of
.Solid-State Circails, vol. 40, no. 0, pp. 1212 1224, 2005.

]27] G. Eiiz and G. Teiiies, "Circiut tecluuques for rediichig the effects of oji-amp iiuperfcetions:
autozeroiug, correlated double sampluig, and chopper stabilization," Proceedings of the IEEE,
vol. 84, no. I I , pp. 1584-1614, 1990.

]28] C. Toimiazon and J. Hughes, Switched-cmrenls: An analogue ledinique for digital technology,
vol. 5. l E E , 1993.
DIBLlOGRjiPHY 143

[29| P. M . Sinn and G. W . Roberts, " A comparison of first and second-generation swit(4ied-enrrent
cells," in Proc. }!)<)J, lEEJi IlUei-national Symposium on Circuits and Sy.st.cms(lSCAS'9i),
vid. T), pp. 3Ü1 304.

|30| G. Wegmann, E. Vittoz, and F. Raliali, "Gliarge uijection in analog MOS switelies," tEiili
Journal of Solid-State Circuits, vol. 22, no. 0, pp. 1091 1097, 1987.

|31| C. Sawigun and W . Serdijn, "0.7r)-V micro-power Sl memory cell witli fiKxltlirougli cnror
reduction," lE'l' Electronics Letters, vol. 44, no. 9, pp. 501-502, 2008.

|32| .1. B . Hughes and K. W. Moulding, "S21: A switefied-curreiit teeluu(pie for liigli peilormanee,"
lEE Electronics Letters, vol. 29, uo. 10, pp. 1400-1401, 1993.

[3,31 D. Nairn, " A high-hncarity sampling technique for switched-emrciit circnits," IEEE 'Imns-
acl.ions on Circuils and Systems IL Analoq and Diyital Siynal Processinq, vol. 43 no 1
pp. 49 52, 1990.

[34[ E. Saiichez-Sinencio and J. Sdva-Martinez, "GMOS trairsconductance aniplifi(!rs, arelutectnres

and active filters: a tutorial," lEE proceedimis-circuils, devices and systems, vol. 147 no 1
pp. 3-12, 2000.

[;i5[ S. D'Amico, M . Conta, and A . Basclurotto, " A 4.1-niW 10-MHz fonrtli-orcU^r sonree-foUower-
based contuinoirs-tune filter w i t h 79-dB DR.," IEEE Journal of Solid-State Circuils, vol. 41,
no. 12, pp. 2713-2719, 2000.

[30[ 1\-T. Zhang, P.-I. Mak, M . - I . Vai, P.-U. Mak, M . - K . Law, S.-H. Pun, F. Wan, mid R. P. Mar-
t i i L S , " I 5 - i i W biopotential LPFs in Ü.35-GMOS using subthreshold-soiiree-foUower biquads
with and without gain compensation," IEEE Transactions on Biomedical Circuits and Sys-
tems, vol. 7, pp. 090-702, 2013.

[37[ B . Gilbert, "IVanshnear circuits: A proposed classifieatkiii," lEE Electronics letters, vol. I I ,
no. I , pp. 14-10, 1975.

[38[ E. Seevinck and R. J. WiegeriiA, "Generahzed transfinear circuit principle," IEEE Journal
of Solid-State Circuits, vol. 20, no. 8, pii. 1098-1102, 1991.

[39[ Y . Taur, "Tlie incredible shriidiuig trairsistor," IEEE Spectrum, vol. 30, jip. 25 -29, j i d 1999.

[40[ E. V i t t o z and J. Fcllrath, "GMOS analog integxatcd circuits based on weak uiversion ojicra-
tions," IEEE Journal of Solid-State Circuits, vol. 12, no. ,3, ii]). 224-231, 1977.

|41[ A. Woraiiishet and .1. B . Hughes, "Perlbrmance euhauccment of switdied-curreut t<;chniqiie

irsing subthreshold mos operation," IEEE 'Transactions on Circuits and Systems I: Reqular
Papers, vol. 55, no. I I , pp. 3582-3592, 2008.

[42[ A. Annema, B. Nauta, R. van Laiigevelde, and I I . T i i n h o n t , "Analog cucuits h i idtra-deep-

subinieron GMOS," IEEE Journal of Solid-State Circuits, vol. 40, no. 1, pp. 132 143, 2005.

[43[ C. Touinazon, .1. Hughes, and D . PattuUo, "Regidated cascode switclietkciirrent niciuory ccll,"
lEE Electronics Letters, vol. 20, no. 5, pp. 303 305, 1990.

[44] D. Robertson, P. Real, and G. Mangelsdorl, "A wideband 10-bit, 20 Msps pipehned A D G usmg
current-mode signals," in ii?"'- IEEE International Solid-State Circuits Gonference, Digest of
Technical Papers, pp. ICO 161, I E E E , 1990.

[45] O. Landolt, " A n anakig GMOS implenientation of a Kolioncn network w i t h learnuig capabil-
ity," in Proc. An international workshop on VLSI for neural networks and artificial intelli-
gence, (New York, N Y , USA), p j i . 25 34, Pleinini Press, 1992.
144 BIDLIOGRAPtn'

140] L . Marques, W . Serdiju, C. Galup-Montoro, and M . Sehneider, " A switclied-MOSFET pro-

grammable low-voltage filter," i n Proc. 15l.h Sympommn on TnUyinl.c.d Civcuüs and Syslcms
Dcsiyn., pp. 254-257, IEEE, 2002.

(47] .1. Martins and V . Dias, "Very low-distortion fidly dift'erential swit(4ied-curreut memory ciül,"
IliliE Transaclion.1 on Circuits and Systems II: Analoy and Digital Signal Processing, vol. 40,
uo. 5, pp. 040 0411, 1999.

]48] G. Balaefiandrau and P. AUeu, "Switclied-emrent eircuits i u digital GMOS te(4niology w i t f i

low (4iarge-fiijeetiou errors," IEEE Journal o[ Solid.-State Circuits, vol. .'17, uo. 10, pp. 1271
1281, 2002.

]49] P. Gray, P. Hurst, S. Lewis, aud H. Meyer, Analysis and design of analog integmted circuits,
efi. 9. New York: Wiley, 4 t f i ed., 2001.

]50] G. Palnusano and G. Palnmbo, " A novel representation for two-pole feedback amplifiers,"
IEEE 'Dnnsactions on Education, vol. 4 1 , no. 3, pp. 216-218, 1998.

]51] W . Serdijn, The design of lo w- voltage low-power analog integmted circuits and their applica-
tions in hearing instruments. P h D tlusis. Delft imiversity of Teclmology, Delft, 1994.

]52] P. Sliafi and G. Toumazou, " A tlieoretical basis for very wide dyuanuc range switched-cmront
analogue signal proeessijig," Analog Integmted CircuiLs and Signal Processing, v(d. 7, uo. ,3,
pp. 201-213, 1995.

]53] M . Scfilarmann and R. Geiger, "Relatiouslup between amplifier settling time and pole-zero
placements fi)r second-order systems," i n Proc. 4'lrd IEEE Midwest .Symposimn on Circuits
and Systems, vol. 1, pp. 54-59 vol.1, 2000.

]54] O. Oliaei and P. Lounu^an, " G l i t c f i reduction i n second-generation SI circuits," lEE Electronics
Letters, vol. 31, uo. 8, pp. 597 598, 1995.

]55] G. Balacliandran and P. Alien, "Fully dift'erential switclied-cinrent memory eell w i t h low
charge-injection errors," lEE Proceedings-Circuits, Devices and Systems, vol. 148, no. 3,
pp. 157 104, 2001.

]50] Y . Sugimoto, " A realization o l a below-I-V opiuational and 30-MS/s sample-and-hold I C

w i t h a 50-dB signal-to-noise ratio by applying the cmrent-based circuit approach," IEEE
'Dansaclions on. Circuils and Systems I: Regular Papers, vol. 51, no. I , ])p. 110 117, 2004.

]571 Y . Sugimoto and D . G. Haigh, " A cm-rent-mode ciremt w i t h a linearized input V/l conver-
sion scheme and the reahzation of a 2-V/2.5-V operational, 100-MS/s, MOS SHA," IEEE
'Ihinsact.ions on Circuils and Systems I: Regular Papers, vol. 55, no. 8, pp. 2178-2187, 2008.

[58] E. A . Vittoz, "Low-power design: Ways to approach the Imuts," i u Proc. 4 1" IEEE Interna-
tional Solid-State Circuits Conference, Digest of Technical Papers, pp. 14 18, I E E E , 1994.

]59] C. D. Salthouse and R. Sarpesldcar, " A practical micropower jjrogrammable bandpass hfier
for >isc i n bionie ears," IEEE Journal of Solid-State Circuits, vol. 38, no. 1, pp. 03-70, 2003.

[00] P. Corbishley and E Rodrigu(rz-ViUegas, " A nanopower bandpass filter for detection of au
acoustic sigual i n a wearable breathuig detector," IEEE Transactions on Biomedical Ci.rcuiLi
and .Systems, vol. 1, no. 3, pp. 103-171, 2007.

]G1] M . 'Dickwcll and C. PapavassUiou, " A u analog gabor transform using sub-threshold 180-nm
CMOS devices," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 50,
no. 12, pp. 2597 2608, 2009.
DIDLIOGIIAPHY nr.

[02] M . Yang, J. L i u , Y . Xiao, aud I L Liao, "14.4 u W f o u r ü i - o i d e r l)aud]5a,ss filter for biouiedieal
apiilieatioiis," IET Elecbmüca Letlcis, vol. 40, no. 14, pp. 973 974, 2010.

[(i3] A. J. Ca.sson aud E. R.odrignez-Vilkiga.s, " A 00 p W giiiC eoiitinuou.s wavdcd, tran.sforni d r e u i t

1'or portable EEG systeiirs," lEI'Jli journal of solid-slale circuiLi, vol. 40, no. O, pp. 1400 1415
2011.

]04] R. Sarpe.sldcar, G. Salthou.se, J.-J. Sit, M . W . Baker, S. M . Zbak, T . - l \ L u , L . Turieehia, and

S. Balster, " A u idtra-low-jiower progTaiiunable analog biouic ear proci'ssor," IEEE 'Imnsac-
l.ion.s on Biomitdiail Engincerinii, vol. 52, uo. 4, pp. 711-727, 2005.

]ü5] K . Suzuki, H . Miyasliita, M . Suzidti, and G. Nakada, "Goelilear outer liair cell systeiu is a
logarithmic compressor," Bioscience Hypotheses, vol. 2, uo. 2, jip. 09 74, 2009.

[00] D . Jolurs aud K . M a r t i n , Analoy inleymted circuit desiyn. John Wiley & Sons. Inc., 1997.

]07] S. Sohs-Biistos, J. Silva-Marthiez, F. Maloberti, and E. Sanchez-Sinencio, " A 00-dB dynaiiuc-

range GMOS sbctli-order 2.4-Hz low-pass filter for medical applications," IEEE Transactions
on Circuits and Systems II: Analoy ami IHqital Signal Processing, vol. 47, uo. 12, pp. 1391
1398, 2000.

]08] A . VeeravaUI, E. Sancliez-Sinendo, and J. Silva-Martuiez, "Ti-ansconductance amphfier struc-

tures w i t l i very small transconductaiices: a comparative design approacli," IEEE Journal of
Solid-Stale Circuits, vol. 37, no. 6, pp. 770 775, 2002.

]09] X . Qiau, Y . P. X u , and X. L i , "A CMOS eontinnous-time low-pass notch filter for E E G
systems," Aiialoy Integrated Circuits and Signal Processing, vol. 44, no. 3, pp. 231-238, 2005.

]70] S.-Y. Lee and C.-J. Clieiig, "Systematic design and modefing o l a O T A - C filter fiir portable ecg
detection," IEEE Transactions on Biomedical Circuits and Systems, vol 3 no I pp 53-64
2009.

]71] G. Mead, Analog VLSI and neutral systems, vol. 90. Reading, M A : Addison-Wesley Publishing
Co., 1989.

]72] J. Webstei', Medical instrumentation.: application and design. John Wdey & Sons, 2009.

]73] J. Gareia-Nlcbla and G. Serra-Autonell, "Eftects of inadeciuatc low-pass filter apidicatiou,"

Journal of Elcctrocaidiology, vol. 42, no. 4, pp. 303-304, 2009.

]74] P. Kligfield, L . S. Gettcs, J. J. Bailey, el al., "Rei;oiuniendatioiis for tlic standardization

and interpretation o f t h e electrocardiogram," Journal of the American Colleqe of Cardiology,
vol. 49, no. 10, pp. 1109 I I 2 7 , 2007.

]75] P. R. Rijnbeek, J. A . Kors, and M . Witsenbmg, " M i n i m m u bandwidth requirements for

recorrhng of pediatric eloctroem-diogranrs," Circulation, vol. 104, uo. 25, pp. 3087-3090, 2001.

[70] L . Hcjjel and L . KiJlenyi, "The corner fi-eiiucncies of tfie EGG ampfifier kir licart rate vari-
abifity analysis," l'hy.siological metisurement, vol. 20, no. I , p. 39, 2005.

[77[ D . P.yf.lion, A.-S. Porret, and C. Eiiz, " A I V 5"'-order bessel filter d<;dicatcd to digital
standard jiroccsscs," in Proc. IEEE Custom Integrated Circuits, pp. 505 508, 1999.

[78] G. Grocucwold, "Optfiual dynamic range fiitegrators," IEEE Tmnsactions on Circuits and
Systems I: Eundamental Theory and Applications, vol. 39, uo. 8, pp. 014-027, 1992.

[79] Y. TsivklLs, "Externally fiiicar, tuiie-invariant .systems mid their apphcation to companding
signal processors," IEEE Tmnsactions on Circuits and Systems II: Analog and Dii/ilul Siiinal
Processing, vol. 44, no. 2, pji. 65 85, 1997.
14() BIBLIOGRAPHY

[80] E. A . Vittoz and Y . P. Tsividis, "I'Vexiiieiicy-dynainio rangtvpower," i i i Tradc-Offs in Analog

Circail Design, pp. 283-31;), Sjiringer, 2002.

[81| Y . L i , C. C. Poon, and Y . - T . Zliang, "Analog integrated eireuits design for processing physi-
ological signals," lEEL Reviews in iliomedixnl Engineering, vol. 3, pp. 9,3 10,1, 2010.

[82[ B . Linares-Barranco and T . Serrano-Gotarredona, " O n the d(Mign and characterization of

fcmtoaniperc! ciuTent-mode circuits," lEEl'! Journal of Solid-Stale Circuits, vol. 38, no. 8,
pp. 1353-1303, 2003.

[83] I . Pachius, A . Deuiosthenous, and N . Donaldson, "Gomparison of transeondnetanee reduction

tccluu(iu<'S for the design of a very large tinic-<:onstaut GMOS integrator," in Proc. 13"' IEEE
International Conference on Electronics, Circuits and Systems (ICECS'06), pp. 37 40, I E E E ,
2000.

[84] M . Steyaert, P. Kinget, W . Sausen, and J. Van der Spiegel, "Full integration of extremely
large time constmits in GMOS," I'ilectronics Letters, vol. 27, no. 10, pp. 790 791, 1991.

[85[ P. Garde, "Tiansconductanee canceUaticm for operational amplifiers," fEEE Journal of Solid-
Slate Chcmts, vol. 12, no. 3, pp. 3 I 0 - 3 I I , 1977.

[80[ A . El-Mourabit, G.-N. L n , and P. P i t t e t , "Widedinear-range subtlneshold O T A for low-power,

low-voltage, and low-frequency appfieations," IEEE Transactions on Circaits and Systems I:
Regular Papers, vol. 52, no. 8^ pp. 1481 -1488, 2005.

[87[ A . T a j a l l i and Y . Leblebici, "Low-i)owcr and widely tunable linearized biquadratic low-pass
trausconductor-G filter," IEEE 'Transactions on Circuits and Systems II: I'/.rpress Briefs,
vol. 58, no. 3, pp. 159-103, 2 0 I I .

[88] P. Brus<lu, N . Nizza, F. Fieri, M . Sdnpani, and D . Gardlsciani, " A hdly integrated singl(^
ended 1.5 15-Hz low-pass filter w i t h hnear t u n i n g law," IEEE Journal of Solid-State Circuits,
vol. 42, no. 7, pp. 1522-1528, 2007.

[89[ E. Rodriguez-Villegas, A. .T. Ca.sson, and P. Corblsldey, " A subhertz nanopower low-pa.ss
hlter," IEEE Transactions on Circuits and Systems II: E:i:press Briefs, vol. 58, no. 0, pp. 351
355, 2011.

[90[ A. Becker-Gomez, U . GilinKiiogln, and J. Silva-Martinez, "Gompact sub-hertz OTA-G filter

design w i t h mterfacc^trap charge punq)," IEEE Journal of Solid-State Circuits, v o l . 38, uo. 0,
pp. 929-934, 2003.

[91[ R. Rieger, A . Deuiosthenous, and ,1. Taylor, " A 230-nW lO-s tune constmit C M O S uitegrator
fiir an adaptive nerve signal amplifier," lI'iLE Journal of Solid-State Circuits, vol. 39, no. I I ,
pp. 1908-1975, 2004.

[92] A . A r i i a n d , R. FiorcUi, and G. Galup-Moiitoro, "Nmiowatt, sub-nS OTAs, w i t h s u b - I O - m V i n -

put olfset, using series-parallel ciurent mirrors," IEEE Jomiml of Solid-State Circuits, vol. 4 1 ,
no. 9, iip. 2009-2018, 2000.

[93] R. R. Harrison, P. T . Watkins, R. J. Kier, R. O. Lovejoy, D . ,1. Black, B . Grcger, and

F. Solzbacher, " A low-power integiated circuit for a wireless 100-clectrode iieiual rc-corduig
system," IEEE Journal of Solid-State Circuits, vol. 42, no. I , pp. 123 133, 2007.

]941 ,1. F . Kaiser, "On a sfinple algorithm to calculate the 'cnergy'of a siguial," i n Proc. 1990
International Conference on Aarastics, Speech, and Signal Processing (ICASSP-90), pp. 381
384, I E E E , 1990.
 BIBLIOGRAPHY I 1,

|95] S. Mukhopadhyay and G. Ray, "A u«w inUnpieUtion of iioidiiiear eiioigy operator and its
(efficacy in sjiike detixitioii," HiEE Transaclions on Biomediail EnqineerimL vol 45 no 2
lip. 18(1 187, 1998. • > • '

(9(i] J. Hollenian, A. Mislna, G. Diorio, and B . Otis, " A micro-power neural s|iike detector mid
featiu-o extractor in ().13/mi CMOS," in Proe. lEBE Custom Integrated Circuits Conjercnee
(CICC mis), pp. 833 33(i, I E E E , 2008.

[97] B. GossGiii and M . Sawan, " A n ultra low-jiower cmos aetion pot(;iitial detector," in IEEE
International Symposium on Circuits and Systems (ISCAS 2008), ])p. 2733 -2730, I E E E , 2008.

[98] B. Gosseliii and M . Sawan, "Adajrtive detection of aciion potentials irsing ultra kiw-power
GMOS circuits," in IEEE Biomedical Circuils and Systems Gonference (BioCAS 2008)
pp. 209- 212, I E E E , 2008.

|99] G. 4buiuazon, F. J. Lidgey, and D . G. Haigli, eds., Analoy IC desiymthe current mode ap-
proach. London, U K : PcregTiiiirs, 1990.

|I00] E. Yuce, "Design of a simple enrreiit-modc mnlliplier topology using a single C C C I H - , " IEEE
Transactions on Instrumentation and Measurement, vol. 57, no. 3, pp. 631 037, 2008.

[101] C.-G. Chang and S.-I. L i u , "Weak uiverskin ftiur-rpiadraiit midtiplier and lwo-(iuadrant d i -
vider," lEE Electronics Letters, vol. 34, no. 22, pp. 2079 2080, 1998.

[I02| A. G. Kalsiauus, K . N . Glaros, antl E. M . Drakalds, "Insights and advances on the design
o l GMOS siidi conrpaudiiig filters," IEEE Transaction on Circuils and Systems-1: Regular
Papers, vol. 55, no. 9, p j i . 2539-2550, 2008.

(1031 T. Serrauo-Gotarredoiia, B . Linares-Barranco, mid A . G. Andrcon, "A general trarrslinear

pruieiple for suhllireshold MOS transistors," IEEE Tmnsactions on Circuils and Systems I:
Eundamental Theory and Applications, vol. 40, no. 5, pp. 007 616, 1999.

(104| B, S. Wilson, C. C. Fiiiley, D . T. Lawson, R. D. Wolford, f ) . K . Ecklingtoii, and W . M .

Rabinowitz, "Better .speech recogiulion w i t h cochlear implants," Nature, vol 352 no 6332
pp. 230-238, I 9 9 I .

[105] Y . - Y . Kong, R.. Cruz, ,1. A. Jones, mid F.-G. Zeng, "Music perception w i t h temporal cues in
acoustic and electric liearuig," Ear and Hearing, vol. 25, no. 2, |ip. 173-185, 2004.

[I06[ I . Tasaki, "Nerve impulses iu uidividual miditory nerve fibers of giunca pig," ,/. Neurophu-iiol
vol. 17, no. 97, p. 122, 1954.

[I07[ N . Y.-S. Kiang, "Discliargi; iialterirs of single fihers in the cat's anrhtory nerve " t e d i n-p
D T I G Docmrient, 1965.

(108] F.-G. Zeng, "Trends in coclilear ini|ilants," Trends in. amplification vol 8 no 1 pp I 34
2004.

]109] S. Padala and K. Prabhii, "Systolic arrays for the discrete hilbert transform," in lEE Pro-
ceedings on Circuits, Devices and Systems, vol. 144, pp. 259-204, I E T , 1997.

[1I0[ W . Ngmukham, C. Sawigun, S. Hiseni, mid W . A . Serdijn, "Analog complex gmumatone

filter for cochlear implmit diamiels," hi Brocecdinys of 2010 IEEE Intemational Symposium
on Circuits and Systems (ISCAS), pp. 969-972, IEEE, 2010.

[1II[ J.-J. Sit, A. M . Simoirsou, A. J. Oxenhaiu, M . A. Faltys, and R. Sariicslikar, " A low-jiowiir
a.syndiroiious interleaved sampling algorithm for cochlear implants that encodes envelope and
phase information," IEEE Transactions on Biomedical Enqineennq, vol 54 no 1 np 138
149, 2007.
 BIBLIOGBAPm'
148

|112] P. Sc4il<;kli, "Pulsatile <;oelil(a.r implant stinmlation stra,t<^g.y," Oet. 22 2U09. W O Patent
2,Ü09,Ü()2,142.

[113| K . Nie, A . Dareo, and F.-G. Zeng, "Speetral and temporal cues i n eoeldear implant speech
]>erc(!ption," Ear and hearing, vol. 27, no. 2, pp. 208 217, 2000.

[114] ,1. Chen, X. W n , L . L i , and H . Chi, "Simulated phase loeking stimulation: A n improved speech
processing strategy for cochlear implants," DHL, vol. 71, no. 4, pp. 221-227, 2009.

[115] B . S. Wilson, D. T . Lawson, M . Zerbi, and C. Fiidey, "Speech inocessors for auditory pros-
theses," NUI projeel., no. 01, 1994.

[116] M . W . W h i t e , M . M . Merziaueh, and .1. N . Gardi, " M u l t i c h a n n d cochlear implants: Chamiel

interactions and processor design," Archives of OLokirijngology, vol. 110, no. 8, p. 493, 1984.

[117[ B . R. Glasberg and B . G. Moore, "Derivation of auditory hlter shapes from notched-uoise
data," Bearing research, v(d. 47, no. 1, pp. 103 138, 1990.

[118[ R. W(!ssel, C. Koch, and F. Gabbiaui, "Coding of time-varying electric field amplitude modu-
lations i n a wave-type electric hsh," Journal of jieurophysiology, vol. 75, no. 0, pp. 2280 2293,
1996.

[119[ K . Koli and K . Halonen, "Low voltage MOS-trairsistor-only precision c i U T e n t peak detector
w i t h signal independent discharge time constant," i n Froceedinys of 1097 IEEE Inlernalional
Symposium on Citvwits and Systems (ISCAS'97), vol. 3, pp. 1992-1995, I E E E , 1997.

[120[ R. Dlugosz and K . Riiewski, "High-precision analogue peak detector for X-ray imaguig appli-
cations," IET Electronics Utters, vol. 4,3, no. 8, p]i. 440-441, 2007.
 1. Schakelen terwijl de spanning over de schakelaar nul Is is een effectieve techniek om ladings-
injectie en klok-doorspraak in "switched-current" geheugencellen te minimaliseren
(hoofdstuk 2 van dit proefschrift).

2. Een "source-follower" filter is de meest compacte vorm van filter met een enkele stroom-tak
die met MOS-transistoren gerealiseerd kan worden (hoofdstukken 5 en 6 van dit
proefschrift).

3. Preventieve gezondheidszorg vermindert de kosten van medische behandelingen maar

garandeert niet dat mensen gelukkiger leven (hoofdstuk 1 van dit proefschrift).

4. Hoe hard ontwerpers ook proberen de vervorming In het signaalpad te minimaliseren, het
steekt toch iedere keer weer de kop op in iedere communicatie. Er zijn meer redenen om
informatie te vervormen dan methoden om vervorming te reduceren.

5. De software-Industrie houdt van geplande beperkte bruikbaarheid. Fabrikanten van

consumentelektronica zouden echter zich bewust moeten zijn van de consequenties voor
het milieu van versnelde product-cycli, of op z'n minst betrokken moeten zijn in activiteiten
gericht op het onderzoeken van niet-gIftige materialen naast het produceren van producten
met een beperkte levensduur.

6. Wetenschap en technologie kunnen niet effectief voortschrijden in een land dat politiek
instabiel is.

7. Zowel in rumoerige als rustige omgevingen kunnen we van het alleen zijn genieten.

8. Een poging om politieke macht te verkrijgen door te investeren in massa-propaganda is

zinloos in een tijdperk waarin het internet en sociale media op brede schaal gebruikt
worden. Het raadplegen van meerdere bronnen is uitermate eenvoudig en goedkoop.

9. De werkelijke vijand van de Thaise monarchie is de wet die iedere vorm van
majesteitsschennis verbiedt.

Deze stellingen worden opponeerbaar en verdedigbaar geactit en zijn ats zodanig goedgel<eurd
door de promotor, Prof.dr. J.R. Long.
1. Zero-voltage switching is an effective technique to minimize charge injection and clock
feedthrough effects in switched-current memory cells. (Chapter 2 of this thesis).

2. A source follower filter is the most area-compact form of a single branch filter that can be
implemented using MOS transistors (Chapters 5 and 6 ofthis thesis).

3. Preventive healthcare reduces the costs of medical treatments but does not guarantee that
people will live happier lives (Chapter 1 of this thesis).

4. No matter how hard engineers try to minimize distortion in a signal chain, it still persists in
any communication. There are more motives to distort information than methods of
reducing distortion.

5. Software industries enjoy 'planned obsolescence'. However, consumer electronic industries

should be aware of the environmental consequences of accelerated product cycles, or at
least be engaged in non-toxic material research activities as well as producing short-lived
products.

6. Science and technology cannot advance effectively in a country that is politically unstable.

7. We can enjoy solitude in both noisy and silent environments.

8. An attempt to acquire political power by investment in mass propaganda is futile in an era

when the internet and social media are widely used. Cross-checking facts is too easy and
cheap.

9. The real enemy of the Thai monarchy is ' t è s e - m a j e s t é law'.

These propositions are regarded as opposabte and defendable, and have been approved as such
by the supervisor, Profdr. J. R. Long.