174/13 www .engruky.eduyeideajwikibfexefetch phpid=cassest 3A 27% 3A500% 3A defeutcache=cach, i // ¥12x_VARTO_Interrupt.¢ i> // Copyright 2006 Silicon Laboratories, Inc. // pete: //awa.silabs.com / // Program Description: / // This program demonstrates how to configure the C8051F120 to write to and read // from the UART interface. The program reads a word using the UARTO interrupts // and outputs that word to the screen, with all characters in uppercase / 1 How To Test: f // 1) Download code to a 'F12x device that is connected to a UART transceiver // 2) Verify jumpers J6 and J9 are populated on the 'Fl2x TB. // 3) Connect serial cable from the transceiver to a PC // 4) On the PC, open HyperTerminal (or any other terminal program) and connec! // to the COM port at and 8-N-1 // §) Download and execute code on an 'Fl2x target board // 6) Type up to 64 characters into the Terminal and press Enter. The MCU // will then print back the characters that were typed / / // Targe ceosiFi2x // Tool chain: Keil C51 7.50 / Keil EVAL C51 // Command Line: None / // Release 1.0 // ~Initial Revision (SM) // -11 JULY 2007 / Me // Includes Me #include // SPR declarations Hinclude Me // 16-bit SPR Definitions for 'F12x i sfrl6 RCAPZ strié TMRZ oxea; // Timer? capture/reload Oxee; ff Timer? i> // Global Constants i ¥define BAUDRATE 115200 // Baud vate of UART in bps // SYSTEMCLOCK = System clock frequency in Hz ¥define SYSTEMCLOCK (221184001 * 9 / 4) wow engruky ey ideajkbexeftch ph asses 34 27% 2AS99% 2A defaultcace174/13 www .engruky.eduyeideajwikibfexefetch phpid=cassest 3A 27% 3A500% 3A defeutcache=cach, void OSCILLATOR_Init (void); void PORT_Init (void) void UARTO_Init (void); ERSIZE 64 char UART_Buffer[UART char UART Buffer Size unsigned char UART ansigned UART unsigned char TX R void main (void) SFRPAGE = CONFIG PAGE; WDTCN = OxDE; // Disable watchdog timer WDTCN = OxAD; OSCILLATOR Init 0; Jf Initialize oscillato: PORT Init 0); // Initialize crossbar and GPIO UARTO_Init (); // Initialize UARTO SPRPAGE = UARTO_PAGE; while (1) // If the complete word has been entered via the terminal followed // ey carriage return 1) 6s (VART_Buf 0) 6s (Byte 13)) et the flag to zere // Set transmit flag to 1paps i> // OSCILLATOR_Init i> // Return Value // Parameters None None Vf This // source, ww engruky.edujmideajwikiofexefech ppid=casses 3A 27% 3A500% 3A defauticache=cach function initializes the system clock to use the PLL as its clock where the PLL multiplies the external 22.1184Mlz crystal by 9/4. (void) void OSCILLATOR_Init ‘ int is char SFRPAGE_SAVE = SFRPAGE; SFRPAGE = CONFIG PAGE; OSCICN = 0x80; CLKSEL = 0x00; / / / / / / / Software timer Save Current SFR page Set SFR page Set internal oscillator to run at its slowest frequency Select the internal osc. as the SYSTEMCLOCK source // Initialize external crystal oscillator to use 22.1184 Miz crystal OSCKCN = 0x67; for (1-0; i < 2867 itt) while (1 (OSCXCN & 0x80)) SFRPAGE = LEGACY PAGE; FLSCL |= 0x30; if (SYSTEMCLOCK = 25000000) { // Set FLASH read timing for <-25Milz PLSCL, ) else if ~0x30; (SYSTEMCLOCK PLSCL &= ~0x20; ) else if (SYSTEMCLOCK // Set FLASH read timing for < PLSCL &= ~0x10; ) else { PLSCL &= ~0x00; ) // Start PLL for 50MHz operation SPRPAGE = PLLO_PAGE; PLLOCN = 0x04; PLLOCN |= 0x01 PLLODIV = 0x04; PLLOFLY &= ~Ox0f; PLLOFLT Ox0f; wow engruky ey ideajkbexeftch ph 50000000) // Set FLASH read timing for <=S0Miz 75000000) 75M / / / / / / 1 1 / / / / / asses 34 27% 2AS99% 2A defaultcace Enable external crystal osc. Wait at least Ims Wait for crystal osc to settle Initially set FLASH read timing for 100MHz SYSTEMCLOCK (most conservative setting) set FLASH read timing for <=100MH2 Select EXTOSC as clk source Enable PLL power Divide by 4 Set Loop Filt for (22/4)MHz input clock ch