Professional Documents
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14
Faults in LVDC microgrids with front-end
converters
Technical Application Papers
2 System configuration.............. 11
2.1 Front-End Converter (FEC)...................... 11
2.2 System description................................. 11
3 Fault analysis................................... 15
3.1 Short circuit on DC side of the
front-end converter................................. 15
3
.2 Ground fault on DC side of the
front-end converter................................. 28
3.3 Short circuit on AC side of the
front-end converter................................. 42
3.4 Ground fault on AC side of the
front-end converter................................. 44
1
Technical Application Papers
Introduction
New scenarios in electrical distribution networks, with As a consequence, probability of DC fault is quite low,
increasing presence of distributed generation and loads and used to be neglected in many designs.
Introduction
with strict power quality requirements, include DC mi- Nevertheless, in the new scenarios described above,
crogrids with energy storage systems as a replacement extension of the DC section becomes more and more
for traditional AC systems. significant.
DC electrical distribution offers several advantages com- In some application, DC distribution even covers the
pared to AC in many applications, such as data centers, majority of plant extension (e.g. this happens in marine
marine installations and in addition in low voltage distribu- applications, in DC microgrids, and in DC data centers).
tion in the presence of distributed generation and storage. In these cases, probability of a fault in the DC section
Battery energy storage systems and distributed genera- is no longer negligible, and such faults need to be dealt
tion such as PV plants or wind microturbines, and their with by proper analysis and protection design.
related electronic converters, affect system behavior
both during normal operation and in the presence of Conventional wisdom is that converters limit currents in
faults, in different ways depending on different possible any situation, hence the fault current level is no longer
grounding schemes. a concern in circuit design. While this might indeed be
Most converter systems are actually based on double the case for some specific situations, there are others
conversion: a DC-Bus is interposed between power in which converters are not able to limit fault currents.
electronic-based subsystems. This depends on type and connection of converters, as
In such an arrangement, the DC section is typically of lim- will be shown.
ited extension and totally enclosed in a single switchgear. Some most common types of power converters are
Introduction
– three phase thyristor rectifier, which converts the whole
of the input waveform to one of constant polarity (posi-
tive or negative) at its output. Thyristors are commonly
used instead of diodes to create a circuit that can AC Grid M
If, on the other hand, the fault is on the DC side, fault switched, with serious problems to devices connected
current flows in the freewheeling diodes without any to the DC-Bus.
Introduction
possibility for the IGBTs to limit it, even if an IGBT block It is thus apparent that the naive statements that fault
signal is sent by the control system (Figure I.2). currents are of no concern and that protection can be
Similar situations occur in all cases in which short circuit fully implemented by converters is not generally true. A
current path can include freewheeling diodes, hence all number of realistic cases exit in which converters can't
AC/DC IGBT converter, step-up and DC/DC bidirectional limit ground- or short circuit fault current.
converters may suffer from this effect. A thorough analysis of fault conditions and dedicated
Moreover, a similar effect may take place in the case of protection devices must therefore be used to safeguard
a DC ground fault in a microgrid with the neutral point installation and operator safety.
of the MV/LV transformer grounded or DC negative pole This Technical Application Paper deals with fault analy-
grounded. Both grounding configurations are widely used sis and protection in LVDC microgrids with front-end
as they guarantee operation safety from overvoltages. converters. In particular, Chapter 1 explains the main
However, when a ground fault occurs, the front-end con- advantages of LVDC microgrids; Chapter 2 shows the
verter may not be able to limit the AC grid contribution to description of the system configurations; Chapter 3
the fault current, even if the DC generators contribution deals with the short circuit and ground fault analysis both
may be switched off by IGBT block (Figure I.3). in case they occur on DC and AC front-end converter
It must be pointed out that ground faults are far more side, highlighting the situations in which the converter
frequent than short circuits in electrical installations, cannot limit fault currents; finally, Chapter 4 presents the
hence DC ground fault are expected to become more solutions offered by ABB to protect the plants against
and more frequent as DC section of installations extend. DC fault.
Similar cases can be made for several other configura- This Technical Application Paper includese three an-
tions of converters. nexes with the description of the main power-electronic-
Thyristor rectifiers, which are immune from this issue, switches, the main converter control methods, of the
can't be applied as front-end converters in DC distri- analyzed system electrical parameters, of the DC fault
bution with distributed generation, because in case of contribution of other types of converters.
reversal of power flow, they require voltage polarity to be
V1 I1 L R Ri
V2 DC Load
I2 L R +
Rsc Eo
V3 I3 L R
Figure I.3 – DC positive pole ground fault current path in an active LVDC microgrid with the neutral point of the MV/LV transformer grounded
V1 I1 L R Ri
V2 DC Load
I2 L R +
Rg Eo
V3 I3 L R
1.1 Sensitive electronic loads 1.3 Cables and maximum transmissible power
1 Advantages of Low Voltage DC distribution systems
Commercial buildings, such as office buildings, often A grounded three-phase AC system requires five wires—
have a large amount of nonlinear electronic loads, such three phase conductors, one neutral, and one ground. A
as lighting, computers, monitors, and adjustable-speed DC system requires three wires—two phase conductors
drives for air conditioning. and one ground. An existing five-wire AC cable in a retrofit
Special office buildings, such as banks and data centers, DC system can be used in two different configurations.
have critical computer systems which must be operating The first is to use two wires for each pole and one for
“24-7” and must not be affected by transients and out- ground.
ages on the utility power grid. The other alternative is to use one for each pole, two
A common way to protect these loads is to install on- for neutral and one for ground, with the load connected
line uninterruptible power supplies (UPSs) and standby between one pole and neutral.
diesel-generator sets. The UPSs are used to protect the Considering the maximum transmissible power, the DC
loads from transients and short interruptions with dura- distribution solutions (distribution with 2 or 3 conductors)
tion up to approximately 0.5 h. may be compared with the traditional AC distribution, that
The losses of a UPS are in the range 5–10%. in Italy is usually made by three-phase cable lines with
The installed UPSs must also be able to handle distorted 4 conductors (3 phase conductors and the neutral with
currents from nonlinear loads, and they must therefore a smaller cross section), with a nominal voltage of 400V.
be overrated. The transmissible power for the various systems can be
If, instead, DC distribution is used, a single converter is expressed as follows:
utilized to supply the loads, and additional losses can be – traditional AC - =
reduced. Since loads are supplied with DC, the rectifiers – DC with 3 conductors - 3 = 2∙ 3∙ 3
inside the loads can be removed and the losses can be – DC with 2 conductors - 2 = 2∙ 2
lowered. where VDC3 is the voltage between the positive or nega-
tive pole and neutral conductor, while VDC2 is the voltage
between the two poles. Assuming VAC = 400 V; VDC3 =
1.2 Distributed generation 400 V; VDC2 = 800 V, for the comparison between the AC
and DC distribution, the following hypotheses are made:
The number of alternative generation sources connected – the cables, with the same section in all the examined
to the distribution system increases. Some of them, such cases, are loaded up to their thermal limit current, so
as photovoltaic and fuel cells, produce DC, and they can that IAC = IDC3 = IDC2;
easily be connected to a DC distribution system directly, – the whole load is connected at the end of the line and
or through a DC/DC converter. Microturbines generating the possible presence of DG is neglected;
high-frequency AC are also easier to connect to a DC – the power factor of the AC loads is 0.9.
system than to an AC system, where generating a syn- The comparison between the two systems, AC and DC
chronized sinusoidal AC current is required. The electric with 3 conductors, shows that in DC a power 1.28 times
power output of a wind turbine can be kept at a maximum larger than that in AC can be transported.
if the speed of the turbine is allowed to vary. If the shaft The same result is obtained in case of 2-wire DC distri-
is connected to the generator through a gearbox, the bution system.
ability to vary the speed is limited. To increase the speed The relationships between the AC and DC transmissible
range, an AC/DC/AC converter can be used, which is an powers are the following:
expensive solution. A cheaper and simpler solution is to
3 2∙ 3 2 2
connect an AC/DC converter to a DC grid. Other types of = = [1.1]
generators operating with varying speed are small hydro 3∙ ∙ 3∙ ∙
and tidal generators.
By increasing the length of the line, the DC solutions can
Using a DC distribution system makes it easier to incor-
transport an amount of electric power up to 2.2÷3.9 times
porate more local energy storage and sources, either
the one in AC. It can be concluded that with the same
standby power generation, which is used only when there
extension of the distribution network, the DC solutions
is a fault on the utility grid, or distributed generation (DG)
can supply a larger load, while with the same load, the
(small-scale energy sources) which are operated more
DC distribution systems can have a greater extension
or less continuously.
than the AC one.
To connect an energy source to a DC system only the
voltage has to be controlled.
Distribution in such a plant can be carried out in DC at – higher efficiency, due to minor losses in the converters
380V, with the advantages shown in Figure 1.3. and cables. In particular:
1 Advantages of Low Voltage DC distribution systems
AC DC AC AC DC DC CPU AC DC DC DC CPU
AC 48 Vdc
Utility Utility
Grid Grid
Battery Battery
DC system
ICT
DC UPS Equipment
AC DC DC DC CPU
380 Vdc
Utility
– Easy integration with
Grid
Battery renewable energy
resurces
2000 a) b)
1000
500 Besides, the transverse path hand-to-hand is less
1 2 3 4
200 dangerous than the longitudinal path hand-to-foot,
100 independently of the direction of the direct current: to
50
start ventricular fibrillation in the hand-to-hand path the
current required is 250% of the ascending current with
20
hand-to-foot path.
10
0.1 0.5 1 5 10 50 100 500 1000 5000 I
On the whole, direct current is however less dangerous
(mA) than alternating current as it can be deduced also by the
1 usually absence of reactions up to the threshold of perception (fingers) voltage values reported in Table 1.1 and considered as
2 usually no harmful physiological effects up to the threshold of tetanization
3 generally reversible physiological effects may occur; they increase as
safe: they are higher in DC than in AC.
current intensity and time increase. They are: muscular contractions,
breathing difficulties, increase in the blood pressure, troubles in the for- Table 1.1 – Safety voltages
mation and transmission of cardiac electrical impulses, atrial fibrillation
and temporary cardiac arrest included, but without ventricular fibrillation
Direct Indirect
4 likelihood of ventricular fibrillation, cardiac arrest, breathing arrest, seri-
ous burns. Curves c2 and c3 correspond to a probability of ventricular contact contact
fibrillation of 5% and 50% respectively.
Alternating current (rms) 25V 50V
Figure 1.5 – Hazard zones of direct current
Direct current 60V 120V
t
(ms)
a b c 1 c2 c3 The DC systems at a voltage lower than 60V are to be
10000
regarded as safe if they are either SELV or PELV, namely, if
5000
they are separated from the network through an insulation
2000 transformer and by the other circuits through a double or
1000 reinforced insulation or by a shield connected to earth.
500 The limit of 60V is to be referred to the voltage between
1 2 3 4
200
the pole of the system in a two-terminal contact. In case
100
of one-terminal contacts, the hazard would depend on
50
the voltage to earth. In principle, at the same voltage
level, a ground-isolated system is less dangerous than
20
a system with one pole earthed, but it is dangerous
10
0.1 0.5 1 5 10 50 100 500 1000 5000
anyway, due to the leakage currents, which grow as the
I
(mA) DC system expands.
Direct current can flow from head to foot (descending
current) or vice versa (ascending current), considering by
convention the direction of the current that of the positive
1.6 Elimination of synchronization Therefore, the electric grid is conceived in AC since the
grid has been designed to support conventional loads
1 Advantages of Low Voltage DC distribution systems
Last, but not least, the elimination of synchronization is for more than a century, basically induction motors and
a significant advantage of a DC system when compared other AC appliances.
with AC. Furthermore, in order to transmit electricity with mini-
AC current sources must be carefully synchronized before mum losses, the voltage has to be increased, which
they can be connected. was previously only possible by using AC transformers.
A failure to synchronize can result in catastrophic current After one century, the contemporary residential loads
and forces, as two sources work against one another. have been changed a lot, but the electric grid practically
At best, such events result in shutdown of the power stayed intact.
system; at worst, there is significant damage to the gen- This implies that every time we plug-in one of these new
eration, distribution, and control components. loads to the grid, a conversion stage from AC to DC is
Preventing this damage requires the installation of syn- required. Besides, generation also changed from big
chronization relays and control schemes. synchronous generators in power plants to small solar
This is a straightforward task with two sources, but it can panels, fuel cells, or batteries, which are essentially DC
become complex and unstable with increasing numbers sources.
of sources. Even micro-wind or gas turbines are more efficient by
DC systems, because of their constant voltage, do not using only one converter (AC/DC) instead of two back-
exhibit this issue. Paralleling multiple sources in a DC to-back converters (AC/DC and DC/AC).
system requires no control. This will naturally lead to an emerging grid in which mi-
Thus, a DC system is uniquely suited for applications crogrids and distribution systems at homes and buildings
where multiple sources must work together. would be done in DC.
Systems that include utility power, batteries for back up, With home microgrids, now AC and in the future DC,
and variable “green” sources such as solar, wind, and electrical vehicles will be also playing an important appli-
fuel cells can be easily and reliably integrated in a DC ance role at home, given the DC onboard energy storage
architecture. systems and emerging DC charging stations.
A new scenario could be to build a hybrid DC and AC
grid at distribution levels, to couple DC sources with DC
1.7 Perspective of LVDC distribution systems
loads and AC sources with AC loads.
This hybrid structure would reduce the multiple conver-
and microgrids sions to a minimum.
Moreover, the connection of all DC loads to the DC side
With the several advantages explained in the previous of the hybrid grid would make it easy to control harmonic
sections, LVDC distribution systems and microgrids are injections into the AC side through the main converters,
becoming a good alternative, since they perform better thus guaranteeing high-quality AC in the utility grid.
in terms of efficiency, scalability and stability. Moreover, Finally, the DC grid could solve negative and zero se-
by observing the residential energy consumption pattern, quence current problems caused by unbalanced loads in
we may discover that major part of our consumption AC distribution systems, and the neutral wire in subtrans-
loads are becoming more and more DC, e.g., laptops, mission might be eliminated and the related transmission
cellphones, LED lights, displays, etc. losses reduced.
Even the conventional AC loads driven by AC motors, This revolution can be seen as a “back-to-Edison” phe-
such as washing machines, refrigerators, air conditioners, nomenon, which is already happening in high-voltage
and industrial equipment, are being gradually replaced direct current (HVDC) systems and is becoming a reality
by AC motors with inverters to control the motor speed in LV and MV distribution systems.
and save energy.
2 System configuration
important to describe its configuration with the several The error signal, created by the comparison, represents
electrical devices that areconnected. the main input of the whole control system; the error
This is the topic of this Chapter, along with the descrip- signal is used to manage the ON/OFF control of the six
tion of the system arrangements regarding the ground electronic components. In this manner, the power may
connection combinations that will be considered during flow from the AC side to the DC side and vice versa,
a ground fault. depending on the DC voltage requirements.
When Idc is positive (rectifier operation mode), the Cdc
capacitor discharge occurs and the error signal requires
2.1 Front-End Converter (FEC) by means of the control block a higher power from the
AC source.
Forced commutated three-phase rectifiers are AC/DC The control block allows a power absorption from the
converters using IGBTs (Insulated Gate Bipolar Transis- AC source by creating an adequate PWM signal for the
tor), i.e. electronic components with both closing and electronic components control. In this manner, a higher
opening commands that allow the converter control current flows from the AC side to the DC side to fulfil the
depending on needs (see Annex A). higher power request of DC loads and the DC voltage is
Electronic component commutation (from ON to OFF brought back to the desired value.
position) occurs hundreds of times per period, so it On the contrary, when the Idc becomes negative (inverter
guarantees performances that otherwise could not be operation mode), the DC voltage tends to increase, so
reached with thyristors. This characteristic gives the the capacitor is overloaded and the error signal requires
following advantages: the capacitor discharge by means of the control block,
– current or voltage may be modulated (PWM – Pulse returning power to the AC source.
Width Modulation, see Annex B) producing a low har- The PWM control logic permits not only active power
monic contribution; control but also the reactive one, allowing power factor
– the power factor may be controlled and it may follow correction by means of the converter.
an established profile; Moreover, the AC current waveform may be maintained
– power reversal occurs by means of voltage reversal in almost sinusoidal, reducing the harmonic contribution.
thyristor rectifiers, while forced commutated rectifiers It is important to note that, while the IGBTs can be opened
may be used both for current reversal. and closed by the control system, the freewheeling di-
Usually, the FEC works by maintaining the DC voltage at odes cannot be controlled.
a desired reference value, using a feedback control loop,
as shown in Figure 2.1.
V1 I1 L
V2 I2 L
Vdc
Cdc DC Load
V3 I3 L
–
error + VdcREF
CONTROL BLOCK
2.2 System description For simulation purpose, the DC poles short circuit and the
2 System configuration
Figure 2.2 –Microgrid scheme with MV/LV transformer neutral point grounded for DC ground fault analysis
Iconvdc1
Idc Idc1
V1 Iac1
I1 Lc Rc Cdc
AC/DC Rdc Isc
MVAC V2 I2 Lc Rc Isc’ Iac2 Incoming Icap
Front-End Vpole+
Utility filter M Vdc
V3 I3 Lc Rc Iac3 Converter Cdc
Rdc
N
Vpole-
Iconvdc2 Ig RI
Vconv
AC load RL E0 + PPV/Vdc
DC load Energy PV plant
storage
Ig system
S1 PE
S2
2 System configuration
Iconvdc1
Idc Idc1
V1 Iac1
I1 Lc Rc Cdc
AC/DC Rdc Isc
MVAC V2 I2 Lc Rc Isc’ Iac2 Incoming Icap
Front-End Vpole+
Utility filter M Vdc
V3 I3 Lc Rc Iac3 Converter Cdc
Rdc
Vpole-
Iconvdc2 Ig RI
Vconv
AC load RL E0 + PPV/Vdc
DC load Energy PV plant
storage
Ig system
S1 PE
S2
Figure 2.4 –Microgrid scheme with DC mid-point grounded for DC ground fault analysis
Iconvdc1
Idc Idc1
V1 Iac1
I1 Lc Rc Cdc
AC/DC Rdc Isc
MVAC V2 I2 Lc Rc Isc’ Iac2 Incoming Icap
Front-End Vpole+
Utility filter M Vdc
V3 I3 Lc Rc Iac3 Converter Cdc
Rdc
Vpole-
Iconvdc2 Ig RI
Vconv
AC load RL E0 + PPV/Vdc
DC load Energy PV plant
storage
S1 Ig system
PE
S2
Figure 2.5 –Microgrid scheme with DC negative pole grounded for AC ground fault analysis
2 System configuration
Iconvdc1
Idc Idc1
V1 Iac1
I1 Lc Rc Cdc
AC/DC Rdc Isc
MVAC V2 I2 Lc Rc Isc’ Iac2 Incoming Icap
Front-End Vpole+
Utility filter M Vdc
V3 I3 Lc Rc Iac3 Converter Cdc
Rdc
Vpole-
Iconvdc2 RI
Ig’ Vconv
+
RL E0 PPV/Vdc
AC load
Ig’ DC load Energy PV plant
storage
S1 system
PE
S2
3 Fault analysis
ground fault) in order to highlight the trends of voltage voltage at the nominal value.
and currents quantities in the several parts of the electri- As a consequence, the FEC fault contribution is close to
cal plant and in the FEC electronic components; since the nominal current value of the FEC itself.
there are situations in which the FEC is not able to control With an Rsc = 100 Ω, as a result of the short circuit that
and limit the fault currents, such currents will have to be occurs at t = 0.5s, we may note how the Vdc voltage is
detected and interrupted by means of protection devices. brought back to the nominal value by the FEC control
On the DC side, we’ll consider in detail the conditions of (Figure 3.1) and how the presence of the fault causes an
DC poles short circuit and ground fault of one pole in the increase of the AC current absorbed Iac1 (Figure 3.2) and
several grounding configurations explained in Chapter consequently of the DC current supplied Idc (Figure 3.3);
2. In particular, the theoretical fault contribution of the however, both Iac1 and Idc remain lower than their respec-
ESS and PV plant and the repercussions on the FEC tive nominal currents, i.e. Iacn = 144A (and cosᵠ = 1) e
will be analyzed. Idcn = 125A.
On the AC side, we’ll consider the fault contribution sup-
plied by the LVDC microgrid through the FEC during a Figure 3.1 – Trend of Vdc voltage during a short circuit on DC side
in Case 1a
three-phase short circuit and single-phase ground fault
conditions, in case of the neutral point of the transformer 900
isolated from the ground and the DC negative pole di- 850
750
700
650
600
550
0
so the FEC operation will be free from effects due to the
-50
circulation of a zero-sequence current in its electronic
-100
components. It is assumed that the short circuit occurs
-150
immediately downstream the FEC DC terminals at the
-200
DC-Bus beginning point, which is the worst case as usual -250
considered in short circuit calculations. With decreas- 0.4 0.45 0.5 0.55
t [s]
0.6 0.65
The FEC control remains in linear modulation and, with Figure 3.7 – Zoom of the current in electronic component of the first leg of
the cathodic star during a short circuit on DC side in Case 1a
reference to the conventional current paths of Figure 3.4,
3 Fault analysis
250
the electronic components are still PWM controlled; in
particular, the current in the electronic components of 200
the first leg of catodic star Isw1 and of the anodic star Isw2
150
(positive current through the IGBT, negative one trough
the freewheeling diode) are respectively shown in Figures
Isw1 [A]
100
3.5-3.6. Instead the zooms of such currents are depicted
in Figures 3.7-3.8 so as to highlight the PWM control. 50
0
Figure 3.4 – Conventional currents direction into the FEC electronic com-
ponents
-50
0.65 0.651 0.652 0.653 0.654 0.655 0.656 0.657 0.658 0.659 0.66
Isw1 Isw3 Isw5 t [s]
V1 L Isc Figure 3.8 – Zoom of the current in electronic component of the first leg
I1 R Iac1
anodic star during a short circuit on DC side in Case 1a
V2 I2 L R Iac2
Rsc DC Load 50
V3 I3 L R Iac3
0
Isw2 Isw4 Isw6
Isw2 [A]
-50
-100
-150
Figure 3.5 – Trend of the current in the electronic component of the first
leg of the cathodic star during a short circuit on DC side in Case 1a -200
250 -250
200 0.65 0.651 0.652 0.653 0.654 0.655 0.656 0.657 0.658 0.659 0.66
t [s]
150
100 The short circuit current Isc may be calculated by the ratio
50 Vdc/Rsc = 800/100 = 8 A (Figure 3.9): it is a low current that
Isw1 [A]
150
5
100
4
50
Isw2 [A]
3
0
2
-50
1
-100
0
-150 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s]
-200
-250
0.3 0.5 0.55 0.6 0.65 0.7
t [s]
3 Fault analysis
250
converter control system limits the current absorbed 200
from the AC side to a preset maximum value; hence, 150
active power transferred to DC side is limited as well: as 100
a consequence, Vdc cannot be maintained to its rated 50
Iac1 [A]
value, but decreases with decreasing values of Rsc. 0
With Rsc = 30 Ω, as we can see in Figure 3.10 in steady- -50
25
where Vconv50Hz is the rms-value of the fundamental frequency
component of the phase to ground incoming FEC voltage 20
waveform shown in Figure 3.13. As we can see from (3.1),
Isc [A]
600
400
200
V1, Vconv [V]
900
-200
850
800 -400
Vdc [V]
750 -600
0.6 0.61 0.62 0.63 0.64 0.65 0.66 0.67 0.68 0.69 0.7
700 t [s]
650
600
550
500
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s]
The FEC control system works correctly in linear modu- In the system analyzed, since V1 = 230V, the minimum
lation (Figure 3.14) and also the trend of the phase- linear modulation voltage is equal to Vdc1 = 650V. With
3 Fault analysis
to-ground voltage at AC converter terminals remains Rsc = 5 Ω, the DC-Bus voltage becomes Vdc ≈ 550 V < Vdc1
unchanged (Figure 3.15). (Figure 3.16), so the FEC works in over-modulation
(Figure 3.18).
Figure 3.14 – PWM Control linear modulation during a short circuit on DC Figure 3.16 – Trend of Vdc voltage during a short circuit on DC
side in Case 2a side in Case 3a
1 900
0.8 800
0.6 700
0.4 600
Vdc [V]
0.2 500
PWM Control
0 400
-0.2 300
-0.4 200
-0.6 100
-0.8 0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
-1 t [s]
0.98 0.982 0.984 0.986 0.988 0.99 0.992 0.994 0.996 0.998 1
t [s]
Figure 3.17 – Trend of Isc current during a short circuit on DC
side in Case 3a
200
Figure 3.15 – Trend of phase-to-ground voltage at AC front-end converter
terminals during a short circuit on DC side in Case 2a 180
600 160
140
400 120
100
Isc [A]
200 80
60
Vconv [V]
0 40
20
-200 0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s]
-400
Case 3a 0.5
For lower values of R sc , V dc becomes lower than
Vdc1= 2 ∙ √2 ∙ V1 (where V1 is the rms value of line to neutral 0
PWM Control
3 Fault analysis
component currents when the linear modulation bound- value Vdc2 = 1.35 ∙ √3 ∙ V1, corresponding to that generated
ary is reached. by the diode rectifier: with decreasing Rsc, the converter
This causes an AC current distortion (Figure 3.21): the works for longer and longer fractions of time in an irregu-
lower is Rsc, the higher is the distortion level. lar way, i.e., bypassing the controlled semiconductors
(fault current flows in freewheeling diodes).
Figure 3.19 – Trend of the current in the electronic component of the first In the case studied, since V1 = 230V, the working bound-
leg of the cathodic star during a short circuit on DC side in Case 3a
ary voltage as diode rectifier is equal to Vdc2 ≈ 540V.
250 With R sc = 0.5 Ω, the DC-Bus voltage becomes
200 Vdc ≈ 340 V < Vdc2 and it shows the typical trend of a
150 rectified voltage of a diode bridge (Figure 3.22).
100
Figure 3.22 – Trend of Vdc voltage during a short circuit on DC
50 side in Case 4a
Isw1 [A]
0 900
-50 800
-100
700
-150
600
-200
500
-250
Vdc [V]
250 100
200 0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
150 t [s]
800
100
600
Iac1 [A]
0 400
200
Iac1 [A]
-100 0
-200
-200
-400
-600
-300
0.4 0.45 0.5 0.55 0.6 0.65 -800
t [s]
-1000
0.4 0.45 0.5 0.55 0.6 0.65
t [s]
Even the steady state component of short circuit current Figure 3.26 – Trend of the current in the electronic component during a
short circuit on DC side in Case 4a
Isc (Figure 3.24) becomes considerably higher than the
3 Fault analysis
FEC nominal current Idcn, since it is not limited by the FEC. 3.26a - Current Isw1
200
Figure 3.24 – Trend of Isc current during a short circuit on DC
Isw1 [A]
side in Case 4a
0
1800
-200
1600
-400
1400
-600
1200
-800
1000
-1000
Vdc [V]
0.9 0.91 0.92 0.93 0.94 0.95 0.96 0.97 0.98 0.99 1
800
t [s]
600 3.26b - Current Isw2
400 600
200 400
0 200
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Isw2 [A]
-200
Figure 3.25 – Isc current components during a short circuit on DC side
-400
-600
V1 I1 L R -800
Rsc
V2 I2 L R -1000
DC Load 0.9 0.91 0.92 0.93 0.94 0.95 0.96 0.97 0.98 0.99 1
V3 L R t [s]
I3
3.26c - Current Isw3
600
400
200
Isw3 [A]
0
Under this operation condition there are always a diode
-200
of the cathodic star and one of the anodic star in the
conduction state, as it can be seen in Figures 3.26a-f. -400
400
200
Isw4 [A]
-200
-400
-600
-800
-1000
0.9 0.91 0.92 0.93 0.94 0.95 0.96 0.97 0.98 0.99 1
t [s]
3 Fault analysis
600
600
400
400
200
Isw5 [A]
200
0
Isw2 [A]
-200 0
-400 -200
-600 -400
-800
-600
-1000
0.9 0.91 0.92 0.93 0.94 0.95 0.96 0.97 0.98 0.99 1 -800
t [s]
3.26f - Current Isw6 -1000
0.4 0.45 0.5 0.55 0.6 0.65
t [s]
600
0
monics.
-200
-1000 400
0.9 0.91 0.92 0.93 0.94 0.95 0.96 0.97 0.98 0.99 1
t [s]
200
Before the fault, the current conduction inside every fun-
Vconv [V]
-600
Figure 3.27 – Trend of the current in the electronic component of the first
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
leg of the cathodic star during a short circuit on DC side in Case 4a
t [s]
600
400
200
Isw1 [A]
-200
-400
-600
-800
-1000
0.4 0.45 0.5 0.55 0.6 0.65
t [s]
Case 5a Figure 3.31a – Trend of the current Iconvdc1 during a short circuit on DC side
in Case 5a
In the limit condition of zero fault resistance, the con-
3 Fault analysis
Iconvdc1 [A]
3.30a-b, the fault current Isc reaches considerable val- 800
Figure 3.30a – Trend of fault current Isc during a short circuit on DC side 0
in Case 5a (Cdc discharge component)
-200
x105
4
-400
Iconvdc2 [A]
3.5 -600
3 -800
2.5 -1000
Isc [A]
2 -1200
1.5 -1400
1 -1200
0.5 -1800
0 -2000
0.4995 0.4996 0.4997 0.4998 0.4999 0.5 0.5001 0.5002 0.5003 0.5004 0.5005 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s] t [s]
Figure 3.30b – Trend of fault current Isc during a short circuit on DC side Figure 3.32 – Trend of Iac1 current during a short circuit on DC side
in Case 5a (steady state component) in Case 5a
2000 1500
1800
1000
1600
1400
500
1200
Iac [A]
1000 0
Isc [A]
800
-500
600
400
-1000
200
0 -1500
0.5 0.52 0.54 0.56 0.58 0.6 0.4 0.45 0.5 0.55 0.6 0.65
t [s] t [s]
Even with Rsc = 1 mΩ, the DC FEC terminal currents still Even if we were considered the DESAT protection, it
remain equal to each other (Figures 3.31a-b) and they would be ineffective because the diode connected in anti-
respectively flow out of the upper terminal (Iconvdc1) and parallel to the IGBT makes the FEC works as three phase
into the lower terminal (Iconvdc2) as a further confirmation diode rectifier bypassing any possible control on IGBTs.
that the short circuit is seen like a low resistance load
in parallel.
3 Fault analysis
As we can see, with the decrease of Rsc, the short circuit the ESS allows the FEC to reach its maximum AC current
current may reach values up to 10 times the FEC nominal absorption for lower Rsc values. This is better from the
current on the DC side Idcn, As a result, protective devices electronic component current point of view.
are required.
Figure 3.34 – Trend of Vdc voltage during a short circuit on DC side
in Case 1b
Figure 3.33 - DC short circuit current values Isc as a function of the fault
resistance Rsc (FEC contribution, Idcn = 125 A) 900
1400
850
1200 800
600
400 790
550
200 780
02 03 04 05
500
0 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s]
100 10 1 0.1 0.01 0.001
Rsc [Ω]
Figure 3.35 – Trend of Isc current during a short circuit on DC side
in Case 1b
3.1.2 Behavior with ESS 10
The same cases of the previous section will be analyzed 9
hereunder in order to see what changes during a short 8
circuit adding the ESS, which is inserted in parallel to the 7
DC-Bus at t = 0.25s, while the fault still occurs at t = 0.5s2. 6
5
Isc [A]
Case 1b 4
For Rsc values such that the FEC is able to maintain the Vdc 3
at the nominal value Vdcn, the fault current Isc = Vdcn/Rsc 2
remains at the same value of Case 1a. 1
Therefore, the presence of the ESS does not contribute 0
to increase the short circuit current. 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s]
Nevertheless, since the power amounts delivered to the
load RL and to the fault Rsc are now shared between the
Figure 3.36 – Trend of Iac1 current during a short circuit on DC
FEC and the ESS, the current absorbed from the grid side in Case 1b
Iac1 decreases. 250
200
Since Vdc remains at its nominal value of 800V (Figure
150
3.34), assuming Rsc = 100Ω, the fault current Isc is still
100
8A like in Case 1a (Figure 3.35).
50
The ESS connection causes a transient DC-Bus voltage
Iac [A]
FEC control intervenes to bring back the Vdc to the set -50
-100
2
See Annex B for the behavior in fault condition of the DC/DC converter that interfaces -150
the ESS with the DC-Bus. In particular, the converter parallel capacitance can be added
-200
to Cdc series in order to have the total capacitance contribution.
-250
0.4 0.45 0.5 0.55 0.6 0.65
t [s]
30
tained at its nominal value thanks to the ESS (Figure 3.37).
As a consequence, the Iac1 no longer has to be limited by 25
Isc [A]
supplied by the ESS.
Indeed, the fault current has an higher value compared 10
400
250
300
200
200
150
100
100
0
50 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Iac1 [A]
t [s]
0
Figure 3.41 – PWM Control linear modulation during a short circuit on DC
-50 side in Case 3b
-100 1
0.8
-150
0.6
-200
-250 0.4
0.4 0.45 0.5 0.55 0.6 0.65
t [s] 0.2
PWM Control
-0.2
-0.4
-0.6
-0.8
-1
0.98 0.982 0.984 0.986 0.988 0.99 0.992 0.994 0.996 0.998 1
t [s]
3 Fault analysis
250
≈ 587 V > Vdc2 (Figure 3.45), so the FEC works in over-
200
modulation, but not as a diode rectifier yet.
150
As a consequence, the PWM control is not completely
100 by-passed (Figure 3.46-3.47).
50
Figure 3.45 – Trend of Vdc voltage during a short circuit on DC side
Isw1 [A]
0 in Case 4b
900
-50
800
-100
700
-150
600
-200
500
Vdc [V]
-250
0.4 0.45 0.5 0.55 0.6 0.65 0.7 400
t [s]
300
Figure 3.43 – Trend of the current in the electronic component of the first 200
leg of the anodic star during a short circuit on DC side in Case 3b
100
250
0
200 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s]
150
Figure 3.46 – Trend of the current in the electronic component of the first
100
leg of the cathodic star during a short circuit on DC side in Case 4b
50 250
Isw2 [A]
0 200
-50 150
-100 100
-150 50
Isw1 [A]
-200 0
-250 -50
0.4 0.45 0.5 0.55 0.6 0.65 0.7
t [s] -100
-150
-200
Figure 3.44 – Trend of Isc current during a short circuit on DC side
in Case 3b -250
0.4 0.45 0.5 0.55 0.6 0.65 0.7
180 t [s]
160
140 Figure 3.47 – Trend of the current in the electronic component of the first
leg of the anodic star during a short circuit on DC side in Case 4b
120
250
100
200
Isc [A]
80
150
60
100
40
50
20
Isw2 [A]
0
0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
-50
t [s]
-100
-150
-200
-250
0.4 0.45 0.5 0.55 0.6 0.65 0.7
t [s]
We can see that, unlike in Case 4a, the FEC is able to shown in Figure 3.49.
maintain the same voltage waveform even during the
fault, thanks to the ESS contribution. Assuming Rsc = 1mΩ, the steady-state component of the
fault current Isc reaches a considerable value compared
to the FEC nominal current and higher than in Case 5a
Figure 3.48 – Trend of phase-to-ground voltage at AC front-end converter
terminals during a short circuit on DC side in Case 4b
(Figure 3.50a).
600
Nevertheless, the peak value of the transient component
remains equal to that one of Case 5a (Figure 3.50b), due
400 to the DC capacitors Cdc discharge.
This means that the peak is independent of the presence
200 of the ESS. Even the FEC contribution remains the same
(Figure 3.51). Furthermore, since the value of the ESS
Vconv [V]
-600
such fault current component does not affect the FEC.
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Even in this case the DESAT protection is ineffective be-
t [s]
cause the FEC works in the same manner of Case 5a. In
particular the IGBT block is not able not only to limit the
short circuit current from the AC grid but also the ESS
fault contribution because it does not pass through the
FEC (Figure 3.49).
V1 I1 L R Ri
V2 DC Load
I2 L R +
Rsc Eo
V3 I3 L R
3 Fault analysis
10000 5000
9000 4500
8000 4000
7000 3500
6000 3000
5000 2500
Idc1 [V]
Isc [A]
4000 2000
3000 1500
2000 1000
1000 500
0 0
0.5 0.52 0.54 0.56 0.58 0.6 0.5 0.52 0.54 0.56 0.58 0.6
t [s]
t [s]
Figure 3.50b – Trend of fault current Isc during a short circuit on DC side in
Case 5b (Cdc discharge component) To sum up, first of all the addition of an ESS is equivalent
5
x10 to the introduction of a source which is able to increase
4
the fault current.
3.5 Moreover, the ESS contributes to maintaining the DC-
3
Bus voltage at values higher than those in a passive DC
microgrid.
2.5
As a result, the fault resistance for which the FEC starts
Isc [A]
800
in such manner the low frequency harmonic current
600
absorption.
400
The lower the THD, the lower the impact on the MVAC
200 grid in terms of upstream voltage distorsion (better Power
0
0.5 0.52 0.54 0.56 0.58 0.6
Quality).
t [s]
3.1.3 Behavior with PV plant 3.2.1 System with the MV/LV transformer
neutral point grounded
3 Fault analysis
500
Vpole+ [V]
400
300
200
100
0
0.6 0.6001 0.6002 0.6003 0.6004 0.6005 0.6006 0.6007 0.6008 0.6009 0.601
t [s]
3 Fault analysis
ESS and PV plant and with Rg = 50 Ω
quency of the voltage in Figure 3.53. 900
In particular, the ratio between the DC component value
850
and the value at the switching frequency remains con-
stant and equal to 0.8-1. 800
750
Figure 3.54 - Trend of Ig current during a ground fault on DC side in
systems with the neutral point of the MV/LV transformer grounded without Fault
700
ESS and PV plant and with Rg = 50 Ω
Vdc [V]
16 650
14 600
12 550
10 500
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s]
8
Ig [A]
negligible. 0
-50
Figure 3.55 – DC positive pole ground fault current path without ESS
and PV plant in systems with the neutral point of the MV/LV transformer -100
grounded -150
-200
-250
V1 I1 L R 0.4 0.45 0.5 0.55 0.6 0.65 0.7
t [s]
V2 I2 L R
Rg DC Load Figure 3.57b – Trend of Isw2 current during a ground fault on DC side in
systems with the neutral point of the MV/LV transformer grounded without
V3 I3 L R
ESS and PV plant and with Rg = 50 Ω
250
200
150
100
50
Isw2 [A]
sag when the fault occurs, is brought back to the nominal -50
-150
-200
-250
0.4 0.45 0.5 0.55 0.6 0.65 0.7
t [s]
4
In dual manner, in case of a ground fault of the DC negative pole, the ground fault current 5
Trends and values in the others FEC electronic components are equal.
would flow only in the freewheeling diodes of the anodic star.
The waveform of the AC current Iac1 (Figure 3.58) does Since the steady state value of Vdc is not constant, there
not change with respect to the no-fault condition (even is a high current flowing through the DC capacitors.
3 Fault analysis
200 1500
150
1000
100
Icap [A]
500
50
Iac1 [A]
0 0
-50
-500
-100
-1000
-150 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s]
-200
-250
The DC capacitor discharge current comes from the FEC
0.4 0.45 0.5 0.55
t [s]
0.6 0.65 lower terminal; as a result, the converter, during the fault
transient, supplies a positive current flowing out of both
3.2.1.2 Low fault resistance Rg without ESS and terminals (Figures 3.61-3.62).
PV plant (S1=ON, S2=ON/OFF) This behavior corresponds to an abnormal FEC opera-
The decreasing values of the fault resistance Rg cause tion, since during normal operation current flows out of
voltage variations on the DC-Bus and give rise to a the upper terminal and into the lower one (Figures 3.61-
gradual loss of control by the converter. 3.62 before the fault).
As the Rg decreases, the earth fault current Ig has a higher The sum of the current from the upper terminal and of the
and higher DC component and Ig reaches such values current flowing through the capacitors makes the ground
that the use of protective devices is anyway required. fault current Ig (minus the load current).
In particular, e.g. with Rg = 50 mΩ, the FEC behaves like
a diode rectifier (Vdc < 1.35 ∙ √3 ∙ V1 as in Figure 3.59): Figure 3.61 – Trend of the upper terminal current Iconvdc1 during a ground
fault on DC side in systems with the neutral point of the MV/LV transformer
it works for longer and longer fractions of time in an ir- grounded without ESS and PV plant and with Rg = 50 mΩ
regular way, i.e. bypassing the controlled semiconductors 2500
(fault current flows in freewheeling diodes).
As we can see in Figure 3.59, as soon as the fault occurs 2000
(t = 0.5 s), Vdc decreases discharging the DC capacitors
(Figure 3.60) and reaching the steady state value, which 1500
guarantees a limited power delivery to the DC load.
1000
Iconvdc1 [A]
900
0
800 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s]
700
Vdc [V]
600
500
400
300
200
100
0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s]
3 Fault analysis
grounded without ESS and PV plant and with Rg = 50 mΩ transformer grounded without ESS and PV plant and with Rg = 50 mΩ
2500 100
0
2000
-100
1500 -200
-300
1000
-400
IIconvdc2 [A]
500
-500
Vpole- [V]
0 -600
-700
-500
-800
-1000 -900
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s] t [s]
Ig (Figure 3.63) has a large DC component and, unlike the In steady-state conditions, the DC current component
cases with “high” Rg (Figure 3.54), low-frequency zero- Iconvdc1 (Figure 3.61), which is the sum of the DC fault
sequence harmonics (mainly the 3rd, 6th and 9th). current component and of the load current Vdc/R, flows
Figure 3.63 – Trend of the ground fault current Ig during a ground fault out from the FEC upper terminal, while only the DC load
on DC side in systems with the neutral point of the MV/LV transformer current Iconvdc2 (Figure 3.62) flows into the lower terminal,
grounded without ESS and PV plant and with Rg = 50 mΩ
2500
regardless of Rg low values.
Iac1 not only has a large DC component, but also is no
longer sinusoidal (Figure 3.66), due to over-modulation
2000
effect (Figure 3.67).
1500
Figure 3.66 – Trend of Iac1 current during a ground fault on DC side in
systems with the neutral point of the MV/LV transformer grounded without
1000 ESS and PV plant and with Rg = 50 mΩ
Ig [A]
1400
1200
500
1000
0 800
Iac1 [A]
Figure 3.64 – Trend of the voltage of the DC positive pole Vpole+ during a Figure 3.67 – PWM Control over-modulation during a ground fault on DC
ground fault on DC side in systems with the neutral point of the MV/LV side in systems with the neutral point of the MV/LV transformer grounded
transformer grounded without ESS and PV plant and with Rg = 50 mΩ without ESS and PV plant and with Rg = 50 mΩ
900 20
800
15
700
10
600
5
500
PWM Control
400 0
Vpole+ [V]
300
-5
200
-10
100
-15
0
-100 -20
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0.98 0.982 0.984 0.986 0.988 0.99 0.992 0.994 0.996 0.998 1
t [s] t [s]
Iac1 is shifted by a value equal to one-third the fault cur- Figure 3.69b – Trend of Isw2 current during a ground fault on DC side in
systems with the neutral point of the MV/LV transformer grounded without
rent DC component.
3 Fault analysis
Isw2 [A]
voltage at AC terminals trends to a square waveform due 400
0
Figure 3.68 – Trend of the voltage at AC converter terminal Vconv during
a ground fault on DC side in systems with the neutral point of the MV/LV -200
transformer grounded without ESS and PV plant and with Rg = 50 mΩ
-400
600
-600
0.4 0.45 0.5 0.55 0.6 0.65
400 t [s]
200
In converters sold on the market, when the current in
Vconv [V]
200 200
0 0
-200 -200
-400 -400
Isw1 [A]
Isw1 [A]
-600 -600
-800 -800
-1000 -1000
-1200 -1200
-1400 -1400
0.4 0.45 0.5 0.55 0.6 0.65 0.4 0.45 0.5 0.55 0.6 0.65
t [s] t [s]
3 Fault analysis
IGBT block, without ESS and PV plant and with Rg = 50 mΩ plant and with Rg = 1 mΩ
300 2000
1800
200
1600
1400
100
1200
1000
Isw2 [A]
Ig [A]
800
-100 600
400
-200
500
0
-300 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
0.4 0.45 0.5 0.55 0.6 0.65
t [s] t [s]
600
400
tional, since the grounding system has been designed
according to the relation:
200
120
0 ≤ [3.7]
-200
-400
the grounding resistance can exceed the value for which
0.4 0.45 0.5 0.55 0.6 0.65 the converter loses the control.
t [s]
To sum up, Figure 3.73 depicts the DC ground fault
Considering a bolted ground fault with Rg = 1 mΩ, we current values Ig as a function of the fault resistance Rg.
obtain a DC component of Ig (Figure 3.72) equal approxi- As we can see, with the decrease of Rg, the fault current
mately to 1600A (≈ 13 times Idcn), albeit IGBTs are blocked. may reach values even higher than 14 times the FEC
Such fault current value may jeopardize the integrity of nominal current on the DC side Idcn.
the freewheeling diodes. As a result, protective devices are required.
Compared to the bolted short circuit between the DC
Figure 3.73 - DC component values of the ground fault current Ig as a func-
poles, now the transient current peak due to the Cdc dis- tion of the fault resistance Rg in systems with the neutral point of the MV/
charge is lower, because now the discharge impedance LV transformer grounded (FEC contribution, Idcn = 125 A)
is not only Rsc, but it is equal to the sum Rg + Z/3 (where 2000
Z is the total AC grid equivalent impedance). Neverthe- 1800
less, now, the steady-state value of the fault current 1600
is higher by more or less 30% than the steady-state
1400
value in bolted short circuit condition (≈ 10 times Idcn):
1200
this is because the AC inductances do not create imped-
1000
ance to the DC component of the ground fault current
Ig [A]
800
flowing through the ground connection of the MV/LV
transformer neutral point. 600
3.2.1.3 High fault resistance Rg with ESS Figure 3.75 – Trend of Iconvdc2 during a ground fault on DC side in systems
with the neutral point of the MV/LV transformer grounded with ESS and Rg
3 Fault analysis
(S1=OFF, S2=ON) = 50 Ω
50
For high values of Rg (e.g. Rg = 50 Ω), direction of DC
components of Iconvdc1 (Figure 3.74) and Iconvdc2 (Figure
0
3.75) is outwards for the upper terminal and inwards for 50
Iconvdc1 [A]
-100 -100
feeds only the load, while the converter feeds both the
-150
load and the fault. -150
-200
Indeed the DC component of Iconvdc1, equal to 108 A, is 0.6 0.6002 0.6004 0.6006 0.6008 0.601
the sum of the DC components of: -200
= − + 1 =− 2+ 1 = −( − 100) +13 = 113 [3.10] where the value of the DC component of Iconvdc2 is nega-
tive, as shown in Figure 3.75
Figure 3.74 – Trend of Iconvdc1 during a ground fault on DC side in systems Figure 3.76 – Trend of Ig during a ground fault on DC side in systems with
with the neutral point of the MV/LV transformer grounded with ESS and Rg the neutral point of the MV/LV transformer grounded with ESS and
= 50 Ω Rg = 50 Ω
16
250
14
200 12
10
150 250 8
Ig [A]
Iconvdc1 [A]
200
6
100 150
4
100
50 2
50
0 0
0.6 0.6002 0.6004 0.6006 0.6008 0.601 0.6 0.6001 0.6002 0.6003 0.6004 0.6005 0.6006 0.6007 0.6008 0.6009 0.601
0 t [s]
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s]
3 Fault analysis
(S1=ON, S2=ON/OFF) = 50 mΩ
3000
The presence of the ESS keeps Vdc at a higher value than
it would be without the storage system, like in the case 2500
of a short circuit.
Even if the ESS is present, the FEC does not operate 2000
IIconvdc1 [A]
directed outwards with respect to the upper and lower 1000
terminal of converter.
If Rg is even lower (e.g. Rg = 50 mΩ), not only the DC 500
components, but the full waveforms of currents Iconvdc1
(Figure 3.77) and Iconvdc2 (Figure 3.78) are directed out- 0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
wards of the DC terminals of the converter. t [s]
Figure 3.78 – Trend of Iconvdc2 during a ground fault on DC side in systems
This means that there is a reclosing path for the fault with the neutral point of the MV/LV transformer grounded with ESS and Rg
current contribution supplied by the ESS (Figure 3.79)6 = 50 mΩ
that in this condition feeds both the load and the fault, 3000
1500
1000
IIconvdc2 [A]
500
0
6
In dual manner, in case of a ground fault on the DC negative pole, the ESS contribution
to the ground fault current would flow only in the IGBTs of the cathodic star: as a conse- -500
quence, both Iconvdc1 and Iconvdc2 would flow into the FEC terminals. 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s]
Figure 3.79 – DC positive pole ground fault current path with ESS and low fault resistance in systems with the neutral point of the MV/LV transformer
grounded
V1 I1 L R Ri
V2 DC Load
I2 L R +
Rg Eo
V3 I3 L R
The ESS thus plays a key role in allowing reclosure of Figure 3.82 shows the current flowing in the filter capaci-
the DC component coming out of the negative terminal tance Cdc: it can be noted that, even if the ESS keeps Vdc
3 Fault analysis
Icap [A]
but now the DC component of Iconvdc2 is positive, as shown
in Figure 3.78. 0
-500
2500
As shown in Figure 3.83, depending on the value of Rg,
2000 Iac1 may be completely positive, and all the AC component
Ig [A]
1000
Figure 3.83 – Trend of Iac1 current during a ground fault on DC side in
systems with the neutral point of the MV/LV transformer grounded with
500
ESS and Rg = 50 mΩ
0 1200
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s] 1000
800
The DC component of current fed by the ESS Idc1 (Figure
3.81) now results from the sum of fault contribution Iconvdc2 600
Iac1 [A]
and the DC load current, which shows that all load current 400
-400
Figure 3.81 – Trend of Idc1 during a ground fault on DC side in systems 0.4 0.45 0.5 0.55 0.6 0.65
t [s]
with the neutral point of the MV/LV transformer grounded with ESS and
Rg = 50 mΩ
1400
1200
1000
800
Idc1 [A]
600
400
200
7
The DC component is zero, since the areas under the positive Icap values are equal to
0 the areas under the negative values.
0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s]
3 Fault analysis
LV transformer grounded with ESS (Idcn = 125 A)
the IGBTs of the anodic star (Figure 3.84b).
4500
Figure 3.84a – Trend of Isw1 current during a ground fault on DC side in 4000
systems with the neutral point of the MV/LV transformer grounded with
ESS and Rg = 50 mΩ 3500
200 3000
0 2500
Ig [A]
2000
-200
1500
-400 1000
Isw1 [A]
-600 800
0
-800
100 10 1 0.1 0.01 0.001
Rsc [Ω]
-1000
-1200
0.4 0.45 0.5 0.55 0.6 0.65
t [s]
If the IGBT block is considered, the currents Isw1 and Isw2
Figure 3.84b – Trend of Isw2 current during a ground fault on DC side in change as shown in Figures 3.86a-b.
systems with the neutral point of the MV/LV transformer grounded with
ESS and Rg = 50 mΩ As it can be seen, unlike in Figures 3.84a-b, there is no
1200 longer the PWM control and in particular, since Isw2 flowed
only in the IGBT, now it is cancelled.
1000
As a result, the ESS contribution to the ground fault cur-
800 rent is interrupted.
600
Isw2 [A]
400
200 Figure 3.86a – Trend of Isw1 current during a ground fault on DC side in
systems with the neutral point of the MV/LV transformer grounded with
0 ESS, IGBT block and Rg = 50 mΩ
-200 200
-400 0
0.4 0.45 0.5 0.55 0.6 0.65
t [s] -200
-400
To sum up, Figure 3.85 depicts the DC ground fault
Isw1 [A]
-600
current values Ig as a function of the fault resistance Rg
with the ESS. -800
As we can see, with the decrease of Rg, the fault current
-1000
may reach values even higher than 33 times the FEC
nominal current on the DC side Idcn. -1200
Figure 3.86b – Trend of Isw2 current during a ground fault on DC side in To sum up, first of all the ESS connection corresponds
systems with the neutral point of the MV/LV transformer grounded with
to the introduction of a source that is able to feed the
3 Fault analysis
0
Moreover, Rg values for which the FEC starts to limit the
-100 AC current absorption, for which the FEC control torms
to over-modulation and for which the FEC works like a
-200
diode rectifier are lower than those of a passive LVDC
-300 microgrid, improving the FEC current control capability.
-400 Even for the ground fault, both the FEC and the ESS fault
0.4 0.45 0.5 0.55 0.6 0.65
t [s] contributions depend on the LVDC microgrid structure:
Even blocking the IGBTs and interrupting the ESS con- hence, it is not possible to consider the fault current equal
tribution, the Iac1 (with Rg = 50 mΩ) still remains always to the sum of its value due to the FEC without ESS only
positive (Figure 3.87), but with a DC component lower and of its value due to only the ESS without the FEC only,
than the Iac1 of Figure 3.83. like in DC short circuit condition.
Figure 3.87 – Trend of Iac1 current during a ground fault on DC side in sys-
tems with the neutral point of the MV/LV transformer grounded with ESS,
IGBT block and Rg = 50 mΩ
1400
3.2.1.5 Behavior with PV plant
1200
In the presence of a controlled current generator, which
1000 is connected at t = 0.25s and simulates a PV plant con-
800 nected to the LVDC microgrid, the same phenomena,
which are explained in Cases 1b-5b, occur.
600
Nevertheless, since the maximum PV plant current in
Iac1 [A]
400
short circuit condition ImaxPV is “limited”, there is a lower
200 Vdc support capability.
0 As a result, the Rg values for which the FEC works in
over-modulation or like a diode rectifier are between the
-200
case of absence and presence of the ESS8.
-400
0.4 0.45 0.5 0.55 0.6 0.65
In the presence of both the ESS and the PV plant, their
t [s] contributions sum to each other: the Rg limit values
Even removing the ESS contribution, the ground fault become lower than the case of the only ESS presence.
current Ig still remains high (Figure 3.88), so it has to be Also in presence of PV plant, as Rg decreases, the PV
interrupted by suitable protective devices. generator provides the same reclosing path for unidirec-
Figure 3.88 – Trend of Ig during a ground fault on DC side in systems with tional current component Iconvdc2 shown in Figure 3.79 and
the neutral point of the MV/LV transformer grounded with ESS, IGBT block
it theoretically forces in semiconductors of the anodic
and Rg = 50 mΩ
star a current that can be larger than the load current.
1400
Furthermore, as for the scenario with the ESS, for high
1200 values of Rg, the converter feeds both the DC load and
the earth fault, while the PV plant only supplies the load.
1000
On the other hand, for low Rg values, the converter only
800 feeds the fault, while the PV plant supplies both the DC
Ig [A]
600
400
200
8
See Annex C for the behavior in fault condition of the DC/DC converter that interfaces the
0 PV plant with the DC-Bus. In particular, the converter parallel capacitance can be added
to Cdc series in order to have the total capacitances contribution.
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s]
3 Fault analysis
possible fault current IPVmax, fault current does not increase In these systems, because the DC negative pole is
more. grounded while the transformer neutral point is isolated,
The DC component of Iac1 current is also limited and a ground fault of the DC positive pole is equivalent to a
currents Iac1 and Isw2 may span both polarities (Figures short circuit between the DC poles.
3.89, 3.91). Then, the analysis is the same as for a short circuit on DC
side, both for active and passive networks (as discussed
Figure 3.89 – Trend of Iac1 during a ground fault on DC side in systems with in Section 3.1).
the neutral point of the MV/LV transformer grounded with PV plant and
Rg = 50 mΩ
Since the negative pole is solidly grounded, an ac-
1400
cidental contact of it to ground would cause no harm:
the situation is similar to an earth contact when neutral
1200
is solidly grounded at the source (transformer station).
1000
Since a ground fault is equivalent to a short circuit on
800 the DC side, no DC component is present in the current
600 absorbed from the AC side (independent of Rg value).
400
Hence, such a fault is seen by the FEC as an additional,
“low impedance load".
200
In particular, (in the LVDC microgrid analyzed) the Rg value
Iac1 [A]
0
for which the FEC starts to limit Vdc is equal to Rg = 13 Ω,
-200 whereas with the DC negative pole grounded, this condi-
-400 tion occurs for Rg = Rsc = 45 Ω: this means that the limit
-600 between “high fault resistance” and “low fault resistance”
0.4 0.45 0.5 0.55 0.6 0.65
t [s]
changes. This is because in systems with the transformer
Figure 3.90 – Trends of Isw1 during a ground fault on DC side in systems neutral point grounded, the total zero-sequence imped-
with the neutral point of the MV/LV transformer grounded with PV plant ance “seen” by the fault current is 3Rg + Z, while in the
and Rg = 50 mΩ
systems with the DC negative pole grounded, the fault
200
current only “sees” Rg. Moreover, now the DC voltage
0 feeding the fault is equal to the whole DC-Bus voltage
-200 Vdc, while in systems with the transformer neutral point
grounded the fault is fed by a DC voltage equal to Vdc/2.
-400
As a conseguence, the Rg value for which the FEC starts
to limit the power transfer is higher than in the systems
Isw1 [A]
-600
analyzed previously. Moreover, we can observe the AC
-800
converter terminal voltage variation compared to the pre-
-1000 vious systems. For example, assuming Rg = 50 mΩ, Vconv
-1200
(Figure 3.92) decreases and tends to a square waveform,
but always positive, unlike Vconv in Figure 3.68.
-1400
0.4 0.45 0.5 0.55 0.6 0.65
If ESS and PV plant were present, the waveform would
t [s] be the same, but the maximum value of Vconv during the
Figure 3.91 – Trends of Isw2 during a ground fault on DC side in systems fault would be higher, since Vdc would be higher.
with the neutral point of the MV/LV transformer grounded with PV plant
and Rg = 50 mΩ Figure 3.92 – Trend of the voltage at AC converter terminal Vconv in systems
1200 with the DC negative pole grounded during a ground fault on DC side
without ESS and PV plant and with Rg = 50 mΩ
1000
900
800
800
600 700
400 600
Isw2 [A]
500
200
Vconv [V]
400
0
300
-200
200
-400 100
-600 0
0.4 0.45 0.5 0.55 0.6 0.65 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s] t [s]
3.2.3 Systems with the DC mid-point grounded Unlike transformer neutral point grounded systems, in
which the fault current Ig flows in the connection between
3 Fault analysis
300
250
Vpole+ [V]
200
150
100
0 7000
-100 Rg = 50 mΩ
Rg = 50 Ω 6000
-200
5000
-300
4000
-400
Ig [A]
Vpole- [V]
3000
-500
-600 2000
-700 1000
-800 0
0.49 0.495 0.5 0.505 0.51 0.515 0.52
-900 t [s]
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s]
3 Fault analysis
ESS and Rg = 50 Ω (S1=OFF, S2=ON), 50 mΩ (S1=ON, S2=ON/OFF)
is increased.
450
400 Rg = 50 mΩ Figure 3.99 – Trend of Ig during a ground fault on DC side in systems with the
Rg = 50 Ω DC mid-point grounded with ESS and Rg = 50 mΩ (S1=ON, S2=ON/OFF)
350
8000
300
7000
250
6000
Vpole+ [V]
200
5000
150
4000
100
50 3000
Ig [A]
0 2000
-50 1000
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s]
0
Figure 3.98 – Trend of the voltage of the DC negative pole Vpole- in systems
with the DC mid-point grounded during a ground fault on DC side with -1000
ESS and Rg = 50 Ω (S1=OFF, S2=ON), 50 mΩ (S1=ON, S2=ON/OFF) 0.49 0.495 0.5 0.505 0.51 0.515 0.52
t [s]
0
-100 Rg = 50 mΩ
Rg = 50 Ω
Figure 3.100 – Trend of Idc1 during a ground fault on DC side in systems
-200
with the DC mid-point grounded with ESS and Rg = 50 mΩ (S1=ON,
-300 S2=ON/OFF)
2500
-400
Vpole- [V]
-500
2000
-600
-700
1500
-800
Idc1 [A]
-900 1000
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s]
If ESS is present, the steady state value of the Ig (Figure 500
3.99) is still zero.
However, a transient current Idc1 is generated by the ESS 0
at the moment of the fault (Figure 3.100): this transient 0.49 0.495 0.5 0.505 0.51 0.515 0.52
contribution to fault current recloses in the negative pole t [s]
Figure 3.101 – DC positive pole ground fault current path in systems with the DC mid-point grounded with ESS
V1 I1 L R Ri
V2 DC Load
I2 L R +
Rg Eo
V3 I3 L R
50 = 2∙ = 2∙ ≈1.7 ∙ [3.14]
0.85
40
assuming there is constant power.
Idc1 [A]
30
20
10
0
0.4 0.5 0.6 0.7 0.8 0.9 1
t [s]
V1 I1 L R Ri
V2 DC Load PV plant
I2 L R +
Eo PPV/Vdc
V3 I3 L R
3 Fault analysis
which is usually set at a higher value than the value given 2.5
by (3.14). 2
1.41 Iconvmax
As a consequence, as the grid voltage falls below the
1.5
prescribed minimum values, the current passes first from
a sinusoidal to a trapezoidal shape, then to a squared 1
-1
2.5
-1.5
2
1.41 Iconvmax
-2
1.5
-2.5
1
0.5
10 ms 20 ms
0 Hence, in case of an AC short circuit, the converter sup-
-0.5 plies a current of 50%-100% more than the rated value.
-1 Considering the FEC used in this study, the maximum
current supplied during an AC short circuit is:
-1.5
-0.5
-1
-1.5
-2
-2.5
200
Considering the system shown in Figure 1.5, if a ground
150
fault occurs on AC side of the FEC, the same cases of
100
Section 3.1 may happen, depending on the value of the
fault resistance Rg’, both with passive and active LVDC 50
Isw2 [A]
0
0
Rg’ = 50 Ω
-50
250
-100
200
-150
150
-200
100
-250
0.4 0.45 0.5 0.55 0.6 0.65 50
t [s]
Iac1 [A]
-50
-100
-150
-200
-250
0.4 0.45 0.5 0.55 0.6 0.65
t [s]
3 Fault analysis
Isw1 Isw3 Isw5
V1 I1 L R Iac1
DC Load
V2 I2 L R Iac2
V3 I3 L R Iac3
Ig’
Because of the voltage trend (Figure 3.108) applied to control is able to maintain the DC-Bus voltage Vdc at its
the fault resistance, the fault current (Figure 3.111) has a rated value, the DC capacitors discharge current is zero.
DC component (8A) and the harmonics at switching and Even considering the IGBT block, since the ground fault
multiple switching frequency. current flows through the freewheeling diodes of the
In particular, unlike the DC load current whose values is anodic star, such current cannot be eliminated. Hence,
equal to Vdc/RL, the DC component of the fault current a suitable residual current device, able to detect ground
is equal to: fault currents with DC components, has to be installed
on AC side to interrupt such currents.
800
= = = 8 [3.16]
2∙ 2∙50
where Vdc/2 is also the average value of Vconv (Figure 3.108). 3.4.2 Low fault resistance Rg’ without ESS and
PV plant (S1=ON, S2=ON/OFF)
Figure 3.111 – Trend of Ig’ during a ground fault on AC side in systems with Considering “low fault resistances” (e.g. Rg = 50 mΩ),
the DC negative pole grounded without ESS and PV plant and Rg’ = 50 Ω
the FEC control is no longer able to maintain the Vdc at
20 the rated value (Figure 3.112).
18
Figure 3.112 - Trend of Vdc voltage during a ground fault on AC in systems
16 with the DC ngative pole grounded without ESS and PV plant and with
Rg’ = 50 mΩ
14
12 900
IgI [A]
10 800
8 700
6
600
4
500
Vdc [V]
2
0 400
0.6 0.6001 0.6002 0.6003 0.6004 0.6005 0.6006 0.6007 0.6008 0.6009 0.601
t [s] 300
As it can be seen in Figure 3.110, in the “additional load” 200
Rg’ there are the sum of the three DC current components
100
that flows in all the AC phases:
0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
_ _ _ = 3+2+3 = 8 [3.17] t [s]
As a result the Vdc drops. The Cdc discharge current flows Figure 3.115 – Trend of Ig’ during a ground fault on AC side in systems with
the DC negative pole grounded without ESS and PV plant and Rg’ = 50 mΩ
into the fault passing through the IGBT of the first leg of
3 Fault analysis
IgI [A]
800
The discharge current appears in the fault current Ig’
(Figure 3.115) and in the current Iac1 at the FEC terminal 600
of faulty phase (Figure 3.116). 400
Figure 3.113 – Trend of the DC capacitor current Icap during a ground fault 200
on AC side in systems with the DC negative pole grounded without ESS
and PV plant and with Rg’ = 50 mΩ 0
0.4 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
16000 t [s]
14000 Figure 3.116 - Trend of Iac1 during a ground fault on AC side in systems
with the DC negative pole grounded without ESS and PV plant and with
12000 Rg’ = 50 mΩ
10000 2000
8000 0
6000 -2000
Icap [A]
4000 -4000
Iac1 [A]
2000 -6000
0 -8000
-2000 -10000
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s] -12000
Figure 3.114 – Trend of Isw1 current during a ground fault on AC side in
systems with the DC negative pole grounded without ESS and PV plant -14000
and with Rg’ = 50 mΩ
-16000
16000 0.4 0.45 0.5 0.55 0.6 0.65
t [s]
14000
As Figure 3.115 shows, Ig’ still has a DC component
12000 (756A) equal to the ratio between the Vconv average value
10000 and Rg’, but now the average value of Vconv is no longer
equal to Vdc/2.
8000
In particular, such DC component of Ig’ still flows into the
6000 converter through the lower terminal and the electronic
Isw1 [A]
2000
3 Fault analysis
Isw1 Isw3 Isw5
V1 I1 L R Iac1
DC Load
V2 I2 L R Iac2
V3 I3 L R Iac3
Ig’
2000
-500
I3 [A]
1500
1000 -1000
500
I1 [A]
-1500
0.4 0.45 0.5 0.55 0.6 0.65
0 t [s]
3.4.3 High fault resistance Rg’ with ESS and PV 3.4.4 Low fault resistance Rg’ with ESS and PV
plant (S1=OFF, S2=ON) plant (S1=ON, S2=ON/OFF)
3 Fault analysis
ESS and PV plant don’t feed the fault for high fault resist- ESS and PV plant maintain the Vdc at an higher value
ances, as it can be seen by the trend of Ig’ in Figure 3.119: (Figure 3.121).
such trend is equal to the one in Figure 3.111.
Therefore, the ground fault power is still supplied by the Figure 3.121 - Trend of Vdc voltage during a ground fault on AC in systems
with the DC negative pole grounded with ESS, PV plant and Rg’ = 50 mΩ
AC grid.
900
Nevertheless, now, the AC current at FEC terminals
decreases (Figure 3.120), since the DC load and the “ad- 800
600
Figure 3.119 – Trend of Ig’ during a ground fault on AC side in systems with
Vdc [V]
the DC negative pole grounded with ESS, PV plant and Rg’ = 50 Ω 500
20 400
18
300
16
14 200
12 100
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
IgI [A]
10 t [s]
8
6 In particular, like in DC fault condition with low fault re-
4 sistance, ESS and PV plant feed both the fault and the
2
load, while the FEC feeds only the fault. With reference to
0
Figure 3.122, assuming Rg’ = 50 mΩ, for the DC com-
0.6 0.6001 0.6002 0.6003 0.6004 0.6005 0.6006 0.6007 0.6008 0.6009 0.601 ponent:
t [s]
Figure 3.120 - Trend of Iac1 current during a ground fault on AC in systems 384
1 = − (− 1) = 7.1
− ( − 2104) = 2158 [3.19]
with the DC negative pole grounded with ESS, PV plant and with
Rg’ = 50 Ω
100
As it can be seen from Figure 3.122 for low fault resist-
50
ances, the DC component of Iconvdc1 (Figure 3.123) flows
0 into the upper terminal (instead of flowing out as in the
Iac1 [A]
3 Fault analysis
Iconvdc1
V1 I1 L R Iac1
Ri
DC Load PV plant
V2 I2 L R Iac2
+
PPV/Vdc
V3 I3 L R Iac3 Eo
Ig’ Iconvdc2
Figure 3.123 – Trend of Iconvdc1 during a ground fault on AC side in systems Figure 3.125 – Trend of Idc1 during a ground fault on AC side in systems
with the DC negative pole grounded with ESS, PV plant and Rg’ = 50 mΩ with the DC negative pole grounded with ESS, PV plant and Rg’ = 50 mΩ
2000 2500
0
3000
-2000
2500
-4000
Iconvdc1 [A]
-6000 2000
Idc1 [A]
-8000
1500
-10000
1000
-12000
500
-14000
-16000 0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s] t [s]
Figure 3.124 – Trend of Iconvdc2 during a ground fault on AC side in systems Figure 3.126 – Trend of Ig’ during a ground fault on AC side in systems
with the DC negative pole grounded with ESS, PV plant and Rg’ = 50 mΩ with the DC negative pole grounded with ESS, PV plant and Rg’ = 50 mΩ
1500 16000
14000
1000
12000
500
10000
Iconvdc2 [A]
IgI [A]
0 8000
6000
-500
4000
-1000
2000
-1500 0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
t [s] t [s]
ESS and PV plant force a current which is always positive Taking into account the IGBT block, the Isw1 is interrupted
in the IGBT of the first leg of the cathodic star (Figure preventing the ESS contribution to the ground fault cur-
3 Fault analysis
3.127). This current has such a value that jeopardizes the rent. However, such current still has a high value due to
electronic component integrity. the fault power supplied by the AC grid, similarly to what
Figure 3.127 – Trend of Isw1 during a ground fault on AC side in systems
happens when considering a passive LVDC microgrid.
with the DC negative pole grounded with ESS, PV plant and Rg’ = 50 mΩ
16000 To sum up, even in case of a ground fault on AC side,
the high fault resistance is “seen” by the FEC as an “ad-
14000
ditional DC load” to which a voltage with Vdc/2 average
12000 value is applied. For low fault resistance value, since the
10000 Vdc is no longer maintained fixed at its nominal value,
there are repetitive charge-discharge cycles of the DC
8000
capacitors that create high fault current peaks. Like in
Isw1 [A]
E2 E3 E4 E6
Rated service voltage Ue [V] 1000 1000 1000 1000
Rated impulse withstand voltage Uimp [kV] 12 12 12 12
Rated insulation voltage Ui [V] 1000 1000 1000 1000
Poles [Nr.] 3/4 3/4 3/4 3/4
Rated uninterrupted curent Iu B N N H S H H
[A] 800 800
[A] 1000 1000
[A] 1250 1250
[A] 1600 1600 1600 1600 1600
[A] 2000 2000 2000
[A] 2500 2500 2500
[A] 3200 3200 3200
[A] 4000
[A] 5000
Rated short-time withstand current for (0.5s) Icw [kA]
500V DC (III) 35 50 60 65 75 100 100
750V DC (III) 25 25 40 40 65 65 65
750V DC (III) 25 40 50 50 65 65 65
1000V DC (IV) 25 25 35 40 50 65 65
Utilization category (IEC 60947-2) B B B B B B B
Isolation behaviour n n n n
Versions F-W F-W F-W F-W
T5 T6
Rated uninterrupted current Iu [A] 400/630 630/800/1000
Isolation behaviour n n
magnetic only MA - -
Interchangeability n n
(1)
Icw = 5kA
(2)
Icw = 7.6kA (630A) - 10kA (800A)
4.2.3 Tmax T molded-case circuit breakers for 4.2.4 Tmax PV molded case circuit breakers
applications up to 1000V DC
4 DC fault protection – The ABB offer
T4 T5 T6 12
For wiring configurations and for further technical information please refer to the cata-
logue and to the installation instructions.
Rated uninterrupted current Iu [A] 250 400/630 630/800
Poles 4 4 4
B (400A)(2) -
Utilization category (IEC 60947-2) A A (630A) B(3)
Isolation behaviour n n n
Versions F F F(4)
(1)
Power supply only from the top
(2)
Icw = 5kA
(3)
Icw = 7.6 kA (630A) - 10kA (800A)
(4)
For T6 in the withdrawable version, please ask ABB SACE
Molded-case circuit-breakers at 1000Vdc, in compliance with
Std. UL 489B
T4N-PV T5N-PV T6N-PV
Size [A] 200 400 600-800
Poles [No.] 3 3 4
Versions F F F
Standard terminals F F F
versions in that they are equipped with permanent Rated operational voltage Un 1P: 230 V AC, 220 V DC
2P: 400 V AC, 440 V DC
magnetic elements on the internal arcing chambers. 3...4P: 400 V AC*
Such elements allow the electric arc to be broken up to Max. power frequency recovery voltage 1P: 253 V AC, 250 V DC
Umax 2P: 440 V AC, 500 V DC
voltages equal to 440Vd.c. (for 2-pole circuit breakers). 3...4P: 440 V AC*
The presence of these permanent magnetic elements Min. operating voltage 12 V AC, 12 V DC
establishes the circuit-breaker polarity (positive or nega- Rated short-circuit capacity Icn 10 ka
Rated short-circuit capacity Icn 3
tive); as a consequence, their connection shall be car- Rated impulse withstand voltage Uimp 4 kV (test voltage 6.2 kV at sea level, 5 kV at 2,000 m)
ried out in compliance with the polarity indicated on the (1.2/50 μs)
circuit breakers. An incorrect connection of the polarities Dielectric test voltage 2.0 kV (50/60 Hz, 1 min)
Reference temperature for tripping 30 °C
could damage the circuit-breaker. Circuit breakers series characteristics
S200M UC, special version for d.c. applications, are Electrical endurance In ≤ 25 A: 20,000 ops. (AC), In > 25 A: 10,000 ops. (AC),
1,000 ops. (DC)
available with characteristics B, C, K and Z.
IEC/EN 60947-2
Tripping Characteristics B, C, K, Z
Rated operational voltage Un 1P: 253 V AC, 220 V DC
2...4P: 440 V AC, 440 V DC
Max. power frequency recovery voltage 1P: 266 V AC, 250 V DC
Umax 2...4P: 462 V AC, 500 V DC
Min. operating voltage 12 V AC, 12 V DC
Rated ultimate short-circuit breaking ≤40 A: 10 kA (AC); 10 kA (DC)
capacity Icu >40 A: 6 kA (AC); 10 kA (DC)
Rated service short-circuit breaking ≤40 A: 7,5 kA (AC); 10 kA (DC)
capacity Ics >40 A: 6 kA (AC); 10 kA (DC)
Rated impulse withstand voltage Uimp 4 kV (test voltage 6.2 kV at sea level, 5 kV at 2,000 m)
(1.2/50 μs)
Dielectric test voltage 2.0 kV (50/60 Hz, 1 min)
Reference temperature for B, C 55 °C
tripping characteristics K, Z 20 °C
Electrical endurance In < 25 A: 20,000 ops. (AC), 10,000 ops. (AC); 1,500
ops. (DC)
UL 1077 / CSA 22.2 No. 235
Tripping Characteristics C, K, Z
Rated voltage 1P: 277 V AC, 250 V DC
2...4P: 480 Y/277 V AC, 500 V DC
Rated interrupting capacity 6 kA (AC), 10 kA (DC)
Application 6 kA (AC), 10 kA (DC)
Reference temperature for tripping 25 °C
characteristic
Electrical endurance 6,000 ops. 1 cycle (1 s - ON, 9 s - OFF)
Mechanical data
Housing Insulation group I, RAL 7035
Toggle Insulation group II, black, sealable
Contact position indication Real CPI (green OFF / red ON)
Protection degree acc. to DIN EN 60529 IP20, IP40 in enclosure with cover
Mechanical endurance 20,000 ops.
Shock resistance acc. to IEC/EN 60068- 25 g, 2 shocks, 13 ms
2-27
Vibration resistance acc. to IEC/EN 60068- 5 g, 20 cycles at 5…150…5 Hz with load 0.8 In
2-6
Environmental conditions acc. to IEC/EN 28 cycles with 55 °C/90-96 % and 25 °C/95-100 %
60068-2-30
Ambient temperature -25 ... +55 °C
Storage temperature -40 ... +70 °C
4.3.2 S800S UC
4 DC fault protection – The ABB offer
The following table shows the electrical characteristics of the MCBs type S800S UC:
S800S UC
Poles 1, 2, 3, 4
K: 7In< Im < 14 In n
The following table shows the electrical characteristics of the MCBs and switch-disconnectors of the series S800 PV
The IGBT is a semiconductor device with four alternating By contrast, the IGBT has a diode like voltage drop
layers (P-N-P-N) that are controlled by a metal-oxide- (typically of the order of 2V) increasing only with the
Annex A: Description of the main power-electronic-switches
ated S-IGCT.
Usually, the reverse blocking voltage rating and forward During a normal forced turn-off transient, QE is turned
blocking voltage rating are the same. The typical applica- off and QG is turned on.
tion for symmetrical IGCT is in current source inverters. The turn-off of the emitter switch QE cuts off the GTO’s
IGCT incapable of blocking reverse voltage are known cathode current path, and all of the cathode currents are
as asymmetrical IGCT, abbreviated A-IGCT. quickly transferred to the gate path.
They typically have a reverse breakdown rating in the In this way, the latch-up mechanism of the GTO is bro-
tens of volt. A-IGCTs are used where either a reverse ken and the ETO is turned off under a unity-gain turn-off
conducting diode is applied in parallel (for example, in condition (also known as a hard driven turn-off condition).
voltage source inverters) or where reverse voltage would Therefore, the ETO has a wide reverse biased safe op-
never occur (for example, in switching power supplies eration area (RBSOA) and snuberless turn-off capability.
or DC traction choppers). Asymmetrical IGCTs can be In real applications, a dv/dt turn-off snubber is usually
fabricated with a reverse conducting diode in the same applied to reduce the device turn-off loss and to improve
package. its reliability.
These are known as RC-IGCTs, for reverse conducting With a dv/dt snubber, compared to the snubberless case,
IGCTs. Moreover, IGCTs capable of blocking reverse the ETO has a lower storage time and current fall time
voltage are known as reverse blocking IGCTs (symmetri- since the device current starts to drop once the anode
cal IGCTs), abbreviated RB-IGCT. Usually, the reverse voltage begins to rise.
blocking voltage rating and forward blocking voltage During the turn-on transient, QE is turned on and QG is
rating are the same. turned off. A high-current pulse is injected into the GTO
gate by the integrated gate driver in order to reduce
the turn-on delay time and to improve the turn-on di/dt
rating. The built-in PNP and NPN transistors inside the
A.4 ETO (Emitter Turn-Off thyristor) GTO latch up quickly and the anode voltage of the ETO
collapses to a low voltage. So the turn-on process of the
Based on the integration of the GTO thyristor and power ETO is similar to that of a GTO.
MOSFET technology, the emitter turn-off (ETO) thyristor Thanks to the ETO compact structure and low gate loop
is a new type of superior high-power semiconductor inductance (about 10 nH), a gate current pulse with high
device that is suitable for use in high-frequency and amplitude and rise rate can be applied; therefore an ETO
high-power converters. can be uniformly turned on without current crowding
problems.
The input/output to switch-mode converter is assumed to The harmonic spectrum of the phase voltage (vf ) shows
be a DC-voltage source, so such converters are referred three items of importance:
Annex B: Switch-mode three-phase converters
to as voltage-source converters (VSCs). VSCs can be – the peak amplitude of the fundamental frequency
split into two macro-categories: component is [1]:
– Pulse-Witdh Modulated (PWM) – in these converters, vˆ c . Vdc V
the DC voltage is kept constant in magnitude, so the vˆ f 1 = = ma . dc (ma ≤ 1) [B.3]
vˆ t 2 2
converter controls the magnitude and the frequency of
the AC voltages. This is met by PWM of the converter – the harmonics in the voltage waveform appear as side-
switches and hence such converters are called PWM bands centered around fsw and its multiples
converters. There are various schemes to pulse-width – choosing mf as an odd integer, only the coefficients
modulate the inverter switches so as to shape the AC of the sine series in the Fourier analysis are finite and
voltage to be as close to a sine wave as possible only odd harmonics are present.
– Square-Wave – in these converters, the DC voltage Because of the relative ease in filtering harmonic volt-
is controlled in order to control the magnitude of the ages at high frequencies, it is desiderable to use as
AC voltage, so the converter has to control only the high a switching frequency as possible, except for one
frequency of the AC voltage, whose waveform is similar significant drawback: switching losses in the inverter
to a square wave and hence these converters are called switches increase proportionally with the switching
square-wave converters. frequency. Hence, in most applications, the switching
frequency is up to 20 kHz.
B.1 Pulse Width Modulated (PWM) switching With reference to the value of ma, two behavior modes
mode may occur:
– linear modulation (ma ≤ 1), in which the fundamental
frequency component in the output voltage varies
In a PWM control, so as to produce a sinusoidal AC
linearly with ma.
voltage waveform at a desired frequency, a sinusoidal
Therefore, the line-to-line rms voltage at the fundamen-
control signal (vc) at the desired frequency is compared
tal frequency can be written as:
with a triangular waveform (vt).
The frequency of the triangular waveform establishes the 3 . . Vdc 1.63. vl
vl = ma 0.612. ma. Vdc (ma ≤ 1) -> Vdc [B.4]
switching frequency (fsw) and is generally kept constant 2 2 ma
with its amplitude.
– overmodulation (ma > 1), in which the peak of the
The control signal is used to modulate the switch duty
control voltage exceeds the peak of the triangular
ratio and has a frequency (f1), which is the desired fun-
waveform. In this mode of operation the fundamental
damental frequency of the inverter voltage output.
frequency voltage does not increase proportionally
The amplitude modulation ratio (ma) is defined as the
with ma and for sufficiently large value of ma, the PWM
ratio between the peak amplitude of the control signal
degenerates into a square-wave inverter waveform.
and the amplitude of the triangular signal (which is usu-
This results in the maximum value of the line-to-line
ally kept constant):
rms voltage equal to:
vˆ c
ma = [B.1] 3 . 4 . Vdc 6.
vˆ t vl = = V 0.78. Vdc -> Vdc 1.28. vl [B.5]
2 π 2 π dc
The frequency modulation ration (mf) is defined as the
ration between the switching frequency and the funda- In overmodulation more sideband harmonics appear
mental frequency: centered around the frequency of harmonic mf and its
multiples. However, the dominant harmonics may not
f sw
mf = [B.2] have as large an amplitude as with ma ≤ 1.
f1
There are various ways to obtain the switching signals for [B.8]
the converter switches in order to control the AC current.
The real power P and the reactive power Q supplied by
Two of such methods are:
the source to the converter are [1]:
– tolerance band control – the actual phase current is
compared with a sinusoidal reference current with the [B.9]
tolerance band around the reference current associated
with that phase.
If the actual current tries to go beyond the upper tol- [B.10]
erance band, the lower inverter switch of the actual
inverter leg is turned on whereas the upper inverter From these equations it is clear that for a given line volt-
switch is turned off. age and inductance Ls, desired values of P and Q can
Similar actions take place in the other two phases. The be obtained by controlling the magnitude and phase of
switching frequency depends on how fast the current conv
. In particular, the magnitude of conv can be varied
changes from the upper to the lower limit and vice by controlling the amplitude of the sinusoidal reference
versa. waveform vc, whereas the phase of conv can be varied
Moreover, the switching frequency does not remain by shifting the phase of vc.
constant but varies along the current waveform. Hence, the magnitude and direction of power flow are
– fixed frequency control – the error between the refer- automatically controlled by regulating Vdc at its desired
ence and the actual current is amplified or fed through value.
L
L LVDC
M C
3 L Migrogrid
Figure C.3 – DC/DC interface converter between the PV plant and the
LVDC microgrid
L D1
LVDC
PV plant Cin D2 Cout Migrogrid
QT2 QT9
MV/LV trasformer substations: theory and exam- Bus communication with ABB circuit-breakers
ples of short-circuit calculation
QT3 QT10
Distribution systems and protection against indi- Photovoltaic plants
rect contact and earth fault
QT4 QT11
ABB circuit-breakers inside LV switchboards Guidelines to the construction of a low-voltage
assembly complying with the Standards IEC 61439
Part 1 and Part 2
QT5 QT12
ABB circuit-breakers for direct current Generalities on naval systems and installations
applications on board
QT6 QT13
Arc-proof low voltage switchgear and controlgear Wind power plants
assemblies
QT7 QT14
Three-phase asynchronous motors Faults in LVDC microgrids with front-end
Generalities and ABB proposals for the coordina- converters
tion of protective devices
ABB SACE The data and illustrations are not binding. We reserve
1SDC007113G0201 - 06/2015
the right to modify the contents of this document on
A division of ABB S.p.A. the basis of technical development of the products,
L.V. Breakers without prior notice.
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