26lv255h Za Ld0ay

Internal Use Only
North/Latin America http://aic.lgservice.com

Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
LED LCD TV
SERVICE MANUAL
CHASSIS : LD0AY
MODEL : 26LV255H 26LV255H-ZA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL67180604 (1111-REV00) Printed in Korea

CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ................................................................................. 3
SPECIFICATION ....................................................................................... 6
ADJUSTMENT INSTRUCTION ................................................................ 8
BLOCK DIAGRAM...................................................................................14
EXPLODED VIEW .................................................................................. 15
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
Copyright ©2011 LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer, AC Volt-meter
always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical Good Earth Ground
shock. such as WATER PIPE,
To Instrument’s CONDUIT etc.
0.15 uF
Leakage Current Cold Check(Antenna Cold Check) exposed
With the instrument AC plug removed from AC source, connect an METALLIC PARTS
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC 1.5 Kohm/10W
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc. When 25A is impressed between Earth and 2nd Ground
If the exposed metallic part has a return path to the chassis, the for 1 second, Resistance must be less than 0.1 Ω
measured resistance should be between 1 MΩ and 5.2 MΩ.
*Base on Adjustment standard
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service 2. After removing an electrical assembly equipped with ES
manual and its supplements and addenda, read and follow the devices, place the assembly on a conductive surface such as
SAFETY PRECAUTIONS on page 3 of this publication. aluminum foil, to prevent electrostatic charge buildup or
NOTE: If unforeseen circumstances create conflict between the exposure of the assembly.
following servicing precautions and any of the safety precautions on 3. Use only a grounded-tip soldering iron to solder or unsolder ES
page 3 of this publication, always follow the safety precautions. devices.
Remember: Safety First. 4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as "anti-static" can generate
General Servicing Precautions electrical charges sufficient to damage ES devices.
1. Always unplug the receiver AC power cord from the AC power 5. Do not use freon-propelled chemicals. These can generate
source before; electrical charges sufficient to damage ES devices.
a. Removing or reinstalling any component, circuit board 6. Do not remove a replacement ES device from its protective
module or any other receiver assembly. package until immediately before you are ready to install it.
b. Disconnecting or reconnecting any receiver electrical plug or (Most replacement ES devices are packaged with leads
other electrical connection. electrically shorted together by conductive foam, aluminum foil
c. Connecting a test substitute in parallel with an electrolytic or comparable conductive material).
capacitor in the receiver. 7. Immediately before removing the protective material from the
CAUTION: A wrong part substitution or incorrect polarity leads of a replacement ES device, touch the protective material
installation of electrolytic capacitors may result in an to the chassis or circuit assembly into which the device will be
explosion hazard. installed.
CAUTION: Be sure no power is applied to the chassis or circuit,
2. Test high voltage only by measuring it with an appropriate high and observe all other safety precautions.
voltage meter or other voltage measuring device (DVM, 8. Minimize bodily motions when handling unpackaged
FETVOM, etc) equipped with a suitable high voltage probe. replacement ES devices. (Otherwise harmless motion such as
Do not test high voltage by "drawing an arc". the brushing together of your clothes fabric or the lifting of your
3. Do not spray chemicals on or near this receiver or any of its foot from a carpeted floor can generate static electricity
assemblies. sufficient to damage an ES device.)
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the General Soldering Guidelines
contacts with a pipe cleaner, cotton-tipped stick or comparable 1. Use a grounded-tip, low-wattage soldering iron and appropriate
non-abrasive applicator; 10 % (by volume) Acetone and 90 % tip size and shape that will maintain tip temperature within the
(by volume) isopropyl alcohol (90 % - 99 % strength) range or 500 °F to 600 °F.
CAUTION: This is a flammable mixture. 2. Use an appropriate gauge of RMA resin-core solder composed
Unless specified otherwise in this service manual, lubrication of of 60 parts tin/40 parts lead.
contacts in not required. 3. Keep the soldering iron tip clean and well tinned.
5. Do not defeat any plug/socket B+ voltage interlocks with which 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
receivers covered by this service manual might be equipped. bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
6. Do not apply AC power to this instrument and/or any of its Do not use freon-propelled spray-on cleaners.
electrical assemblies unless all solid-state device heat sinks are 5. Use the following unsoldering technique
correctly installed. a. Allow the soldering iron tip to reach normal temperature.
7. Always connect the test receiver ground lead to the receiver (500 °F to 600 °F)
chassis ground before connecting the test receiver positive b. Heat the component lead until the solder melts.
lead. c. Quickly draw the melted solder with an anti-static, suction-
Always remove the test receiver ground lead last. type solder removal device or with solder braid.
8. Use with this receiver only the test fixtures specified in this CAUTION: Work quickly to avoid overheating the circuit
service manual. board printed foil.
CAUTION: Do not connect the test fixture ground strap to any 6. Use the following soldering technique.
heat sink in this receiver. a. Allow the soldering iron tip to reach a normal temperature
(500 °F to 600 °F)
Electrostatically Sensitive (ES) Devices b. First, hold the soldering iron tip and solder the strand against
Some semiconductor (solid-state) devices can be damaged easily the component lead until the solder melts.
by static electricity. Such components commonly are called c. Quickly move the soldering iron tip to the junction of the
Electrostatically Sensitive (ES) Devices. Examples of typical ES component lead and the printed circuit foil, and hold it there
devices are integrated circuits and some field-effect transistors and only until the solder flows onto and around both the
semiconductor "chip" components. The following techniques component lead and the foil.
should be used to help reduce the incidence of component CAUTION: Work quickly to avoid overheating the circuit
damage caused by static by static electricity. board printed foil.
1. Immediately before handling any semiconductor component or d. Closely inspect the solder area and remove any excess or
semiconductor-equipped assembly, drain off any electrostatic splashed solder with a small wire-bristle brush.
charge on your body by touching a known earth ground.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the
unit under test.
IC Remove/Replacement Circuit Board Foil Repair
Some chassis circuit boards have slotted holes (oblong) through Excessive heat applied to the copper foil of any printed circuit
which the IC leads are inserted and then bent flat against the board will weaken the adhesive that bonds the foil to the circuit
circuit foil. When holes are the slotted type, the following technique board causing the foil to separate from or "lift-off" the board. The
should be used to remove and replace the IC. When working with following guidelines and procedures should be followed whenever
boards using the familiar round hole, use the standard technique this condition is encountered.
as outlined in paragraphs 5 and 6 above.
At IC Connections
Removal To repair a defective copper pattern at IC connections use the
1. Desolder and straighten each IC lead in one operation by gently following procedure to install a jumper wire on the copper pattern
prying up on the lead with the soldering iron tip as the solder side of the circuit board. (Use this technique only on IC
melts. connections).
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing the 1. Carefully remove the damaged copper pattern with a sharp
IC. knife. (Remove only as much copper as absolutely necessary).
Replacement 2. carefully scratch away the solder resist and acrylic coating (if
1. Carefully insert the replacement IC in the circuit board. used) from the end of the remaining copper pattern.
2. Carefully bend each IC lead against the circuit foil pad and 3. Bend a small "U" in one end of a small gauge jumper wire and
solder it. carefully crimp it around the IC pin. Solder the IC connection.
3. Clean the soldered areas with a small wire-bristle brush. 4. Route the jumper wire along the path of the out-away copper
(It is not necessary to reapply acrylic coating to the areas). pattern and let it overlap the previously scraped end of the good
copper pattern. Solder the overlapped area and clip off any
"Small-Signal" Discrete Transistor excess jumper wire.
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as At Other Connections
possible to the component body. Use the following technique to repair the defective copper pattern
2. Bend into a "U" shape the end of each of three leads remaining at connections other than IC Pins. This technique involves the
on the circuit board. installation of a jumper wire on the component side of the circuit
3. Bend into a "U" shape the replacement transistor leads. board.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with 1. Remove the defective copper pattern with a sharp knife.
long nose pliers to insure metal to metal contact then solder Remove at least 1/4 inch of copper, to ensure that a hazardous
each connection. condition will not exist if the jumper wire opens.
2. Trace along the copper pattern from both sides of the pattern
Power Output, Transistor Device break and locate the nearest component that is directly
Removal/Replacement connected to the affected copper pattern.
1. Heat and remove all solder from around the transistor leads. 3. Connect insulated 20-gauge jumper wire from the lead of the
2. Remove the heat sink mounting screw (if so equipped). nearest component on one side of the pattern break to the lead
3. Carefully remove the transistor from the heat sink of the circuit of the nearest component on the other side.
board. Carefully crimp and solder the connections.
4. Insert new transistor in the circuit board. CAUTION: Be sure the insulated jumper wire is dressed so the
5. Solder each transistor lead, and clip off excess lead. it does not touch components or sharp edges.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor

Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range 3. Test method

This specification is applied to the LCD TV used LD0AY 1) Performance: LGE TV test method followed
chassis. 2) Demanded other specification
- Safety: CE, IEC specification
2. Requirement for Test - EMC:CE, IEC
Each part is tested as below without special appointment.
1) Temperature: 25 ºC ± 5 ºC(77 ºF ± 9 ºF), CST: 40 ºC ± 5 ºC

2) Relative Humidity : 65 % ± 10 %
3) Power Voltage
: Standard input voltage(AC 100-240 V~, 50 / 60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 5 minutes prior to
the adjustment.
4. Component Video Input (Y, PB, PR)

Specification
No. Remark
Resolution H-freq(kHz) V-freq(Hz)
1. 720x480 15.73 60.00 SDTV,DVD 480i
2. 720x480 15.63 59.94 SDTV,DVD 480i
3. 720x480 31.47 59.94 480p
4. 720x480 31.50 60.00 480p
5. 720x576 15.625 50.00 SDTV,DVD 625 Line
6. 720x576 31.25 50.00 HDTV 576p
7. 1280x720 45.00 50.00 HDTV 720p
8. 1280x720 44.96 59.94 HDTV 720p
9. 1280x720 45.00 60.00 HDTV 720p
10. 1920x1080 31.25 50.00 HDTV 1080i
11. 1920x1080 33.75 60.00 HDTV 1080i
12. 1920x1080 33.72 59.94 HDTV 1080i
13. 1920x1080 56.250 50 HDTV 1080p
14. 1920x1080 67.5 60 HDTV 1080p
5. RGB Input (PC)
Specification
No. Proposed Remark
Resolution H-freq(kHz) V-freq(Hz) Pixel Clock(MHz)
1. 720*400 31.468 70.08 28.321 For only DOS mode
2. 640*480 31.469 59.94 25.17 VESA Input 848*480 60 Hz, 852*480 60 Hz
-> 640*480 60 Hz Display
3. 800*600 37.879 60.31 40.00 VESA
4. 1024*768 48.363 60.00 65.00 VESA(XGA)
5. 1280*768 47.78 59.87 79.5 WXGA
6. 1360*768 47.72 59.8 84.75 WXGA HD Model
7. 1366*768 47.56 59.6 84.75 WXGA WXGA Model1
8. 1280*1024 63.981 60.02 108.875 SXGA FHD model
9. 1280*720 45 60 74.25 720p DTV Standard
10. 1920*1080 67.5 60 148.5 WUXGA FHD model
6. HDMI Input
(1) DTV Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*480 31.469 / 31.5 59.94 / 60 27.00 / 27.03 SDTV 480P
2. 720*576 31.25 50 54 SDTV 576P
3. 1280*720 37.500 50 74.25 HDTV 720P
4. 1280*720 44.96 / 45 59.94 / 60 74.17 / 74.25 HDTV 720P
5. 1920*1080 33.72 / 33.75 59.94 / 60 74.17 / 74.25 HDTV 1080I
6. 1920*1080 28.125 50.00 74.25 HDTV 1080I
7. 1920*1080 26.97 / 27 23.97 / 24 74.17 / 74.25 HDTV 1080P
8. 1920*1080 33.716 / 33.75 29.976 / 30.00 74.25 HDTV 1080P
9. 1920*1080 56.250 50 148.5 HDTV 1080P
10. 1920*1080 67.43 / 67.5 59.94 / 60 148.35 / 148.50 HDTV 1080P
(2) PC Mode
No. Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed Remark
1. 720*400 31.468 70.08 28.321 HDCP
2. 640*480 31.469 59.94 25.17 VESA HDCP
3. 800*600 37.879 60.31 40.00 VESA HDCP
4. 1024*768 48.363 60.00 65.00 VESA(XGA) HDCP
5. 1280*768 47.78 59.87 79.5 WXGA HDCP
6. 1360*768 47.72 59.8 84.75 WXGA HDCP
7. 1280*720 45 60 74.25 HDCP
8. 1280*1024 63.981 60.2 108.875 SXGA HDCP / FHD model
9. 1920*1080 67.5 60 148.5 WUXGA HDCP / FHD model
ADJUSTMENT INSTRUCTION
1. Application Range (2) (3)
This specification sheet is applied to all of the LCD TV with
LD0AY chassis.
2. Designation
1) The adjustment is according to the order which is designated
and which must be followed, according to the plan which can Please Check the Speed :
To use speed between
be changed only on agreeing. from 200KHz to 400KHz
2) Power Adjustment: Free Voltage
3) Magnetic Field Condition: Nil.
5) Click “Auto” tab and set as below.
4) Input signal Unit: Product Specification Standard
6) Click “Run”.
5) Reserve after operation: Above 5 Minutes (Heat Run)
7) After downloading, check “OK” message.
Temperature : at 25 ºC ± 5 ºC
Relative humidity : 65 % ± 10 % (4)
Input voltage : 220 V, 60 Hz
filexxx.bin
6) Adjustment equipments: Color analyzer(CA-210 or CA-110), (5)
DDC Adjustment Jig equipment, Service remote control.
(7) .OK
7) Push the “IN STOP” key - For memory initialization.
Case1 : Software version up (6)
1. After downloading S/W by USB, TV set will reboot

automatically.
2. Push “In-stop” key.
3. Push “Power on” key. * USB DOWNLOAD
4. Function inspection 1) Put the USB Stick to the USB socket.
5. After function inspection, Push “In-stop” key. 2) Automatically detecting update file in USB Stick.
Case2 : Function check at the assembly line - If your downloaded program version in USB Stick is Low,
1. When TV set is entering on the assembly line, Push it didn’t work. But your downloaded version is High, USB
“In-stop” key at first. data is automatically detecting.
2. Push “Power on” key for turning it on. 3) Show the message “Copying files from memory”.
-> If you push “Power on” key, TV set will recover
channel information by itself.
3. After function inspection, Push “In-stop” key.
3. Main PCB check process

* APC - After Manual-Insult, executing APC
* Boot file Download

1) Execute ISP program “Mstar ISP Utility” and then click
“Config” tab.
(1)
fi lexxx.bin
2) Set as below, and then click “Auto Detect” and check “OK”
message. If “Error” is displayed, Check connection between
computer, jig, and set.
3) Click “Read” tab, and then load download file(XXXX.bin) by
clicking “Read”.
4) Click “Connect” tab. If “Can’t” is displayed, check connection
between computer, jig, and set.
4) Updating is starting. 3.1. ADC Process
(1) ADC
- Enter Service Mode by pushing “ADJ” key,
- Enter Internal ADC mode by pushing “G” key at “7. ADC
Calibration”.
<Caution> Using ‘power on’ key of the Adjustment remote

control, power on TV.
* ADC Calibration Protocol (RS232)

No Item CMD1 CMD2 Data0
Enter Adjust Adjust A A 0 0 When transfer the ‘Mode In’,
Mode ‘Mode In’ Carry the command.
ADC adjust ADC Adjust A D 1 0 Automatically adjustment
(The use of a internal pattern)
Adjust Sequence
• aa 00 00 [Enter Adjust Mode]
• xb 00 40 [Component1 Input (480i)]
• ad 00 10 [Adjust 480i Comp1]
5) Uploading completed, the TV will restart automatically.
• xb 00 60 [RGB Input (1024*768)]
6) If your TV is turned on, check your updated version and
• ad 00 10 [Adjust 1024*768 RGB]
Tool option.(explain the Tool option, next stage)
• aa 00 90 End Adjust mode
* If downloading version is more high than your TV have,
* Required equipment : Adjustment remote control.
TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t
have a DTV/ATV test on production line. 3.2. Function Check
* Check display and sound
* After downloading, have to adjust Tool Option again. - Check Input and Signal items. (cf. work instructions)
1) Push “IN-START” key in service remote control. 1) TV
2) Select “Tool Option 1” and push “OK” key. 2) AV (SCART)
3) Punch in the number. (Each model hax their number) 3) COMPONENT (480i)
4) RGB (PC : 1024 x 768 @ 60 Hz)
5) HDMI
6) PC Audio In
* Display and Sound check is executed by Remote control.
4. Total Assembly line process • Auto adjustment Map(RS-232C)
RS-232C COMMAND
4.1. Adjustment Preparation [CMD ID DATA]
· W/B Equipment condition Wb 00 00 White Balance Start
CA210 Wb 00 ff White Balance End
- CCFL/EEFL -> CH 9, Test signal : Inner pattern(85 IRE) RS-232C COMMAND MIN CENTER MAX
- LED(AUO) -> CH 14, Test signal : Inner pattern(80 IRE)
· Above 5 minutes H/run in the inner pattern. (“power on” key [CMD ID DATA] (DEFAULT)
of adjustment remote control) Cool Mid Warm Cool Mid Warm
Cool 13,000 K X=0.269(±0.002) R Gain jg Ja jd 00 172 192 192 192
Y=0.273(±0.002) <Test Signal> G Gain jh Jb je 00 172 192 192 192
Medium 9,300 K X=0.285(±0.002) Inner pattern B Gain ji Jc jf 00 192 192 172 192
Y=0.293(±0.002) (216gray,85IRE) R Cut 64 64 64 128
Warm 6,500 K X=0.313(±0.002) G Cut 64 64 64 128
Y=0.329(±0.002) B Cut 64 64 64 128
· Edge LED W/B Table in process of time(Only LGD module) ** Caution **

CA210 : CH14, Test signal : Inner patter (80 IRE) Color Temperature : COOL, Medium, Warm.
Aging Time Cool Medium Warm One of R Gain/G Gain/ B Gain should be kept on 0xC0, and
adjust other two lower than C0.
GP2 (Min.) X Y X Y X Y
(when R/G/B Gain are all C0, it is the FULL Dynamic Range
269 273 285 293 313 329
of Module.)
1 0-2 279 288 295 308 319 338
2 3-5 278 286 294 306 318 336 * Manual W/B process using adjusts Remote control.
3 6-9 277 285 293 305 317 335 • After enter Service Mode by pushing “ADJ” key,
4 10-19 276 283 292 303 316 333 • Enter White Balance by pushing “ G ” key at “8. White
5 20-35 274 280 290 300 314 330 Balance”.
6 36-49 272 277 288 297 312 327
7 50-79 271 275 287 295 311 325
8 80-149 270 274 286 294 310 324
9 Over 150 269 273 285 293 309 323
* Connecting picture of the measuring instrument

(On Automatic control)
Inside PATTERN is used when W/B is controlled. Connect to
auto controller or push Adjustment remote control POWER
ON -> Enter the mode of White-Balance, the pattern will
come out. * After done all adjustments, Press “In-start” button and
compare Tool option and Area option value with its BOM, if
it is correctly same then unplug the AC cable. If it is not
same, then correct it same with BOM and unplug AC cable.
Full White Pattern CA-210
For correct it to the model’s module from factory Jig model.
COLOR
ANALYZER
* Push the “IN STOP” key after completing the function
TYPE: CA-210 inspection. And Mechanical Power Switch must be set “ON”.
4.2. DDC EDID Write (RGB 128Byte )

RS-232C Communication
• Connect D-sub Signal Cable to D-sub Jack.
• Write EDID Data to EEPROM(24C02) by using DDC2B
* Auto-control interface and directions protocol.
1) Adjust in the place where the influx of light like floodlight • Check whether written EDID data is correct or not.
around is blocked. (illumination is less than 10 lux.) * For Service main Assembly, EDID have to be downloaded to
2) Adhere closely the Color Analyzer (CA210) to the module Insert Process in advance.
less than 10 cm distance, keep it with the surface of the
Module and Color Analyzer’s prove vertically.(80° ~ 100°). 4.3. DDC EDID Write (HDMI 256Byte)
3) Aging time • Connect HDMI Signal Cable to HDMI Jack.
- After aging start, keep the power on (no suspension of • Write EDID Data to EEPROM(24C02) by using DDC2B
power supply) and heat-run over 5 minutes. protocol.
- Using ‘no signal’ or ‘full white pattern’ or the others, • Check whether written EDID data is correct or not.
check the back light on. * For Service main Assembly, EDID have to be downloaded to
Insert Process in advance.
Copyright ©2011 LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only
4.4. EDID DATA 1) FHD RGB EDID data
0 1 2 3 4 5 6 7 8 9 A B C D E F
1) All Data : HEXA Value
00 00 FF FF FF FF FF FF 00 1E 6D a b
2) Changeable Data :
10 c 01 03 68 10 09 78 0A EE 91 A3 54 4C 99 26
*: Serial No : Controlled / Data:01
20 0F 50 54 A1 08 00 81 C0 61 40 45 40 31 40 01 01
**: Month : Controlled / Data:00
30 01 01 01 01 01 01 1B 21 50 A0 51 00 1E 30 48 88
***: Year : Controlled
40 35 00 A0 5A 00 00 00 1C 01 1D 00 72 51 D0 1E 20
****: Check sum
50 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
60 3E 1F 46 10 00 0A 20 20 20 20 20 20 d
- Auto Download 70 d 00 e
• After enter Service Mode by pushing “ADJ” key, 80 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
• Enter EDID D/L mode. 90 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
• Enter “START” by pushing “OK” key. A0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
B0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
C0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
D0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
E0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
F0 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
2)HD HDMI EDID data

0 1 2 3 4 5 6 7 8 9 A B C D E F
00 00 FF FF FF FF FF FF 00 1E 6D a b
10 c 01 03 80 10 09 78 0A EE 91 A3 54 4C 99 26
20 0F 50 54 A1 08 00 81 C0 61 40 45 40 31 40 01 01
30 01 01 01 01 01 01 1B 21 50 A0 51 00 1E 30 48 88
40 35 00 A0 5A 00 00 00 1C 01 1D 00 72 51 D0 1E 20
<Caution> Never connect HDMI & D-sub cable when EDID 50 6E 28 55 00 A0 5A 00 00 00 1E 00 00 00 FD 00 3A
download 60 3E 1F 46 10 00 0A 20 20 20 20 20 20 d
70 d 01 e
* Edid data and Model option download (RS232) 80 02 03 20 F1 4E 10 1F 84 13 05 14 03 02 12 20 21
NO Item CMD1 CMD2 Data0 90 22 15 01 26 15 07 50 09 57 07 f
Enter download Download A A 0 0 When transfer the ‘Mode In’, A0 f 80 18 71 1C 16 20 58 2C 25 00 A0 5A 00 00

B0 00 9E 01 1D 00 80 51 D0 0C 20 40 80 35 00 A0 5A
Mode ‘Mode In’ Carry the command.
C0 00 00 00 1E 8C 0A D0 8A 20 E0 2D 10 10 3E 96 00
EDID data and Download A E 00 10 Automatically Download D0 A0 5A 00 00 00 18 02 3A 80 18 71 38 2D 40 58 2C
Model option (The use of a internal pattern) E0 45 00 A0 5A 00 00 00 1E 01 1D 80 D0 72 1C 16 20
download F0 10 2C 25 80 A0 5A 00 00 00 9E 00 00 00 00 00 e
* Detail EDID Options are below

- Manual Download ⓐ Product ID
* Caution Model Name HEX EDID Table DDC Function
1) Use the proper signal cable for EDID Download. HD Model 0000 00 00 Analog/Digital
- Analog EDID : Pin3 exists ⓑ Serial No: Controlled on production line.
- Digital EDID : Pin3 exists
2) Never connect HDMI & D-sub Cable at the same time. ⓒ Month, Year: Controlled on production line:
3) Use the proper cables below for EDID Writing. ex) Monthly : ‘02’ -> ‘02’
4) Download HDMI1, HDMI2, separately because HDMI1 is Year : ‘2009’ -> ‘13’
different from HDMI2. ⓓ Model Name(Hex):
For Analog EDID For HDMI EDID MODEL MODEL NAME(HEX)
LG TV 00 00 00 FC 00 4C 47 20 54 56 0A 20 20 20 20 20 20 20
D-sub to D-sub DVI-D to HDMI or HDMI to HDMI
ⓔ Checksum: Changeable by total EDID data.
EDID C/S data HD
HDMI RGB
Check sum Block 0 B4 CD
(Hex) Block 1 65(HDMI1)
55(HDMI2)
Item Condition Data(Hex) 45(HDMI3)
Manufacturer ID GSM 1E6D ⓕ Vendor Specific(HDMI)

Version Digital : 1 01 INPUT MODEL NAME(HEX)
Revision Digital : 3 03 HDMI1 65030C001000
HDMI2 65030C002000
HDMI3 65030C003000
4.5. V-COM Adjust(Only LGD(M+S) Module) 5. Model name & Serial number D/L
- Why need Vcom adjustment? • Press “Power on” key of service remote control.
A The Vcom (Common Voltage) is a Reference Voltage of (Baud rate : 115200 bps)
Liquid Crystal Driving. • Connect RS232 Signal Cable to RS-232 Jack.
-> Liquid Crystal need for Polarity Change with every frame. • Write Serial number by use RS-232.
Circuit Block • Must check the serial number at the Diagnostics of SET UP
Data (R ,G,B ) & Ga mma menu. (Refer to below.)
Con t rol si gnal Re f e r e nce V o ltage
Data (R ,G,B ) & C ont ro l s ignal
Ti m i n g
S Co nt r o ll e r
Gamm a Reference
In t e r f a ce
Cont rol si gnal Volta ge

Y Da t a I n p u t
So urce D r i v e I C
S
T Column Line
Pane l
Gat e Driv e IC
E Power
Po w e rInput
I nput Po w e r V COM
Blo ck
M CLC CST
Liquid
Crys tal
V COM Row Li ne TFT
V COM
5.1. Signal TABLE
CMD LENGTH ADH ADL DATA_1 ... Data_n CS DELAY
- Adjust sequence CMD : A0h

· Press the PIP key of the Adjustment remote control.(This LENGTH : 85~94h (1~16 bytes)
PIP key is hot key to enter the VCOM adjusting mode.) ADH : EEPROM Sub Address high (00~1F)
(Or After enter Service Mode by pushing “ADJ” key, then ADL : EEPROM Sub Address low (00~FF)
Data : Write data
Enter V-Com Adjust mode by pushing “G” key at “10. V-
CS : CMD+LENGTH+ADH+ADL+Data_1+…+Data_n
Com”)
Delay : 20ms
· As pushing the right or the left key on the remote control,
and find the V-COM value which is no or minimized the
Flicker. (If there is no flicker at default value, Press the exit 5.2. Command Set
key and finish the VCOM adjustment.) No. Adjust mode CMD(hex) LENGTH(hex) Description
· Push the “OK” key to store value. Then the message 1 EEPROM WRITE A0h 84h+n n-bytes Write(n=1~16)
“Saving OK” is pop.
· Press the exit key to finish VCOM adjustment.
* Description
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0,
Phase
Data write: Model name and Serial number write in EEPROM,.
5.3. Method & notice

(Visual Adjust and control the Voltage level) A. Serial number D/L is using of scan equipment.
B. Setting of scan equipment operated by Manufacturing
4.6. Outgoing condition Configuration Technology Group.
- When pressing IN-STOP key by Service remote control, Red C. Serial number D/L must be conformed when it is produced
LED are blinked alternatively. And then automatically turn off. in production line, because serial number D/L is mandatory
(Must not AC power OFF during blinking) by D-book 4.0.
4.7. Hi-pot test

Confirm whether is normal or not when between power
board’s ac block and GND is impacted on 1.5 kV(dc) or 2.2
kV(dc) for one second.
* Manual Download (Model Name and Serial Number)
If the TV set is downloaded by OTA or Service man, sometimes
6. CI+ Key Download method
model name or serial number is initialized.(Not always) (1) Download Procedure
There is impossible to download by bar code scan, so It need 1) Press “Power on” key of a service remote control.
Manual download. (Baud rate : 115200 bps)
1) Press the ‘Instart’ key of Adjustment remote control. 2) Connect RS232-C Signal Cable.
2) Go to the menu ‘5.Model Number D/L’ like below photo. 3) Write CI+ Key through RS-232-C.
3) Input the Factory model name(ex 42LD450-ZA) or Serial 4) Check whether the key was downloaded or not at ‘In
number like photo. Start’ menu.(Refer to below).
4) Check the model name Instart menu. -> Factory name

displayed. (ex 42LD450-ZA)
5) Check the Diagnostics. (DTV country only) -> Buyer model
displayed. (ex 42LD450)
=> Check the Download to CI+ Key value in LGset.
1. Check the method of CI+ Key value.
a. Check the method on Instart menu.
b. Check the method of RS232C Command.
1) Into the main assembly mode (RS232 : aa 00 00)
CMD 1 CMD 2 Data 0
A A 0 0
2) Check the key download for transmitted command.

(RS232 : ci 00 10)
CMD 1 CMD 2 Data 0
C I 1 0
3) Result value
- Normally status for download : OKx
- Abnormally status for download : NGx
2. Check the method of CI+ Key value. (RS232)

1) Into the main assembly mode (RS232 : aa 00 00)
CMD 1 CMD 2 Data 0
A A 0 0
2) Check the method of CI+ key by command.

(RS232 : ci 00 20)
CMD 1 CMD 2 Data 0
C I 2 0
3) Result value
i 01 OK 1d1852d21c1ed5dcx
CI+ key Value
Copyright ©2011 LG Electronics. Inc. All rights reserved.
74LVC16244 PI_TS_DATA[0:7]
Buffer LED Panel
IC1501
PKT_DATA[0] FE_TS_DATA[0] LVDS (8bit or 10 bit)
LGDT1129
IC1503
FPGA
FE_TS_DATA[0:7]
(P1902)
CI Slot
Serial Flash
74LCX244
IC1902
CI_TS_DATA[0:7] CI_ADDR[0:7] IC1401
Buffer
PCM_A[0:7]
For Boot
B_TMDQ[0:16] DDR3 (2GB)

IF_N/P_MSTAR IC1201
TU3702
TU_CVBS
S001D)
Tuner
(TDTJ-
BLOCK DIAGRAM
TU_SIF A_TMDQ[0:16]
DDR3 (1GB)
IF_AGC
IC1202
F-SCART TV/DTV_VOUT
Mstar S7 PCM_A[0:7] NAND Flash

SC1_CVBS/R/G/B/FB_IN HYNIX(2G)
- 14 -
IC102
COMPONENT EEPROM
COMP_Y/Pb/pR I2C
RGB DSUB_ R/G/B

LGE101DC-R CAT24WC08W-T
(HDCP)IC103
HP_L/ROUT
DSUB_H/VSYNC Head
(IC101) Phone
SC1_L/R_IN, E_AM_AUDIO,AV_L/R_IN,
COMP_L/R_IN, PC_L/R_IN I2S Digital amp
(NTP7100) L/R
IC501
LED Clock LED Driver NEC Micom EEPROM
M24M01-HRMN6 AQZ1073ATL-3
(IC104) USB_DM/DP USB USB Power
USB Power
uPD78F1164A I2C IC402
I2C I2C
(IC1102) I2C SW HPD1/2, HDMI_CEC, 5V_HDMI 1/2
DC/DC Conv. IC5005/5006
(12V to 5V) HDMI 1/2
TMDS[0:7] ( Data, Clock (+/-))
Power SW
MP2305 (12V On/Off) MST_TX/RX
RS- 232C 5V IC2201
MP5000 SPDIF_OUT
SPDIF
12V IC2202
LGE Internal Use Only
MAX3232CDR NEC_TX/RX Up/Down Audio amp L/R

IC1100 Speaker Out (TPA3124D2) Speaker Out
Control
IC1500
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
910
400
900
521
LV1
540
810
200
* Set + Stand
A10
* Stand Base
560
+ Body
A9
301
120
A31
A2
300
511
510
Copyright LG Electronics. Inc. All rights reserved. - 15 - LGE Internal Use Only
IC102
NAND FLASH MEMORY +3.3V_Normal

HY27UF082G2B-TPCB
+3.3V_Normal
S7M-PLUS_DivX_MS10
LGE107DC-RP [S7M+ DIVX/MS10]
NC_1 NC_29
1 48
/PF_CE0 2GBIT_HYNIX
H : Serial Flash NC_2
2 EAN60708701 47
NC_28 IC101
L : NAND Flash PCM_A[0-7] PCM_D[0-7]
/PF_CE1 NC_3 NC_27
3 46
H : 16 bit
NC_4 NC_26 <T3 CHIP Config(AUD_LRCH)>
3.9K
1K
L : 8 bit 4 45 AR101 Boot from SPI flash : 1’b0 PCM_D[0] U22 N21
NC_5 I/O7 PCM_A[7]
Boot from NOR flash : 1’b1 PCM_D0 GPIO143/TCON0 5V_DET_HDMI_1
5 44 PCM_D[1] T21 M21
PCM_D1 GPIO145/TCON2 5V_DET_HDMI_2
NC_6 I/O6 PCM_A[6] PCM_D[2] T22 L22
R109
6 43
R107
PCM_D2 GPIO147/TCON4 5V_DET_HDMI_4

PCM_D[3] AB18 L21
R/B I/O5 PCM_A[5] PCM_D3 GPIO149/TCON6
/F_RB 7 42 PCM_D[4] AC18 P21
PCM_D4 GPIO151/TCON8
RE
8 41
I/O4 PCM_A[4] <T3 CHIP Config> PCM_D[5] AC19
/PF_OE PCM_D5
CE NC_25 22 (AUD_SCK, AUD_MASTER_CLK, PWM1, PWM0) PCM_D[6] AC20
9 40 PCM_D6
/PF_CE0 PCM_A[0-14] PCM_D[7] AC21 K21 22 R163
NC_7 NC_24 MIPS_no_EJ_NOR8 : 4’h3 (MIPS as host. No EJ PAD. Byte mode NAND flash.) PCM_D7 GPIO36/UART3_RX
L23 22 R164
EXT_VOL+
R108 1K
10 39 MIPS_EJ1_NOR8 : 4’h4 (MIPS as host. EJ use PAD1. Byte mode NAND flash.) GPIO37/UART3_TX EXT_VOL-
C102 PCM_A[0] U21 K20 22 R103
NC_8 NC_23 10uF MIPS_EJ2_NOR8 : 4’h5 (MIPS as host. EJ use PAD2. Byte mode NAND flash.)
OPT
11 38 B51_Secure_no scramble : 4’hb (8051 as host. Internal SPI flash secure boot, no scramble) PCM_A[1] PCM_A0 GPIO38
C101 V21 L20 22 R110
0.1uF VCC_1 VCC_2 B51_Sesure_scramble : 4’hc (8051 as host. Internal SPI flash secure boot with scarmble) PCM_A[2] PCM_A1 GPIO39
Y22 M20
12 37 PCM_A2 GPIO40 SC1/COMP1_DET
+3.3V_Normal PCM_A[3] AA22 G20
+3.3V_Normal VSS_1 VSS_2 C103
0.1uF PCM_A[4] PCM_A3 GPIO41 ERROR_OUT
13 36 R22 G19
PCM_A[5] PCM_A4 GPIO42 MODEL_OPT_0
R105 NC_9 NC_22 R21
1K 14 35 PCM_A5
PCM_A[6]
R125
R123
T23 F20 22 R100
R117
R115
NC_10 NC_21 PCM_A6 GPIO50/UART1_RX MST_NEC_RX
PCM_A[7]
OPT 1K
OPT 15 34
OPT1K
T24 F19 22 R101
1K
1K
CLE NC_20 PCM_A[8] PCM_A7 GPIO51/UART1_TX MST_NEC_TX
AA23
16 33 AUD_LRCH
/PF_CE1 AR102 PCM_A[9] PCM_A8
R104
Y20 E7
10K
OPT
ALE I/O3 PCM_A[3] PCM_A9 GPIO6/PM0/INT0 USB1_OCD

17 32 AUD_SCK PCM_A[10] AB17 D7
PF_ALE
AUD_MASTER_CLK R148 PCM_A[11] PCM_A10 GPIO7/PM1/PM_UART_TX USB1_CTL
WE I/O2 PCM_A[2] AA21 E11
18 31 AUD_MASTER_CLK_0 HP_DET
/PF_WE PCM_A[12] PCM_A11 GPIO8/PM2
56 U23 G9
WP I/O1 PCM_A[1] PCM_A12 GPIO9/PM3 CONTROL_ATTEN
19 30 PWM1 PCM_A[13] Y23 F9
PCM_A[14] PCM_A13 GPIO10/PM4 MODEL_OPT_6
C NC_11 I/O0 PCM_A[0]
R106
C112 PWM0 W23 C5

20 29 PCM_A14 GPIO11/PM5/PM_UART_RX/INT1 MODEL_OPT_1
100pF
1K
B Q101 E8 33 R146
22
1K OPT
R118
R121
NC_12 NC_19
R124
R126
1K OPT
50V
R116
/PF_WP KRC103S 21 28 PM_SPI_CS1/GPIO12/PM6
W22 E9
/PCM_REG PCM_REG_N PM_SPI_WP1/GPIO13/PM7 /FLASH_WP
OPT NC_13 NC_18
3.3K
F7
R102
1K
1K
1K
E 22 27 PM_SPI_WP2/GPIO14/PM8/INT2 MODEL_OPT_2
AA17 F6
NC_14 NC_17 /PCM_OE PCM_OE_N GPIO15/PM9 TUNER_RESET
23 26 V22 D8
/PCM_WE PCM_WE_N PM_SPI_CS2/GPIO16/PM10 DEMOD_RESET
NC_15 NC_16 W21 G12
24 25 +5V_Normal /PCM_IORD PCM_IORD_N GPIO17/PM11/INT3
Y21 F10
/PCM_IOWR PCM_IOWR_N GPIO18/PM12/INT4
R132 AA20 D9 33 R147
10K /PCM_CE PCM_CE_N PM_SPI_CK/GPIO1 SPI_SCK
V23 D11
/PCM_IRQA PCM_IRQA_N GPIO0/PM_SPI_CZ /SPI_CS
R133 P23 E10
10K /PCM_CD PCM_CD_N PM_SPI_DI/GPIO2 SPI_SDI for SERIAL FLASH
R23 D10 33 R151
/PCM_WAIT PCM_WAIT_N PM_SPI_DO/GPIO3 SPI_SDO
P22
PCM_RST C109 PCM_RESET
C108 CI_TS_CLK
AR104 0.1uF 0.1uF
IC102-*1 AA9 CI_TS_VAL
NAND02GW3B2DN6E
OPT
TS0_CLK from CI SLOT
AC17 AA5 CI_TS_SYNC
/PF_CE0
PCM_PF_CE0Z TS0_VLD
/PF_CE1 AB20 AA10 CI_TS_DATA[0-7]
PCM_PF_CE1Z TS0_SYNC
NC_1 NC_29 /PF_OE AA18
1 2GBIT_NUMONYX 48 22 PCM_PF_OEZ CI_TS_DATA[0]
/PF_WE AR103 AB21 AB5
NC_2 NC_28 PCM_PF_WEZ TS0_D0 CI_TS_DATA[1]
2 47 PF_ALE AB19 AC4
PCM_PF_ALE TS0_D1 CI_TS_DATA[2]
NC_3 NC_27 /PF_WP AD17 Y6
3 46 PCM_PF_AD[15] TS0_D2 CI_TS_DATA[3]
/F_RB AA19 AA6
NC_4 NC_26 22 PCM_PF_RBZ TS0_D3 CI_TS_DATA[4]
4 45 W6
TS0_D4 CI_TS_DATA[5]
NC_5 I/O7 AA7
5 44 TS0_D5 CI_TS_DATA[6]
R134 22 M23 Y9
NC_6 I/O6 S7_TXD UART_TX2/GPIO65 TS0_D6 CI_TS_DATA[7]
6 43 R135 22 N23 AA8
S7_RXD UART_RX2/GPIO64 TS0_D7
FE_TS_CLK
RB
7 42
I/O5
FE_TS_VAL_ERR Internal demod out
for SYSTEM/HDCP R136 22 M22 AC5
R I/O4 S7_EEPROM_SDA
R137 22 N22
DDCR_DA/GPIO71 TS1_CLK
AC6
FE_TS_SYNC /External demod in
8 41 EEPROM&URSA3 S7_EEPROM_SCL DDCR_CK/GPIO72 TS1_VLD FE_TS_DATA[0-7]
E NC_25 AB6
9 40 TS1_SYNC
R138 22 A5
NC_7 NC_24 RGB_DDC_SDA DDCA_DA/UART0_TX FE_TS_DATA[0]
10 39 R139 22 B5 AC10
RGB_DDC_SCL DDCA_CK/UART0_RX TS1_D0 FE_TS_DATA[1]
NC_8 NC_23 AB10
11 38 TS1_D1 FE_TS_DATA[2]
AC9
VDD_1 VDD_2 TS1_D2 FE_TS_DATA[3]
12 37 PWM0 K23 AB9
PWM0/GPIO66 TS1_D3 FE_TS_DATA[4]
VSS_1 VSS_2 PWM1 K22 AC8
13 36 PWM1/GPIO67 TS1_D4 FE_TS_DATA[5]
PWM2 G23 AB8
NC_9 NC_22 R166 PWM2/GPIO68 TS1_D5 FE_TS_DATA[6]
14 35 100 G22 AC7
R167 PWM3/GPIO69 TS1_D6 FE_TS_DATA[7]
NC_10 NC_21 100 G21 AB7
15 34 PWM4/GPIO70 TS1_D7
CL NC_20
16 33
AL I/O3 C6 D12
17 32 DSUB_DET SAR0/GPIO31 MPIF_CLK
B6 D14
W I/O2 MODEL_OPT_3
C8
SAR1/GPIO32 MPIF_CS_N Delete /PIF_SPI_CS
18 31 PCM_5V_CTL R160
SAR2/GPIO33 1K
WP I/O1 C7 E14
19 30 SAR3/GPIO34 MPIF_BUSY
A6
NC_11 I/O0 SAR4/GPIO35
20 29 E12
MPIF_D0
NC_12 NC_19 F12
21 28 MPIF_D1
D13
NC_13 NC_18 MPIF_D2
22 27 E13
MPIF_D3
NC_14 NC_17
23 26
NC_15
24 25
NC_16
S7R S7MR
S7R_MS10 S7R_DivX S7R_DivX_MS10
S7R_BASIC S7R_RM S7MR_BASIC S7MR_MS10 S7MR_DivX S7MR_DivX_MS10 S7MR_RM
IC101-*1 IC101-*2 IC101-*3 IC101-*4 IC101-*5 IC101-*6 IC101-*7 IC101-*8 IC101-*9 IC101-*10
LGE101C-R-1 [S7R BASIC] LGE101C-R [S7R MS10] LGE101DC-R-1 [S7R DIVX] LGE101DC-R [S7R DIVX/MS10] LGE101RC-R [S7R RM] LGE107C-R-1 [S7MR BASIC] LGE107C-R [S7MR MS10] LGE107DC-R-1 [S7MR DIVX] LGE107DC-R [S7MR DIVX/MS10] LGE107RC-R [S7MR RM]
AE1 W26 AE1 W26 AE1 W26 AE1 W26 AE1 W26 AE1 W26 AE1 W26 AE1 W26 AE1 W26 AE1 W26
NC_48 LVACLKP/LLV6P/BLUE[3] NC_48 LVACLKP/LLV6P/BLUE[3] NC_48 LVACLKP/LLV6P/BLUE[3] NC_48 LVACLKP/LLV6P/BLUE[3] NC_48 LVACLKP/LLV6P/BLUE[3] FRC_DDR3_A0/DDR2_NC ACKP/RLV3P/RED[3] FRC_DDR3_A0/DDR2_NC ACKP/RLV3P/RED[3] FRC_DDR3_A0/DDR2_NC ACKP/RLV3P/RED[3] FRC_DDR3_A0/DDR2_NC ACKP/RLV3P/RED[3] FRC_DDR3_A0/DDR2_NC ACKP/RLV3P/RED[3]
AF16 W25 AF16 W25 AF16 W25 AF16 W25 AF16 W25 AF16 W25 AF16 W25 AF16 W25 AF16 W25 AF16 W25
NC_78 LVACLKN/LLV6N/BLUE[2] NC_78 LVACLKN/LLV6N/BLUE[2] NC_78 LVACLKN/LLV6N/BLUE[2] NC_78 LVACLKN/LLV6N/BLUE[2] NC_78 LVACLKN/LLV6N/BLUE[2] FRC_DDR3_A1/DDR2_A6 ACKM/RLV3N/RED[2] FRC_DDR3_A1/DDR2_A6 ACKM/RLV3N/RED[2] FRC_DDR3_A1/DDR2_A6 ACKM/RLV3N/RED[2] FRC_DDR3_A1/DDR2_A6 ACKM/RLV3N/RED[2] FRC_DDR3_A1/DDR2_A6 ACKM/RLV3N/RED[2]
AF1 U26 AF1 U26 AF1 U26 AF1 U26 AF1 U26 AF1 U26 AF1 U26 AF1 U26 AF1 U26 AF1 U26
NC_64 LVA0P/LLV3P/BLUE[9] NC_64 LVA0P/LLV3P/BLUE[9] NC_64 LVA0P/LLV3P/BLUE[9] NC_64 LVA0P/LLV3P/BLUE[9] NC_64 LVA0P/LLV3P/BLUE[9] FRC_DDR3_A2/DDR2_A7 A0P/RLV0P/RED[9] FRC_DDR3_A2/DDR2_A7 A0P/RLV0P/RED[9] FRC_DDR3_A2/DDR2_A7 A0P/RLV0P/RED[9] FRC_DDR3_A2/DDR2_A7 A0P/RLV0P/RED[9] FRC_DDR3_A2/DDR2_A7 A0P/RLV0P/RED[9]
AE3 U25 AE3 U25 AE3 U25 AE3 U25 AE3 U25 AE3 U25 AE3 U25 AE3 U25 AE3 U25 AE3 U25
NC_50 LVA0N/LLV3N/BLUE[8] NC_50 LVA0N/LLV3N/BLUE[8] NC_50 LVA0N/LLV3N/BLUE[8] NC_50 LVA0N/LLV3N/BLUE[8] NC_50 LVA0N/LLV3N/BLUE[8] FRC_DDR3_A3/DDR2_A1 A0M/RLV0N/RED[8] FRC_DDR3_A3/DDR2_A1 A0M/RLV0N/RED[8] FRC_DDR3_A3/DDR2_A1 A0M/RLV0N/RED[8] FRC_DDR3_A3/DDR2_A1 A0M/RLV0N/RED[8] FRC_DDR3_A3/DDR2_A1 A0M/RLV0N/RED[8]
AD14 U24 AD14 U24 AD14 U24 AD14 U24 AD14 U24 AD14 U24 AD14 U24 AD14 U24 AD14 U24 AD14 U24
NC_45 LVA1P/LLV4P/BLUE[7] NC_45 LVA1P/LLV4P/BLUE[7] NC_45 LVA1P/LLV4P/BLUE[7] NC_45 LVA1P/LLV4P/BLUE[7] NC_45 LVA1P/LLV4P/BLUE[7] FRC_DDR3_A4/DDR2_CASZ A1P/RLV1P/RED[7] FRC_DDR3_A4/DDR2_CASZ A1P/RLV1P/RED[7] FRC_DDR3_A4/DDR2_CASZ A1P/RLV1P/RED[7] FRC_DDR3_A4/DDR2_CASZ A1P/RLV1P/RED[7] FRC_DDR3_A4/DDR2_CASZ A1P/RLV1P/RED[7]
AD3 V26 AD3 V26 AD3 V26 AD3 V26 AD3 V26 AD3 V26 AD3 V26 AD3 V26 AD3 V26 AD3 V26
AF15 V25 AF15 V25 AF15 V25 AF15 V25 AF15 V25 AF15 V25 AF15 V25 AF15 V25 AF15 V25 AF15 V25
AF2 V24 AF2 V24 AF2 V24 AF2 V24 AF2 V24 AF2 V24 AF2 V24 AF2 V24 AF2 V24 AF2 V24
AE15 W24 AE15 W24 AE15 W24 AE15 W24 AE15 W24 AE15 W24 AE15 W24 AE15 W24 AE15 W24 AE15 W24
AD2 Y26 AD2 Y26 AD2 Y26 AD2 Y26 AD2 Y26 AD2 Y26 AD2 Y26 AD2 Y26 AD2 Y26 AD2 Y26
NC_47 LVA4P/LLV8P NC_47 LVA4P/LLV8P NC_47 LVA4P/LLV8P NC_47 LVA4P/LLV8P NC_47 LVA4P/LLV8P FRC_DDR3_A10/DDR2_A11 A4P/RLV5P/GREEN[9] FRC_DDR3_A10/DDR2_A11 A4P/RLV5P/GREEN[9] FRC_DDR3_A10/DDR2_A11 A4P/RLV5P/GREEN[9] FRC_DDR3_A10/DDR2_A11 A4P/RLV5P/GREEN[9] FRC_DDR3_A10/DDR2_A11 A4P/RLV5P/GREEN[9]
NC_46 LVA4N/LLV8N NC_46 LVA4N/LLV8N NC_46 LVA4N/LLV8N NC_46 LVA4N/LLV8N NC_46 LVA4N/LLV8N FRC_DDR3_A11/DDR2_A4 A4M/RLV5N/GREEN[8] FRC_DDR3_A11/DDR2_A4 A4M/RLV5N/GREEN[8] FRC_DDR3_A11/DDR2_A4 A4M/RLV5N/GREEN[8] FRC_DDR3_A11/DDR2_A4 A4M/RLV5N/GREEN[8] FRC_DDR3_A11/DDR2_A4 A4M/RLV5N/GREEN[8]
AE16 AE16 AE16 AE16 AE16 AE16 AE16 AE16 AE16 AE16
NC_63 NC_63 NC_63 NC_63 NC_63 FRC_DDR3_A12/DDR2_A8 FRC_DDR3_A12/DDR2_A8 FRC_DDR3_A12/DDR2_A8 FRC_DDR3_A12/DDR2_A8 FRC_DDR3_A12/DDR2_A8
AC26 AC26 AC26 AC26 AC26 AC26 AC26 AC26 AC26 AC26
LVBCLKP/LLV0P/GREEN[5] LVBCLKP/LLV0P/GREEN[5] LVBCLKP/LLV0P/GREEN[5] LVBCLKP/LLV0P/GREEN[5] LVBCLKP/LLV0P/GREEN[5] BCKP/TCON13/GREEN[1] BCKP/TCON13/GREEN[1] BCKP/TCON13/GREEN[1] BCKP/TCON13/GREEN[1] BCKP/TCON13/GREEN[1]
LVBCLKN/LLV0N/GREEN[4] LVBCLKN/LLV0N/GREEN[4] LVBCLKN/LLV0N/GREEN[4] LVBCLKN/LLV0N/GREEN[4] LVBCLKN/LLV0N/GREEN[4] BCKM/TCON12/GREEN[0] BCKM/TCON12/GREEN[0] BCKM/TCON12/GREEN[0] BCKM/TCON12/GREEN[0] BCKM/TCON12/GREEN[0]
AA26 AA26 AA26 AA26 AA26 AA26 AA26 AA26 AA26 AA26
LVB0P/RLV6P/RED[1] LVB0P/RLV6P/RED[1] LVB0P/RLV6P/RED[1] LVB0P/RLV6P/RED[1] LVB0P/RLV6P/RED[1] B0P/RLV6P/GREEN[7] B0P/RLV6P/GREEN[7] B0P/RLV6P/GREEN[7] B0P/RLV6P/GREEN[7] B0P/RLV6P/GREEN[7]
AF3 AA25 AF3 AA25 AF3 AA25 AF3 AA25 AF3 AA25 AF3 AA25 AF3 AA25 AF3 AA25 AF3 AA25 AF3 AA25
NC_66 LVB0N/RLV6N/RED[0] NC_66 LVB0N/RLV6N/RED[0] NC_66 LVB0N/RLV6N/RED[0] NC_66 LVB0N/RLV6N/RED[0] NC_66 LVB0N/RLV6N/RED[0] FRC_DDR3_BA0/DDR2_BA2 B0M/RLV6N/GREEN[6] FRC_DDR3_BA0/DDR2_BA2 B0M/RLV6N/GREEN[6] FRC_DDR3_BA0/DDR2_BA2 B0M/RLV6N/GREEN[6] FRC_DDR3_BA0/DDR2_BA2 B0M/RLV6N/GREEN[6] FRC_DDR3_BA0/DDR2_BA2 B0M/RLV6N/GREEN[6]
AF14 AA24 AF14 AA24 AF14 AA24 AF14 AA24 AF14 AA24 AF14 AA24 AF14 AA24 AF14 AA24 AF14 AA24 AF14 AA24
NC_76 LVB1P/RLV7P/GREEN[9] NC_76 LVB1P/RLV7P/GREEN[9] NC_76 LVB1P/RLV7P/GREEN[9] NC_76 LVB1P/RLV7P/GREEN[9] NC_76 LVB1P/RLV7P/GREEN[9] FRC_DDR3_BA1/DDR2_ODT B1P/RLV7P/GREEN[5] FRC_DDR3_BA1/DDR2_ODT B1P/RLV7P/GREEN[5] FRC_DDR3_BA1/DDR2_ODT B1P/RLV7P/GREEN[5] FRC_DDR3_BA1/DDR2_ODT B1P/RLV7P/GREEN[5] FRC_DDR3_BA1/DDR2_ODT B1P/RLV7P/GREEN[5]
AD1 AB26 AD1 AB26 AD1 AB26 AD1 AB26 AD1 AB26 AD1 AB26 AD1 AB26 AD1 AB26 AD1 AB26 AD1 AB26
NC_32 LVB1N/RLV7N/GREEN[8] NC_32 LVB1N/RLV7N/GREEN[8] NC_32 LVB1N/RLV7N/GREEN[8] NC_32 LVB1N/RLV7N/GREEN[8] NC_32 LVB1N/RLV7N/GREEN[8] FRC_DDR3_BA2/DDR2_A12 B1M/RLV7N/GREEN[4] FRC_DDR3_BA2/DDR2_A12 B1M/RLV7N/GREEN[4] FRC_DDR3_BA2/DDR2_A12 B1M/RLV7N/GREEN[4] FRC_DDR3_BA2/DDR2_A12 B1M/RLV7N/GREEN[4] FRC_DDR3_BA2/DDR2_A12 B1M/RLV7N/GREEN[4]
AB25 AB25 AB25 AB25 AB25 AB25 AB25 AB25 AB25 AB25
LVB2P/RLV8P/GREEN[7] LVB2P/RLV8P/GREEN[7] LVB2P/RLV8P/GREEN[7] LVB2P/RLV8P/GREEN[7] LVB2P/RLV8P/GREEN[7] B2P/RLV8P/GREEN[3] B2P/RLV8P/GREEN[3] B2P/RLV8P/GREEN[3] B2P/RLV8P/GREEN[3] B2P/RLV8P/GREEN[3]
AD13 AB24 AD13 AB24 AD13 AB24 AD13 AB24 AD13 AB24 AD13 AB24 AD13 AB24 AD13 AB24 AD13 AB24 AD13 AB24
NC_44 LVB2N/RLV8N/GREEN[6] NC_44 LVB2N/RLV8N/GREEN[6] NC_44 LVB2N/RLV8N/GREEN[6] NC_44 LVB2N/RLV8N/GREEN[6] NC_44 LVB2N/RLV8N/GREEN[6] FRC_DDR3_MCLK/DDR2_MCLK B2M/RLV8N/GREEN[2] FRC_DDR3_MCLK/DDR2_MCLK B2M/RLV8N/GREEN[2] FRC_DDR3_MCLK/DDR2_MCLK B2M/RLV8N/GREEN[2] FRC_DDR3_MCLK/DDR2_MCLK B2M/RLV8N/GREEN[2] FRC_DDR3_MCLK/DDR2_MCLK B2M/RLV8N/GREEN[2]
AE14 AC24 AE14 AC24 AE14 AC24 AE14 AC24 AE14 AC24 AE14 AC24 AE14 AC24 AE14 AC24 AE14 AC24 AE14 AC24
NC_61 LVB3P/LLV1P/GREEN[3] NC_61 LVB3P/LLV1P/GREEN[3] NC_61 LVB3P/LLV1P/GREEN[3] NC_61 LVB3P/LLV1P/GREEN[3] NC_61 LVB3P/LLV1P/GREEN[3] FRC_DDR3_CKE/DDR2_RASZ B3P/TCON11/BLUE[9] FRC_DDR3_CKE/DDR2_RASZ B3P/TCON11/BLUE[9] FRC_DDR3_CKE/DDR2_RASZ B3P/TCON11/BLUE[9] FRC_DDR3_CKE/DDR2_RASZ B3P/TCON11/BLUE[9] FRC_DDR3_CKE/DDR2_RASZ B3P/TCON11/BLUE[9]
AE13 AD26 AE13 AD26 AE13 AD26 AE13 AD26 AE13 AD26 AE13 AD26 AE13 AD26 AE13 AD26 AE13 AD26 AE13 AD26
NC_60 LVB3N/LLV1N/GREEN[2] NC_60 LVB3N/LLV1N/GREEN[2] NC_60 LVB3N/LLV1N/GREEN[2] NC_60 LVB3N/LLV1N/GREEN[2] NC_60 LVB3N/LLV1N/GREEN[2] FRC_DDR3_MCLKZ/DDR2_MCLKZ B3M/TCON10/BLUE[8] FRC_DDR3_MCLKZ/DDR2_MCLKZ B3M/TCON10/BLUE[8] FRC_DDR3_MCLKZ/DDR2_MCLKZ B3M/TCON10/BLUE[8] FRC_DDR3_MCLKZ/DDR2_MCLKZ B3M/TCON10/BLUE[8] FRC_DDR3_MCLKZ/DDR2_MCLKZ B3M/TCON10/BLUE[8]
AD25 AD25 AD25 AD25 AD25 AD25 AD25 AD25 AD25 AD25
LVB4P/LLV0P/GREEN[1] LVB4P/LLV0P/GREEN[1] LVB4P/LLV0P/GREEN[1] LVB4P/LLV0P/GREEN[1] LVB4P/LLV0P/GREEN[1] B4P/TCON9/BLUE[7] B4P/TCON9/BLUE[7] B4P/TCON9/BLUE[7] B4P/TCON9/BLUE[7] B4P/TCON9/BLUE[7]
LVB4N/LLV0N/GREEN[0] LVB4N/LLV0N/GREEN[0] LVB4N/LLV0N/GREEN[0] LVB4N/LLV0N/GREEN[0] LVB4N/LLV0N/GREEN[0] B4M/TCON8/BLUE[6] B4M/TCON8/BLUE[6] B4M/TCON8/BLUE[6] B4M/TCON8/BLUE[6] B4M/TCON8/BLUE[6]
NC_51 NC_51 NC_51 NC_51 NC_51 FRC_DDR3_ODT/DDR2_BA1 FRC_DDR3_ODT/DDR2_BA1 FRC_DDR3_ODT/DDR2_BA1 FRC_DDR3_ODT/DDR2_BA1 FRC_DDR3_ODT/DDR2_BA1
NC_36 NC_36 NC_36 NC_36 NC_36 FRC_DDR3_RASZ/DDR2_WEZ FRC_DDR3_RASZ/DDR2_WEZ FRC_DDR3_RASZ/DDR2_WEZ FRC_DDR3_RASZ/DDR2_WEZ FRC_DDR3_RASZ/DDR2_WEZ
AF4 AD23 AF4 AD23 AF4 AD23 AF4 AD23 AF4 AD23 AF4 AD23 AF4 AD23 AF4 AD23 AF4 AD23 AF4 AD23
NC_67 RLV3P/RED[7] NC_67 RLV3P/RED[7] NC_67 RLV3P/RED[7] NC_67 RLV3P/RED[7] NC_67 RLV3P/RED[7] FRC_DDR3_CASZ/DDR2_CKE CCKP/LLV3P FRC_DDR3_CASZ/DDR2_CKE CCKP/LLV3P FRC_DDR3_CASZ/DDR2_CKE CCKP/LLV3P FRC_DDR3_CASZ/DDR2_CKE CCKP/LLV3P FRC_DDR3_CASZ/DDR2_CKE CCKP/LLV3P
AD4 AE23 AD4 AE23 AD4 AE23 AD4 AE23 AD4 AE23 AD4 AE23 AD4 AE23 AD4 AE23 AD4 AE23 AD4 AE23
NC_35 RLV3N/RED[6] NC_35 RLV3N/RED[6] NC_35 RLV3N/RED[6] NC_35 RLV3N/RED[6] NC_35 RLV3N/RED[6] FRC_DDR3_WEZ/DDR2_BA0 CCKM/LLV3N FRC_DDR3_WEZ/DDR2_BA0 CCKM/LLV3N FRC_DDR3_WEZ/DDR2_BA0 CCKM/LLV3N FRC_DDR3_WEZ/DDR2_BA0 CCKM/LLV3N FRC_DDR3_WEZ/DDR2_BA0 CCKM/LLV3N
RLV0P/LVSYNC RLV0P/LVSYNC RLV0P/LVSYNC RLV0P/LVSYNC RLV0P/LVSYNC C0P/LLV0P/BLUE[5] C0P/LLV0P/BLUE[5] C0P/LLV0P/BLUE[5] C0P/LLV0P/BLUE[5] C0P/LLV0P/BLUE[5]
AE2 AE25 AE2 AE25 AE2 AE25 AE2 AE25 AE2 AE25 AE2 AE25 AE2 AE25 AE2 AE25 AE2 AE25 AE2 AE25
NC_49 RLV0N/LHSYNC NC_49 RLV0N/LHSYNC NC_49 RLV0N/LHSYNC NC_49 RLV0N/LHSYNC NC_49 RLV0N/LHSYNC FRC_DDR3_RESETB/DDR2_A3 C0M/LLV0N/BLUE[4] FRC_DDR3_RESETB/DDR2_A3 C0M/LLV0N/BLUE[4] FRC_DDR3_RESETB/DDR2_A3 C0M/LLV0N/BLUE[4] FRC_DDR3_RESETB/DDR2_A3 C0M/LLV0N/BLUE[4] FRC_DDR3_RESETB/DDR2_A3 C0M/LLV0N/BLUE[4]
AF26 AF26 AF26 AF26 AF26 AF26 AF26 AF26 AF26 AF26
RLV1N/LCK RLV1N/LCK RLV1N/LCK RLV1N/LCK RLV1N/LCK C1P/LLV1P/BLUE[3] C1P/LLV1P/BLUE[3] C1P/LLV1P/BLUE[3] C1P/LLV1P/BLUE[3] C1P/LLV1P/BLUE[3]
RLV2P/RED[9] RLV2P/RED[9] RLV2P/RED[9] RLV2P/RED[9] RLV2P/RED[9] C1M/LLV1N/BLUE[2] C1M/LLV1N/BLUE[2] C1M/LLV1N/BLUE[2] C1M/LLV1N/BLUE[2] C1M/LLV1N/BLUE[2]
AF8 AE24 AF8 AE24 AF8 AE24 AF8 AE24 AF8 AE24 AF8 AE24 AF8 AE24 AF8 AE24 AF8 AE24 AF8 AE24
NC_71 RLV1P/LDE NC_71 RLV1P/LDE NC_71 RLV1P/LDE NC_71 RLV1P/LDE NC_71 RLV1P/LDE FRC_DDR3_DQSL/DDR2_DQS0 C2P/LLV2P/BLUE[1] FRC_DDR3_DQSL/DDR2_DQS0 C2P/LLV2P/BLUE[1] FRC_DDR3_DQSL/DDR2_DQS0 C2P/LLV2P/BLUE[1] FRC_DDR3_DQSL/DDR2_DQS0 C2P/LLV2P/BLUE[1] FRC_DDR3_DQSL/DDR2_DQS0 C2P/LLV2P/BLUE[1]
AD9 AF24 AD9 AF24 AD9 AF24 AD9 AF24 AD9 AF24 AD9 AF24 AD9 AF24 AD9 AF24 AD9 AF24 AD9 AF24
NC_40 RLV2N/RED[8] NC_40 RLV2N/RED[8] NC_40 RLV2N/RED[8] NC_40 RLV2N/RED[8] NC_40 RLV2N/RED[8] FRC_DDR3_DQSLB/DDR2_DQSB0 C2M/LLV2N/BLUE[0] FRC_DDR3_DQSLB/DDR2_DQSB0 C2M/LLV2N/BLUE[0] FRC_DDR3_DQSLB/DDR2_DQSB0 C2M/LLV2N/BLUE[0] FRC_DDR3_DQSLB/DDR2_DQSB0 C2M/LLV2N/BLUE[0] FRC_DDR3_DQSLB/DDR2_DQSB0 C2M/LLV2N/BLUE[0]
RLV4P/RED[5] RLV4P/RED[5] RLV4P/RED[5] RLV4P/RED[5] RLV4P/RED[5] C3P/LLV4P C3P/LLV4P C3P/LLV4P C3P/LLV4P C3P/LLV4P
NC_56 RLV4N/RED[4] NC_56 RLV4N/RED[4] NC_56 RLV4N/RED[4] NC_56 RLV4N/RED[4] NC_56 RLV4N/RED[4] FRC_DDR3_DQSU/DDR2_DQS1 C3M/LLV4N FRC_DDR3_DQSU/DDR2_DQS1 C3M/LLV4N FRC_DDR3_DQSU/DDR2_DQS1 C3M/LLV4N FRC_DDR3_DQSU/DDR2_DQS1 C3M/LLV4N FRC_DDR3_DQSU/DDR2_DQS1 C3M/LLV4N
AF9 AE22 AF9 AE22 AF9 AE22 AF9 AE22 AF9 AE22 AF9 AE22 AF9 AE22 AF9 AE22 AF9 AE22 AF9 AE22
NC_72 RLV5P/RED[3] NC_72 RLV5P/RED[3] NC_72 RLV5P/RED[3] NC_72 RLV5P/RED[3] NC_72 RLV5P/RED[3] FRC_DDR3_DQSUB/DDR2_DQSB1 C4P/LLV5P FRC_DDR3_DQSUB/DDR2_DQSB1 C4P/LLV5P FRC_DDR3_DQSUB/DDR2_DQSB1 C4P/LLV5P FRC_DDR3_DQSUB/DDR2_DQSB1 C4P/LLV5P FRC_DDR3_DQSUB/DDR2_DQSB1 C4P/LLV5P
RLV5N/RED[2] RLV5N/RED[2] RLV5N/RED[2] RLV5N/RED[2] RLV5N/RED[2] C4M/LLV5N C4M/LLV5N C4M/LLV5N C4M/LLV5N C4M/LLV5N
NC_58 NC_58 NC_58 NC_58 NC_58 FRC_DDR3_DML/DDR2_DQ7 FRC_DDR3_DML/DDR2_DQ7 FRC_DDR3_DML/DDR2_DQ7 FRC_DDR3_DML/DDR2_DQ7 FRC_DDR3_DML/DDR2_DQ7
NC_69 NC_69 NC_69 NC_69 NC_69 FRC_DDR3_DMU/DDR2_DQ11 FRC_DDR3_DMU/DDR2_DQ11 FRC_DDR3_DMU/DDR2_DQ11 FRC_DDR3_DMU/DDR2_DQ11 FRC_DDR3_DMU/DDR2_DQ11
TCON3/OE/GOE/GCLK2 TCON3/OE/GOE/GCLK2 TCON3/OE/GOE/GCLK2 TCON3/OE/GOE/GCLK2 TCON3/OE/GOE/GCLK2 DCKP/TCON5 DCKP/TCON5 DCKP/TCON5 DCKP/TCON5 DCKP/TCON5
AE6 AE19 AE6 AE19 AE6 AE19 AE6 AE19 AE6 AE19 AE6 AE19 AE6 AE19 AE6 AE19 AE6 AE19 AE6 AE19
NC_53 TCON15/SCAN_BLK1 NC_53 TCON15/SCAN_BLK1 NC_53 TCON15/SCAN_BLK1 NC_53 TCON15/SCAN_BLK1 NC_53 TCON15/SCAN_BLK1 FRC_DDR3_DQL0/DDR2_DQ6 DCKM/TCON4 FRC_DDR3_DQL0/DDR2_DQ6 DCKM/TCON4 FRC_DDR3_DQL0/DDR2_DQ6 DCKM/TCON4 FRC_DDR3_DQL0/DDR2_DQ6 DCKM/TCON4 FRC_DDR3_DQL0/DDR2_DQ6 DCKM/TCON4
AF11 AD21 AF11 AD21 AF11 AD21 AF11 AD21 AF11 AD21 AF11 AD21 AF11 AD21 AF11 AD21 AF11 AD21 AF11 AD21
NC_74 TCON18/CS7/GCLK5 NC_74 TCON18/CS7/GCLK5 NC_74 TCON18/CS7/GCLK5 NC_74 TCON18/CS7/GCLK5 NC_74 TCON18/CS7/GCLK5 FRC_DDR3_DQL1/DDR2_DQ0 D0P/LLV6P FRC_DDR3_DQL1/DDR2_DQ0 D0P/LLV6P FRC_DDR3_DQL1/DDR2_DQ0 D0P/LLV6P FRC_DDR3_DQL1/DDR2_DQ0 D0P/LLV6P FRC_DDR3_DQL1/DDR2_DQ0 D0P/LLV6P
AD6 AE21 AD6 AE21 AD6 AE21 AD6 AE21 AD6 AE21 AD6 AE21 AD6 AE21 AD6 AE21 AD6 AE21 AD6 AE21
NC_37 TCON19/CS8/GCLK6 NC_37 TCON19/CS8/GCLK6 NC_37 TCON19/CS8/GCLK6 NC_37 TCON19/CS8/GCLK6 NC_37 TCON19/CS8/GCLK6 FRC_DDR3_DQL2/DDR2_DQ1 D0M/LLV6N FRC_DDR3_DQL2/DDR2_DQ1 D0M/LLV6N FRC_DDR3_DQL2/DDR2_DQ1 D0M/LLV6N FRC_DDR3_DQL2/DDR2_DQ1 D0M/LLV6N FRC_DDR3_DQL2/DDR2_DQ1 D0M/LLV6N
AD12 AF21 AD12 AF21 AD12 AF21 AD12 AF21 AD12 AF21 AD12 AF21 AD12 AF21 AD12 AF21 AD12 AF21 AD12 AF21
NC_43 TCON11/CS5/HCON NC_43 TCON11/CS5/HCON NC_43 TCON11/CS5/HCON NC_43 TCON11/CS5/HCON NC_43 TCON11/CS5/HCON FRC_DDR3_DQL3/DDR2_DQ2 D1P/LLV7P FRC_DDR3_DQL3/DDR2_DQ2 D1P/LLV7P FRC_DDR3_DQL3/DDR2_DQ2 D1P/LLV7P FRC_DDR3_DQL3/DDR2_DQ2 D1P/LLV7P FRC_DDR3_DQL3/DDR2_DQ2 D1P/LLV7P
NC_52 TCON10/CS4/OPT_N NC_52 TCON10/CS4/OPT_N NC_52 TCON10/CS4/OPT_N NC_52 TCON10/CS4/OPT_N NC_52 TCON10/CS4/OPT_N FRC_DDR3_DQL4/DDR2_DQ4 D1M/LLV7N FRC_DDR3_DQL4/DDR2_DQ4 D1M/LLV7N FRC_DDR3_DQL4/DDR2_DQ4 D1M/LLV7N FRC_DDR3_DQL4/DDR2_DQ4 D1M/LLV7N FRC_DDR3_DQL4/DDR2_DQ4 D1M/LLV7N
EEPROM_1MBIT_ATMEL AF12
AF5
NC_75
NC_68
TCON9/CS3/OPT_P
TCON16/WPWM
AE20
AF20
AF12
AF5
NC_75
NC_68
TCON9/CS3/OPT_P
TCON16/WPWM
AE20
AF20
AF12
AF5
NC_75
NC_68
TCON9/CS3/OPT_P
TCON16/WPWM
AE20
AF20
AF12
AF5
NC_75
NC_68
TCON9/CS3/OPT_P
TCON16/WPWM
AE20
AF20
AF12
AF5
NC_75
NC_68
TCON9/CS3/OPT_P
TCON16/WPWM
AE20
AF20
AF12
AF5
FRC_DDR3_DQL5/DDR2_NC
FRC_DDR3_DQL6/DDR2_DQ3
D2P/LLV8P
D2M/LLV8N
AE20
AF20
AF12
AF5
D2P/LLV8P
D2M/LLV8N
AE20
AF20
AF12
AF5
D2P/LLV8P
D2M/LLV8N
AE20
AF20
AF12
AF5
D2P/LLV8P
D2M/LLV8N
AE20
AF20
AF12
AF5
D2P/LLV8P
D2M/LLV8N
AE20
AF20
AE12 AF19 AE12 AF19 AE12 AF19 AE12 AF19 AE12 AF19 AE12 AF19 AE12 AF19 AE12 AF19 AE12 AF19 AE12 AF19
NC_59 TCON12/DPM NC_59 TCON12/DPM NC_59 TCON12/DPM NC_59 TCON12/DPM NC_59 TCON12/DPM FRC_DDR3_DQL7/DDR2_DQ5 D3P/TCON3 FRC_DDR3_DQL7/DDR2_DQ5 D3P/TCON3 FRC_DDR3_DQL7/DDR2_DQ5 D3P/TCON3 FRC_DDR3_DQL7/DDR2_DQ5 D3P/TCON3 FRC_DDR3_DQL7/DDR2_DQ5 D3P/TCON3
IC104-*1 AE10
AF7
AD11
NC_57
NC_70
TCON1/STV/GSP/VST
TCON5/TP/SOE
TCON14/SACN_BLK
AE18
AF18
AE10
AF7
AD11
NC_57
NC_70
TCON1/STV/GSP/VST
TCON5/TP/SOE
TCON14/SACN_BLK
AE18
AF18
AE10
AF7
AD11
NC_57
NC_70
TCON1/STV/GSP/VST
TCON5/TP/SOE
TCON14/SACN_BLK
AE18
AF18
AE10
AF7
AD11
NC_57
NC_70
TCON1/STV/GSP/VST
TCON5/TP/SOE
TCON14/SACN_BLK
AE18
AF18
AE10
AF7
AD11
NC_57
NC_70
TCON1/STV/GSP/VST
TCON5/TP/SOE
TCON14/SACN_BLK
AE18
AF18
AE10
AF7
AD11
FRC_DDR3_DQU0/DDR2_DQ8
D3M/TCON2
D4P/TCON1
D4M/TCON0
AE18
AF18
AE10
AF7
AD11
D3M/TCON2
D4P/TCON1
D4M/TCON0
AE18
AF18
AE10
AF7
AD11
D3M/TCON2
D4P/TCON1
D4M/TCON0
AE18
AF18
AE10
AF7
AD11
D3M/TCON2
D4P/TCON1
D4M/TCON0
AE18
AF18
AE10
AF7
AD11
D3M/TCON2
D4P/TCON1
D4M/TCON0
AE18
AF18
NC_42 NC_42 NC_42 NC_42 NC_42 FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU2/DDR2_DQ13
AT24C1024BN-SH-T AD7
AD10
AE7
NC_38
NC_41 TCON21/CS10/VGH_ODD
AB22
AB23
AD7
AD10
AE7
NC_38
AB22
AB23
AD7
AD10
AE7
NC_38
AB22
AB23
AD7
AD10
AE7
NC_38
AB22
AB23
AD7
AD10
AE7
NC_38
AB22
AB23
AD7
AD10
AE7
FRC_DDR3_DQU4/DDR2_DQ15 GPIO0/TCON15/HSYNC/VDD_ODD
AB22
AB23
AD7
AD10
AE7
AB22
AB23
AD7
AD10
AE7
AB22
AB23
AD7
AD10
AE7
AB22
AB23
AD7
AD10
AE7
AB22
AB23
NC_54 TCON20/CS9/VGH_EVEN NC_54 TCON20/CS9/VGH_EVEN NC_54 TCON20/CS9/VGH_EVEN NC_54 TCON20/CS9/VGH_EVEN NC_54 TCON20/CS9/VGH_EVEN FRC_DDR3_DQU5/DDR2_DQ9 GPIO1/TCON14/VSYNC/VDD_EVEN FRC_DDR3_DQU5/DDR2_DQ9 GPIO1/TCON14/VSYNC/VDD_EVEN FRC_DDR3_DQU5/DDR2_DQ9 GPIO1/TCON14/VSYNC/VDD_EVEN FRC_DDR3_DQU5/DDR2_DQ9 GPIO1/TCON14/VSYNC/VDD_EVEN FRC_DDR3_DQU5/DDR2_DQ9 GPIO1/TCON14/VSYNC/VDD_EVEN
AF10 AC23 AF10 AC23 AF10 AC23 AF10 AC23 AF10 AC23 AF10 AC23 AF10 AC23 AF10 AC23 AF10 AC23 AF10 AC23
NC_73 TCON13/LEDON NC_73 TCON13/LEDON NC_73 TCON13/LEDON NC_73 TCON13/LEDON NC_73 TCON13/LEDON FRC_DDR3_DQU6/DDR2_DQ10 GPIO2/TCON7/LDE/GCLK4 FRC_DDR3_DQU6/DDR2_DQ10 GPIO2/TCON7/LDE/GCLK4 FRC_DDR3_DQU6/DDR2_DQ10 GPIO2/TCON7/LDE/GCLK4 FRC_DDR3_DQU6/DDR2_DQ10 GPIO2/TCON7/LDE/GCLK4 FRC_DDR3_DQU6/DDR2_DQ10 GPIO2/TCON7/LDE/GCLK4
AD8 AC22 AD8 AC22 AD8 AC22 AD8 AC22 AD8 AC22 AD8 AC22 AD8 AC22 AD8 AC22 AD8 AC22 AD8 AC22
NC_39 TCON17/CS6/GCLK4 NC_39 TCON17/CS6/GCLK4 NC_39 TCON17/CS6/GCLK4 NC_39 TCON17/CS6/GCLK4 NC_39 TCON17/CS6/GCLK4 FRC_DDR3_DQU7/DDR2_DQM1 GPIO3/TCON6/LCK/GCLK2 FRC_DDR3_DQU7/DDR2_DQM1 GPIO3/TCON6/LCK/GCLK2 FRC_DDR3_DQU7/DDR2_DQM1 GPIO3/TCON6/LCK/GCLK2 FRC_DDR3_DQU7/DDR2_DQM1 GPIO3/TCON6/LCK/GCLK2 FRC_DDR3_DQU7/DDR2_DQM1 GPIO3/TCON6/LCK/GCLK2
NC_26 NC_26 NC_26 NC_26 NC_26 FRC_GPIO0/UART_RX FRC_GPIO0/UART_RX FRC_GPIO0/UART_RX FRC_GPIO0/UART_RX FRC_GPIO0/UART_RX
AA14 AA14 AA14 AA14 AA14 AA14 AA14 AA14 AA14 AA14
NC VCC NC_19
NC_30
AC15
NC_19
NC_30
AC15
NC_19
NC_30
AC15
NC_19
NC_30
AC15
NC_19
NC_30
AC15
FRC_GPIO1
FRC_GPIO3
AC15
FRC_GPIO1
FRC_GPIO3
AC15
FRC_GPIO1
FRC_GPIO3
AC15
FRC_GPIO1
FRC_GPIO3
AC15
FRC_GPIO1
FRC_GPIO3
AC15
1 8 NC_15
Y16
NC_15
Y16
NC_15
Y16
NC_15
Y16
NC_15
Y16
FRC_GPIO8
Y16
FRC_GPIO8
Y16
FRC_GPIO8
Y16
FRC_GPIO8
Y16
FRC_GPIO8
Y16
NC_31 NC_31 NC_31 NC_31 NC_31 FRC_GPIO9/UART_TX FRC_GPIO9/UART_TX FRC_GPIO9/UART_TX FRC_GPIO9/UART_TX FRC_GPIO9/UART_TX
AE8 AC14 AE8 AC14 AE8 AC14 AE8 AC14 AE8 AC14 AE8 AC14 AE8 AC14 AE8 AC14 AE8 AC14 AE8 AC14
NC_55 NC_29 NC_55 NC_29 NC_55 NC_29 NC_55 NC_29 NC_55 NC_29 FRC_DDR3_NC/DDR2_DQM0 FRC_GPIO10 FRC_DDR3_NC/DDR2_DQM0 FRC_GPIO10 FRC_DDR3_NC/DDR2_DQM0 FRC_GPIO10 FRC_DDR3_NC/DDR2_DQM0 FRC_GPIO10 FRC_DDR3_NC/DDR2_DQM0 FRC_GPIO10
Y11 AA16 Y11 AA16 Y11 AA16 Y11 AA16 Y11 AA16 Y11 AA16 Y11 AA16 Y11 AA16 Y11 AA16 Y11 AA16
NC_12 NC_21 NC_12 NC_21 NC_12 NC_21 NC_12 NC_21 NC_12 NC_21 FRC_REXT FRC_I2CM_DA FRC_REXT FRC_I2CM_DA FRC_REXT FRC_I2CM_DA FRC_REXT FRC_I2CM_DA FRC_REXT FRC_I2CM_DA
Y19 AA15 Y19 AA15 Y19 AA15 Y19 AA15 Y19 AA15 Y19 AA15 Y19 AA15 Y19 AA15 Y19 AA15 Y19 AA15
A1 WP GND_105 NC_20 GND_105 NC_20 GND_105 NC_20 GND_105 NC_20 GND_105 NC_20 FRC_TESTPIN FRC_I2CM_CK FRC_TESTPIN FRC_I2CM_CK FRC_TESTPIN FRC_I2CM_CK FRC_TESTPIN FRC_I2CM_CK FRC_TESTPIN FRC_I2CM_CK
2 7 NC_11
NC_17
Y10
AA11
NC_11
NC_17
Y10
AA11
NC_11
NC_17
Y10
AA11
NC_11
NC_17
Y10
AA11
NC_11
NC_17
Y10
AA11
FRC_I2CS_DA
FRC_I2CS_CK
Y10
AA11
FRC_I2CS_DA
FRC_I2CS_CK
Y10
AA11
FRC_I2CS_DA
FRC_I2CS_CK
Y10
AA11
FRC_I2CS_DA
FRC_I2CS_CK
Y10
AA11
FRC_I2CS_DA
FRC_I2CS_CK
Y10
AA11
NC_25 NC_25 NC_25 NC_25 NC_25 FRC_PWM0 FRC_PWM0 FRC_PWM0 FRC_PWM0 FRC_PWM0
NC_24 NC_24 NC_24 NC_24 NC_24 FRC_PWM1 FRC_PWM1 FRC_PWM1 FRC_PWM1 FRC_PWM1
A2 SCL
3 6
GND SDA
4 5
S7MR-PLUS I2C +3.3V_Normal +3.5V_ST

S7M-PLUS_BASIC S7M-PLUS_MS10 S7M-PLUS_DivX S7M-PLUS_RM
IC101-*11
LGE107C-RP-1 [S7M+ BASIC]
IC101-*12
LGE107C-RP [S7M+ MS10]
IC101-*13
LGE107DC-RP-1 [S7M+ DIVX]
IC101-*14
LGE107RC-RP [S7M+ RM] DIMMING
AE1 W26 AE1 W26 AE1 W26 AE1 W26
+3.5V_ST AF16
AF1
FRC_DDR3_A0/DDR2_NC
FRC_DDR3_A1/DDR2_A6
ACKP/RLV3P/RED[3]
ACKM/RLV3N/RED[2]
W25 AF16
AF1
FRC_DDR3_A0/DDR2_NC
FRC_DDR3_A1/DDR2_A6
ACKP/RLV3P/RED[3]
ACKM/RLV3N/RED[2]
W25 AF16
AF1
FRC_DDR3_A0/DDR2_NC
FRC_DDR3_A1/DDR2_A6
ACKP/RLV3P/RED[3]
ACKM/RLV3N/RED[2]
W25 AF16
AF1
FRC_DDR3_A0/DDR2_NC
FRC_DDR3_A1/DDR2_A6
ACKP/RLV3P/RED[3]
ACKM/RLV3N/RED[2]
W25
HDCP EEPROM
U26 U26 U26 U26
+3.5V_ST
Addr:10101-- AE3
AD14
AD3
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
FRC_DDR3_A4/DDR2_CASZ
FRC_DDR3_A5/DDR2_A10
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
U25
U24
V26
AE3
AD14
AD3
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
U25
U24
V26
AE3
AD14
AD3
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
U25
U24
V26
AE3
AD14
AD3
FRC_DDR3_A2/DDR2_A7
FRC_DDR3_A3/DDR2_A1
A0P/RLV0P/RED[9]
A0M/RLV0N/RED[8]
A1P/RLV1P/RED[7]
A1M/RLV1N/RED[6]
U25
U24
V26
AF15 V25 AF15 V25 AF15 V25 AF15 V25
FRC_DDR3_A6/DDR2_A0 A2P/RLV2P/RED[5] FRC_DDR3_A6/DDR2_A0 A2P/RLV2P/RED[5] FRC_DDR3_A6/DDR2_A0 A2P/RLV2P/RED[5] FRC_DDR3_A6/DDR2_A0 A2P/RLV2P/RED[5]
AF2 AF2 AF2 AF2
EEPROM
V24 V24 V24 V24
R142
3.3K
R143
3.3K
R144
2.2K
R145
2.2K
R140
R141
FRC_DDR3_A7/DDR2_A5 A2M/RLV2N/RED[4] FRC_DDR3_A7/DDR2_A5 A2M/RLV2N/RED[4] FRC_DDR3_A7/DDR2_A5 A2M/RLV2N/RED[4] FRC_DDR3_A7/DDR2_A5 A2M/RLV2N/RED[4]

AE15 W24 AE15 W24 AE15 W24 AE15 W24
R169
R168
HDCP_EEPROM_ON_SEMI_NEW AD2
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
Y26 AD2
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
Y26 AD2
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
Y26 AD2
FRC_DDR3_A8/DDR2_A2
FRC_DDR3_A9/DDR2_A9
A3P/RLV4P/RED[1]
A3M/RLV4N/RED[0]
Y26
AD16 Y25 AD16 Y25 AD16 Y25 AD16 Y25
FRC_DDR3_A10/DDR2_A11 A4P/RLV5P/GREEN[9] FRC_DDR3_A10/DDR2_A11 A4P/RLV5P/GREEN[9] FRC_DDR3_A10/DDR2_A11 A4P/RLV5P/GREEN[9] FRC_DDR3_A10/DDR2_A11 A4P/RLV5P/GREEN[9]
AD15 Y24 AD15 Y24 AD15 Y24 AD15 Y24
1K
1K
IC103-*1 FRC_DDR3_A11/DDR2_A4 A4M/RLV5N/GREEN[8] FRC_DDR3_A11/DDR2_A4 A4M/RLV5N/GREEN[8] FRC_DDR3_A11/DDR2_A4 A4M/RLV5N/GREEN[8] FRC_DDR3_A11/DDR2_A4 A4M/RLV5N/GREEN[8]

1K
1K
AE16 AE16 AE16 AE16

FRC_DDR3_A12/DDR2_A8 FRC_DDR3_A12/DDR2_A8 FRC_DDR3_A12/DDR2_A8 FRC_DDR3_A12/DDR2_A8
CAT24C08WI-GT3-H-RECV(TV)
BCKP/TCON13/GREEN[1]
AC26
AC26
AC26
AC26
R156 10K
C105 AF3
BCKM/TCON12/GREEN[0]
B0P/RLV6P/GREEN[7]
AC25
AA26
AA25 AF3
B0P/RLV6P/GREEN[7]
AC25
AA26
AA25 AF3
B0P/RLV6P/GREEN[7]
AC25
AA26
AA25 AF3
B0P/RLV6P/GREEN[7]
AC25
AA26
AA25 A_DIM PWM0
NC_1 VCC
HDCP_EEPROM_CATALYST_OLD 1 8 EEPROM_1MBIT_ST AF14
FRC_DDR3_BA0/DDR2_BA2
FRC_DDR3_BA1/DDR2_ODT
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
AA24 AF14
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
AA24 AF14
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
AA24 AF14
B0M/RLV6N/GREEN[6]
B1P/RLV7P/GREEN[5]
AA24
EEPROM_SDA
0.1uF AD1
FRC_DDR3_BA2/DDR2_A12 B1M/RLV7N/GREEN[4]
AB26
AB25
AD1
AB26
AB25
AD1
AB26
AB25
AD1
AB26
AB25
IC103 NC_2
2 7
WP IC104 AD13
AE14
FRC_DDR3_MCLK/DDR2_MCLK
B2P/RLV8P/GREEN[3]
B2M/RLV8N/GREEN[2]
AB24
AC24
AD13
AE14
B2P/RLV8P/GREEN[3]
B2M/RLV8N/GREEN[2]
AB24
AC24
AD13
AE14
B2P/RLV8P/GREEN[3]
B2M/RLV8N/GREEN[2]
AB24
AC24
AD13
AE14
B2P/RLV8P/GREEN[3]
B2M/RLV8N/GREEN[2]
AB24
AC24
EEPROM_SCL R157 100
CAT24WC08W-T
AE13
FRC_DDR3_CKE/DDR2_RASZ
FRC_DDR3_MCLKZ/DDR2_MCLKZ
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
AD26 AE13
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
AD26 AE13
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
AD26 AE13
B3P/TCON11/BLUE[9]
B3M/TCON10/BLUE[8]
AD26
PWM_DIM PWM2
C107 A2 SCL M24M01-HRMN6TP B4P/TCON9/BLUE[7]
B4M/TCON8/BLUE[6]
AD25
AD24
B4P/TCON9/BLUE[7]
B4M/TCON8/BLUE[6]
AD25
AD24
B4P/TCON9/BLUE[7]
B4M/TCON8/BLUE[6]
AD25
AD24
B4P/TCON9/BLUE[7]
B4M/TCON8/BLUE[6]
AD25
AD24
R113 3 6 AE4
AD5
FRC_DDR3_ODT/DDR2_BA1
FRC_DDR3_RASZ/DDR2_WEZ
AE4
AD5
AE4
AD5
AE4
AD5
4.7K A0 VCC 0.1uF VSS

4 5
SDA
AF4
AD4
FRC_DDR3_CASZ/DDR2_CKE
FRC_DDR3_WEZ/DDR2_BA0
CCKP/LLV3P
CCKM/LLV3N
AD23
AE23
AE26
AF4
AD4
CCKP/LLV3P
CCKM/LLV3N
AD23
AE23
AE26
AF4
AD4
CCKP/LLV3P
CCKM/LLV3N
AD23
AE23
AE26
AF4
AD4
CCKP/LLV3P
CCKM/LLV3N
AD23
AE23
AE26
1 8 AE2
FRC_DDR3_RESETB/DDR2_A3
C0P/LLV0P/BLUE[5]
C0M/LLV0N/BLUE[4]
AE25
AF26
AE2
C0P/LLV0P/BLUE[5]
C0M/LLV0N/BLUE[4]
AE25
AF26
AE2
C0P/LLV0P/BLUE[5]
C0M/LLV0N/BLUE[4]
AE25
AF26
AE2
C0P/LLV0P/BLUE[5]
C0M/LLV0N/BLUE[4]
AE25
AF26 NEC_SDA
NC VCC C1P/LLV1P/BLUE[3]
AF25
C1P/LLV1P/BLUE[3]
AF25
C1P/LLV1P/BLUE[3]
AF25
C1P/LLV1P/BLUE[3]
AF25
$0.199 1 8 AF8
AD9
FRC_DDR3_DQSL/DDR2_DQS0
C1M/LLV1N/BLUE[2]
C2P/LLV2P/BLUE[1]
AE24
AF24
AF8
AD9
C1M/LLV1N/BLUE[2]
C2P/LLV2P/BLUE[1]
AE24
AF24
AF8
AD9
C1M/LLV1N/BLUE[2]
C2P/LLV2P/BLUE[1]
AE24
AF24
AF8
AD9
C1M/LLV1N/BLUE[2]
C2P/LLV2P/BLUE[1]
AE24
AF24
NEC_SCL C111
A1 WP R127 4.7K
FRC_DDR3_DQSLB/DDR2_DQSB0 C2M/LLV2N/BLUE[0]
AF23
AF23
AF23
AF23
2 7 AE9
AF9
FRC_DDR3_DQSU/DDR2_DQS1
FRC_DDR3_DQSUB/DDR2_DQSB1
C3P/LLV4P
C3M/LLV4N
C4P/LLV5P
AD22
AE22
AE9
AF9
C3P/LLV4P
C3M/LLV4N
C4P/LLV5P
AD22
AE22
AE9
AF9
C3P/LLV4P
C3M/LLV4N
C4P/LLV5P
AD22
AE22
AE9
AF9
C3P/LLV4P
C3M/LLV4N
C4P/LLV5P
AD22
AE22
2.2uF
AF22 AF22 AF22 AF22
C4M/LLV5N C4M/LLV5N C4M/LLV5N C4M/LLV5N
AE11 AE11 AE11 AE11
E1 WP AF6
FRC_DDR3_DML/DDR2_DQ7
AF6
AF6
AF6
A2 SCL R128 22 2 7
FRC_DDR3_DMU/DDR2_DQ11
AD19
AD19
AD19
AD19
AMP_SDA
3 6 EEPROM_SCL AE6
AF11
DCKP/TCON5
DCKM/TCON4
D0P/LLV6P
AE19
AD21
AE6
AF11
DCKP/TCON5
DCKM/TCON4
D0P/LLV6P
AE19
AD21
AE6
AF11
DCKP/TCON5
DCKM/TCON4
D0P/LLV6P
AE19
AD21
AE6
AF11
DCKP/TCON5
DCKM/TCON4
D0P/LLV6P
AE19
AD21
AD6
AD12
AE5
D0M/LLV6N
D1P/LLV7P
AE21
AF21
AD20
AD6
AD12
AE5
D0M/LLV6N
D1P/LLV7P
AE21
AF21
AD20
AD6
AD12
AE5
D0M/LLV6N
D1P/LLV7P
AE21
AF21
AD20
AD6
AD12
AE5
D0M/LLV6N
D1P/LLV7P
AE21
AF21
AD20
AMP_SCL
VSS SDA
A0’h
FRC_DDR3_DQL4/DDR2_DQ4 D1M/LLV7N FRC_DDR3_DQL4/DDR2_DQ4 D1M/LLV7N FRC_DDR3_DQL4/DDR2_DQ4 D1M/LLV7N FRC_DDR3_DQL4/DDR2_DQ4 D1M/LLV7N
AF12 AE20 AF12 AE20 AF12 AE20 AF12 AE20
4 5 E2 SCL FRC_DDR3_DQL5/DDR2_NC D2P/LLV8P FRC_DDR3_DQL5/DDR2_NC D2P/LLV8P FRC_DDR3_DQL5/DDR2_NC D2P/LLV8P FRC_DDR3_DQL5/DDR2_NC D2P/LLV8P
EEPROM_SDA 3 6 R111 22 EEPROM_SCL

AF5
AE12
D2M/LLV8N
D3P/TCON3
AF20
AF19
AD18
AF5
AE12
D2M/LLV8N
D3P/TCON3
AF20
AF19
AD18
AF5
AE12
D2M/LLV8N
D3P/TCON3
AF20
AF19
AD18
AF5
AE12
D2M/LLV8N
D3P/TCON3
AF20
AF19
AD18
R129 22 AE10
AF7
D3M/TCON2
D4P/TCON1
AE18
AF18
AE10
AF7
D3M/TCON2
D4P/TCON1
AE18
AF18
AE10
AF7
D3M/TCON2
D4P/TCON1
AE18
AF18
AE10
AF7
D3M/TCON2
D4P/TCON1
AE18
AF18
PI_SDA
FRC_DDR3_DQU1/DDR2_DQ14 D4M/TCON0 FRC_DDR3_DQU1/DDR2_DQ14 D4M/TCON0 FRC_DDR3_DQU1/DDR2_DQ14 D4M/TCON0 FRC_DDR3_DQU1/DDR2_DQ14 D4M/TCON0
AD11 AD11 AD11 AD11
FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU2/DDR2_DQ13 FRC_DDR3_DQU2/DDR2_DQ13
AD7 AD7 AD7 AD7
FRC_DDR3_DQU3/DDR2_DQ12 FRC_DDR3_DQU3/DDR2_DQ12 FRC_DDR3_DQU3/DDR2_DQ12 FRC_DDR3_DQU3/DDR2_DQ12
AD10 AB22 AD10 AB22 AD10 AB22 AD10 AB22
VSS SDA FRC_DDR3_DQU4/DDR2_DQ15 GPIO0/TCON15/HSYNC/VDD_ODD FRC_DDR3_DQU4/DDR2_DQ15 GPIO0/TCON15/HSYNC/VDD_ODD FRC_DDR3_DQU4/DDR2_DQ15 GPIO0/TCON15/HSYNC/VDD_ODD FRC_DDR3_DQU4/DDR2_DQ15 GPIO0/TCON15/HSYNC/VDD_ODD
4 5 R112 22 AE7
AF10
FRC_DDR3_DQU5/DDR2_DQ9 GPIO1/TCON14/VSYNC/VDD_EVEN
AB23
AC23
AE7
AF10
AB23
AC23
AE7
AF10
AB23
AC23
AE7
AF10
AB23
AC23 PI_SCL
EEPROM_SDA AD8
FRC_DDR3_DQU7/DDR2_DQM1
GPIO2/TCON7/LDE/GCLK4
GPIO3/TCON6/LCK/GCLK2
AC22 AD8
AC22 AD8
AC22 AD8
AC22
AB16 AB16 AB16 AB16
C104 C106 FRC_SPI_CZ

FRC_GPIO1
FRC_SPI1_CK
AA14
AC15
FRC_SPI_CZ
FRC_GPIO1
FRC_SPI1_CK
AA14
AC15
FRC_SPI_CZ
FRC_GPIO1
FRC_SPI1_CK
AA14
AC15
FRC_SPI_CZ
FRC_GPIO1
FRC_SPI1_CK
AA14
AC15
8pF 8pF FRC_GPIO8

FRC_SPI_DO
Y16
AC16
FRC_GPIO8
FRC_SPI_DO
Y16
AC16
FRC_GPIO8
FRC_SPI_DO
Y16
AC16
FRC_GPIO8
FRC_SPI_DO
Y16
AC16
AE8 AC14 AE8 AC14 AE8 AC14 AE8 AC14
FRC_DDR3_NC/DDR2_DQM0 FRC_SPI1_DI FRC_DDR3_NC/DDR2_DQM0 FRC_SPI1_DI FRC_DDR3_NC/DDR2_DQM0 FRC_SPI1_DI FRC_DDR3_NC/DDR2_DQM0 FRC_SPI1_DI
OPT OPT Y11

Y19
FRC_VSYNC_LIKE FRC_SPI_CK
AA16
AA15
Y11
Y19
AA16
AA15
Y11
Y19
AA16
AA15
Y11
Y19
AA16
AA15
FRC_TESTPIN FRC_SPI_DI FRC_TESTPIN FRC_SPI_DI FRC_TESTPIN FRC_SPI_DI FRC_TESTPIN FRC_SPI_DI
Y10 Y10 Y10 Y10

FRC_I2CS_DA FRC_I2CS_DA FRC_I2CS_DA FRC_I2CS_DA
AA11 AA11 AA11 AA11
FRC_I2CS_CK FRC_I2CS_CK FRC_I2CS_CK FRC_I2CS_CK
AB15 AB15 AB15 AB15

FRC_PWM0 FRC_PWM0 FRC_PWM0 FRC_PWM0
AB14 AB14 AB14 AB14
FRC_PWM1 FRC_PWM1 FRC_PWM1 FRC_PWM1
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP3_Saturn7M Ver. 0.1
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. FLASH/EEPROM/GPIO 1
Copyright © 2011 LG Electronics. Inc. All rights reserved. LGE Internal Use Only
+3.3V_Normal +1.26V_VDDC +1.26V_VDDC
MODEL OPTION VDDC 1.26V VDDC : 2026mA
MODEL OPTION
100/120Hz LVDS
PIN NAME LOW HIGH

1K
1K
1K
1K
PIN NO.
1K
1K
1K
OPT_0 OPT_4
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10uF
10uF
10uF
DVB_T2
PHM_ON
MODEL_OPT_0 FRC_HW_OPT NO_FRC : LOW LOW

G19 NO FRC
FHD
OPT
OPT
OPT
U3_INTERNAL : HIGH LOW

R206
R208
R211
R226
R294
R295
R214
U5_EXTERNALBOOT :HIGH HIGH
C275
C276
C228
MODEL_OPT_4 OPT OPT
C4006
C4011
C4013
C4019
C4024
E18 50/60Hz LVDS 100/120Hz LVDS reserved for FRC : LOW HIGH OPT OPT
C277
C280
C283
C292
C299
OPT 100 MODEL_OPT_1 C5 PHM_ON --> This option is only applied in EU.
R201 PHM_OFF
IF_AGC_SEL MODEL_OPT_0 In case of NON_EU, default value set LOW.
R202 BOOSTER_OPT100
LNA2_CTL MODEL_OPT_1 MODEL_OPT_2 F7 2D 3D
R203 RF_SW_OPT 100
RF_SWITCH_CTL MODEL_OPT_2
R204 100 MODEL_OPT_3 HD FHD
MODEL_OPT_3 B6
R210 OPT 100 S7M-PLUS_DivX_MS10
MODEL_OPT_4 IC101
R213 OPT 0 MODEL_OPT_5 D18 Ready default
MODEL_OPT_5 -->In case of GP2, This port was used for GIP/NON_GIP
OPT 0
LGE107DC-RP
+1.26V_VDDC [S7M+ DIVX/MS10]
R216 MODEL_OPT_6 MODEL_OPT_6 F9 LCD OLED
OPT --> MODEL_OPT_5, MODEL_OPT_6
Normal Power 3.3V
50/60Hz LVDS
: Only 3D_SG GPIO OUTPUT CONTROL

1K
1K
1K
1K
R293 OPT 1K
1K
1K
NON_DVB_T2
+3.3V_Normal VDD33 H11 G18

PHM_OFF
VDDC_1 GND_1
H12 H9
HD
OPT
VDD33_T/VDDP/U3_VD33_2:47mA VDDC_2 GND_2

L204 H13 H10
R207
R209
R212
R227
R297
VDDC_3 GND_3
R215
BLM18PG121SN1D H14 H18

VDDC_4 GND_4
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
H15 H19
0.1uF
0.1uF
0.1uF
Close to MSTAR DTV_IF VDDC_5 GND_5
C284 10uF
C293 10uF
C4001 10uF
J12 J10
R288 100 C257 0.1uF VDDC_6 GND_6
S7M-PLUS_DivX_MS10 R289 100 C258 0.1uF
IF_P_MSTAR J13 J17
IC101 IF_N_MSTAR VDDC_7 GND_7
C4020
C4007
C4012
C4014
C4031
J14 J18
C4025
C4043
C4044
LGE107DC-RP [S7M+ DIVX/MS10] OPT OPT VDDC_8 GND_8
OPT OPT J15 J19
C250 0.1uF R4002 47 TU_SIF VDDC_9 GND_9
J16 K9
C251 0.1uF R4003 47
1000pF
VDDC_10 GND_10
OPT
L18 K10
C264
F1 W2 VDDC_11 GND_11
TP201 ANALOG SIF K11
CK+_HDMI1 A_RXCP VIFP GND_12
F2 W1 AVDD_MEMPLL:24mA AU33:31mA H16 K12
CK-_HDMI1 A_RXCN VIFM TP202 Close to MSTAR MIU0VDDC A_DVDD GND_13
G2 K19 K13
D0+_HDMI1 A_RX0P VDD33 AU33 MIU1VDDC
G3 V2 B_DVDD GND_14
K14
D0-_HDMI1 A_RX0N IP GND_15
H3 V1 L215 L19 K15
D1+_HDMI1 A_RX1P IM FRC_VDDC_0 GND_16
G1 +3.3V_Normal BLM18PG121SN1D
0.1uF
D1-_HDMI1 M18 K16
A_RX1N L227 FRC_VDDC_1 GND_17
H1 Y2 M19 K17
D2+_HDMI1 A_RX2P SSIF/SIFP BLM18PG121SN1D C4015 FRC_VDDC_2 GND_18
H2 Y1 N18 K18
D2-_HDMI1 A_RX2N SSIF/SIFM 0.1uF
F5 FRC_VDDC_3 GND_19
C4023
OPT N19 L9
DDC_SDA_1 DDCDA_DA/GPIO24 C4064 Close to MSTAR FRC_VDDC_4 GND_20
F4 U3 R4019 FRC_LPLL:13mA N20 L10
DDC_SCL_1 DDCDA_CK/GPIO23 QP TP203 0.1uF VDD33 FRC_LPLL FRC_VDDC_5 GND_21
E6 V3 1K P18 L11
HPD1 HOTPLUGA/GPIO19 QM TP204 R4020 FRC_VDDC_6 GND_22
P19 L12
10K L206 FRC_MPLL:4mA FRC_VDDC_7 GND_23
D3 Y5 BLM18PG121SN1D P20 L13
IF_AGC_MAIN
0.1uF
0.1uF
CK+_HDMI2 B_RXCP IFAGC FRC_VDDC_8 GND_24
C1 Y4 L14
CK-_HDMI2 B_RXCN RF_TAGC TP205 AMP_SCL C4065 GND_25
D1 0.022uF Y12 L15
D0+_HDMI2 B_RX0P AMP_SDA TU/DEMOD_I2C U3_DVDD_DDR GND_26
D2 U1 FULL_NIM R291 22 16V L16
DEMOD_SCL OPT
C4016
D0-_HDMI2 B_RX0N TGPIO0/UPGAIN GND_27
C286
E2 U2 FULL_NIM R292 22 L17
D1+_HDMI2 B_RX1P TGPIO1/DNGAIN DEMOD_SDA GND_28
E3 R3 J11 M9
D1-_HDMI2 B_RX1N TGPIO2/I2C_CLK TU_SCL AVDD1P2 GND_29
F3 T3 C4045 1uF L7 M10
D2+_HDMI2 B_RX2P TGPIO3/I2C_SDA TU_SDA DVDD_NODIE GND_30
E1 M11
D2-_HDMI2 B_RX2N GND_31
D4 T2 C261 27pF M12
DDC_SDA_2 DDCDB_DA/GPIO26 XTALIN GND_32
E4 T1 AVDD2P5 H7 M13
R287
DDC_SCL_2 X201 VDD33_DVI:163mA

DDCDB_CK/GPIO25 XTALOUT AVDD2P5_ADC_1 GND_33
1M
D5 24MHz +3.3V_Normal VDD33_DVI AVDD_DMPLL J7 M14

HPD2 HOTPLUGB/GPIO20 C262 27pF AVDD2P5_ADC_2 GND_34
HDMI
J8 M15
AA2 G14 L207 L217 AVDD25_REF GND_35
BLM18PG121SN1D BLM18PG121SN1D M16
CK+_HDMI4 C_RXCP SPDIF_IN/GPIO177 LED_DRIVER_D/L_SDA GND_36
AA1 G13 R296 100 M17
CK-_HDMI4 C_RXCN SPDIF_OUT/GPIO178 SPDIF_OUT GND_37
AB1 AU25
0.1uF
C4002
0.1uF
C4008
0.1uF
C4017
0.1uF
C287 C288 L8 N10
C294
D0+_HDMI4 C_RX0P 10uF AVDD_AU25 GND_38
AA3 0.1uF N11
D0-_HDMI4 C_RX0N B/T USB GND_39
AB3 B7 N12
D1+_HDMI4 C_RX1P DM_P0 AVDD2P5 GND_40
AB2 A7 OPT W15 N13
D1-_HDMI4 C_RX1N DP_P0 PVDD_1 GND_41
AC2 AVDD2P5 Y15 N14
D2+_HDMI4 C_RX2P AVDD_DMPLL/AVDD_NODIE:7.362mA PVDD_2 GND_42
AC1 AF17 N15
D2-_HDMI4 C_RX2N DM_P1 SIDE_USB_DM GND_43
AB4 AE17 AVDD25_PGA U8 N16
DDC_SDA_4 DDCDC_DA/GPIO28 DP_P1 SIDE_USB_DP AVDD25_PGA GND_44
AA4 N17
DDC_SCL_4
AC3
DDCDC_CK/GPIO27 SIDE USB GND_45
P10
HPD4 HOTPLUGC/GPIO21 AVDD_DMPLL GND_46
F14 M8 P11
I2S_IN_BCK/GPIO175 NEC_SDA AVDD_NODIE GND_47
A2 F13 P12
D_RXCP I2S_IN_SD/GPIO176 COMP2_DET GND_48
A3 F15 P13
D_RXCN I2S_IN_WS/GPIO174 NEC_SCL VDD33_DVI GND_49
B3 N9 P14
D_RX0P
A1
D_RX0N I2S_OUT_BCK/GPIO181
D20
AUD_SCK
Normal 2.5V P9
AVDD_DVI_1
AVDD_DVI_2
GND_50
GND_51
P15
I2S_I/F
B1 E20 AVDD2P5/ADC2P5:162mA N8 P16
D_RX1P I2S_OUT_MCK/GPIO179 AUD_MASTER_CLK_0 AVDD3P3_CVBS GND_52
B2 D19 AVDD_DMPLL P8 P17
D_RX1N I2S_OUT_SD/GPIO182 AUD_LRCH +2.5V_Normal AVDD2P5 AVDD2P5 AVDD2P5
C2 F18 AVDD_DMPLL GND_53
R10
D_RX2P I2S_OUT_SD1/GPIO183 LED_DRIVER_D/L_SCL GND_54
C3 E18 L211 R11
D_RX2N I2S_OUT_SD2/GPIO184 MODEL_OPT_4 GND_55
PI_SDA B4 D18 BLM18PG121SN1D AU33 T7 R12
DDCDD_DA/GPIO30 I2S_OUT_SD3/GPIO185 MODEL_OPT_5
0.1uF
0.1uF
C4 E19 AVDD_AU33 GND_56
U7 R13
C289 10uF
PI_SCL DDCDD_CK/GPIO29 I2S_OUT_WS/GPIO180 AUD_LRCK
E5 AVDD_EAR33 GND_57
R14
HOTPLUGD/GPIO22 GND_58
D6 R15
CEC_REMOTE_S7 CEC/GPIO5
C4026
N1 C236 2.2uF VDD33 GND_59
C295
T9 R16
LINE_IN_0L SC1/COMP1_L_IN AVDD33_T GND_60
P3 C237 2.2uF R17
R4024 22 LINE_IN_0R SC1/COMP1_R_IN GND_61
G5 P1 C238 2.2uF R8 R18
AUDIO IN
DSUB_HSYNC R4025 22 HSYNC0 LINE_IN_1L VDDP_1 GND_62

G6 P2 C239 2.2uF R9 T10
DSUB_VSYNC VSYNC0 LINE_IN_1R +2.5V_Normal AU25 +2.5V_Normal AVDD25_PGA
R228 33 C204 0.047uF K1 P4 C4059 2.2uF VDDP_2 GND_63
T8 T11
DSUB_R+ RIN0P LINE_IN_2L VDDP_3 GND_64
DSUB
R229 68 C205 0.047uF L3 P5 C4060 2.2uF L212 L219 T12

RIN0M LINE_IN_2R BLM18PG121SN1D BLM18PG121SN1D GND_65
R230 33 C206 0.047uF K3 R6 C242 2.2uF T13
DSUB_G+ GIN0P LINE_IN_3L COMP2_L_IN
0.1uF
0.1uF
R231 68 C207 0.047uF K2 T6 GND_66
C243 2.2uF V20 T14
GIN0M LINE_IN_3R COMP2_R_IN FRC_VD33_2_1 GND_67
R232 33 C208 0.047uF J3 U5 C244 2.2uF W20 T15
DSUB_B+ BIN0P LINE_IN_4L PC_L_IN AU25:10mA AVDD25_PGA:13mA FRC_VD33_2_2 GND_68
R233 68 C209 0.047uF J2 V5 C245 2.2uF T16
BIN0M PC_R_IN
C4027
LINE_IN_4R GND_69
C210 1000pF J1 U6 C246
C296
2.2uF OPT U19 T17
10K
10K
R4026
R4023
SOGIN0 LINE_IN_5L FRC_AVDD_RSDS_1 GND_70

V6 C247 2.2uF OPT U20 T18
SCART1_RGB/COMP1 LINE_IN_5R
V19
FRC_AVDD_RSDS_2 GND_71
T19
G4 FRC_AVDD_RSDS_3 GND_72
U10
SC1_ID HSYNC1 GND_73
H6 U4 W19 U11
AUDIO OUT
SC1_FB VSYNC1 LINE_OUT_0L FRC_AVDD GND_74

R253 33 C211 0.047uF K5 W3 U18 U12
SC1_R+/COMP1_Pr+ RIN1P LINE_OUT_2L SCART1_Lout FRC_LPLL FRC_AVDD_LPLL GND_75
R254 68 C212 0.047uF K4 W4 TP207 T20 U13
R255 C213 J4
RIN1M LINE_OUT_3L
V4
EXT_L_AMP FRC_AVDD_MPLL GND_76
SC1_G+/COMP1_Y+
R256
33
68 C214
0.047uF
0.047uF K6
GIN1P LINE_OUT_0R
Y3
TP208 DDR3 1.5V Y14
GND_77
U14
U15
GIN1M LINE_OUT_2R SCART1_Rout
BLM18PG121SN1D
R257 33 0.047uF H4 W5 TP209 FRC_VDD33_DDR GND_78
C215 U16
SC1_B+/COMP1_Pb+
R258 68 0.047uF J6
BIN1P LINE_OUT_3R EXT_R_AMP GND_79
C216 +1.5V_DDR AVDD_DDR0 U17
0.01uF
BIN1M
0.01uF
J5 R4 AVDD_DDR0:55mA AVDD_DDR1:55mA GND_80

C217 1000pF VDD33 V7
R200
C200
SC1_SOG_IN
C201
R217
SOGIN1 MIC_DET_IN GND_81

22K
R236 0 T5 C234 OPT 2.2uF

22K
R19 V8
0.1uF
MICCM AVDD_DDR0 AVDD_DDR0
C4046
0.1uF
AVDD_MEMPLL GND_82
L209
OPT R5 C235 2.2uF W14 V9

MICIN FRC_AVDD_MEMPLL GND_83
H5 OPT V10
HSYNC2 GND_84
R237 33 C218 0.047uF N3 T4 V11
COMP2
COMP2_Pr+ RIN2P AUCOM L202 GND_85
C285
R238 68 C219 0.047uF N2 AVDD_DDR0 D15 V12
C278
C281
C4018
C4022
RIN2M BLM18SG121TN1D OPT
0.1uF
0.1uF
C4003
0.1uF
C4009
0.1uF
C4028
0.1uF
C4032
0.1uF
C4038
0.1uF
C4036
0.1uF
AVDD_DDR0_D_1 GND_86
C4042
0.1uF
R239 M2 P7
C290
C297
33 C220 0.047uF D16 V13
10uF
10uF
10uF
10uF
COMP2_Y+ GIN2P VRM AVDD_DDR0_D_2 GND_87
R240 68 C221 0.047uF M1 C249 C253 C256 C263 E15 V14
GIN2M 4.7uF 1uF 0.1uF 10uF AVDD_DDR0_D_3 GND_88
R241 33 C222 0.047uF L2 R7 OPT OPT OPT OPT E16 V15
COMP2_Pb+ BIN2P VAG OPT
R242 68 C223 0.047uF L1 P6 AVDD_DDR0_D_4 GND_89
E17 V16
BIN2M VRP AVDD_DDR0_C GND_90
C224 1000pF M3 CM2012F5R6KT V17
SOGIN2
R1 L203 5.6uH H/P OUT AVDD_DDR0 F16
GND_91
V18
C248 0.047uF HP_OUT_1L HP_LOUT AVDD_DDR0 AVDD_DDR1_D_1 GND_92
R2 L205 5.6uH F17 W7
HP_OUT_1R HP_ROUT AVDD_DDR1_D_2 GND_93
R244 33 C225 0.047uF N4 CM2012F5R6KT G16 W8
4.7uF
4.7uF
TU_CVBS CVBS0P AVDD_DDR1_D_3
R4014
1/16W
GND_94
C268
C272
R245 33 C226 0.047uF N6 MVREF G17 W9

SC1_CVBS_IN CVBS1P AVDD_DDR1_D_4 GND_95
R246 33 C227 0.047uF L4 E21
1K
1%
H17 W10
CVBS In/OUT
CVBS2P ET_RXD0 AVDD_DDR1_C GND_96

R4016 33 C4057 0.047uF L5 E22 W11
CVBS3P ET_TXD0 GND_97
R248 33 C229 0.047uF L6 W12
Delete CHB_CVBS_IN CVBS4P
R4015
1/16W
R249 33 C230 0.047uF M4 D21 GND_98
0.1uF
AB11 W13
C241
AV_CVBS_IN2 CVBS5P ET_RXD1 FRC_AVDD_DDR_D_1 GND_99
R250 33 C231 0.047uF M5 F21
1K
1% AB12 W16
C203 CVBS6P ET_TXD1 FRC_AVDD_DDR_D_2 GND_100
R251 33 C232 0.047uF K7 AC11 W17
1000pF CVBS7P FRC_AVDD_DDR_D_3 GND_101
OPT E23 AC12 W18
ET_REFCLK FRC_AVDD_DDR_D_4 GND_102
TP210 M6 D22 AA12 Y13
CVBS_OUT1 ET_TX_EN FRC_AVDD_DDR_C GND_103
DTV/MNT_VOUT M7 F22 Y18
CVBS_OUT2 ET_MDC GND_104
D23 AA13
ET_MDIO GND_105
R252 68 C233 0.047uF N5 F23 RSDS Power OPT AB13
VCOM0 ET_CRS GND_106
+1.26V_VDDC AC13
MIU0VDDC MVREF GND_107
Close to MSTAR G15 D17
F8 MVREF GND_108
TP206 L228 H23
AVLINK OPT GND_109
G8 R298 100 BLM18SG700TN1D AF13
IRINT GND_110
K8 Y7 J9 L223
0.1uF
TESTPIN NC_1 GND_FU

A4 MIU1VDDC U9 BLM18SG121TN1D
C4066 10uF
Y8
RESET SOC_RESET NC_2 PGA_VCOM
AV_CVBS_IN2 Y17
TP211 L226
U3_RESET BLM18SG700TN1D
0.1uF
C4062
R4006
C4063 10uF
10K
C4056

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP2R 20101023
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MAIN2, HW OPT 2
S7M-PLUS_DivX_MS10
IC101
LGE107DC-RP [S7M+ DIVX/MS10]
AE1 W26
FRC_DDR3_A0/DDR2_NC ACKP/RLV3P/RED[3] RXBCK+
AF16 W25
FRC_DDR3_A1/DDR2_A6 ACKM/RLV3N/RED[2] RXBCK-
AF1 U26
FRC_DDR3_A2/DDR2_A7 A0P/RLV0P/RED[9] RXB0+
AE3 U25
FRC_DDR3_A3/DDR2_A1 A0M/RLV0N/RED[8] RXB0-
AD14 U24
FRC_DDR3_A4/DDR2_CASZ A1P/RLV1P/RED[7] RXB1+
AD3 V26
AF15 V25
AF2 V24
AE15 W24
AD2 Y26
AD16 Y25
FRC_DDR3_A10/DDR2_A11 A4P/RLV5P/GREEN[9] RXB4+
AD15 Y24
FRC_DDR3_A11/DDR2_A4 A4M/RLV5N/GREEN[8] RXB4-
AE16
AC26
BCKP/TCON13/GREEN[1] RXACK+
AC25
BCKM/TCON12/GREEN[0] RXACK-
AA26
B0P/RLV6P/GREEN[7] RXA0+
AF3 AA25
FRC_DDR3_BA0/DDR2_BA2 B0M/RLV6N/GREEN[6] RXA0-
AF14 AA24
FRC_DDR3_BA1/DDR2_ODT B1P/RLV7P/GREEN[5] RXA1+
AD1 AB26
FRC_DDR3_BA2/DDR2_A12 B1M/RLV7N/GREEN[4] RXA1-
AB25
B2P/RLV8P/GREEN[3] RXA2+
AD13 AB24
FRC_DDR3_MCLK/DDR2_MCLK B2M/RLV8N/GREEN[2] RXA2-
AE14 AC24
FRC_DDR3_CKE/DDR2_RASZ B3P/TCON11/BLUE[9] RXA3+
AE13 AD26
FRC_DDR3_MCLKZ/DDR2_MCLKZ B3M/TCON10/BLUE[8] RXA3-
AD25
B4P/TCON9/BLUE[7] RXA4+
AD24
B4M/TCON8/BLUE[6] RXA4-
AE4
AD5
AF4 AD23
FRC_DDR3_CASZ/DDR2_CKE CCKP/LLV3P
AD4 AE23
FRC_DDR3_WEZ/DDR2_BA0 CCKM/LLV3N
AE26
C0P/LLV0P/BLUE[5]
AE2 AE25
FRC_DDR3_RESETB/DDR2_A3 C0M/LLV0N/BLUE[4]
AF26
C1P/LLV1P/BLUE[3]
AF25
C1M/LLV1N/BLUE[2]
AF8 AE24
FRC_DDR3_DQSL/DDR2_DQS0 C2P/LLV2P/BLUE[1]
AD9 AF24
AF23
C3P/LLV4P
AE9 AD22
FRC_DDR3_DQSU/DDR2_DQS1 C3M/LLV4N
AF9 AE22
FRC_DDR3_DQSUB/DDR2_DQSB1 C4P/LLV5P
AF22
C4M/LLV5N
AE11
AF6
AD19
DCKP/TCON5
AE6 AE19
FRC_DDR3_DQL0/DDR2_DQ6 DCKM/TCON4
AF11 AD21
FRC_DDR3_DQL1/DDR2_DQ0 D0P/LLV6P
AD6 AE21
FRC_DDR3_DQL2/DDR2_DQ1 D0M/LLV6N
AD12 AF21
FRC_DDR3_DQL3/DDR2_DQ2 D1P/LLV7P
AE5 AD20
AF12 AE20
FRC_DDR3_DQL5/DDR2_NC D2P/LLV8P
AF5 AF20
AE12 AF19
FRC_DDR3_DQL7/DDR2_DQ5 D3P/TCON3
AD18
D3M/TCON2
AE10 AE18
FRC_DDR3_DQU0/DDR2_DQ8 D4P/TCON1
AF7 AF18
FRC_DDR3_DQU1/DDR2_DQ14 D4M/TCON0
AD11
AD7
AD10 AB22
AE7 AB23
AF10 AC23
FRC_DDR3_DQU6/DDR2_DQ10 GPIO2/TCON7/LDE/GCLK4
AD8 AC22
FRC_DDR3_DQU7/DDR2_DQM1 GPIO3/TCON6/LCK/GCLK2 2D/3D_CTL
AB16
FRC_SPI_CZ
AA14
FRC_GPIO1
AC15 R301 33
FRC_SPI1_CK L/DIM_SCLK
FRC_L/DIM
Y16
FRC_GPIO8
AC16
FRC_SPI_DO
AE8 AC14 R302 33
FRC_DDR3_NC/DDR2_DQM0 FRC_SPI1_DI L/DIM_MOSI
R300 FRC_L/DIM
820 Y11 AA16
S7M-R Y19 AA15
FRC_TESTPIN FRC_SPI_DI
R300-*1 Y10
4.7K FRC_I2CS_DA
AA11
FRC_I2CS_CK
S7M-PLUS
AB15
FRC_PWM0
AB14
FRC_PWM1

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. FRC_DDR 3
ST_3.5V--> 3.375V --> 3.46V
+12V/+15V
20V-->3.51V --> 3.76V (3.59V)
EXT12V_CTRL
+12V/+15V +3.5V_ST +3.5V_ST -> 3.375V

EXT5V_CTRL
FROM LIPS & POWER B/D PANEL_POWER 24V-->3.78V --> 3.92V (3.79V)
12V -->3.58V --> 3.82V (3.68V)
+3.5V_ST
L412
R488
18.5V-->3.5V --> 3.75V (3.59V) 100K
PD_+3.5V
PD_+12V
R463
10K
OPT
R450
R448
2.7K
RL_ON
IC408
A1
A2
5%
1%
0
0.01uF APX803D29
D400
0.015uF C409 C438 C442

0.015uF C436 0.1uF 10uF New item R402 POWER_DET
0.01uF 16V 16V VCC RESET 100
50V 3 2
C
25V OPT Q409
PD_+12V
+3.5V_ST
D401
1.21K
1/10W
RT1P141C-T112 AO3407A PANEL_DISCHARGE_RES 1
R447
A1
A2
Q402 C474
1%
C411 GND PWR_DET_DIODES
R407-*2 0.1uF
PANEL_VCC 0.1uF
R439
3K
33K
C443 16V
R406 IC408-*1
C
1 3 10uF
4.7K G PANEL_DISCHARGE_RES
NORMAL_EXPEPT_32 NORMAL_32 NCP803SN293
R401 C P403 L407-*1 25V PWR_DET_ON_SEMI
2 P404 R405-*1
10K FW20020-24S FM20020-24 CIS21J121 +24V 3K R404
B Q401 R431 C451 +24V PD_+12V RESET VCC
2 3
R440
5.6K
2SC3052 22K 0.1uF
100K
L404-*1 L407 50V 1
E PWR ON 1 24V 1608 IC409
R482
8.2K
CIS21J121 2 MLB-201209-0120P-N2 GND
OPT
1%
24V 24V OPT C POWER_+24V APX803D29 PD_+12V
3 4 IC409-*1
R430 OPT
+3.5V_ST GND 5 6 GND 10K OPT R480
L404 C418 C426 B Q407 R407 100 NCP803SN293
GND GND R405 VCC 3 2 RESET PD_+12V_PWR_DET_ON_SEMI
MLB-201209-0120P-N2 7 8 0.1uF 68uF 2SC3052 C455 2.2K 2.2K
3.5V 3.5V 50V 35V 0.1uF
R403
1.5K
9 10 C 1 RESET VCC
E 2 3
1%
R429 R435 16V C412 POWER_+24V
3.5V 11 12 3.5V 47K GND
C401 PANEL_CTL B Q406 22K 0.1uF
C406 C408 GND GND PD_+12V_PWR_DET_DIODES 1
100uF 13 14 2SC3052 16V
0.1uF 0.1uF PD_+12V GND
16V 16V 16V GND 15 16 GND/V-sync 1:AK10
E
+12V/+15V
OPT 12V
12V
12V
17
19
18
20
INV ON
A.DIM
P.DIM1 +3.3V_Normal
Power_DET
21 22
L402 GND/P.DIM2 Err OUT
MLB-201209-0120P-N2 23 24
+3.5V_ST
POWER_16_GND
R419
1K
S7M DDR 1.5V
0
C402
100uF
16V
C404
0.1uF
16V
C407
0.1uF
16V
OPT
25
POWER_18_INV_CTL
R415
100 R426
10K OPT POWER_ON/OFF1 1074 mA +3.3V_Normal +3.3V_Normal
R412
POWER_23_GND
L402-*1 SLIM_32~52
10K
R464
P401 R425
CIS21J121 100 +12V/+15V
SMAW200-H24S2 C
IC405
POWER_24_GND
R418 R421
R476
C475 1934 mA
POWER_24_INV_CTL B 10K INV_CTL
6.8K AOZ1073AIL-3
0
R475
L416
OPT Q405 0.1uF L424
+3.5V_ST 16V C462 +1.5V_DDR L421
2SC3052
0
E R427 CIC21J501NE
0.1uF PGND LX_2 3.6uH
10K
1 8
POWER_18_A_DIM OPT
EP[GND]
R451 0 NR8040T3R6N
16V
VIN_3
PWRGD
BOOT
POWER_22_A_DIM VIN LX_1
L420
R460
R485 0 2 7
EN
1%
27K
POWER_20_A_DIM A_DIM
L423 AGND 3A EN POWER_ON/OFF2_2 C469 C473 C485
16
15
14
13
POWER_20_PWM_DIM R453 0 3.6uH 3 6 R1
4.7K
VIN_1 PH_3 22uF 0.1uF 0.1uF
1%
R461
1 12 R456 16V
POWER_24_PWM_DIM R484 PWM_DIM C457 C459 10K 16V 16V
0 THERMAL 10uF
R472 0 VIN_2 2 11 PH_2 NR8040T3R6N 10uF FB COMP
C461 C468 17 C470 25V 4 5
25V OPT
10uF 0.1uF C472 C476 0.1uF
R471 0 PWM_PULL-DOWN_3.9K
GND_1 3 IC407 10 PH_1 12K C423
POWER_22_PWM_DIM 10V 16V 22uF 22uF 16V 2200pF
R606 TPS54319TRE R454 100pF
3.9K C465 10V 10V C464
OPT C416 R606-*1 GND_2 4 9 SS/TR 50V
0.1uF 1K
0.01uF
47K 1%
16V PWM_PULL-DOWN_1K C463
8
50V
R457
R462
100pF
1%
10K
R1 50V
AGND
VSENSE
COMP
RT/CLK
R452
R2
+3.3V_Normal 1/16W 330K 5%
POWER_20_ERROR_OUT
R455 C467
R486
4.7K
R437 100
Vout=(1+R1/R2)*0.8
OPT
15K 4700pF
POWER_24_ERROR_OUT ERROR_OUT 1/16W 5% 50V

R2
R420 100
R449
56K
1/16W
3A $ 0.145 1%
<MODULE PIN MAP>

Vout=0.827*(1+R1/R2)=1.521V +5V_Normal
PIN No LGD(PSU) SHARP IPS-@
CMO10"Lamp AUO 10"Lamp
or LIPS (PSU) (PSU) (PSU) (PSU) +12V/+15V MAX 1A
IC406
16 GND GND GND GND AOZ1072AI-3
GND TP5303 V_SYNC
TP5304 +2.5V/+1.8V L422
L417
SCAN_BLK2
PGND LX_2 3.6uH
18 INV_ON A-DIM INV_ON INV_ON INV_ON TP5305 SCAN_BLK1/OPC_OUT 1 8
+3.3V_Normal NR8040T3R6N
52/60:ERROR OPC_OUT
TP5306 IC402 VIN LX_1
20 VBR-A NC Err_out Err_out +2.5V_Normal
R465
26/32HD:NC 2 7
1%
AZ2940D-2.5TRE1
24K
C490
26/32/52:PWM
22 PWM_DIM PWM_DIM NC 60:NC NC VIN 1 Vd=550mV3 VOUT
300 mA
0.1uF
16V
AGND
3
2A 6
EN POWER_ON/OFF2_2
R1
C471
22uF
1%
51K
R466
C458 C460 R459 C477
2 10K 16V
26/32/52:GND 10uF 10uF 0.1uF
R473
Err_out INV_ON PWM_DIM PWM_DIM GND FB COMP 16V

24 60:PWM C432 25V 25V 4 5
1
OPT
0.1uF 12K C427
16V 2200pF
R458 100pF
23 GND GND GND GND GND C466 50V
C403 C440
10uF 0.1uF
10V 16V
R467
1%
10K
<LED MODULE PIN MAP -> latest update 20100618> <Module Inv to Main Pin Connection> R2
32LE5300-TA 32LE4500-TA 32LE5300-TA Vout=0.8*(1+R1/R2)
PIN No LGD LPB/ CMO10"LED AUO 10"LED
LGD 10"LED INV <--> MAIN
OS LPB (PSU) (PSU) (PSU)
#11 <--> #24
16 NC NC NC NC #12 <--> #18
18 INV_ON INV_ON INV_ON INV_ON
#13 <--> #20
#14 <--> #22 +5V_TUNER
20 err_out err_out
NC NC IC410
+5V_Normal IC411
--> NC --> NC AP1117EG-13 AP1117EG-13
22 PWM_DIM NC NC PWM_DIM IN OUT IN OUT
err_out ADJ/GND R422 ADJ/GND

err_out 1 R424
24 --> NC PWM_DIM PWM_DIM --> NC 5% 1
5%
23 NC NC NC NC
S7M core 1.26V volt C491
0.1uF
50V
330
R411
110
R417
C414
0.1uF
16V
C415
10uF
C422
0.1uF 330
R409
110
R408 C417
0.1uF
C419
10uF
POWER_ON/OFF2_1 10V 50V
16V 10V
10K
R445
LGD edge led error-out use or not? checking is necessary...

C447
0.1uF
+5V_USB +5V_USB +3.5V_ST 16V

C441
0.1uF
+1.26V_VDDC C421,C422 Close to LDO
EP[GND]
+12V/+15V
VIN_3
PWRGD
IC401
BOOT
2000 mA 16V
L413
EN
AOZ1073AIL-3
L401
L406 L415
16
15
14
13
3.6uH 3.6uH
PGND LX_2 VIN_1 1 12 PH_3
1 8
THERMAL
NR8040T3R6N VIN_2 2 11 PH_2 NR8040T3R6N
C430 C431 17 C444
VIN LX_1 10uF C453 C456 0.1uF
0.1uF
R414
2 7 GND_1 3 IC403 10 PH_1

1%
22uF 22uF
51K
C489 10V 16V 16V

22K 1% 24K 1%
OPT SN1007054RTER C488 10V 10V

0.1uF GND_2 SS
R442
16V AGND 3 3A 6
EN POWER_ON/OFF2_1
R1
C429 C420 C424 C428 4 9
1.5K
100pF 22uF 0.1uF 0.1uF 0.01uF 50V

1%
R416
R410
5
C405 50V 16V 16V 16V 50V

C410 10K 100pF
10uF 10uF FB COMP OPT C439
R1
AGND
VSENSE
COMP
RT/CLK
R444
25V 25V 4 5
R432
12K 1/16W 330K 5%
2200pF
R413
C413 R436 C448
7.5K 3300pF
1/16W 5% 50V
R2
R423
1%
10K
R2
R441
75K
4A $ 0.165 1/8W
1%
Vout=(1+R1/R2)*0.8
Vout=0.8*(1+R1/R2)=1.29V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER_LARGE 4
+3.5V_ST
MICOM_RESET
+3.5V_ST
IC5007
Closed to Crystal
74LX1G14CTR
+3.5V_ST
47K
MICOM MODEL OPTION
NC VCC
PWM_BUZZ/IIC_LED
1 5
C5004
C5006
10K
10K
10K
10K
C5011
13pF
13pF
BU5000
TOUCH_KEY
R5060
B/L_LED
1A 0.1uF
RTC_INT
+3.5V_ST PKLCS1212E4001-R1
SW5000 2 16V
GP2
JTP-1127WEM
R5000
R5003
R5005
R5008
2 1
+3.5V_ST
GND 1Y
22
X5000 3 4 1
BLM18PG600SN1D
C5007
10MHz
AMP_RESET MODEL_OPT_0 2.2uF 4 3
10V
R5057
L5000
R5051
PANEL_CTL MODEL_OPT_1
C5003
0.1uF
1M
FLMD0
2
16V
MODEL1_OPT_2
CEC_ON/OFF
SIGN340048 +5V_ST
22
MODEL_OPT_3 +3.5V_ST
R5070 OPT 22
OPT
10K
10K
10K
10K
P46/INTP1/TI05/TO05
TOOL0
TOOL1
0.1uF
R5054
TACT_KEY
B/L_LAMP
PWM_LED
L5002
16V
100K
R5069
P120/INTP0/EXLVI
BLM18PG121SN1D
GP3
P122/X2/EXCLK
P42/TI04/TO04
R5001
R5004
R5006
R5009
4.7K
4.7K
REGC C5005
P40/TOOL0
P41/TOOL1
P43/SCK01
P47/INTP2
+3.5V_ST
P123/XT1
P124/XT2
P44/SI01
P45/SO01
Q5006
E Q5007 E Q5010
P121/X1
E 2SA1504S 2SA1504S E Q5008
2SA1504S E Q5009
2SA1504S 2SA1504S
EVDD0
EVSS0
FLMD0
RESET
R5032
R5042
VDD
VSS
B B B B B 13
R5106
C C C 10
C C
R5043 R5084 R5087
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
12
CLOCK_SCL 22 P60/SCL0 P140/PCLBUZ0/INTP6 4.7K 4.7K
CLOCK_SCL 1 80 R5105
CLOCK_SDA R5044 22 P61/SDA0 P141/PCLBUZ1/INTP7 R5077 22 OPT 10
CLOCK_SDA 2 79
P62 P142/SCK20/SCL20 R5078 22 OPT 11
3 78
P63 P143/SI20/RXD2/SDA20 R5075 22 R5102
4 77 10
MODEL OPTION NEC_DBG_RX
R5031 22 P31/TI03/TO03/INTP4 5 76 P144/SO20/TXD2 R5076 22
CEC_REMOTE_NEC NEC_DBG_TX 10
P64/RD 6 75 P145/TI07/TO07 R5103
PIN NAME PIN NO. HIGH LOW OPT R5025 4.7K P65/WR0 P00/TI00 R5079 22 10
7 74 SUBAMP_SD
OPT R5026 4.7K P66/WR1 P01/TO00 R5080 22 9
MODEL_OPT_0 8 B/L_LED B/L_LAMP P67/ASTB
8
9
IC5004 73
72 P02/SO10/TXD1
SUBAMP_MUTE
R5104
10
R5028 22 P77/EX23/KR7/INTP11 R5073
P03/SI10/RXD1/SDA10 22
PWM_LED CEC_ON/OFF 10 71 NEC_EEPROM_SDA 8
MODEL_OPT_1 11 PWM_BUZZ/IIC_LED
MODEL1_OPT_2
R5022 22 P76/EX22/KR6/INTP10 11 UPD78F1164GF(S)70 P04/SCK10/SCL10 R5074 22
NEC_EEPROM_SCL
OPT R5023 22 P75/EX21/KR5/INTP9 12 69 P131/TI06/TO06
MODEL_OPT_2 30 TOUCH_KEY TACT_KEY
R5015 22 P74/EX20/KR4/INTP8 P130 7
MODEL_OPT_3 31 GP2
NEC_IR
R5016 22 P73/EX19/KR3
13
14
NEC_MICOM 68
67 P20/ANI0
AMP_MUTE IC5009
KID65003AF
GP3 LED_R
R5017 22 P72/EX18/KR2 15 66 P21/ANI1
LED_B 6
R5018 22 P71/EX17/KR1 16 65 P22/ANI2 R5096
UART_SW2 I1 O1 10
R5019 22 P70/EX16/KR0 17 64 P23/ANI3 1 16
MODEL_OPT_0 MODEL_OPT_1 RL_ON
MODEL_OPT_2 MODEL_OPT_3 OPT R5020 22 P06/WAIT P24/ANI4 5
18 63
R5021 22 P05/CLKOUT P25/ANI5 R5095
POWER_ON/OFF2_2 19 62 I2 O2 10
LOW LOW LOW LOW LD350/450/550 2 15
EVSS1 20 61 P26/ANI6
4
+3.5V_ST R5033 22 P80/EX0 P27/ANI7
21 60 R5101
HIGH LOW HIGH LOW 19/22/26LE3300(5500) UART_SW1 I3 O3 10
R5034 22 P81/EX1 22 59 P150/ANI8 3 14
OPT UART_DBG_SW
HIGH HIGH HIGH LOW 32/37/42/47/55LE5300(10) R5014 R5035 22 P82/EX2 23 58 P151/ANI9 +5V_ST 3
DBG_SW R5097
10K R5036 22 P83/EX3 P152/ANI10
INV_CTL 24 57 I4 O4 10
LOW LD420 R5037 22 P84/EX4 P153/ANI11 4 13
LOW HIGH LOW PANEL_CTL 25 56 2
R5038 22 P85/EX5 P154/ANI12
R5088
EDID_WP POWER_ON/OFF1 26 55 R5098
C I5 O5 10
10K
HIGH HIGH LOW LOW LE7300 R5039 22 P86/EX6 27 54 P155/ANI13 5 12
SOC_RESET
Q5000 B R5040 10K P87/EX7 P156/ANI14 1
28 53
HIGH HIGH TBD 2SC3052 R5041 0 P30/INTP3/RTC1HZ P157/ANI15 R5100
29 52 C I6 O6 10
POWER_DET 6 11
E EVDD1 30 51 AVSS
B Q5001 +5V_ST
2SC3875S(ALY) R5099
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
4.7K I7 O7 10 12507WR-12L
R5081 7 10
E +3.5V_ST P5001
R5089
P50/EX8
P51/EX9
P52/EX10
P53/EX11
P54/EX12
P55/EX13
P56/EX14
P57/EX15
P17/EX31/TI02/TO02
P16/EX30/TI01/TO01/INTP5
P15/EX29/RTCDIV/RTCCL
P14/EX28/RXD3
P13/EX27/TXD3
22 P12/EX26/SO00/TXD0
22 P11/EX25/SI00/RXD0
P10/EX24/SCK00
AVREF1
P110/ANO0
P111/ANO1
AVREF0
10K
GND COMMON
8 9
R5110
0
+3.5V_ST
C
+5V_ST
B Q5002
2SC3875S(ALY)
4.7K
100
100
22
22
22
22
22
R5090
R5082
22
E
4.7K
4.7K
4.7K
4.7K
22
R5066 OPT22
10K
22
22
22
R5068
R5049
R5050
R5052
R5048
R5046
R5053
R5045
R5047
10K
R5064
R5058
R5059
R5061
R5063
R5067
R5029
R5030
R5024
R5027
C
B Q5004
+5V_ST
2SC3875S(ALY)
EYEQ_SCL 4.7K +3.5V_ST
R5091
EYEQ_SDA R5083 E
10K
P5000
EXT_PWR_DET
IR_OUT_CTRL
MST_NEC_RX
NEC_RX
NEC_TX
MST_NEC_TX
EEPROM_SW
POWER_ON/OFF2_1
SIDE_HP_MUTE
SCART1_MUTE
EXT5V_CTRL
EXT12V_CTRL
12507WS-06L
AMP_RESET
S/T_SCL
S/T_SDA
C
B Q5003 R5093 R5094 1
2SC3875S(ALY) 4.7K 4.7K
4.7K
R5085 E +5V_ST MICOM_RESET 2
R5092
10K
R5107
22
TOOL0 3
C
B Q5005 4
2SC3875S(ALY)
4.7K
R5086 R5108
E 22
TOOL1 5
R5109
22
FLMD0 6
EEPROM_SW
7
R5071
0
SELECT CONNECTION KEY1
KEY2
L B0 - A R5072
0
H B1 - A
UART SWITCH
22
R5065
R5007
SELECT CONNECTION 100 R5013
UART_SW1 100
L B0 - A UART_SW2 C5008
IC5005 1uF
H B1 - A +3.5V_ST NLASB3157DFT2G 50V
IC5000
+3.5V_ST NLASB3157DFT2G IC5002
+3.5V_ST NLASB3157DFT2G
SELECT B1
6 1 S7_EEPROM_SCL
SELECT
6 1
B1
SELECT B1 ON SEMICONDUCTOR Step Up regulator 3.3V to 5V(MAX 250mA)
S7_DBG_TX 6 1 VCC ANALOG SWITCH GND
ON SEMICONDUCTOR
MST_NEC_TX 5 2
C5000
0.1uF ANALOG SWITCH ON SEMICONDUCTOR C5002
VCC GND C5001 ANALOG SWITCH
5 2 0.1uF VCC GND 0.1uF IC5008
5 2 A B0
EEPROM_SCL 4 3 NEC_EEPROM_SCL SC632ULTRT [EP]GND
A B0 R5011
S7_TXD 4 3 100 A B0 EAN38256201
UART_TX NEC_RX 4 3 UART_RX R5056 GND5V
3.3V to C2- 3.3V to 5V
EAN38256201 0 1 8
EAN38256201 C5012
THERMAL
OPT 2.2uF
R5010 C1+ C2+ 10V
9
OPT 3.3V to 5V 2 7
0 IC5006 +5V_ST
NLASB3157DFT2G +3.5V_ST C5010
2.2uF
IC5001 C1- OUT
10V 3 6
NLASB3157DFT2G IC5003
SELECT B1 3.3V to 5V
NLASB3157DFT2G
6 1 S7_EEPROM_SDA 3.3V to 5V C5013
S7_DBG_RX IN EN
ON SEMICONDUCTOR 4 5 22uF
SELECT B1
6 1 SELECT B1 VCC ANALOG SWITCH GND 25V
6 1 MST_NEC_RX 5 2 BLM18PG600SN1D 3.3V to 5V
ON SEMICONDUCTOR L5001
VCC ANALOG SWITCH GND ON SEMICONDUCTOR C5009
5 2 VCC ANALOG SWITCH GND A B0 NEC_EEPROM_SDA 22uF
5 2 EEPROM_SDA 4 3 25V
A B0 R5012
4 3 UART_RX 100 A B0 EAN38256201
S7_RXD NEC_TX 4 3
UART_TX
OPT
R5002 EAN38256201 R5055
0 EAN38256201 0
OPT

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MICOM 5
CONTROL
IR & LED
+3.5V_ST
OPT
R2421
100
EYEQ_SCL
EYEQ/TOUCH_KEY
R2411
R2405 100
R2404 S/T_SCL OLD_SUB NEW_SUB
10K 10K
1% 1% P2401 P2402
EYEQ/TOUCH_KEY
100 EYEQ/TOUCH_KEY 12507WR-12L 12507WR-15L
S/T_SDA C2408 5.6V
R2412 18pF D2403
OPT 50V
L2401 100 OPT
R2401 BLM18PG121SN1D EYEQ_SDA 1 1
100
KEY1 R2420
EYEQ/TOUCH_KEY
R2402 L2402 2 2
BLM18PG121SN1D D2402
100 5.6V
KEY2 C2409 5.6V
AMOTECH D2404
C2401 C2402 18pF
50V 3 3
0.1uF 0.1uF
D2401 OPT
5.6V
AMOTECH JP2407
4 4
+3.5V_ST
+3.5V_ST JP2408
5 5
L2403
BLM18PG121SN1D
+3.5V_ST 6 6
R2406
1K
R2400 OPT
NEC_IR 22 R2413 1.5K
R2408 +3.5V_ST C2403 C2404 7 7
NEC_IR 0.1uF 1000pF LED_B
47K 16V 50V OPT
R2407 C2410
Q2400 C 10K 0.1uF JP2409
B R2410 16V 8 8
2SC3052
E OPT 3.3K
OPT R2409 OPT
C 47K IR_IN JP2410
B 9 9
Q2401 E
2SC3052 C2407
100pF D2405
+3.3V_Normal 50V 5.6V 10 10
L2404
+5V_ST BLM18PG121SN1D
JP2411
R2403 11 11
0
R2422 R2414
LED_R 12 12
3.3K C2406
R2423 C2405 1.5K
0.1uF 1000pF OPT
22 50V 13
IR_OUT_RS232C 16V R2416
13
10K
R2429
Q2405 C 10K
2SC3052 B 14
E
+5V_ST
15
OPT
100 16
R2428 NEC_EEPROM_SCL
3.3K R2418
R2427
22
IR_OUT_HDMI1 100
S/T_SCL
R2425 R2415
C 10K NEW_SUB
Q2403
2SC3052 B C906 D902
E 18pF CDS3C05HDMI1
50V 5.6V
OPT
R2424
30K C Q2404 100
B S/T_SDA
2SC3052 +5V_ST
E R2417
100 NEW_SUB
NEC_EEPROM_SDA C907 D903
18pF CDS3C05HDMI1
OPT 5.6V
R2419 50V
R2426 OPT
3.3K
R2431
22
IR_OUT_HDMI2
R2430
Q2406 C 10K
2SC3052 B
E
R2432
30K C Q2402
IR_OUT_CTRL B 2SC3052
E
+5V_ST
R2435
3.3K
R2436
22
IR_OUT_SIDE_HDMI
R2433
Q2407 C 10K
2SC3052 B
E
R2434
30K C Q2408
B 2SC3052
E

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IR/CONTROL-L 6
USB_DIODES
EAN61849601
IC1450
L1451-*1 AP2191DSG
CIS21J121
NC GND
8 1 +5V_USB
L1451
MLB-201209-0120P-N2 OUT_2 $0.077 IN_1
7 2
120-ohm
OUT_1 IN_2 C1452
C1453
R1458 R1459 6 3 10uF
2K 2K C1451 10V 0.1uF
1/8W 1/8W
1% 1% 22uF +3.3V_Normal
FLG EN
16V 5 4
R1455
4.7K
SIGN6409
OPT
USB1_CTL
3AU04S-305-ZC-(LG)
R1454
10K
R1451 47 USB1_OCD
JK1450
1
USB DOWN STREAM
SIDE_USB_DM
3
SIDE_USB_DP
4
D1451 D1452
CDS3C05HDMI1 CDS3C05HDMI1
5
5.6V 5.6V
OPT
OPT

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. USB_OCP_DIODE 7
HDMI EEPROM
5V_HDMI_1 +5V_Normal
A2
A1
ENKMC2838-T112
D821
C
HDMI_1_RENESAS
5V_HDMI_1 5V_DET_HDMI_1 HDMI_1_ATMEL
HDMI_1 IC801-*1
R1EX24002ASAS0A
IC801
AT24C02BN-SH-T
EDID_WP
R874
10K
C A0 VCC A0 VCC
SHIELD 1 8 1 8
Q802 B R830
R896 2SC3052 HPD1 $0.055
20 10K A1 WP A1 WP C806 R884 R888
1K E 2 7 2 7
C802 0.1uF 2.7K 2.7K
19
R804 0.1uF
A2 SCL A2 SCL
16V 3 6
3.3K
18 3 6
1.8K DDC_SCL_1
R876 22
R802
17 VSS SDA GND SDA

DDC_SDA_1 4 5 4 5
16 DDC_SDA_1
R875 22
DDC_SCL_1
15
R805 0
IR_OUT_HDMI1
14 5V_HDMI_2 +5V_Normal
R824 0
HDMI_CEC
EAG59023302
13
CK-_HDMI1
A2
A1
12
HDMI_1
ENKMC2838-T112
11 D822
CK+
10 CK+_HDMI1
C
HDMI_2_RENESAS
D0- HDMI_2_ATMEL
9 D0-_HDMI1 IC802-*1 IC802
D0_GND R1EX24002ASAS0A AT24C02BN-SH-T EDID_WP
8
10K
R873
D0+
7 D0+_HDMI1
A0 VCC A0 VCC
D1- 1 8 1 8
6 D1-_HDMI1
D1_GND $0.055 C807 R885 R889
5 A1 WP A1 WP
2 7 2 7
D1+ 0.1uF 2.7K 2.7K
4 D1+_HDMI1
D2- A2 SCL A2 SCL JP810
3 D2-_HDMI1 3 6 3 6 DDC_SCL_2
D2_GND R878 22
2
VSS SDA GND SDA
D2+ 4 5 4 5 DDC_SDA_2
1 D2+_HDMI1
R877 22
OPT
D802
JK802
5V_HDMI_4 +5V_Normal
A2
A1
ENKMC2838-T112
D824
C
HDMI_SIDE_RENESAS HDMI_SIDE_ATMEL
HDMI_2 5V_HDMI_2 5V_DET_HDMI_2
SIDE_HDMI IC804
IC804-*1 AT24C02BN-SH-T
EDID_WP
5V_HDMI_4 5V_DET_HDMI_4 R1EX24002ASAS0A
10K
R871
A0 VCC
C C 1 8
SHIELD R828 A0 VCC
10K BODY_SHIELD R862
Q801 B Q803 B 1 8 $0.055
R895 2SC3052 HPD2 HPD4
20 R897 2SC3052 A1 WP
20 10K 2 7 C809 R887 R891
1K E A1 WP
1K E 2 7 0.1uF 2.7K 2.7K
C801 C803
19 19 A2 SCL JP812
R803 0.1uF R837 0.1uF 3 6 DDC_SCL_4
16V 16V A2 SCL
18 1.8K 18 R881 22
3 6
R801
3.3K
R835
3.3K
1.8K
JP805 GND SDA
17 17 4 5 DDC_SDA_4
DDC_SDA_2 DDC_SDA_4 VSS SDA R882 22
16 4 5
16
DDC_SCL_2 DDC_SCL_4
15 15
R800 0 JP806
IR_OUT_HDMI2 R898 0
14 R815 0 14 IR_OUT_SIDE_HDMI
HDMI_CEC R841 0
13 HDMI_CEC
EAG59023302
13
EAG62611201
CK-_HDMI2
12
HDMI_2
12 CK-_HDMI4
HDMI_SIDE
11 11
CK+ CK+
10 CK+_HDMI2 10
CK+_HDMI4
D0- D0-
9 D0-_HDMI2 9 D0-_HDMI4
D0_GND D0_GND
8 8
D0+ D0+
7 D0+_HDMI2 7 D0+_HDMI4 +3.3V_Normal
D1- D1-
6 D1-_HDMI2 6 D1-_HDMI4 68K
D1_GND D1_GND
5 5
R854
4
D1+
D1+_HDMI2 4
D1+
D1+_HDMI4
For CEC
D804
R855
D2- D2-
3 D2-_HDMI2 0 R856
3 D2-_HDMI4 R857
10K 68K
D2_GND D2_GND OPT
2 2 OPT
D2+ D2+
1 D2+_HDMI2 1 D2+_HDMI4
S
B
D
CEC_REMOTE_S7
OPT
D801
OPT
D811
AVRL161A1R1NT
JK801
JK803 Q806
G
BSS83
D803
OPT
C805
0.1uF
16V
GND GND
CEC_ON/OFF
68K
+3.5V_ST
R892
D825
R883
0 R893
R853
10K 68K
OPT
HDMI_CEC
S
B
D
CEC_REMOTE_NEC
AVRL161A1R1NT Q805
G
BSS83
D826
OPT
C810
0.1uF
16V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES GND GND

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI 8
RGB/SPDIF/PC/HP
New Item Development
EARPHONE BLOCK
HP_LOUT
C1118
002:V7 10uF
16V C1115
1000pF
50V R1125 C
OPT 1K E
JK3301
Q1101 B +3.3V_Normal
MMBT3904-(F) KJA-PH-0-0177
MMBT3904-(F)
B Q1104
GND 5
R1130
E C
10K
L 4 +3.5V_ST
ISA1530AC1
R1155
1K DETECT 3
Q1105
HP_ROUT HP_DET
R 1
C1119
E
002:V7 10uF
16V
C1116
1000pF C E
B
50V Q1102 B
OPT R1128 MMBT3904-(F) C
1K MMBT3904-(F) R1129
B Q1103
3.3K B
E SIDE_HP_MUTE
C Q1106
2SC3052
E
New
PC AUDIO
JK1102-*1
PEJ027-04 RGB PC D1115
+5V_Normal
JK1102
3
6A
E_SPRING
T_TERMINAL1
SPDIF OPTIC JACK ENKMC2838-T112
A1
+3.3V_Normal
PEJ027-01 7A B_TERMINAL1 5.15 Mstar Circuit Application C
4 R_SPRING A2
3 E_SPRING
OPT 5 T_SPRING
7B B_TERMINAL2
6A T_TERMINAL1
6B T_TERMINAL2
GND
1
B_TERMINAL1
Fiber Optic
JST1223-001
RGB_EEMPROM_ATMEL
7A RGB_EEMPROM_RENESAS R1140
PC_R_IN IC1105 R1139 C1129
002:S12 2.2K R1142
JK1103
IC1105-*1 AT24C02BN-SH-T 2.2K 0.1uF
D1101 R1107 10K
R_SPRING C1107 15K VCC R1EX24002ASAS0A 16V
4
2
AMOTECH 100pF R1102 A0 VCC
5.6V 50V 470K R1110 1 8
A0 VCC
T_SPRING OPT 10K 1 8
5 VINPUT A1
2 7
WP
3
SPDIF_OUT A1 WP EDID_WP
2 7
R1108 C1131
4
A2 SCL
7B B_TERMINAL2 15K C1121 3 6
002:T18 0.1uF A2 SCL RGB_DDC_SCL
PC_L_IN 002:S12 100pF 3 6
FIX_POLE
16V GND
4 5
SDA
T_TERMINAL2 D1102 C1108 R1103 50V VSS SDA

RGB_DDC_SDA
6B AMOTECH 4 5
100pF 470K
5.6V 50V R1111 C1127 C1128 R1141
OPT 10K 18pF 18pF 22 R1143
50V 50V 22
DSUB_VSYNC
DSUB_HSYNC
C1122 C1126 D1113 D1116
D1109 68pF D1114
68pF 30V 50V 5.6V
50V 5.6V
OPT 30V OPT
OPT OPT
DSUB_B+
R1133 D1110
75 30V
DSUB_G+
R1135 D1111
75 30V
+3.3V_Normal
R1146
10K
DSUB_DET
R1147
1K
DSUB_R+
D1112 D1117
R1137 30V 5.6V
75
OPT
GREEN_GND
DDC_CLOCK
DDC_DATA
BLUE_GND
SYNC_GND
RED_GND
DDC_GND
H_SYNC
V_SYNC
GND_2
GREEN
GND_1
BLUE
RED
NC
SPG09-DB-010
SHILED
11
12
13
14
15
JK1104
16
10
6
9
1
5
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. RGB/SPDIF/HP 9
EXT_12V
EXT_5V
RS232C JP1002
10
5
IR_OUT_RS232C 4
R1006
0
R1007 8
100 JP1000
3
7
R1008
+3.5V_ST 100 JP1001
D1000 D1001 6
CDS3C30GTH CDS3C30GTH
30V 30V 1
OPT OPT
C1000 0.33uF SPG09-DB-009

IC1000 P1000
C1005
MAX3232CDR 0.1uF
D1002
C1+ VCC BAP70-02
1 16
C1001 50V
0.1uF V+ GND R1004 R1005
2 15 47K 1K
C1002 OPT
0.1uF +3.5V_ST
C1- DOUT1
3 14
C2+ RIN1 R1000

4 13 R1001
4.7K
C1003 4.7K
0.1uF C2- ROUT1
5 12
V- DIN1
6 11
C1004
0.1uF DOUT2 DIN2
7 10
RIN2 ROUT2
8 9
R1002 0
UART_RX
EAN41348201
R1003 0
UART_TX

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. RS232C_9PIN 10
[51Pin LVDS Connector]
(For FHD 60/120Hz)
PANEL_VCC
[30Pin LVDS Connector]

L702 (For HD 60Hz_Normal)
120-ohm
WAFER_FHD
P705
P703
FF10001-30
FI-RE51S-HF-J-R1500
HD
WAFER_FHD
C700 C709 C710
10uF 1000pF 0.1uF
16V 50V 16V 1
1 OPT OPT WAFER_FHD
OPT
2
2
0 R713
3 TP721 PWM_DIM
3
4 TP722 OPC_OUT
4
5
5
6 RXA3-
6
7 RXA3+
7
8
8
9 RXACK-
9
10 RXACK+
10
11
11 RXA4-
12 RXA2-
12 RXA4+
13 RXA2+
13 RXA3-
14
14 RXA3+
15 RXA1-
15
16 RXA1+ LVDS_SEL
16 RXACK-
17 +3.3V_Normal
17 RXACK+
18 RXA0-
18
19 RXA0+ R712
19 RXA2- 3.3K
20 OPT
20 RXA2+
21
21 RXA1- R711
22 10K
22 RXA1+ OPT
23
23 RXA0- PANEL_VCC
24
24 RXA0+ BIT_SEL
25 L701
25 120-ohm
26 HD
26 R709
10K 27
27 RXB4- BIT_SEL_LOW OPT HD
28 C701 C702 C703
28 RXB4+ 10uF 1000pF 0.1uF
29 16V 50V 16V
29 RXB3- OPT
30
30 RXB3+
31 31
32 RXBCK-
33 RXBCK+
34
35 RXB2-
36 RXB2+
37 RXB1-
38 RXB1+
39 RXB0-
40 RXB0+
LVDS_SEL
41 SCAN_BLK2
42 +3.3V_Normal
43 SCAN_BLK1/OPC_OUT
R703 R705
44 0 PWM_DIM 3.3K
LVDS_PWM_44
45 OPT
46 R710
10K
47 OPT
R701
48 0 LED_DRIVER_D/L_SDA
3D_SG
49
R702
50 0 LED_DRIVER_D/L_SCL
3D_SG 100
51 2D/3D_CTL
LVDS_51PIN_GPIO
R706
52
R707
0
LVDS_51PIN_GND

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LVDS_LARGE 11
VCC_1.5V_DDR VCC_1.5V_DDR VCC_1.5V_DDR
VCC_1.5V_DDR
VCC_1.5V_DDR
R1201
DDR3 1.5V By CAP - Place these Caps near Memory VCC_1.5V_DDR

R1204
R1227
DDR3 1.5V By CAP - Place these Caps near Memory
1K 1%
R1224
1K 1%
1K 1%
1K 1%
A-MVREFDQ A-MVREFCA B-MVREFDQ
0.1uF
1000pF
B-MVREFCA
0.1uF
0.1uF
1000pF
1000pF
1%
0.1uF
1000pF
1%
1%
R1202
1%
R1205
R1228
C1205
C1216
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
R1225
C1221
C1206
C1207
C1208
C1210
C1211
C1212
C1213
C1214
C1215
C1217
C1218
C1219
C1220
C1222
C1223
C1224
C1235
C1246
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10uF
C1227
C1228
C1229
C1230
C1231
C1232
C1233
C1234
C1236
C1237
C1238
C1239
C1241
C1242
C1243
C1244
C1245
10uF
C1202
C1201
C1204
C1249
C1203
C1247
C1250
1K
C1248
1K
1K
1K
Close to DDR Power Pin Close to DDR Power Pin
CLose to DDR3 CLose to Saturn7M IC CLose to Saturn7M IC CLose to DDR3
IC1201-*1 IC1202-*1
K4B2G1646C K4B1G1646G-BCH9
2G_DDR_1333_SS_NEW DDR_1333_SS_NEW
N3 M8 N3 M8
A0 VREFCA A0 VREFCA
P7 P7
A1 A1
P3 P3
A2 A2
N2 H1 N2 H1
A3 VREFDQ A3 VREFDQ
P8 P8
A4 A4
P2 P2
A5 A5
R8 L8 R8 L8
A6 ZQ A6 ZQ
R2 R2
A7 A7
T8 T8
A8 A8
R3 B2 R3 B2
A9 VDD_1 A9 VDD_1
L7 D9 L7 D9
A10/AP VDD_2 A10/AP VDD_2
R7 G7 R7 G7
VCC_1.5V_DDR A11 VDD_3 A11 VDD_3
N7 K2 N7 K2
A12/BC VDD_4 A12/BC VDD_4
+1.5V_DDR T3 K8 T3 K8
A13 VDD_5 A13 VDD_5
N1 N1
VDD_6 VDD_6
M7 N9 M7 N9
NC_5 VDD_7 NC_5 VDD_7
L1201 R1 R1
R1215 VDD_8 VDD_8
M2 R9 M2 R9
B-TMA0 B-MA0 BA0 VDD_9 BA0 VDD_9
56 1% N8 N8
C1225 C1226 BA1 BA1
R1216 M3 M3
R1213 10uF 0.1uF BA2
A1
BA2
A1
10V B-TMA2 1% B-MA2 VDDQ_1 VDDQ_1
A-MA0 A-TMA0 16V 56 J7 A8 J7 A8
56 1% EAN61828901 CK VDDQ_2 CK VDDQ_2
AR1211 K7 C1 K7 C1
R1214
B-TMA11
IC1202 K9
CK VDDQ_3
C9 K9
CK VDDQ_3
C9
A-MA2 A-TMA2 B-MA11 CKE VDDQ_4 CKE VDDQ_4
EAN61570701 56 1%
B-TMA1
H5TQ1G63DFR-H9C D2 D2
B-MA1 L2
VDDQ_5
E9 L2
VDDQ_5
E9
AR1208
IC1201 B-TMA8 B-MA8 K1
CS VDDQ_6
F1 K1
CS VDDQ_6
F1
A-MA11 A-TMA11 DDR_1333_HYNIX ODT VDDQ_7 ODT VDDQ_7
H5TQ2G63BFR-H9C B-TMA6 B-MA6 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2
A-MA1 A-TMA1 N3 M8 K3 H9 K3 H9
56 B-MA0 A0 VREFCA B-MVREFCA CAS VDDQ_9 CAS VDDQ_9
2G_DDR_1333_HYNIX A-MA8 A-TMA8 AR1214 P7 L3 L3
B-MA1 A1 WE
J1
WE
J1
A-MA6 A-TMA6 B-TMBA0 B-MBA0 P3 NC_1 NC_1
M8 N3 B-MA2 A2 T2 J9 T2 J9
A-MVREFCA VREFCA A0 A-MA0 56 S7M-PLUS_DivX_MS10 B-TMA3 B-MA3 N2 H1 RESET NC_2
L1
RESET NC_2
L1
P7 AR1203 B-MA3 A3 VREFDQ B-MVREFDQ
A-MA1 P8 NC_3 NC_3
A1
P3 IC101 B-TMA5 B-MA5 B-MA4 A4 NC_4
L9
NC_4
L9
A-MA2 A-MBA0 A-TMBA0 P2
H1
A2
N2 LGE107DC-RP [S7M+ DIVX/MS10] B-TMA7 B-MA7 B-MA5 A5 R1226
F3
DQSL NC_6
T7 F3
DQSL NC_6
T7
A-MVREFDQ VREFDQ A3 A-MA3 A-MA3 A-TMA3 56 R8 L8 G3 G3
P8 B-MA6 DQSL DQSL
A-MA5 A-TMA5 AR1215 A6 ZQ
A4 A-MA4 R2 240
P2 B-MA7 A7 C7 A9 C7 A9
R1203 A5 A-MA5 A-MA7 A-TMA7 B-TMA4 B-MA4 T8 1% DQSU VSS_1 DQSU VSS_1
L8 R8 B8 A25 B-MA8 B7 B3 B7 B3
56 A-TMA0 A_DDR3_A0/DDR2_A13 B_DDR3_A0/DDR2_A13 B-TMA0 A8 DQSU VSS_2 DQSU VSS_2
ZQ A6 A-MA6 B9 B24 B-TMA12 B-MA12 R3 B2 E1 E1
240 R2 AR1204 A-TMA1 A_DDR3_A1/DDR2_A8 B-TMA1 B-MA9 A9 VDD_1 VSS_3 VSS_3
A7 A-MA7 B_DDR3_A1/DDR2_A8 B-TMBA1 B-MBA1 L7 D9 E7 G8 E7 G8
1% T8 A8 A24 B-MA10 DML VSS_4 DML VSS_4
A-MA4 A-TMA4 A-TMA2 A_DDR3_A2/DDR2_A9 B_DDR3_A2/DDR2_A9 B-TMA2 A10/AP VDD_2 D3 J2 D3 J2
A8 A-MA8 C21 P25 B-TMA10 B-MA10 R7 G7 DMU VSS_5 DMU VSS_5
B2 R3 A-MA12 A-TMA12 B-MA11 A11 VDD_3 J8 J8
A-MA9 A-TMA3 A_DDR3_A3/DDR2_A1 B_DDR3_A3/DDR2_A1 B-TMA3 56 N7 K2 VSS_6 VSS_6
VDD_1 A9 B10 C24 E3 M1 E3 M1
D9 L7 A-MBA1 A-TMBA1 A-TMA4 B-TMA4 B-MA12 A12/BC VDD_4 DQL0 VSS_7 DQL0 VSS_7
VDD_2 A10/AP A-MA10 A_DDR3_A4/DDR2_A2 B_DDR3_A4/DDR2_A2 AR1219 T3 K8 F7 M9 F7 M9
G7 R7 A22 P26 B-MA13 A13 DQL1 VSS_8 DQL1 VSS_8
A-MA10 A-TMA10 A-TMA5 A_DDR3_A5/DDR2_A10 B_DDR3_A5/DDR2_A10 B-TMA5 VDD_5 F2 P1 F2 P1
VDD_3 A11 A-MA11 A10 B26 B-TMRESETB B-MRESETB N1 DQL2 VSS_9 DQL2 VSS_9
K2 N7 56 A-TMA6 B-TMA6 VDD_6 F8 P9 F8 P9
VDD_4 A12/BC A-MA12 A_DDR3_A6/DDR2_A4 B_DDR3_A6/DDR2_A4 B-TMBA2 B-MBA2 M7 N9 DQL3 VSS_10 DQL3 VSS_10
K8 T3 B22 R24 NC_5 H3 T1 H3 T1
AR1201 A-TMA7 A_DDR3_A7/DDR2_A3 B_DDR3_A7/DDR2_A3 B-TMA7 VDD_7 DQL4 VSS_11 DQL4 VSS_11
VDD_5 A13 A-MA13 C9 B25 B-TMA13 B-MA13 R1 H8 T9 H8 T9
N1 A-MRESETB A-TMRESETB A-TMA8 A_DDR3_A8/DDR2_A6 B-TMA8 VDD_8 DQL5 VSS_12 DQL5 VSS_12
VDD_6 B_DDR3_A8/DDR2_A6 B-TMA9 B-MA9 M2 R9 G2 G2
N9 M7 C23 T26 B-MBA0 BA0
VCC_1.5V_DDR DQL6 DQL6
A-MBA2 A-TMBA2 A-TMA9 A_DDR3_A9/DDR2_A12 B_DDR3_A9/DDR2_A12 B-TMA9 B-MCK VDD_9 H7 H7
VDD_7 A15 B11 D24 56 N8 DQL7 DQL7
R1 A-MA13 A-TMA13 A-TMA10 B-TMA10 B-MBA1 BA1 B1 B1
56
R1237
VDD_8 A_DDR3_A10/DDR2_RASZ B_DDR3_A10/DDR2_RASZ R1222 M3 VSSQ_1 VSSQ_1
A9 A26
1%
R9 M2 B-MBA2 BA2 D7 B9 D7 B9
VCC_1.5V_DDR A-MBA0 A-MA9 A-TMA9 A-TMA11 A_DDR3_A11/DDR2_A11 B_DDR3_A11/DDR2_A11 B-TMA11 B-TMCK B-MCK C1240 A1 DQU0 VSSQ_2 DQU0 VSSQ_2
VDD_9 BA0 A-MCK C10 C25 C3 D1 C3 D1
N8 22 VDDQ_1
R1235
56 A-TMA12 A_DDR3_A12/DDR2_A0 B_DDR3_A12/DDR2_A0 B-TMA12 DQU1 VSSQ_3 DQU1 VSSQ_3

BA1 A-MBA1 B23 T25 J7 A8 C8 D8 C8 D8
1%
M3 R1223 0.01uF CK VDDQ_2 DQU2 VSSQ_4 DQU2 VSSQ_4

R1206 A-TMA13 B-TMA13
56
R1238
A_DDR3_A13/DDR2_A7 B_DDR3_A13/DDR2_A7 C2 E2 C2 E2
56
BA2 A-MBA2 B-TMCKB B-MCKB 25V K7 C1 DQU3 VSSQ_5 DQU3 VSSQ_5
1%
A1 C1209 A-MCK A-TMCK 22 CK VDDQ_3 A7 E8 A7 E8
VDDQ_1 22 K9 C9 DQU4 VSSQ_6 DQU4 VSSQ_6
A8 J7 B-MCKE CKE VDDQ_4 A2 F9 A2 F9
R1236
AR1220 DQU5 VSSQ_7 DQU5 VSSQ_7

VDDQ_2 CK 0.01uF R1207 B-MCKB D2 B8 G1 B8 G1
1%
C1 K7 25V A-MCKB A-TMCKB B-TMRASB B-MRASB VDDQ_5 DQU6 VSSQ_8 DQU6 VSSQ_8
56
VDDQ_3 CK B21 P24 L2 E9 A3 G9 A3 G9

C9 K9 22 CS VDDQ_6 DQU7 VSSQ_9 DQU7 VSSQ_9
A-MCKE A-TMBA0 A_DDR3_BA0/DDR2_BA2 B_DDR3_BA0/DDR2_BA2 B-TMBA0 B-TMCASB B-MCASB K1 F1
VDDQ_4 CKE AR1202 A11 C26
D2 A-TMBA1 B-TMBA1 B-TMODT B-MODT B-MODT ODT VDDQ_7
VDDQ_5 A_DDR3_BA1/DDR2_CASZ B_DDR3_BA1/DDR2_CASZ J3 H2
L2 A-MCKB A-MRASB A-TMRASB A23 R26
E9 A-TMBA2 A_DDR3_BA2/DDR2_A5 B_DDR3_BA2/DDR2_A5 B-TMBA2 B-TMWEB B-MWEB VCC_1.5V_DDR B-MRASB
K3
RAS VDDQ_8
H9
VDDQ_6 CS A-MCASB A-TMCASB
F1 K1 56 B-MCASB CAS VDDQ_9 IC1202-*2
VDDQ_7 ODT A-MODT A12 D26 R1232 L3
H2 J3 A-MODT A-TMODT
A-TMCK B-TMCK R1219 B-MWEB WE NT5CB64M16DP-CF
VDDQ_8 RAS A-MRASB A_DDR3_MCLK/DDR2_MCLK B_DDR3_MCLK/DDR2_MCLK 10K J1
H9 K3 VCC_1.5V_DDR A-MWEB A-TMWEB C11 D25 B-TMDQSL B-MDQSL
A-TMCKB A_DDR3_MCLKZ/DDR2_MCLKZ B_DDR3_MCLKZ/DDR2_MCLKZ B-TMCKB NC_1
VDDQ_9 CAS A-MCASB B12 E24 22 T2 J9 DDR_1333_NANYA_NEW
L3 56 B-MRESETB RESET NC_2
A-MWEB R1231 A-TMCKE A_DDR3_CKE/DDR2_DQ5 B_DDR3_CKE/DDR2_DQ5 B-TMCKE R1220 L1 N3 M8
WE 10K R1208 A0 EAN61857201 VREFCA
J1 B-TMDQSLB B-MDQSLB NC_3 P7
NC_1 A-MDQSL A-TMDQSL 22 L9 A1
J9 T2 NC_4 P3
A-MRESETB 22 F3 T7 A2
NC_2 RESET C20 N25 R1217 N2 H1
L1 R1209 A-TMODT B-TMODT B-MDQSL DQSL NC_6 A3 VREFDQ
NC_3 A_DDR3_ODT/DDR2_ODT B_DDR3_ODT/DDR2_ODT B-TMDQSU B-MDQSU G3 P8
L9 A-MDQSLB A-TMDQSLB A20 M26 B-MDQSLB A4
22 A-TMRASB A_DDR3_RASZ/DDR2_WEZ B_DDR3_RASZ/DDR2_WEZ B-TMRASB 22 DQSL P2
NC_4 B20 N24 R1218 A5
T7 F3 A-TMCASB B-TMCASB R8 L8
NC_6 DQSL A-MDQSL R1211 A_DDR3_CASZ/DDR2_BA1 B_DDR3_CASZ/DDR2_BA1 B-TMDQSUB B-MDQSUB C7 A9 A6 ZQ
G3 A21 N26 B-MDQSU DQSU R2
A-MDQSU A-TMDQSU A-TMWEB A_DDR3_WEZ/DDR2_BA0 B_DDR3_WEZ/DDR2_BA0 B-TMWEB 22 VSS_1 A7
DQSL A-MDQSLB 22 B7 B3 T8
B-MDQSUB DQSU VSS_2 A8
R1212 AR1212 E1 R3 B2
A9 C7 C22 R25 A9 VDD_1
A-MDQSUB A-TMDQSUB A-TMRESETB A_DDR3_RESETB B_DDR3_RESETB B-TMRESETB VSS_3 L7 D9
VSS_1 DQSU A-MDQSU B-TMDQL1 B-MDQL1 E7 G8 A10/AP VDD_2
B3 B7 22 B-MDML DML VSS_4 R7 G7
VSS_2 DQSU A-MDQSUB B-TMDQL3 B-MDQL3 D3 J2 A11 VDD_3
E1 AR1209 B-MDMU DMU VSS_5 N7 K2
VSS_3 B-TMDML B-MDML J8 A12 VDD_4
G8 E7 C16 J25 T3 K8
A-MDQL1 A-TMDQL1 A-TMDQSL A_DDR3_DQSL/DDR2_DQS0 B_DDR3_DQSL/DDR2_DQS0 B-TMDQSL VSS_6 NC_6 VDD_5
VSS_4 DML A-MDML B16 J24 B-TMDQU2 B-MDQU2 E3 M1 N1
J2 D3 A-MDQL3 A-TMDQL3 A-TMDQSLB B-TMDQSLB B-MDQL0 DQL0 VSS_7 VDD_6
VSS_5 DMU A-MDMU A_DDR3_DQSLB/DDR2_DQSB0 B_DDR3_DQSLB/DDR2_DQSB0 22 F7 M9 M7 N9
J8 B-MDQL1 NC_5 VDD_7
A-MDML A-TMDML DQL1 VSS_8 R1
VSS_6 A16 H26 AR1213 F2 P1 VDD_8
M1 E3 A-MDQU2 A-TMDQU2 B-MDQL2 DQL2 VSS_9 M2 R9
A-MDQL0 A-TMDQSU A_DDR3_DQSU/DDR2_DQSB1 B_DDR3_DQSU/DDR2_DQSB1 B-TMDQSU B-TMCKE B-MCKE F8 P9 BA0 VDD_9
VSS_7 DQL0 C15 H25 N8
M9 F7 22 A-TMDQSUB B-TMDQSUB B-MDQL3 DQL3 VSS_10 BA1
VSS_8 DQL1 A-MDQL1 A_DDR3_DQSUB/DDR2_DQS1 B_DDR3_DQSUB/DDR2_DQS1 B-TMDQL7 B-MDQL7 H3 T1 M3
P1 F2 AR1210 B-MDQL4 DQL4 VSS_11 BA2
A1
VSS_9 DQL2 A-MDQL2 A14 F26 B-TMDQL5 B-MDQL5 H8 T9 VDDQ_1
P9 F8 A-MCKE A-TMCKE A-TMDML B-TMDML B-MDQL5 DQL5 VSS_12 J7 A8
VSS_10 DQL3 A-MDQL3 A_DDR3_DML//DDR2_DQ13 B_DDR3_DML/DDR2_DQ13 G2 CK VDDQ_2
T1 H3 B18 L24 B-MDQL6 DQL6 K7 C1
A-MDQL7 A-TMDQL7 A-TMDMU A_DDR3_DMU/DDR2_DQ6 B_DDR3_DMU/DDR2_DQ6 B-TMDMU 22 CK VDDQ_3
VSS_11 DQL4 A-MDQL4 H7 K9 C9
T9 H8 A-MDQL5 A-TMDQL5 B-MDQL7 DQL7 CKE VDDQ_4
VSS_12 DQL5 A-MDQL5 AR1216 B1 D2
G2 C18 L25 VDDQ_5
A-TMDQL0 A_DDR3_DQL0/DDR2_DQ3 B_DDR3_DQL0/DDR2_DQ3 B-TMDQL0 VSSQ_1 L2 E9
DQL6 A-MDQL6 B13 F24 B-TMDQL0 B-MDQL0 D7 B9 CS VDDQ_6
H7 22 A-TMDQL1 B-TMDQL1 B-MDQU0 DQU0 VSSQ_2 K1 F1
DQL7 A-MDQL7 A_DDR3_DQL1/DDR2_DQ7 B_DDR3_DQL1/DDR2_DQ7 B-TMDQL2 B-MDQL2 C3 D1 ODT VDDQ_7
B1 AR1205 A19 L26 B-MDQU1 DQU1 J3 H2
A-TMDQL2 A_DDR3_DQL2/DDR2_DQ1 B_DDR3_DQL2/DDR2_DQ1 B-TMDQL2 VSSQ_3 RAS VDDQ_8
VSSQ_1 C13 F25 B-TMDQL6 B-MDQL6 C8 D8 K3 H9
B9 D7 A-MDQL0 A-TMDQL0 A-TMDQL3 B-TMDQL3 B-MDQU2 DQU2 VSSQ_4 CAS VDDQ_9
VSSQ_2 DQU0 A-MDQU0 A_DDR3_DQL3/DDR2_DQ10 B_DDR3_DQL3/DDR2_DQ10 B-TMDQL4 B-MDQL4 C2 E2 L3
D1 C3 C19 M25 B-MDQU3 DQU3 WE
A-MDQL2 A-TMDQL2 A-TMDQL4 A_DDR3_DQL4/DDR2_DQ4 B_DDR3_DQL4/DDR2_DQ4 B-TMDQL4 VSSQ_5 J1
VSSQ_3 DQU1 A-MDQU1 A13 E26 22 A7 E8 NC_1
D8 C8 A-MDQL6 A-TMDQL6 A-TMDQL5 B-TMDQL5 B-MDQU4 DQU4 VSSQ_6 T2 J9
VSSQ_4 DQU2 A-MDQU2 A_DDR3_DQL5/DDR2_DQ0 B_DDR3_DQL5/DDR2_DQ0 AR1217 A2 F9 RESET NC_2
E2 C2 B19 M24 B-MDQU5 DQU5 L1
A-MDQL4 A-TMDQL4 A-TMDQL6 A_DDR3_DQL6/DDR2_CKE B_DDR3_DQL6/DDR2_CKE B-TMDQL6 VSSQ_7 NC_3
VSSQ_5 DQU3 A-MDQU3 C12 E25 B-TMDQU7 B-MDQU7 B8 G1 L9
E8 A7 22 A-TMDQL7 B-TMDQL7 B-MDQU6 DQU6 VSSQ_8 NC_4
VSSQ_6 DQU4 A-MDQU4 A_DDR3_DQL7/DDR2_DQ2 B_DDR3_DQL7/DDR2_DQ2 B-TMDQU3 B-MDQU3 A3 G9 F3 T7
F9 A2 AR1206 B-MDQU7 DQU7 VSSQ_9 G3
DQSL NC_7
VSSQ_7 DQU5 A-MDQU5 A15 G26 B-TMDQU5 B-MDQU5 DQSL
G1 B8 A-MDQU7 A-TMDQU7 A-TMDQU0 B-TMDQU0
VSSQ_8 DQU6 A-MDQU6 A_DDR3_DQU0/DDR2_DQ15 B_DDR3_DQU0/DDR2_DQ15 B-TMDMU B-MDMU
G9 A3 A17 J26 C7 A9
A-MDQU3 A-TMDQU3 A-TMDQU1 A_DDR3_DQU1/DDR2_DQ9 B_DDR3_DQU1/DDR2_DQ9 B-TMDQU1 22 DQSU VSS_1
VSSQ_9 DQU7 A-MDQU7 B14 G24 B7 B3
A-MDQU5 A-TMDQU5 A-TMDQU2 A_DDR3_DQU2/DDR2_DQ8 B_DDR3_DQU2/DDR2_DQ8 B-TMDQU2 AR1218 DQSU VSS_2
C17 K25 E1
A-MDMU A-TMDMU VSS_3
A-TMDQU3 A_DDR3_DQU3/DDR2_DQ11 B_DDR3_DQU3/DDR2_DQ11 B-TMDQU3 B-TMDQU6 B-MDQU6 E7 G8
22 B15 H24 DML VSS_4
A-TMDQU4 A_DDR3_DQU4/DDR2_DQM1 B_DDR3_DQU4/DDR2_DQM1 B-TMDQU4 B-TMDQU0 D3 J2
B-MDQU0 DMU VSS_5
AR1207 A18 K26 J8
A-TMDQU5 A_DDR3_DQU5/DDR2_DQ12 B_DDR3_DQU5/DDR2_DQ12 B-TMDQU5 B-TMDQU4 B-MDQU4 IC1201-*3 IC1202-*3 VSS_6
A-MDQU6 A-TMDQU6 C14 G25 K4B2G1646C K4B2G1646C E3 M1
A-TMDQU6 A_DDR3_DQU6/DDR2_DQM0 B_DDR3_DQU6/DDR2_DQM0 B-TMDQU6 DQL0 VSS_7
B17 K24 DDR_DVB_T2_2G DDR_DVB_T2_2G F7 M9
A-MDQU0 A-TMDQU0 A-TMDQU7 B-TMDQU7 22
N3 M8 N3 M8 DQL1 VSS_8
A_DDR3_DQU7/DDR2_DQ14 B_DDR3_DQU7/DDR2_DQ14 P7
A0
A1
VREFCA
P7
A0
A1
VREFCA
F2 P1
A-MDQU4 A-TMDQU4 P3
A2
P3
A2
DQL2 VSS_9
N2 H1 N2 H1 F8 P9
R1221 P8
A3 VREFDQ
P8
A3 VREFDQ
DQL3 VSS_10
A4 A4
B-TMDQU1 B-MDQU1 P2
A5
P2
A5
H3 T1
R8 L8 R8 L8 DQL4 VSS_11
22 22 R2
A6
A7
ZQ
R2
A6
A7
ZQ
H8 T9
T8
A8
T8
A8
DQL5 VSS_12
R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 G2
R1210 L7
R7
A10/AP VDD_2
D9
G7
L7
R7
A10/AP VDD_2
D9
G7 H7
DQL6
A-MDQU1 A-TMDQU1 N7
A11
A12/BC
VDD_3
VDD_4
K2 N7
A11
A12/BC
VDD_3
VDD_4
K2 DQL7
10K R1234 T3 K8 T3 K8 B1
22 A13 VDD_5
N1
A13 VDD_5
N1 VSSQ_1
B-MCKE M7
VDD_6
N9 M7
VDD_6
N9 D7 B9
NC_5 VDD_7 NC_5 VDD_7
VDD_8
R1
VDD_8
R1 DQU0 VSSQ_2
M2 R9 M2 R9 C3 D1
R1233 10K N8
BA0 VDD_9
N8
BA0 VDD_9
DQU1 VSSQ_3
A-MCKE M3
BA1
BA2
M3
BA1
BA2
C8 D8
VDDQ_1
A1
VDDQ_1
A1 DQU2 VSSQ_4
J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 C2 E2
K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 DQU3 VSSQ_5
K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 A7 E8
VDDQ_5
D2
VDDQ_5
D2 DQU4 VSSQ_6
L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 A2 F9
K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 DQU5 VSSQ_7
J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 B8 G1
K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 DQU6 VSSQ_8
L3
WE
L3
WE
A3 G9
NC_1
J1
NC_1
J1 DQU7 VSSQ_9
T2 J9 T2 J9
RESET NC_2 RESET NC_2
L1 L1
NC_3 NC_3
L9 L9
NC_4 NC_4
F3 T7 F3 T7
DQSL NC_6 DQSL NC_6
G3 G3
DQSL DQSL
C7 A9 C7 A9
DQSU VSS_1 DQSU VSS_1
B7 B3 B7 B3
DQSU VSS_2 DQSU VSS_2
E1 E1
VSS_3 VSS_3
E7 G8 E7 G8
DML VSS_4 DML VSS_4
D3 J2 D3 J2
DMU VSS_5 DMU VSS_5
J8 J8
VSS_6 VSS_6
E3 M1 E3 M1
DQL0 VSS_7 DQL0 VSS_7
F7 M9 F7 M9
F2 P1 F2 P1
F8 P9 F8 P9
H3 T1 H3 T1
H8 T9 H8 T9
G2 G2
DQL6 DQL6
H7 H7
DQL7 DQL7
B1 B1
VSSQ_1 VSSQ_1
D7 B9 D7 B9
DQU0 VSSQ_2 DQU0 VSSQ_2
C3 D1 C3 D1
C8 D8 C8 D8
C2 E2 C2 E2
A7 E8 A7 E8
A2 F9 A2 F9
B8 G1 B8 G1
A3 G9 A3 G9

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DDR_256 12
+3.3V_Normal
+3.3V_Normal
S_FLASH_MAIN_MACRONIX
R1404
IC1401
4.7K
+3.3V_Normal MX25L8006EM2I-12G
CS# VCC C1401

1 8
R1403
/SPI_CS
10K
0.1uF
SO/SIO1 HOLD#
SPI_SDO 2 7
WP# SCLK
/FLASH_WP 3 6 SPI_SCK
R1405
C GND SI/SIO0 33
4 5 SPI_SDI
R1401 B Q1401
KRC103S
OPT 0
E OPT
IC1401-*1
W25Q80BVSSIG
CS VCC
1 8
DO[IO1] HOLD[IO3]
2 7
%WP[IO2] CLK
3 6
GND DI[IO0]
4 5
S_FLASH_MAIN_WINBOND

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. SFLASH_1MB 13
GP2R_LARGE_TUNER
+5V_TU BOOSTER : CHINA OPT
RF_SWITCH_CTL
Pull-up can’t be applied L3701 BOOSTER_OPT
because of MODEL_OPT_2 BLM18PG121SN1D
BOOSTER_OPT
R3734 BOOSTER_OPT
R3743
0
close to TUNER 10K
Q3701
BOOSTER_OPT
E ISA1530AC1
OPT R3737
R3762 0 2.2K
CONTROL_ATTEN
B BOOSTER_OPT
C
CN_2INPUT_H_LG3911 C BOOSTER_OPT R3745
Q3702 B 10K FE_BOOSTER_CTL
TU3702 TU3701 2SC3052 LNA2_CTL

The pull-up/down of LNA2_CTL
C3709 E BOOSTER_OPT
TDTJ-S001D TDFR-C036D 0.01uF
25V
is depended on MODLE_OPT_1.
GPIO must be added for FE_BOOSTER_CTL
BOOSTER_OPT
DVB_1INPUT_H_LGIT close to TUNER +5V_TU
+5V_TU
ANT_PWR[OPT] RF_S/W_CNTL OPTION : RF AGC
1 1 R3705 0 R3755
C3701 C3731 470 R3758
RF_SW_OPT C3728 10uF
BST_CNTL BST_CNTL 0.1uF C3704 0.1uF
82
2 2 16V C3703 10V TU_SIF
0.1uF 16V OPT E
100pF
16V OPT GPIO must be added.
+B +B1[+5V] 50V C
3 3 R3754 TU_IIC_NON_ATSC_SANYO TU_IIC_NON_ATSC_SANYO
10K B ISA1530AC1
Q3704 B FE_AGC_SPEED_CTL
2SC3052
+3.3V_TU R3753 Q3705
NC[RF_AGC] NC[RF_AGC] OPT IF_AGC_SEL R3740-*1 4.7K
C
4 4 R3707 0 OPT 1K R3741-*1
E 1K
OPT
AS NC_1 TU_IIC_ATSC_SANYO
5 5 C3706
R3740 TU_IIC_ATSC_SANYO
1.2K R3741
0.1uF 33 R3735
SCL SCLT 16V TU_I2C_NON_FILTER 1.2K +5V_TU
6 6 TU_SCL
TU_I2C_NON_FILTER
SDA SDAT C3713 33 R3736
C3743
7 7 18pF TU_I2C_NON_FILTER
20pF TU_SDA
TU_I2C_NON_FILTER 50V C3742 R3751 R3752
50V 220 220
NC[IF_TP] NC_2 C3711 20pF
TU_I2C_FILTER
8 8 18pF 50V
50V
SIF SIF C3702 close to TUNER TU_I2C_FILTER TU_CVBS
9 9
E
0.1uF 16V R3749 0
NC NC_3
10 10 B
+3.3V_TU R3750 Q3703
VIDEO VIDEO C3711-*1 C3713-*1 1K ISA1530AC1
C
11 11 +3.3V_TU 20pF 20pF OPT
50V 50V
+1.2V/+1.8V_TU TU_I2C_FILTER TU_I2C_FILTER
GND GND CN C3708
12 12 C3739 C3707
100pF 0.1uF TU_I2C_FILTER
10uF 16V TU_I2C_FILTER
1.2V +B2[1.2V] FULL_NIM 6.3V 50V R3733 R3735-*1 R3736-*1
R3732 100K
13 13 C3737 C3738 C3705 100
100pF 0.1uF 100uF TUNER_RESET COIL COIL
3.3V +B3[3.3V] 50V 16V 16V DEMOD_RESET
close to the tuner pin, add,09029 C3710
14 14 0.1uF +3.3V_TU This was being applied to the only china demod,
16V
RESET RESET so this has to be deleted in both main and ISDB sheet.
15 15
IF_AGC_CNTL NC_4 0
R3742 R3744
16 16 R3704
IF_AGC_MAIN 4.7K
FULL_NIM
4.7K
HALF_NIM FULL_NIM
DIF_1 SCL FULL_NIM
should be guarded by ground
17 17 R3702 100
DEMOD_SCL HALF_NIM_1.2V_BCD
IC3703
DIF_2 SDA R2
18 18 R3701 100 +3.3V_TU AZ1117BH-ADJTRE1 HALF_NIM
DEMOD_SDA
close to IF line R3767 +1.2V/+1.8V_TU
FULL_NIM 10
ERR C3714 INPUT ADJ/GND
19 C3712 3 1
22pF 22pF
19 50V
2
SYNC 50V
FULL_NIM FULL_NIM
20 HALF_NIM IC3703-*1 OUTPUT HALF_NIM
SHIELD R3760 0 AP1117EG-13 R3768
VALID IF_N_MSTAR 1.2K
21 R1
IN OUT R3703
MCL ADJ/GND HALF_NIM 150
22 IF_P_MSTAR OPT
R3761 0 R3766
D0 HALF_NIM 1. should be guarded by ground 1
HALF_NIM_1.2V_DIODES
23 2. No via on both of them 1/10W
3. Signal Width >= 12mils C3740 C3741
D1 Signal to Signal Width = 12mils Please, check multi Item! 10/12 0.1uF 10uF
24 Ground Width >= 24mils IC3701 16V
HALF_NIM 10V
AP2132MP-2.5TRG1
[EP] HALF_NIM
D2 Close to the tuner
FULL_NIM_BCD +1.2V/+1.8V_TU
25 R3748-*1
10K 380mA
R3771 10K PG GND
D3 1 8
TUNER MULTI-OPTION GP3_ATSC_1INPUT_H_SANYO 26 FULL_NIM_BCD
THERMAL
C3717 FULL_NIM_BCD FULL_NIM_SEMTEK
0.1uF R3764
TU3702-*3
D4 16V R3770 10K EN ADJ R3748
9
UDA55AL 2 7 0
TU3702-*1
27 FULL_NIM_SEMTEK 1/10W
TDVJ-H101F 5.1K FULL_NIM
D5 VIN VOUT R1
1
ANT_PWR[OPT] NC_1 28 3 6
1
BST_CNTL NC_2
2 2
R3769 10K
3
+B +B[+5V] D6 VCTRL NC FULL_NIM FULL_NIM
FULL_NIM
3
4
NC[RF_AGC]
4
NC[RF_AGC] 29 +5V_Normal FULL_NIM_BCD
4 5 C3729 C3730
5
AS AS
R3747 0.1uF
5
16V 10uF
6
SCL
6
SCL D7 9.1K 10V
SDA
30
FULL_NIM_BCD
7 SDA
7
L3704
8
NC(IF_TP)
8
NC(IF_TP) 31 1005
R2
SIF SIF
9 9
NC NC_3
10 10
11
VIDEO
GND
11
VIDEO
IC3701-*1
GND
12
1.2V
12
+1.2V SHIELD SC4215ISTRT
13 13 Vo=0.8*(1+R1/R2)
3.3V +3.3V
14 14
RESET RESET
15 15
16
IF_AGC_CNTL IF_AGC_CNTL NC_1 GND
DIF_1
16
DIF_1
1 8
17
DIF_2
17 FULL_NIM_SEMTEK
18 18
DIF_2 FULL_NIM R3724 0
FE_TS_SYNC FE_TS_DATA[0-7] EN ADJ
19 19
2 7
SHIELD SHIELD
FULL_NIM R3730 0
FE_TS_VAL_ERR
GP3_ATSC_1INPUT_H_LGIT VIN VO
3 6
FULL_NIM R3731 0
FE_TS_CLK
NC_2 NC_3
FULL_NIM_CHINA 4 5
R3725 0 FE_TS_DATA[0]
CN_2INPUT_H_ALTO
NTSC_2INPUT_H_LGIT
GP2R_AU_1INPUT_H_LGIT FULL_NIM TU3701-*4

R3727 0
TU3702-*4 FE_TS_DATA[1] TDFR-C236D
RF_S/W_CTL TDTJ-S101D
1
BST_CTL
2 RF_S/W_CNTL
+B1[5V] ANT_PWR FULL_NIM R3728 1
3 1 0 FE_TS_DATA[2] FULL_NIM_BR
2
BST_CNTL
NC_1[RF_AGC] NC_1
4 2 TU3701-*2 +B1[+5V]
+B1[5V] 3
NC_2 3 TDFR-B036F NC[RF_AGC]
5
SCLT RF_AGC FULL_NIM R3729 4
6 4 0 FE_TS_DATA[3] 1
RF_S/W_CNTL
5
NC_1
SDAT MOPLL_AS
7 5 BST_CNTL SCLT
2
SCL 6
NC_3 +B1[5V]
8 6 3 SDAT
SIF SDA FULL_NIM R3726 NC_1[RF_AGC] 7
9 7 0 FE_TS_DATA[4] 4
NC_2 8
NC_2
NC_4 NC_2 5
10 8 SCLT SIF
SIF 6 9
VIDEO 9 SDAT
11 NC_3
GND NC_3 FULL_NIM R3721
7
NC_3
10
12 10 0 FE_TS_DATA[5] 8
11
VIDEO +5V_TUNER
+B2[1.2V] VIDEO 9
SIF
13
+B3[3.3V]
11
GND 10
NC_4 12
GND
+3.3V_Normal
14
RESET
12
+B2[1.2V] FULL_NIM R3722 11
VIDEO
13
+B2[1.2V]
+5V_TU
13 0 FE_TS_DATA[6] GND +B3[3.3V]
15
16
IF/AGC 14
+B3[3.3V]
12
13
+B2[1.2V]
14
RESET Size change
+3.3V_TU Size change
RESET +B3[3.3V] 15
17
DIF_1[N] 15 14
NC_4
200mA L3702 L3703
DIF_2[P] IF_AGC FULL_NIM_CHINA R3723 15
RESET 16
18 16 0 FE_TS_DATA[7] 16
NC_5
17
SCL
MLB-201209-0120P-N2 60mA MLB-201209-0120P-N2
DIF_1[N]
17 SCL SDA
17
19 DIF_2[P] 18
SDA
18 18 ERR
SHIELD 19
19
ERR
C3719 C3724 C3722 C3726 C3715
19 SYNC 20
SYNC
C3723 C3725 C3727
Close to the CI Slot 20
VALID 22uF 0.1uF 22uF 0.1uF 22uF 0.1uF
TU3702-*2 SHIELD 21
VALID
21
16V 16V 22uF 0.1uF 10V
22
MCL MCL 10V 16V 16V 16V
22 10V
TDTR-T036F 23
D0
D1 23
D0
R3706 0
24
D2 24
D1
25
26
D3
25
D2 location movement,0929
FULL_NIM_BR 27
D4 D3
Add,0929
26
D5
28 D4
D6 27
29
D5
D7 28
30
31
D6
29
SHIELD D7
30
31
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SHIELD

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TUNER_L 14
+3.5V_ST
EXT_SPK_CONTROL/DEBUG R1515
100
New
JK1501-*1
UART_DBG_SW
PEJ027-04
3 E_SPRING R1508 R1516

100 IC1504 4.7K
EXT_SPEAKER_AMP +24V
6A
7A
T_TERMINAL1
B_TERMINAL1
+3.5V_ST
DBG_SW
+3.5V_ST NLASB3157DFT2G
BLM18PG121SN1D
4 R_SPRING
5 T_SPRING +3.5V_ST SELECT B1

IC1501 6 1
L1500
B_TERMINAL2
7B
NLASB3157DFT2G R1517
C1517 ON SEMICONDUCTOR 0 S7_DBG_TX
6B T_TERMINAL2
R1511 0.1uF VCC ANALOG SWITCH GND
L1501 C1516 3.6K 5 2
BLM18PG121SN1D OPT 0.1uF R1509
SELECT B1 0
JK1501 6 1 EXT_VOL+ A B0
C1506 C1507 PEJ027-01 ON SEMICONDUCTOR DBG_TX 4 3 NEC_DBG_TX
C1503 ANALOG SWITCH
0.1uF 0.1uF 4.7uF VCC GND
50V 50V 50V 3 E_SPRING 5 2
EAN38256201
6A T_TERMINAL1 A B0
4 3
DBG_TX
IC1500 7A B_TERMINAL1 EAN38256201
+3.5V_ST
TPA3124D2PWPR IC1502 IC1503
4 R_SPRING
NLASB3157DFT2G NLASB3157DFT2G
R1512
PVCCL_1 PGNDL_2 5 T_SPRING 3.6K
C1512
1 24 R1510
47uF
SELECT B1 SELECT B1
25V
0
6 1 EXT_VOL- 6 1 S7_DBG_RX
R1501 7B B_TERMINAL2
100 SD PGNDL_1 ON SEMICONDUCTOR
2 23 ON SEMICONDUCTOR
SUBAMP_SD EXT_OUT_L VCC ANALOG SWITCH GND VCC ANALOG SWITCH GND
L1502 6B T_TERMINAL2 5 2 5 2
R1506 C1508 C1510
PVCCL_2 LOUT 22.0uH
4.7K 1uF 0.47uF
3 22
50V 50V A B0 A B0
C1504 4 3 4 3
R1500 0.22uF DBG_RX DBG_RX NEC_DBG_RX
SUBAMP_MUTE 100 MUTE BSL
C1513
4 21 50V C1509 C1511
47uF
R1507 EAN38256201 EAN38256201
25V
1uF 0.47uF
22.0uH 4.7K
50V 50V
LIN AVCC_2 L1503
EXT_L_AMP_IN 5 20
EXT_OUT_R
RIN AVCC_1
EXT_R_AMP_IN 6 19
R1502
BYPASS GAIN0 10K
OPT R1504
7 18 10K
OPT
AGND_1 GAIN1
8 17
R1503 R1505
AGND_2 BSR 10K 10K
9 16
C1505
0.22uF
PVCCR_1 ROUT 50V
C1500
1uF
50V
10 15
EXT_SPEAKER New
JK1500-*1
EXT_SPEAKER_MUTE
VCLAMP PGNDR_2 PEJ027-04
11 14 E_SPRING
3
6A T_TERMINAL1
PVCCR_2 PGNDR_1 OPT

C1501 12 13 7A B_TERMINAL1
1uF +3.5V_ST
50V
JK1500 4 R_SPRING
C1502 PEJ027-01 5 T_SPRING
0.1uF B_TERMINAL2 EXT_OUT_L

50V E_SPRING 7B
3
6B T_TERMINAL2 R1518
Q1500 10K
6A T_TERMINAL1
2SC3052
RT1P141C-T112
R1513 Q1502
B_TERMINAL1 2K
7A
SUBAMP_MUTE
R_SPRING EXT_OUT_R 3 1
4
EXT_OUT_R C1518
Q1501 2
T_SPRING 0.1uF
5 2SC3052
EXT_OUT_L R1514
OPT OPT 2K
7B B_TERMINAL2 C1514 C1515
1uF
10V 1uF
T_TERMINAL2 10V
6B

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
+1.8V_AMP
+3.3V_Normal
IC404
AP1117E18G-13
R474
IN 3 Vd=1.4V 1 ADJ/GND
120 mA
1
2
C434 OUT C446
C421
0.1uF 10uF 0.1uF
16V 10V 16V
+24V
SPK_L+
D501
1N4148W R519 R526
OPT 100V 12 12 L506 R527
R535 10.0uH C536
OPT 0.1uF 4.7K
3.3 C529 50V
390pF NRS6045T100MMGK
OPT
C547
50V
10.0uH
C534
0.47uF
SPEAKER_L
C521 50V
C515 C519 10uF 0.01uF
0.1uF 0.1uF 50V C530 C537
50V 50V 35V 390pF L507 0.1uF R528
+3.3V_Normal D502 50V NRS6045T100MMGK 50V
1N4148W R520 R524 4.7K
BLM18PG121SN1D
100V 12 12
C514 OPT
22000pF SPK_L-
50V C518
L504 22000pF
50V
PGND1A_2
PGND1A_1
PVDD1A_2
PVDD1A_1
PVDD1B_2
PVDD1B_1
PGND1B_2
PGND1B_1
C520
OUT1A_2
OUT1A_1
OUT1B_2
OUT1B_1
1uF
EP_PAD
25V
BST1B
VDR1B
AMP_RESET
TP502
C506
56
55
54
53
52
51
50
49
48
47
46
45
44
43
1000pF
50V
BST1A 1 42 NC C522 SPK_R+
AUD_MASTER_CLK C512 25V1uF
VDR1A 2 THERMAL 41 VDR2A C525
1uF 25V /RESET 57 BST2A 22000pF
3 40 D503 R525
+1.8V_AMP 50V R521
C509 AD 4 39 PGND2A_2 1N4148W 12 12 NRS6045T100MMGK
+1.8V_AMP 0.1uF 100V L508 C538 R529
DGND_1 5 38 PGND2A_1 10.0uH
OPT
BLM18PG121SN1D
GND_IO 37 OUT2A_2 C531 0.1uF 4.7K

6 IC501
CLK_I 7 36 OUT2A_1
390pF
50V L509
C535
0.47uF
50V SPEAKER_R
BLM18PG121SN1D
L502 10.0uH 50V

C508 VDD_IO 8 35 PVDD2A_2
C504 1000pF EAN60969603 C532
L501 50V DGND_PLL 9 34 PVDD2A_1 390pF
100pF 50V NRS6045T100MMGK
R508 AGND_PLL 33 PVDD2B_2 D504 C539 R530
50V 10
3.3K LF PVDD2B_1 1N4148W R522 R523 0.1uF 4.7K
11 NTP-7100 32 100V 12 12 50V
AVDD_PLL 12 31 OUT2B_2 OPT SPK_R-
DVDD_PLL 13 30 OUT2B_1 +24V
GND 14 29 PGND2B_2
OPT
C501 C502 OPT
10uF 0.1uF C503 C505
15
16
17
18
19
20
21
22
23
24
25
26
27
28
10V 16V 10uF 0.1uF

10V 16V
DGND_2
DVDD
SDATA
WCK
BCK
SDA
SCL
MONITOR0
MONITOR1
MONITOR2
/FAULT
VDR2B
BST2B
PGND2B_1
+1.8V_AMP C528
C526 C527 10uF
0.1uF 0.1uF 35V
50V 50V
OPT
C511 C517
10uF C513 1uF
0.1uF 25V C524
10V
16V
22000pF
50V
R503 100
AUD_LRCH
R504 100 R513
AUD_LRCK 0
R505 100 POWER_DET
AUD_SCK
R506 33 C516 OPT
AMP_SDA 1000pF
R507 33 50V
AMP_SCL +3.5V_ST
C507 C510 C546 C544 C545
18pF 18pF 22pF 22pF 22pF
50V 50V 50V 50V 50V
R515 WAFER-ANGLE
OPT OPT OPT R514 10K
C
100
B R517 SPK_L+
Q501 AMP_MUTE 4
2SC3052 10K
E SPK_L-
3
SPK_R+
2
SPK_R-
1
P501

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. AMP_NTP 16
[SCART/EXT AUDIO 1st AMP] IC1600
SN324
EXT_L_AMP_IN
CLOSE TO MSTAR R1611 R1659 CLOSE TO MSTAR
2.2K OUT1 OUT4 2.2K
1 14
100
DTV/MNT_L_OUT
R1643 EU_OPT_AUK R1651
OPT
C1603 INV_IN1 INV_IN4 C1624
10uF OPT 33K 33K OPT 10uF
R1638 2 13 R1655
C1601 16V 470K 470K 16V
R1602
R1663
+12V/+15V 0.01uF R1645 R1647
22K NON_INV_IN1 NON_INV_IN4
10K 3 12 10K
R1622 C1606 C1615 R1657
5.6K 33pF 33pF 5.6K
SCART1_Lout R1600 100 100 R1665
EXT_L_AMP
VCC GND
4 11
C1600
R1624 R1658
0.1uF 5.6K NON_INV_IN2 NON_INV_IN3 5.6K
50V SCART1_Rout R1601 100 5 10 100 R1664
EXT_R_AMP
R1644 R1653
100
C1602 R1603 33K INV_IN2 INV_IN3 33K
0.01uF 6 9
22K
OPT
R1646 R1649
10K OUT2 OUT3 10K
R1610 C1613 7 8 C1614 R1661
R1662
2.2K 33pF 33pF 2.2K
DTV/MNT_R_OUT
OPT OPT
C1605 R1637 R1656 C1622
10uF 470K 470K 10uF EXT_R_AMP_IN
16V 16V
IC1600-*1
AS324MTR-E1
OUT1 OUT4
1 14
EU_OPT_BCD
IN1- IN4-
2 13
IN1+ IN4+
3 12
VCC GND
4 11
IN2+ IN3+
5 10
IN2- IN3-
6 9
OUT2 OUT3
7 8
COMPONENT2 +3.3V_Normal
R1612 R1615
10K 1K
COMP2_DET
+3.3V_Normal D1613
5.6V
OPT
R1613
10K
[GN]E-LUG
SC1/COMP1_DET
R1614 6A R1619
1K IN CASE OF SMALL= 15V 75
D1611 C1607 [GN]O-SPRING
R4223
5.6V 0.1uF +12V/+15V D1612 COMP2_Y+

L1606 5A 30V
OPT 16V
[GN]CONTACT
0
R4210
COMPONENT1 0
4A
SC1_SOG_IN C1625
E R1640 C1623 [BL]E-LUG-S
ISA1530AC1 0.1uF D1614 30V
470 0.1uF
Q1601 50V 50V 7B R1620
B [BL]O-SPRING 75
SC1_CVBS_IN
COMP2_Pb+
C 5B
C1608 Q1602 R1641
R1609 C1604 [RD]E-LUG-S
220pF C 2SC3052 47K
75 47pF
AV_DET 50V 50V R4211 C1621 7C R1621
FIX-TER OPT 390 B 47uF [RD]O-SPRING_1 75
22 D1602
COM_GND 16V D1615 COMP2_Pr+
11 [GN]GND 30V 5C
21 DTV/MNT_VOUT 30V
10 OPT E [WH]O-SPRING
SYNC_IN
[GN]G R1635 R1633
20 5D 10K
SYNC_OUT 390
9 [RD]CONTACT COMP2_L_IN
[GN]C_DET 19 Rf C1616
SYNC_GND2 Rg R1642 4E D1616 R1625 R1636
D1610 R1628 R1639 15K 5.6V 1000pF 12K
8 18 C1620 180 [RD]O-SPRING_2 470K
D1603 30V 75 Gain=1+Rf/Rg 50V OPT
[BL]B SYNC_GND1 100uF
30V OPT 5E OPT
17 16V
7 OPT [RD]E-LUG
RGB_IO R1632
[RD]R SC1_FB
16 6E 10K
R_OUT R1627 COMP2_R_IN
6 SC1_R+/COMP1_Pr+ PPJ234-01
15 R1616 22 C1617
[WH]L_IN D1604 JK1603 D1617 R1634
RGB_GND R1608 75 5.6VOPT R1626 1000pF
30V REAR_COMP2 12K
5 14 75 470K 50V
[RD]R_IN R_GND OPT
13 R4221
4 D2B_OUT 0
[RD]MONO 12
G_OUT
13 SC1_G+/COMP1_Y+
11 D1605
PPJ-230-01 D2B_IN
30V R1604
10
JK1601 G_GND 75
COMPONENT1
9
ID
8 SC1_ID
OPT
B_OUT D1618 R1623
7 SC1_B+/COMP1_Pb+ 30V 15K R1629
AUDIO_L_IN D1606 3.9K
6 30V R1605
B_GND 75
5
AUDIO_GND
4
AUDIO_L_OUT R1617
3 10K
AUDIO_R_IN SC1/COMP1_L_IN
2 L1604
AUDIO_R_OUT D1607 R1606 120-ohm C1611 R1630
5.6V 470K 330pF 12K
1
OPT 50V
PSC008-01
JK1602 R1618
10K
SC1/COMP1_R_IN
D1609 L1603
120-ohm C1612
5.6V R1631
OPT R1607 330pF 12K
470K 50V
Full Scart/ Comp1 [SCART AUDIO MUTE]

+3.5V_ST
DTV/MNT_L_OUT
D1608
5.6V L1601 C1609 C1618 DTV/MNT_L_OUT
BLM18PG121SN1D 1000pF 4700pF
OPT
50V R1652
Q1607 10K
2SC3052
RT1P141C-T112
R1648 Q1610
2K
DTV/MNT_R_OUT
SCART1_MUTE
D1601 L1602 3 1
5.6V C1619 DTV/MNT_R_OUT
BLM18PG121SN1D C1610 4700pF
OPT C1636
1000pF Q1608 2
0.1uF
50V 2SC3052
R1650
2K

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. REAR_JACK 17
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. SIDE_JACK 18
* Option name of this page : CI_SLOT
(because of Hong Kong)
CI Region
CI SLOT
+5V_CI_ON
CI_DATA[0-7] CI TS INPUT
AR1905 FE_TS_DATA[7]
CI_DATA[0-7]
33
+5V_Normal CI_MDI[7] FE_TS_DATA[6]
C1906 CI_MDI[6]
10uF FE_TS_DATA[5]
10V CI_MDI[5] FE_TS_DATA[4]
R1903
10K
EAG41860102 CI_MDI[4]
@netLa
CI_SLOT_JACK_LV3400
P1901 AR1906 FE_TS_DATA[3]
33
/CI_CD1 P1902 CI_MDI[3] FE_TS_DATA[2]
C1903 10067972-050LF
10067972-000LF CI_MDI[2] FE_TS_DATA[1]
0.1uF CI_MDI[1]
CI_SLOT_JACK FE_TS_DATA[0]
16V 35 1
CI_MDI[0]
R1908 100 36 2 CI_DATA[3]
R1921
CI_DATA[0-7]
37 3 CI_DATA[4]
AR1901
10K
33 CI_DATA[5] FE_TS_DATA[0-7]
CI_TS_DATA[4] 38 4
39 5 CI_DATA[6] AR1904
CI_TS_DATA[5] 33
40 6 CI_DATA[7] CI_MISTRT FE_TS_SYNC
CI_TS_DATA[6]
CI_TS_DATA[7] 41 7 R1919 47 FE_TS_VAL_ERR
/PCM_CE CI_MIVAL_ERR
42 8 CI_ADDR[10]
R1905 10K 43 9 FE_TS_CLK
CI_OE CI_MCLKI
44 10 CI_ADDR[11]
CI_IORD
45 11 CI_ADDR[9]
CI_IOWR
46 12 CI_ADDR[8]
47 13 CI_ADDR[13]
CI_MDI[0]
48 14 CI_ADDR[14]
CI_MDI[1]
CI_MDI[2] 49 15 CI_WE
50 16 R1920 100
CI_MDI[3] /PCM_IRQA
C1905 0.1uF 51 17
R1910 0 R1916 0
52 18 C1909
GND
OPT 53 19 OPT 0.1uF
CI_MDI[4]
GND
CI_MDI[5] 54 20
CI_ADDR[12]
CI HOST I/F
CI_MDI[6] 55 21
56 22 CI_ADDR[7]
CI_MDI[7]
R1906 10K 57 23 CI_ADDR[6]
R1902 47 58 24 CI_ADDR[5]
PCM_RST
R1901 47 59 25 CI_ADDR[4]
/PCM_WAIT
AR1902 60 26 CI_ADDR[3]
REG
33 61 27 CI_ADDR[2]
CI_TS_CLK
CI_TS_VAL 62 28 CI_ADDR[1]
CI_TS_SYNC 63 29 CI_ADDR[0]
64 30 CI_DATA[0]
65 31 CI_DATA[1]
CI_ADDR[0-14]
CI_TS_DATA[0] 66 32 CI_DATA[2]
33
CI_TS_DATA[1] 67 33
CI_TS_DATA[2] 68 34
CI_TS_DATA[3]
0
OPT
AR1903 G2
2 69 G1
1
R1909
CI_DET
R1907 100 IC1902
/CI_CD2 +3.3V_CI
+5V_Normal GND C1913
0.1uF
1OE VCC 16V
GND 1 20
TOSHIBA
1A1 2OE
R1904 PCM_A[0] 2 19
GND
0ITO742440D
10K C1904
0.1uF 2Y4 1Y1
CI_ADDR[7] 3 18 CI_ADDR[0]
16V
1A2 2A4
PCM_A[1] 4 17 PCM_A[7]
CI_MISTRT
CI_MIVAL_ERR
2Y3 1Y2
TC74LCX244FT
CI_MCLKI
1A3 2A3
PCM_A[2] 6 15 PCM_A[6]
2Y2 1Y3
1A4 2A2
PCM_A[3] 8 13 PCM_A[5]
2Y1 1Y4
CI DETECT CI_ADDR[4] 9 12 CI_ADDR[3]
GND 2A1
10 11 PCM_A[4]
+3.3V_Normal +3.3V_CI +3.3V_CI +3.3V_CI
CI_SLOT_OR_GATE_NXP
IC1901
74LVC1G32GW
L1901 B 1 5 VCC
/CI_CD2
R1917
BLM18PG121SN1D
0.1uF
C1908
10K
A 2
/CI_CD1
16V
GND 3 4 Y
OPT AR1907
C1901 C1902 GND
CI_DATA[0] 33 PCM_D[0]
R1915 CI_DATA[1] PCM_D[1]
CI_DET
CI_DATA[0-7]
0.1uF 0.1uF 47
CI_DATA[2] PCM_D[2]
R1918 CI_DATA[3] PCM_D[3]
OPT /PCM_CD
47
PCM_D[0-7]
CI_DATA[4] AR1908 PCM_D[4]
33
CI_DATA[5] PCM_D[5]
CI_DATA[6] PCM_D[6]
CI_DATA[7] PCM_D[7]
CI POWER ENABLE CONTROL
PCM_D[0-7]
CI_DATA[0-7]
+5V_CI_ON
+5V_Normal Q1902 L1902 AR1912
RSR025P03 BLM18PG121SN1D 33
S CI_ADDR[8] PCM_A[8]
D
CI_ADDR[9] PCM_A[9]
CI_ADDR[10] PCM_A[10]
C1907
C1910
0.1uF
R1923 C1912
0.1uF G 10K CI_ADDR[11] PCM_A[11]
0.1uF
16V C1911 16V
R1914 OPT
4.7uF 16V OPT
R1912 22K 16V
10K
OPT AR1913
OPT 33
R1922 REG /PCM_REG
2.2K
C
R1913
10K B Q1901 AR1909
PCM_5V_CTL 33
2SC3052 CI_OE /PCM_OE
R1924 E CI_WE /PCM_WE
10K CI_IORD /PCM_IORD
CI_IOWR /PCM_IOWR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. PCMCI 20
THE

THE CRITICAL COMPONENTS IN THE
Copyright © 2011 LG Electronics. Inc. All rights reserved.

SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SYMBOL MARK OF THE SCHEMETIC.

6.5T_GAS
8.5T_GAS 12.5T_GAS 9.5T_GAS 7.5T_GAS 5.5T_GAS MDS62110206
MDS62110209 MDS61887708 MDS61887710 MDS62110205 MDS62110204 GAS1
GAS1-*5 GAS1-*4 GAS1-*3 GAS1-*2 GAS1-*1
9.5T_GAS 7.5T_GAS 5.5T_GAS 6.5T_GAS
8.5T_GAS 12.5T_GAS
MDS62110205 MDS62110204
MDS62110209 MDS61887708 MDS61887710 MDS62110206
GAS2-*2 GAS2-*1
GAS2-*5 GAS2-*4 GAS2-*3 GAS2
8.5T_GAS 12.5T_GAS 9.5T_GAS 7.5T_GAS 5.5T_GAS

MDS62110209 MDS61887708 MDS61887710 MDS62110205 MDS62110204 6.5T_GAS
GAS3-*5 GAS3-*4 GAS3-*3 GAS3-*2 GAS3-*1 MDS62110206
9.5T_GAS 7.5T_GAS 5.5T_GAS GAS3

8.5T_GAS 12.5T_GAS
MDS61887710 MDS62110205 MDS62110204
MDS62110209 MDS61887708
GAS4-*3 GAS4-*2 GAS4-*1 6.5T_GAS
GAS4-*5 GAS4-*4
MDS62110206
9.5T_GAS 7.5T_GAS 5.5T_GAS GAS4
8.5T_GAS 12.5T_GAS
MDS61887710 MDS62110205 MDS62110204
SMD GASKET
MDS62110209 MDS61887708
GAS5-*5 GAS5-*4
MDS62110206
GAS5
9.5T_GAS 7.5T_GAS 5.5T_GAS
8.5T_GAS 12.5T_GAS
MDS61887710 MDS62110205 MDS62110204
MDS62110209 MDS61887708
GAS6-*5 GAS6-*4
MDS62110206
GAS6
9.5T_GAS 7.5T_GAS 5.5T_GAS
8.5T_GAS 12.5T_GAS
MDS61887710 MDS62110205 MDS62110204
MDS62110209 MDS61887708
GAS7-*5 GAS7-*4
MDS62110206
GAS7
GP2R
SMD_GAS
20
20101023
LGE Internal Use Only

L/DIM_LED/DRIVER +3.3V_Normal
+3.3V_Normal
P2100
12507WR-08L
R2102
10K
LED_DRIVER_D/L
LED_DRIVER_D/L
OPT
1
R2101
R2100
2.2K
2.2K
R2103
10K
2
FRC_L/DIM_REVERSE_SEL
3 L/DIM_SCLK
5 L/DIM_MOSI
LED_DRIVER_D/L
R4029
22
6 LED_DRIVER_D/L_SCL
R4028
22
7 LED_DRIVER_D/L_SDA
LED_DRIVER_D/L
8 V_SYNC
9 C2100 C2101 C2102 C2103 C2104

18pF 18pF 18pF 18pF 18pF
50V 50V 50V 50V 50V
OPT OPT OPT OPT OPT

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. L/DIM_LED 21
DC DC CONVERTER +12V
(For External power) PSU
R2202
100K
Switching noise reducing [MPS recommend]

C2203 PSU
R2205
50V 0.1uF
+24V
IC2200
22
MP4460DQ-LF-Z
PSU
EP_GND
MBRA340T3G
close to pin
SW_1 BST
1 10
THERMAL
PSU +12V
11
SW_2 VIN_2
2 9
D2200 PSU
PSU C2208 C2210
EN VIN_1 3.3uF 0.1uF
3 8 PSU
PSU 50V 50V
R2204
COMP FREQ 200K
PSU 4 $0.21 7
PSU PSU
C2200 1/8W
FB GND 1% R2211 R2212
150pF 5 6 270K 10K
50V
R2201
150K
1/16W 1/16W
18K
R2200
1% 1%
R2210
1/16W
PSU
PSU
20K
1%
PSU
L2201 PSU
22UH C2204 PSU
PSU 22uF C2207
25V 0.1uF
50V
REAL TIME CLOCK

5V/12V EXT PowerOut R2215
43
+12V/+15V IC2202
+12V MP5000DQ
L2200
CB3216PA501E R2203
100K GND SOURCE_5 EXT_12V +3.5V_ST
1 10 IC2204
OPT C2211 C2216 M41T81
LIPS 470pF 2pF
DV/DT SOURCE_4 50V
50V 2 9
32.768KHz
IC2201 L2204 XI VCC
X2200
1 8 C2219
MP2305DS R2213
ENABLE/FAULT SOURCE_3
CB3216PA501E R2227 0.1uF
1K C2217
C2206 EXT12V_CTRL 3 8 2pF 4.7K 16V
0.1uF 50V XO IRQ/FT/OUT/SQW
50V 2 7
BS
1 8
SS
I-LIMIT SOURCE_2 C2214 C2215 RTC_INT
C2202 4 7 22uF 0.1uF
50V R2221 R2225
0.01uF R2209 16V 1K VBAT SCL 22
IN EN 3 6 CLOCK_SCL
50V 1K NC SOURCE_1
2 7
1
EXT5V_CTRL 5 6
R2226
C2201 C2205 EXT_5V M2200 VSS SDA 22
R2208 4 5
0.47uF SW COMP 2700pF 10K BATTERY CLOCK_SDA
25V 3 6 11
50V L2203
2
R2207 CB3216PA501E
GND FB 56K VCC
4 5
+12V
R2206 C2209
12.4K
A2
A1
22uF
16V C2212 C2213 D2201
L2202 1uF 22uF
22UH +3.5V_ST 16V 16V
C
+3.5V_ST
R2214
4.7K R2218
10K
R2217
4.7K
B
EXT_PWR_DET
C
R2216
Q2200 B 1K
2SC3875S(ALY)
C
E Q2201
2SC3875S(ALY)

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

26lv255h Za Ld0ay

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Internal Use Only

North/Latin America http://aic.lgservice.com

MODEL : 26LV255H 26LV255H-ZA

P/NO : MFL67180604 (1111-REV00) Printed in Korea

PRODUCT SAFETY ................................................................................. 3

ADJUSTMENT INSTRUCTION ................................................................ 8

EXPLODED VIEW .................................................................................. 15

SCHEMATIC CIRCUIT DIAGRAM ..............................................................

IMPORTANT SAFETY NOTICE

General Guidance Leakage Current Hot Check (See below Figure)

Before returning the receiver to the customer, AC Volt-meter

always perform an AC leakage current check on the exposed

Fuse and Conventional Resistor

1. Application range 3. Test method

1) Temperature: 25 ºC ± 5 ºC(77 ºF ± 9 ºF), CST: 40 ºC ± 5 ºC

4. Component Video Input (Y, PB, PR)

Case1 : Software version up (6)

1. After downloading S/W by USB, TV set will reboot

3. Main PCB check process

* Boot file Download

<Caution> Using ‘power on’ key of the Adjustment remote

* ADC Calibration Protocol (RS232)

· Edge LED W/B Table in process of time(Only LGD module) ** Caution **

* Connecting picture of the measuring instrument

4.2. DDC EDID Write (RGB 128Byte )

2)HD HDMI EDID data

Enter download Download A A 0 0 When transfer the ‘Mode In’, A0 f 80 18 71 1C 16 20 58 2C 25 00 A0 5A 00 00

* Detail EDID Options are below

Manufacturer ID GSM 1E6D ⓕ Vendor Specific(HDMI)

Cont rol si gnal Volta ge

- Adjust sequence CMD : A0h

5.3. Method & notice

4.7. Hi-pot test

4) Check the model name Instart menu. -> Factory name

2) Check the key download for transmitted command.

2. Check the method of CI+ Key value. (RS232)

2) Check the method of CI+ key by command.

PKT_DATA[0] FE_TS_DATA[0] LVDS (8bit or 10 bit)

B_TMDQ[0:16] DDR3 (2GB)

Mstar S7 PCM_A[0:7] NAND Flash

RGB DSUB_ R/G/B

MAX3232CDR NEC_TX/RX Up/Down Audio amp L/R

NAND FLASH MEMORY +3.3V_Normal

PCM_D2 GPIO147/TCON4 5V_DET_HDMI_4

ALE I/O3 PCM_A[3] PCM_A9 GPIO6/PM0/INT0 USB1_OCD

C112 PWM0 W23 C5

S7MR-PLUS I2C +3.3V_Normal +3.5V_ST

FRC_DDR3_A7/DDR2_A5 A2M/RLV2N/RED[4] FRC_DDR3_A7/DDR2_A5 A2M/RLV2N/RED[4] FRC_DDR3_A7/DDR2_A5 A2M/RLV2N/RED[4] FRC_DDR3_A7/DDR2_A5 A2M/RLV2N/RED[4]

IC103-*1 FRC_DDR3_A11/DDR2_A4 A4M/RLV5N/GREEN[8] FRC_DDR3_A11/DDR2_A4 A4M/RLV5N/GREEN[8] FRC_DDR3_A11/DDR2_A4 A4M/RLV5N/GREEN[8] FRC_DDR3_A11/DDR2_A4 A4M/RLV5N/GREEN[8]

AE16 AE16 AE16 AE16

4.7K A0 VCC 0.1uF VSS

4 5 E2 SCL FRC_DDR3_DQL5/DDR2_NC D2P/LLV8P FRC_DDR3_DQL5/DDR2_NC D2P/LLV8P FRC_DDR3_DQL5/DDR2_NC D2P/LLV8P FRC_DDR3_DQL5/DDR2_NC D2P/LLV8P

EEPROM_SDA 3 6 R111 22 EEPROM_SCL

AB16 AB16 AB16 AB16

C104 C106 FRC_SPI_CZ

8pF 8pF FRC_GPIO8

OPT OPT Y11

Y10 Y10 Y10 Y10

AB15 AB15 AB15 AB15

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

PIN NAME LOW HIGH

MODEL_OPT_0 FRC_HW_OPT NO_FRC : LOW LOW

U3_INTERNAL : HIGH LOW

U5_EXTERNALBOOT :HIGH HIGH

· Edge LED W/B Table in process of time(Only LGD module) Caution