H I G H - L E V
Introduction to the
Scheduling Problem
HIGH-LEVEL
-MIS (some
times called behavioral synthesis)
is the design task of mapping an a b
stract behavioral description of a
digital system onto a register-trans-
fer-level design to implement that
behavior. Introduced in the first ar-
1 ROBERT A. WALKER
ticle in this series by Daniel Gajski
and Loganath Ramachandran,'
high-levelsynthesiscan greatly im-
prove designer productivity and
designspace exploration.As that
introductory article defined them,
the three central synthesis tasks in
a typical high-level synthesis sys-
tem are
rn scheduling-determining the se-
quence in which operations exe-
cute to produce a control step
schedule that specifiesthe opera-
tions executing in each control
step, or state
rn allocation-setting aside the ap-
propriate number of functional,
storage, and interconnection units
binding-assigning operations to
functional units and values to stor-
age units, and interconnecting
those components to form a com-
plete data path
60
E L S Y N T H E S I S
SAMIT CHAUDHURI
Rensselaer Polytechnic Institute
tem, written in a hardware de-
scription language such as VHDL
or Verilog, into a controVdata-flow
graph (CDFG).In the CDFG,nodes
represent operations in the behav-
ioral description,such as additions
and multiplications. Edges repre-
sent values-inputs to the expres-
sion, temporary results, and the
output of the expression. In more
complex behaviors, the CDFG can
also represent conditional branch-
es, loops, and so forth-hence the
name control/data-flowgraph.
Consider the arithmeticexpres-
sion G=AB+CD+EF. This expres-
sion might be part of a larger
In most high-level synthesissystems, description-such as a digital signal
scheduling and functional unit alloca- processor description-but for sim-
tion occur simultaneously,followed by plicity, we consider only that one ex-
the remaining allocation tasks and pression here. We can parse this
binding. This tutorial discusses the expression to build a CDFG, shown in
scheduling problem, and the next arti- Figure 1, that internally represents this
cle in this series will discuss the re- behavior in a high-level synthesis sys-
maining allocation problems and the tem. Scheduling,then, determines the
binding problem. order of execution for these opera-
tions-scheduling each operation into
Basic scheduling problems an appropriate control step.
Early on, a typical high-level synthe-
sis system converts the input behavioral Basic concepts. Suppose we sched-
description of the desired digital sys- ule the CDFG of the arithmeticexpres-
0740-7475/95/$04.00 0 1995 IEEE IEEE DESION C TEST OF COMPUTERS
sion G=AB+CD+EF,as shown in Figure
1. If we begin by schedulingoperation
1 into control step 1, we can also sched-
ule operation 2 into that same control
step, since the two operations do not
depend on each other. However, we
cannot schedule operation 3 into con-
trol step 1: Operation 3 depends upon
the results of operations 1 and 2, which
are not available until the end of con-
trol step 1. Thus operation 3 must d e
lay until control step 2 or later (let's
assume that it's scheduled into control
step 2). As we did with operation 2, we
can schedule operation 4 into control
step 1 as well, since it does not depend
upon the result of either operation 1 or
2. Finally, we must scheduleoperation
5 into control step 3 or later, because
that operation depends upon the result
of operation 3.
Let 0 be the set of all operations in
the CDFG. If operation ole 0 uses the
result of operation o,e 0, operation 0,
must execute before ol can begin. Thus
there is a data dependency between
the two operations. We would also say
that 0,is an immediate predecessor of
0,, and ol is an immediate successor of
0,. We represent this data dependency
during the synthesis process as a prece-
dence constraint between the two op
erations, which the control step
schedule must satisfy.
In generating the control step sched-
ule fora particular CDFG, we may gen-
erate a feasible schedule (any "legal"
schedule),or we may want to find one
that is optimal with respect to some o b
jective function (for example, the
schedule with the smallest functional
unit area). In this latter case, we need
to know the type of the functional unit
allocated to each operation. With that
information, we can compute the over-
all functional unit area as the sum of
the areas of the maximum number of
functional units of each type used in
any one control step.
For a given functional unit in a par-
ticular module library, the functional
SUMMER 1995
unit type indicates its functionality A B C D E F
(such as addition,multiplication, orad-
dition/multiplication). Let Kbe the set
Control step 1
3f available types, and U, and m,be the
area and number of functional units of
type ke K.
/
Control step 2
For a given operation, a type func- 3
tion T: 0-Kdetermines the type of op
eration, where z(i> = k means that
Control step 3
operation O,EO executes on a type
k Kfunctional unit. We call the prob
lem of determining this type function, G
and thus the type of functional unit on
which each operation will execute, the Figure 1. Schedule for expression
typemapping problem. Since we need G=AB+CLh EF.
to know the execution delay of each
operation to solve the scheduling prob-
lem, we must solve this typemapping constrained scheduling (TCS) problem
problem before (or simultaneously as follows:
with) the scheduling problem. In this
tutorial, we assume that the type map Given: a set 0 of operations; a set K of
ping for each operation is known prior functional unit types; a type
to scheduling. function T: O+K; a partial order
These concepts let us define the un- on 0 determined by the prece-
constrained scheduling (UCS) prob- dence constraints; and a time
lem-the basic schedulingproblem in constraint (deadline) D on the
high-level synthesis: overall schedule length.
Find: a feasible (or optimal) sched-
Given: a set 0 of operations; a set K of ule for 0 that obeys the prece
functional unit types; a type dence constraints and that
function T: O+K; and a partial meets the deadline D.
order on 0 determined by the
precedence constraints. Further, Figure 1 showed that im-
Find: a feasible (or optimal) sched- posing an overall time constraint on the
ule for 0 that obeys the prece- schedule may force some operations
dence constraints. into specific control steps. For exam-
ple, if we constrain the schedule to a
Time-constrained scheduling. total length of three control steps, op
Although the UCS problem captures the erations 1 and 2 must be scheduled
basic elements of the scheduling prob into control step 1, operation 3 into
lem in high-level synthesis, particular control step 2, and 5 into 3. Since we
design goals may in practice require ad- have no freedom in scheduling these
ditional constraints. For example, we operations (without violating the time
could limit the design's execution time constraint), we say they are on the crit-
by constraining the overall length of the ical path.
control step schedule. This process In general, there is a continuous
adds a time constraint,or deadline, on range Siof control steps, called the
the overall schedule length that the con- schedule interval, over which we can
trol step schedule must satisfy. schedule an operation oi.The length of
By adding this time constraint to the this interval is the mobility of the oper-
UCS problem,we can define the time ation. In Figure 1,the schedule interval
61
H I G H - L
U D E F
Control step 2 -K+--++
Control step 3
3 the UCS problem, we can define the r e
T
Control step 4
' G
Figure 2. Schedule with a resource
constraint of one multiplier.
for operations 1 and 2 is [ l,l] , and their
mobility is 1; the schedule interval for
operation 3 is [2,2], and its mobility is
also 1;and the schedule interval for o p
eration 4 is [ 1,2], and its mobility is 2.
As we will see later, this information
can be of great benefit during the
scheduling process.
Resource-constrained schedul-
ing. Another set of constraints com-
monly added to the UCS problem,
reflecting the design goal of limiting the
chip area, are constraints on the num-
ber of functional units of each type. For
example, two multipliers may fit with-
in the available chip area, while eight
multipliers may not. In this case we
may need to impose a resource (func-
tional unit) constraint on the design,
limiting the number of multipliers to
two.
Consider the effect of adding r e
source constraints to the example oi
Figure 1. Generated without resource
constraints, that schedule requires at
least three multipliers and one adder.
However, if we constrain the numbei
of multipliers to one, the schedule
shown in Figure 2 might result. Thai
schedule would require substantiallq
62
E V E L S Y
ess functional unit area. (Notice that
dthough this schedule uses two fewer
iunctional units, the schedule length
increases by one, illustrating the clas-
sic serial-parallel trade-off that often
irises in scheduling problems when
trading execution time for the number
of resources.)
Adding these resource constraints to
sourceconstrained scheduling (RCS)
problem as follows:
Given: a set 0 of operations; a set K of
functional unit types; a type
function T: O+K; resource con-
straints mk, 1 I k IK for each
functional unit type; and a par-
tial order on 0 determined by
the precedence constraints.
Find: a feasible (or optimal) sched-
ule for 0 that obeys the prece
dence constraints and satisfies
the resource constraints for
each functional unit type.
Note that we can impose a separate r e
source constraint on each functional
unit type.
Time- and resourceconstrained
scheduling. Finally, we can combine
the TCS and RCS problems to define
the time- and resource-constrained
scheduling (TRCS) problem, con-
straining both the overall schedule
length and the number of functional
units of each type:
Given: a set 0 of operations; a set K of
functional unit types; a type
function T: O+K; resource con-
straints mk, 1 I k I K for each
functional unit type: a partial or-
der on 0 determined by the
precedence constraints; and a
time constraint (deadline) Don
the overall schedule length.
Find: a feasible (or optimal) sched-
ule for 0 that obeys the prece
N T H E S I S
dence constraints, meets the
deadlineD, and satisfiesthe r e
source constraints for each
functional unit type.
Advanced scheduling topics
To introduce the various scheduling
problems concisely, we have made a
number of overly simplistic assump
tions. Now we turn to several advanced
topics, all of which must be considered
by any practical scheduling algorithm.
Chaining and multicycling. Until
now, we have assumed that each o p
eration type requires the same amount
of time to execute, and that the control
step length+he clock period--equals
that execution time. In practice, differ-
ent operation types may have different
execution times, because the func-
tional unit types onto which each is
mapped may have different propaga-
tion delays. Thus, an overly restrictive
scheduling model coupled with a poor
choice for the control step length can
result in poorly used functional units
and an overly long schedule.
Consider the CDFG of Figure 3a,
which maps the multiplication and ad-
dition operations onto a multiplier and
adder with 1W and 5 h s propagation
delays. (For simplicity, assume that
these functional unit propagation de-
lays include any necessary register set-
up times.) If we set the control step
length to 100 ns, and schedule each op
eration into exactly one control step,
the overall length of the schedule will
be 200 ns, and the multiplier will be
used only half of the time.
However, as Figure 3b shows, pack-
ing the two additions into a single con-
trol step will increase the multiplier
usage and decrease the schedule
length. These two additions are chained
operations; we implement these at the
register-transferlevel by connecting the
output of the first adder directly to the
input of the second adder (that is, with-
out the intervening register that would
IEEE DESIOW & TEST OF COMPVlCId
otherwise latch the result of the first
adder at the control step boundary). In
this example, chaining increases the
multiplier usage and decreases the
schedule length to 100 ns, but at the
cost of an additional adder.
As Figure 3c shows,setting the clock
length to 50 ns (the shorter propagation
delay) and executing the multiplica-
tion over two control steps will also im-
prove the schedule of Figure 3a. Such
a multiplication is a multicycle opera-
tion: It must execute continuously
;traints between them. However, few
ligital systems work in isolation, so d e
;igners may also need to specify more
letailed timing constraints on certain
iperations. There are minimum timing
:onstraints, which specify that one op
?rationmust execute at least a specified
imount of time after another operation,
ind maximum timing constraints,
Nhich specifythat one operation must
:xecute no more than a specified
imount of time after another operation.
Most schedulers handle these timing 200 ns
- .

throughout its entire execution time, Zonstraints by adding additional con-

fa)
and its input values must be latched jtraint edges to the CDFG, then treating
throughout that period. In this exam- ;hose additional edges in much the
ple, multicycling decreases the sched- jame manner as other constraints. 0 ns
ule length to 100 ns, just like chaining,
but without the cost of another adder. Common scheduling algorithms
However, multicycling does use twice This tutorial has defined the four ba-
as many control steps as chaining, sic scheduling problems in high-level
which may result in a larger controller. synthesis. To solve those problems, sys
tems use either heuristic algorithms,
Control constructs. The basic which find feasible (possibly subopti- fb)
scheduling problems presented just mal) solutions, or exact algorithms,
now were all defined for a single basic which find optimal solutions. Four
block-one section of straight-line scheduling algorithms commonly used
code with only one entry and one exit by high-levelsynthesis systems are
point. Since most hardware description
languages support conditionals, loops, H as-soon-as-possible/as-late-as-
and other control constructs,the sched- possible (ASAFVALAP) scheduling
uler must consider those constructsdur- list scheduling
ing the scheduling process. When H force-directed scheduling
scheduling conditional branches, the H integer linear programming (ILP)
(4
schedulershould exploit any potential Figure 3. Chained and multicycle
parallelism by sharing functional units The first three are constructive heuris- operations: no chaining or multicycling
between mutually exclusive branches; tic algorithms that iteratively select and (a);two chained additions (61;and a
for example,the same adder can serve schedule one operation at a time into multicycle multiplication (c).
in both the then and else clauses of an an appropriate control step. Since these
if statement. When scheduling loops, greedy strategies make a series of local
the scheduler should exploit any pc- decisions,selectingat each point the sin- though at the cost of more processing
tential parallelism by loop folding- gle "best"operation/controlstep pairing time. In contrast to the first three, which
overlapping the loop executions in a without backtracking or lookahead, schedule one operation at a time, this
pipelined fashion. they may miss the globally optimal so- algorithm produces a schedule for all
lution. However, they do produce re- operationssimultaneously.
Timing constraints. The basic sults quickly, and those results may be
scheduling problems also capture a va- sufficient for practical application. ASAPIALAP scheduling. ASAP
riety of constraints on the execution The fourth scheduling algorithm, and ALAP scheduling are the two sim-
time of the schedule: the length of the based on solving an ILP formulation,is plest scheduling algorithms used in
schedule,the schedule intervals of the an exact algorithm, guaranteed to find high-level synthesis to solve the UCS
operations,and the precedence con- the globally optimal schedule, al- problem. ASAP scheduling(see Figure

SUMMER 1995 63
 H I G H - L E V E L S Y N T H E S I S

tareachoptuat&no,
%Otha5nOilWWhW
w

SrChQdukd */
dw
-w4=-cstsp
OfWt)+d4ShUWdh&

Figure 4. As-soon-as-possible
scheduling.

4) schedules each operation, one at a

time, into the earliest possible control
step. AMP scheduling is similar, but
schedules each operation into the lat-
est possible control step.
Although limited by their greedy na- Figure 5. list scheduling.
ture,these algorithms quickly solve the
UCS problem. However, to find ac-
ceptable solutionsto the RCS and TCS erations from that list and schedules
problems,we need more sophisticated them into the current control step.
algorithms. In choosing which ready-list opera-
tion to schedule,the algorithmsorts the Figure 6. Force-directed scheduling.
List scheduling. A common choice ready list according to some priority
for solvingthe RCS problem is list sched- function,always choosing the highest
uling (see Figure 5),*a venerable alge priority operation for scheduling into eration. Unfortunately, there is no
rithm based on work done over 30 years the current control step. One common agreement on which priority function
ago by H u , ~and long used in project priority function is based on mobility, is best, and furthermore,the choice of-
management and microcode com- defined earlier as the length of an o p ten depends on the CDFG structure.
paction. Unlike ASAP/ALAP schedul- eration’sschedule interval. Operations The list-scheduling algorithm may
ing, which processes each operation in with smaller mobility rate a higher pri- also vary in its treatment of the ready
a fixed order, list scheduling processes ority, since there are fewer possible list. As Figure 5 showed, this algorithm
each control step sequentially,choos- control steps into which those opera- constructs the ready list only once per
ing in each iteration the best operation tions can be scheduled. Also, delaying control step. It could instead construct
from all appropriate operationsto place them to a later control step would more the ready list every time it chooses a
into the control step,subject to resource likely increase the overall length of the data-ready operation,thereby choosing
constraints. schedule: this is especially true for an operation from a more uptodate list
During the scheduling process, list those operations with a mobility of 1, at the cost of additional computation.
scheduling uses a ready list (hence the which we regard as on the critical path. Another variation is to maintain a s e p
name) to keep track of data-ready o p The priority function selected clear- arate ready list for each functional unit
erations. Data-readyoperationsare un- ly biases the results of the list-schedul- type k~ K, thus making it easier to con-
scheduled operationsthe algorithm can ing algorithm. Some systems give sider only those operations that meet
schedule into the current control step higher priority to operations with low- the resource constraints.
without violating the precedence con- er mobility. Others give higher priority Although less efficient computa-
straints (those operations whose im- to operations with more immediate tionally than ASAP scheduling,due to
mediate predecessors have been successors, arguing that scheduling its more global selection of the next o p
scheduled into earlier control steps). As them in the current control step would eration to schedule and its simple yet
long as the ready list contains data- make the largest number of operations intuitive priority function,list schedul-
ready operations that meet the resource data ready, thereby allowing the earli- ing remains a common choice for solv-
constraints, the algorithm chooses op- est possible consideration of each o p ing the RCS problem.

64 IEEE DESIGN & TEST OF COMPUTERS

 Control step 1

Contro1step2 (m
1 2
-
*

U,
-

11
-
- 2.83

2.33

Control step 3 0.83

Control step 4 I 0.00

8
fa) fb)
Figure 7. Initial schedule intervals la] and multiplication histogram (b).

Forcedirected scheduling. Force u d z 3 z 3 v u d z z d z

directed scheduling (see Figure 6), orig-
inally developed as part of Carleton
Control step 1
University's HAL system,4 is a popular
constructive algorithm that solves the
TCS problem by uniformly distributing
Control step 2
the operations of each type across a
timeconstrained schedule. Balancing
the operationsin this manner results in
higher functional unit usage, and thus
minimizes the number of functional \ I I I

units of each type.

Since force-directed scheduling
solves the TCS problem, the algorithm
must first determinethe schedule length
(the overall time constraint). Con-
structing an ASAP schedule and mea-
suring its length will provide a good
approximation of the schedule length.
Forcedirected scheduling also consid-
ers the schedule interval of each opera-
tion,so this algorithm also constructsan
ALAP schedule, using the two schedules
to determine the schedule intervals.
Now consider a particular operation
0,that the algorithm can theoretically
schedule into any control step s in its
schedule interval& We denote itsASAP
control step as ASAP, and its ALAP con-
trol step as ALAP,. If we assume that it
has a uniform probability of being
scheduled into any control step in the
range [ASAP,,ALAP,],the probability P,,
of scheduling operation 0,into a partic-
Control step 4
08
ul
Figure 8. Data-flow graph and ASAP schedule for the differential equation (DiffEqJ
exa~nple.~
Figure 7a illustrates these probabili-
ties, where the width of each operation
box represents the probability of sched-
uling the correspondingoperation in the
data-flowgraph in Figure 8 into that con-
trol step. Operations 1,2,5,7,and 8 each
have a mobility of 1, so their probability
of being scheduled into a particularcon-
trol step is 1. Figure 7a shows each o p
eration wholly within that control step,
represented by a box of width of 1. O p
eration 3, however, has a schedule in-
terval of [1,2]; thus its probability of
being scheduled into either control step
Yl ctrl
ning control steps 1 and 2. Operation 6
is similar,and operations4,9,10, and 11
each have a 0.33 probability of being
scheduled into a particular control step
in their schedule interval.
Given these probabilities,we can con-
struct a histogram for each functional
unit type k, showing the expected cost
of performing all operations of that type
in each controlstep. For a functionalunit
type k , the expected functional unit cost
in control steps, E S, is
Fcostk.j ='k zh?',j

ular control step S,E SI is f,,= I/(ALAf, - in that range is 0.5. Figure 7a represents
S A P , + 1). operation 3 with a box of width 0.5span- where c, is the cost of a functional unit

SUMMER 1 9 9 s 6s
 H I G H - L E V E L S Y N T H E S I S

The latter choice is preferable, as it

of type k, and Ik is the index set of all ciated with scheduling operation 3 into
operations of type k. tends to reduce the expected multipli- control step 1 (see Figure 7 ) is only that
Figure 7b shows the histogram for er cost and more uniformly distributes direct force, since no other schedule
multiplication operations, assuming a multiplications across the schedule. intervals are affected.
unit multiplier cost. This histogram Forcedirected scheduling iterative
takes the following form: ly builds a control step schedule,keep Total- Force3,mu,tJ
ing the schedule balanced as follows. = Fo~Ce3snultJ
FCostInlI,t,1 = C,l + 4.1+ ‘3J First, it creates the initial histograms. = 2.83 - (2.83 + 2.33)/2
Then it computes the expected func- = 4.25
‘41 + 5‘1. + ‘6.1
= 1+1+ 0.5 tional unit cost of schedulingeach un- However, the total force associated
+ 0.33+ 0 + 0 scheduled operation into each control with scheduling operation 3 into con-
= 2.83 step in itsscheduleinterval and makes trol step 2 is that direct force plus the
FCOstmult2 = 62+ 42 +3‘2 the operation/control step scheduling indirect force of schedulingoperation
that results in the smallest increase (or 6 into control step 3
+ 4‘2 + ‘52 + ‘62
= 0 + O +0.5 largest decrease) in cost. It then up- Total-Force3mult2
+ 0.33 + 1+ 0.5 dates the histograms, and the process
continues until there are no more un- = F0rce3~ultp + F0rce6~ult,3
= 2.33 = 2.33 - (2.83 + 2.33112
FCostmu,t,,= 0 + 0 + 0 scheduled operations.
In forcedirected scheduling, we + 0.83 - (2.33 + 0.83)/2
+ 0.33+0 + 0.5 compute the increase in expected hnc- = -1.0
= 0.83 tional unit cost that results from assign-
FCOStmUltA =0
ing an operation to a particular control Given these two choices, the algorithm
step as the sum of a set of forces (hence would choose the operationlcontrol
The algorithm can now compute the the name). The direct force of an oper- step scheduling that results in the
expected number mk of functional ation ojwith schedule interval Si being largest decrease in cost (force). In this
units of type k as the maximum num- scheduled into control step sj E Siis example, it would schedule operation
ber of functional units of that type in 3 into control step 2, as we conjectured
any control step Forcei,k,i= earlier.
Although less efficient computa-

I
mk = max(FCostk,j)
I d 1
where S is the index set of all control
steps.Thus this example should require
r2.831= 3 multipliers.
Force-directed scheduling mini-
mizes the number of functional units
of each type by uniformly distributing
the operations of that type across the
schedule (that is, to balance the his-
togram). Consider the effect of sched-
uling operation 3 into either control
step 1 or 2. If the algorithm schedules
operation 3 into control step 1, the max-
imum expected multiplier cost will be
3.33. Therefore, the design will require
four multipliers. However, if it sched-
ules operation 3 into control step 2
(changing operation 6’s schedule in-
terval to [3,3]), the maximum expected
multiplier cost will be 2.33, and the d e
sign will require only three multipliers.
tionally than either ASAP or list sched-
uling, due to its global selection of the
For a particular operation (and there next operation to schedule and to its
fore a particular functional unit type), effectiveness in uniformly distributing
the direct force thus is the difference the operations across the schedule,
between the expected functional unit forcedirected scheduling is a common
cost in that control step and the aver- choice for solving the TCS problem.
age expected functional unit cost over
that operation’sschedule interval. Integer linear programming for-
Since scheduling an operation into a mulations. Mathematical program-
particular control step may affect the ming formulations, among them
schedule intervals of other operatiow integer linear programming (ILP), have
for example, operation 6 described ear- solved a wide range of problems in
lier-we must consider those indirect high-level synthesis, beginning with
costs aswell. Thuswe must compute the Hafer’s early scheduling formulati~n.~
total force associated with an operation Here we discuss 1LP formulations for
being scheduled into a particular con- optimally solving the TCS, RCS, and
trol step as the sum of 1) its direct force, TRCS problems.
and 2) the indirect force on any other The biggest advantage of these for-
operation whose schedule interval that mulations is the solution quality. Unlike
scheduling affects. the constructive heuristics described
In our example,the total force asso- earlier, a commercial ILP solver is guar-

66 IEEE DUION li n m 01 COMRWMS


anteed to find an optimal schedule
from these formulations.Unfortunately,
this guarantee comes at a price: lLPs
cannot, in general, be solved in poly-
nomial time. Thus the trade-off is b e
tween guarantees of solution quality
and algorithm runtime. Fortunately, a
carefully designed ILP formulation p r o
duces results acceptably quickly for
small and mediumsized problems: on-
going research on bounding tech-
niques may soon allow larger problems
to be solved as well.
ILP problems6are problems that ei-
ther maximize or minimize some ob-
jective function of many variables,
subject to linear equality and inequal-
ity constraints, and integrality restric-
tions on all of the variables. These
problems also commonly use linear ob-
jective functions and require nonneg-
ative variables. We write an ILP as
z,~= min{cTxlxE PF;xinteger)
where fF={Ax Ib, x E W+},and where
W+is the set of nonnegative real (nxl)
vectors, c is a (nxl) real vector, b is a
( m x l ) integer vector, and A is an
(mxn) integer matrix.
Set o f feasible schedules. Consider
the set of nodes V= {(i,s)I i ~s dt i }as
illustrated in Figure 9b, where a node
(i,s)correspondsto operation 0,being
scheduled in control step s, I is the
index set of all operations, and Siis the
schedule interval over which an
operation 0,can be scheduled.
Each operation 0,can conceivably
be scheduled anywhere in its schedule
interval S,, so corresponding to each
operation 0,is a set of nodes V,= {(i,s)
I SE&}. For example, in Figure 9b, as-
suming a deadline of five control steps,
it can conceivably schedule operation
2 into either control step 2,3, or 4,as
shown by the horizontal shaded oval
labeled V,.
Furthermore, for each control step s,
SUMMER 1995
Control step
1 2 3 4 5
Precedence
lxVq = 1
1 Assignment
X constraint
U
al
._
s
.- 2 IXV'I = 1
c
E Assignment
al
n
0 constraint
3 1xq =1
Assignment
constraint
1 xvadd,ll
22 I,'add.
31 5 2 Ixvadd. 51 5 2
Resource Resource Resource
constraint constraint constraint
Figure 9. A CDFG (a)and its constraint graph lb], assuming a schedule of length 5
9nd a resource constraint of two adders.
each functional unit type k corre- iodes Vthat we have already seen.
sponds to a set of nodes Vk,s = { ( i s ) We can now define assignment con-
sd,;z@=k}, which can map onto that ;traints on the scheduling problem,
functional unit type during that control :hus ensuring that a feasible schedule
step. For example, in Figure 9b, as- ias exactly one node per operation:
suming all three operations map onto
adders, operations 1 , 2 , and 3 might all
be scheduled onto adders during con-
trol step 3, as the vertical shaded oval in
the third column shows.
Each feasible schedule contains ex- In Figure 9b, the horizontal shaded
actly one node from each set of nodes oval labeled V, represents the assign-
V,, satisfies all the precedence con- ment constraint for operation 2, con-
straints between operations, and uses straining it to be scheduled into exactly
no more than the available number of one control step in the range [2, 41.
functional units of each type. Clearly,to Earlier,we defined precedence con-
find a feasible schedule, we need some straints between two operators: a
way to determine which x,, variables are precedence clique C, is a clique in G,
1 and which are 0. We will determine with at least one precedence edge
these values by specifying aset of equal- (constraint) connecting two of its
ity and inequality constraints on the nodes. (A clique is a fully connected
scheduling problem and then construct subgraph-a graph in which each
an ILP formulation of the problem. node connectsto all other nodes of the
Solvingthe ILP formulation using an ILP subgraph.)This concept enables us to
solver will give us an optimal solution define precedence constraints on the
for a specified objective function. scheduling problem, thus preventing
two nodes in precedence conflict from
Constraintson the schedulingproblem. being in the same feasible schedule:
To characterize the constraints on the
scheduling problem, we need to
construct a constraint graph G, as follows
(see Figure 9b). The nodes of G, are the
67
 H I G H - L E V E L S Y N T H E S I S

In Figure 9b, the shaded vertical oval in where, for functional units of type k E K, 11, No. 4, Winter 1994, pp. 44-54.
column 3 represents a precedence ak is a weight (usually based on area), 2. B.M. Pangrle and D.D. Gajski, "Design
clique stating that if either operation 1, and mk is the number of functional Tools for Intelligent Silicon Compila-
2, or 3 is scheduled into control step 3, units of that type. tion," IEEE Trans. Computer-AidedDe-
the two remaining operations cannot be For the RCS problem, we can mini- sign, Vol. C A M , No. 6, Nov. 1987, pp.
scheduled into that control step as well. mize the number of control steps by in- 10981112.
Finally, we can define resource con- troducing a dummy operation o d , 3. T.C. Hu, "Parallel Sequencing and As
straints on the scheduling problem, en- adding edges to ensure that Od is sched- sembly tine Problems," Operations R e
suring that in each control step the uled after all other operations, and search,Vol.9,No. 6,Nov. 1961,pp.841848.
number of operations of each type scheduling od as early as possible. 4. P.G. Paulin and J.P. Knight, "Algorithms
does not exceed the available number for High-Level Synthesis," IEEE Design
of functional units of that type: & Test of Computers,Vol. 6, No. 4, Dec.
1989, pp. 1831.
c x " Imk,sE S,Vk 5. L.J. Hafer and A.C. Parker, "A Formal
Ek.s Method for the Specification, Analysis,
a n d Design of Register-Transfer Level
In Figure 9b, the resource constraint at where PA@ was defined earlier, and Sd Digital Logic," IEEE Trans. Computer-
the bottom of column 3 states that no is the schedule interval of operation 0,. Aided Design, Vol. CAD-2, No. 1, Jan.
more than two addition operations can Rensselaer Polytechnic Institute's 1983, pp. 4-18.
be scheduled into control step 3. RPI-ILP system7uses this formulation to 6. G.L. Nemhauser and L.A. Wolsey, Inte-
We can represent these constraints solve the TRCS directly, and the TCS ger and Combinatorial Optimization,
succinctly in the following form: and RCS problems indirectly, quickly John Wiley & Sons, New York, 1988.
producing guaranteed optimal solu- 7. S. Chaudhuri and R.A. Walker, "Analyzing
Max = 1;M,x Il;M,x Im tions to each. Tsing Hua University's and Exploiting the Structure of the Con-
THEDA Systema and the University of straints in the ILP Approach to the Sched-
where Mais the coefficient matrix due to Waterloo's OASIC Systemguse similar uling Problem,"I U E Tmns. VLSISptems,
the assignment constraints, M, is the CO formulations. Vol. 2, No.4, Dec. 1994, pp.456471.
efficient matrix due to the precedence 8. C.-T. Hwang, J.-H. Lee, and Y.€. Hsu,
constraints, and M,is the coefficient ma- 'A Formal Approach to the Scheduling
trix due to the resource constraints. THIS TUTORIAL AlTCMPTS to define Problem in High-Level Synthesis,"IEEE
the more common variations on the Trans. Computer-AidedDesign,Vol. 10,
ILP formulation. We can now use scheduling problem in high-level syn- No. 4, Apr. 1991, pp. 464-475.
these constraints to construct ILP thesis and describes several common- 9. C.H. Gebotys, "Optimal Scheduling and
formulations representing the various ly used scheduling techniques. The Allocation of Embedded VU1 Chips,"
scheduling problems. We can easily scheduling problem will undoubtedly hoc. 29th Design Automation C o d ,
construct the formulation of the TRCS remain an area of research for years to IEEE Computer Society Press, Los
problem by combining formulations of come, as we begin to explore various Alamitos, Calif., 1992, pp. 116119.
the TCS and RCS problems. Given these related problems now that we under-
formulations, a commercial ILP solver stand the basic scheduling problem. In
can produce an optimal solution. the future, we will continue to improve
For the TCS problem, we can mini- our understanding of the relationship
mize a function calculating the num- between scheduling, allocation, and
ber of functional units of each type. binding, and will explore the relation
ships between scheduling and clock
determination, type mapping, and time
and resource bounding.
Robert A. Walker is a n assistant professor
References of computer science at Rensselaer Poly-
1. D.D. Gajski a n d L. Ramachandran, "In. technic Institute. He is the coauthor of two
troduction to High-Level Synthesis," books on high-level synthesis and is partic-
IEEE Design & Test of Computers,Vol ularly interested in those problems con-

68 ILLE DESIOW & TEST OF COMPUTERS

netted with scheduling. He has served on
the Advisory Board of the ACM SIGDA, has
been actively involved with its university
booth program, and also serves as SIGDA
secretary-treasurer.Walker received the MS
and PhD degrees from Camegie Mellon Uni-
versity. He is a senior member of the IEEE,
and a member of the Computer Society,the
ACM, ACM SIGDA, and Sigma Xi.

The Fall issue continues D&Ts emphasis on practical technology with arti-
cles of recent design and test in Asia. Guest Editor Teruhiko Yamada of Meiji
University selected articles representative of current work in China, Taiwan,
India, and Japan:

w Test Subsession Partitioning for Test Scheduling (Institute of Computing

Technology, Academia Sinica, Beijing)
w Untestable Fault Identification in Sequential Circuits by Using Symbolic
simulation (Taiwan)
rn Concurrent Error Detection Using Monitoring Machines (Indian Institute
of Technology, Bombay)
w A Protocol Test Sequence Generation Technique for Fault Localization
and Its Evaluation (Osaka University, Japan)
w Multiple Fault Diagnosis by Sensitizing Input Pairs (Ehime University,
Japan)

h i t Chaudhuri is working on his PhD at

Rensselaer Polytechnic Institute. His re-
search interests include design automation,
high-levelsynthesis,and combinatorial o p
timization. He received the BE degree in
electronics and telecommunications engi-
neering from the University of Calcutta and
the MTech degree in electrical engineering
from the Indian Institute of Technology,
Kanpur, India.
SPECIAL AlTRACTIONS
w I, series continues with two articles on testing instrumentation by Ken
Wallquist, and Keith Baker and Alan Hales
w The Practical Application of Formal Verification-ALXTroundtable held
last March at the European Design and Test Conference in Paris
w Management perspectives in EDA by Ajit Prabhu, Deloitte &Touche
w Recent conference reports and panel summaries
Look to

IEEE n

Address correspondence about this tu-

torial to Robert A. Walker at Rensselaer
Polytechnic Institute, Computer Science for the practical information that makes your job easier
Department, Troy, NY 12180; walkerb@ and your output quality higher
cs.rpi.edu.

SUMMER 1995 69