MCP73833/4

Stand-Alone Linear Li-Ion / Li-Polymer Charge

Management Controller
Features Description
• Complete Linear Charge Management Controller The MCP73833/4 is a highly advanced linear charge
- Integrated Pass Transistor management controller for use in space-limited, cost
sensitive applications. The MCP73833/4 is available in
- Integrated Current Sense
a 10-Lead, 3 mm x 3 mm DFN package or a 10-Lead,
- Integrated Reverse Discharge Protection MSOP package. Along with its small physical size, the
• Constant Current / Constant Voltage Operation low number of external components required makes
with Thermal Regulation the MCP73833/4 ideally suited for portable
• High Accuracy Preset Voltage Regulation: applications. For applications charging from a USB
- 4.2V, 4.35V, 4.4V, or 4.5V, + 0.75% port, the MCP73833/4 can adhere to all the
specifications governing the USB power bus.
• Programmable Charge Current: 1A Maximum
• Preconditioning of Deeply Depleted Cells The MCP73833/4 employs a constant current/constant
voltage charge algorithm with selectable precondition-
- Selectable Current Ratio
ing and charge termination. The constant voltage
- Selectable Voltage Threshold regulation is fixed with four available options: 4.20V,
• Automatic End-of-Charge Control 4.35V, 4.40V, or 4.50V, to accomodate new, emerging
- Selectable Current Threshold battery charging requirements. The constant current
- Selectable Safety Time Period value is set with one external resistor. The MCP73833/
• Automatic Recharge 4 limits the charge current based on die temperature
during high power or high ambient conditions. This
- Selectable Voltage Threshold
thermal regulation optimizes the charge cycle time
• Two Charge Status Outputs while maintaining device reliability.
• Cell Temperature Monitor Several options are available for the preconditioning
• Low-Dropout Linear Regulator Mode threshold, preconditioning current value, charge
• Automatic Power-Down when Input Power termination value, and automatic recharge threshold.
Removed The preconditioning value and charge termination
• Under Voltage Lockout value are set as a ratio, or percentage, of the
programmed constant current value. Preconditioning
• Numerous Selectable Options Available for a
can be set to 100%. Refer to Section 1.0 “Electrical
Variety of Applications:
Characteristics” for available options and the
- Refer to Section 1.0 “Electrical “Product Indentification System” for standard
Characteristics” for Selectable Options options.
- Refer to the Product Identification System for The MCP73833/4 is fully specified over the ambient
Standard Options temperature range of -40°C to +85°C.
• Available Packages:
Package Types
- DFN-10 (3 mm x 3 mm)
DFN-10 VDD 1 10 VBAT
- MSOP-10
VDD 2 9 VBAT
Applications STAT1 3
EP
8 THERM
11
• Lithium-Ion / Lithium-Polymer Battery Chargers STAT2 4 7 PG(TE)
• Personal Data Assistants VSS 5 6 PROG
• Cellular Telephones MSOP-10 VDD 1 10 VBAT
• Digital Cameras
VDD 2 9 VBAT
• MP3 Players STAT1 3 8 THERM
• Bluetooth Headsets
STAT2 4 7 PG(TE)
• USB Chargers
VSS 5 6 PROG

© 2009 Microchip Technology Inc. DS22005B-page 1

MCP73833/4
Typical Application
1A Li-Ion Battery Charger

VIN 1,2 V VBAT 9,10

DD + Single
1 µF 1 µF
- Li-Ion
Cell
3 8
STAT1 THERM
470Ω
4 6
STAT2 PROG
470Ω
1 kΩ T 10 kΩ
7 PG VSS 5
470Ω
MCP73833

Functional Block Diagram

VDD Direction
Control
10 µA VBAT

6 µA CURRENT
G=0.001
+ LIMIT
G=0.001 1 kΩ -

PROG

+ CA
Reference -
Generator 111 kΩ
VREF (1.21V) 310 kΩ 10 kΩ
+
72.7 kΩ -
PRECONDITION
470.6 kΩ
6 µA
+ 48 kΩ
-
TERMINATIO N
+
-
6 kΩ CHARG E

+ VA
-
157.3 kΩ
50 µA
+
-
175 kΩ SHDN
+ STAT1
Charge
- Control,
54 kΩ LDO Timer,
+ and STAT2
Status
- Logic
121 kΩ UVLO
VSS
+ PG (TE)
-
470.6kΩ HTVT
THERM
+
-
LTVT
1 MΩ 121 kΩ

DS22005B-page 2 © 2009 Microchip Technology Inc.

 MCP73833/4
1.0 ELECTRICAL *Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device.
CHARACTERISTICS
This is a stress rating only and functional operation of
the device at those or any other conditions above those
Absolute Maximum Ratings indicated in the operational listings of this specification
VDD........................................................................ 7.0V is not implied. Exposure to maximum rating conditions
for extended periods may affect device reliability.
All Inputs and Outputs w.r.t. VSS .....-0.3 to (VDD+0.3)V
Maximum Junction Temperature, TJ . Internally Limited
Storage temperature .......................... -65°C to +150°C
ESD protection on all pins:
Human Body Model (HBM)
(1.5 kΩ in Series with 100 pF)............................... ≥ 4 kV
Machine Model (MM)
(200 pF, No Series Resistance) ........................... 300V

DC CHARACTERISTICS
Electrical Specifications: Unless otherwise specified, all limits apply for VDD= [VREG(Typical)+0.3V] to 6V, TA=-40°C to 85°C.
Typical values are at +25°C, VDD= [VREG(Typical)+1.0V]
Parameters Sym Min Typ Max Units Conditions
Supply Input
Supply Voltage VDD 3.75 — 6 V Charging
VREG(Typ- — 6 V Charge Complete, Standby
ical)+0.3V
Supply Current ISS — 2000 3000 µA Charging
— 150 300 µA Charge Complete
— 100 300 µA Standby (No Battery or PROG
Floating)
— 50 100 µA Shutdown (VDD < VBAT, or
VDD < VSTOP)
UVLO Start Threshold VSTART 3.4 3.55 3.7 V VDD Low-to-High
UVLO Stop Threshold VSTOP 3.3 3.45 3.6 V VDD High-to-Low
UVLO Hysteresis VHYS — 100 — mV
Voltage Regulation (Constant Voltage Mode, System Test Mode)
Regulated Output Voltage VREG 4.168 4.20 4.232 V VDD=[VREG(Typical)+1V]
4.318 4.35 4.382 V IOUT=10 mA
4.367 4.40 4.433 V TA=-5°C to +55°C
4.467 4.50 4.533 V
Line Regulation |(ΔVBAT/VBAT) — 0.10 0.30 %/V VDD=[VREG(Typical)+1V] to
/ΔVDD| 6V, IOUT=10 mA
Load Regulation |ΔVBAT/ VBAT| — 0.10 0.30 % IOUT=10 mA to 100 mA
VDD=[VREG(Typical)+1V]
Supply Ripple Attenuation PSRR — 58 — dB IOUT=10 mA, 10Hz to 1 kHz
— 47 — dB IOUT=10 mA, 10Hz to 10 kHz
— 25 — dB IOUT=10 mA, 10Hz to 1 MHz
Current Regulation (Fast Charge Constant Current Mode)
Fast Charge Current Regulation IREG 90 100 110 mA PROG = 10 kΩ
900 1000 1100 mA PROG = 1.0 kΩ
TA=-5°C to +55°C
Maximum Output Current Limit IMAX — 1200 — mA PROG < 833Ω

© 2009 Microchip Technology Inc. DS22005B-page 3

MCP73833/4
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise specified, all limits apply for VDD= [VREG(Typical)+0.3V] to 6V, TA=-40°C to 85°C.
Typical values are at +25°C, VDD= [VREG(Typical)+1.0V]
Parameters Sym Min Typ Max Units Conditions
Preconditioning Current Regulation (Trickle Charge Constant Current Mode)
Precondition Current Ratio IPREG / IREG 7.5 10 12.5 % PROG = 1.0 kΩ to 10 kΩ
15 20 25 % TA=-5°C to +55°C
30 40 50 %
— 100 — %
Precondition Voltage Threshold VPTH / VREG 64 66.5 70 % VBAT Low-to-High
Ratio 69 71.5 75 %
Precondition Hysteresis VPHYS — 100 — mV VBAT High-to-Low
Charge Termination
Charge Termination Current Ratio ITERM / IREG 3.75 5 6.25 % PROG = 1.0 kΩ to 10 kΩ
5.6 7.5 9.4 % TA=-5°C to +55°C
7.5 10 12.5 %
15 20 25 %
Automatic Recharge
Recharge Voltage Threshold Ratio VRTH / VREG — 94.0 — % VBAT High-to-Low
— 96.5 — %
Pass Transistor ON-Resistance
ON-Resistance RDSON — 300 — mΩ VDD = 3.75V
TJ = 105°C
Battery Discharge Current
Output Reverse Leakage Current IDISCHARGE — 0.15 2 µA PROG Floating
— 0.25 2 µA VDD < VBAT
— 0.15 2 µA VDD < VSTOP
— -5.5 -15 µA Charge Complete
Status Indicators - STAT1, STAT2, PG
Sink Current ISINK — 15 25 mA
Low Output Voltage VOL — 0.4 1 V ISINK = 4 mA
Input Leakage Current ILK — 0.01 1 µA High Impedance, 6V on pin
PROG Input
Charge Impedance Range RPROG 1 — 20 kΩ
Standy Impedance RPROG 70 — 200 kΩ Minimum Impedance for
Standby
Thermistor Bias
Thermistor Current Source ITHERM 47 50 53 µA 2 kΩ < RTHERM < 50 kΩ
Thermistor Comparator
Upper Trip Threshold VT1 1.20 1.23 1.26 V VTHERM Low-to-High
Upper Trip Point Hysteresis VT1HYS — -50 — mV
Lower Trip Threshold VT2 0.235 0.25 0.265 V VTHERM High-to-Low
Lower Trip Point Hysteresis VT2HYS — 50 — mV
System Test (LDO) Mode
Input High Voltage Level VIH (VDD-0.1) — — V
THERM Input Sink Current ISINK 3 6 20 µA Stand-by or system test mode
Bypass Capacitance CBAT 1 — — µF IOUT < 250 mA
4.7 — — µF IOUT > 250 mA

DS22005B-page 4 © 2009 Microchip Technology Inc.

 MCP73833/4
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise specified, all limits apply for VDD= [VREG(Typical)+0.3V] to 6V, TA=-40°C to 85°C.
Typical values are at +25°C, VDD= [VREG(Typical)+1.0V]
Parameters Sym Min Typ Max Units Conditions
Automatic Power Down
Automatic Power Down Entry VPD — VBAT + — V 2.3V < VBAT < VREG
Threshold 50 mV VDD Falling
Automatic Power Down Exit Thresh- VPDEXIT — VBAT + — V 2.3V < VBAT < VREG
old 150 mV VDD Rising
Timer Enable Input (TE)
Input High Voltage Level VIH 2.0 — — V
Input Low Voltage Level VIL — — 0.6 V
Input Leakage Current ILK — 0.01 1 µA VTE = 6V
Thermal Shutdown
Die Temperature TSD — 150 — °C
Die Temperature Hysteresis TSDHYS — 10 — °C

AC CHARACTERISTICS
Electrical Specifications: Unless otherwise specified, all limits apply for VDD= [VREG(Typical)+0.3V] to 6V, TA=-40°C to 85°C.
Typical values are at +25°C, VDD= [VREG(Typical)+1.0V]
Parameters Sym Min Typ Max Units Conditions
UVLO Start Delay tSTART — — 5 ms VDD Low-to-High
Current Regulation
Transition Time Out of Preconditioning tDELAY — — 1 ms VBAT<VPTH to VBAT>VPTH
Current Rise Time Out of Preconditioning tRISE — — 1 ms IOUT Rising to 90% of IREG
Preconditioning Comparator Filter Time tPRECON 0.4 1.3 3.2 ms Average VBAT Rise/Fall
Termination Comparator Filter Time tTERM 0.4 1.3 3.2 ms Average IOUT Falling
Charge Comparator Filter Time tCHARGE 0.4 1.3 3.2 ms Average VBAT Falling
Thermistor Comparator Filter Time tTHERM 0.4 1.3 3.2 ms Average THERM Rise/Fall
Elapsed Timer
Elapsed Timer Period tELAPSED 0 0 0 Hours Timer Disabled
3.6 4.0 4.4 Hours
5.4 6.0 6.6 Hours
7.2 8.0 8.8 Hours
Status Indicators
Status Output turn-off tOFF — — 200 µs ISINK = 1 mA to 0 mA
Status Output turn-on tON — — 200 µs ISINK = 0 mA to 1 mA

TEMPERATURE SPECIFICATIONS
Electrical Specifications: Unless otherwise specified, all limits apply for VDD= [VREG(Typical)+0.3V] to 6V.
Typical values are at +25°C, VDD= [VREG(Typical)+1.0V]
Parameters Symbol Min Typ Max Units Conditions
Temperature Ranges
Specified Temperature Range TA -40 — +85 °C
Operating Temperature Range TA -40 — +125 °C
Storage Temperature Range TA -65 — +150 °C
Thermal Package Resistances
Thermal Resistance, MSOP-10 θJA — 113 — °C/W 4-Layer JC51-7 Standard
Board, Natural Convection
Thermal Resistance, DFN-10, 3 mm x 3 mm θJA — 41 — °C/W 4-Layer JC51-7 Standard
Board, Natural Convection

© 2009 Microchip Technology Inc. DS22005B-page 5

MCP73833/4
NOTES:

DS22005B-page 6 © 2009 Microchip Technology Inc.

 MCP73833/4
2.0 TYPICAL PERFORMANCE CURVES
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, VDD = 5.2V, VREG = 4.20V, IOUT = 10 mA and TA= +25°C, Constant-voltage mode.

4.210 1000
Battery Regulation Voltage

MCP73833
4.205

Charge Current (mA)

IOUT = 10 mA
4.200
4.195
IOUT = 100 mA
(V)

4.190 100
4.185
IOUT = 500 mA
4.180
IOUT = 900 mA
4.175
4.170 10
4.50 4.75 5.00 5.25 5.50 5.75 6.00 1 3 5 7 9 11 13 15 17 19 21

Supply Voltage (V) Programming Resistor (k:)

FIGURE 2-1: Battery Regulation Voltage FIGURE 2-4: Charge Current (IOUT) vs.
(VBAT) vs. Supply Voltage (VDD). Programming Resistor (RPROG).

4.220 104
Battery Regulation Voltage (V)

MCP73833 RPROG = 10 k:
IOUT = 10 mA
103
4.210
Charge Current (mA)

IOUT = 100 mA 102

4.200
101
4.190 100

4.180 99
IOUT = 500 mA
98
4.170 IOUT = 900 mA 97
4.160 96
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80

4.50 4.75 5.00 5.25 5.50 5.75 6.00

Ambient Temperature (°C) Supply Voltage (V)

FIGURE 2-2: Battery Regulation Voltage FIGURE 2-5: Charge Current (IOUT) vs.
(VBAT) vs. Ambient Temperature (TA). Supply Voltage (VDD).

0.40 1004
Output Leakage Current (PA)

RPROG = 1 k:
0.35
1002
Charge Current (mA)

+85°C 1000
0.30
-40°C 998
0.25
996
0.20 +25°C
994
0.15
992
0.10
990
0.05
988
0.00
986
3.00 3.20 3.40 3.60 3.80 4.00 4.20
4.50 4.75 5.00 5.25 5.50 5.75 6.00
Battery Regulation Voltage (V) Supply Voltage (V)

FIGURE 2-3: Output Leakage Current FIGURE 2-6: Charge Current (IOUT) vs.
(IDISCHARGE) vs. Battery Regulation Voltage Supply Voltage (VDD).
(VBAT).

© 2009 Microchip Technology Inc. DS22005B-page 7

MCP73833/4
TYPICAL PERFORMANCE CURVES (Continued)
Note: Unless otherwise indicated, VDD = 5.2V, VREG = 4.20V, IOUT = 10 mA and TA= +25°C, Constant-voltage mode.

120 52.0

Thermistor Bias Current (µA)

RPROG = 10 k:
51.5
100
Charge Current (mA)

51.0
80 50.5
60 50.0
49.5
40
49.0
20 48.5
0 48.0

-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
25
35
45
55
65
75
85
95
105
115
125
135
145
155
Junction Temperature (°C) Ambient Temperature (°C)

FIGURE 2-7: Charge Current (IOUT) vs. FIGURE 2-10: Thermistor Bias Current
Junction Temperature (TJ). (ITHRERM) vs. Ambient Temperature (TA).

1200 0
RPROG = 1 k: VAC = 100 mVp-p
-10 IOUT = 10 mA
1000
Charge Current (mA)

COUT = 4.7 µF, X7R

Attenuation (dB) -20 Ceramic
800
-30
600
-40
400
-50
200 -60
0 -70
25
35
45
55
65
75
85
95
105
115
125
135
145
155

0.01 0.1 1 10 100 1000

Junction Temperature (°C) Frequency (kHz)

FIGURE 2-8: Charge Current (IOUT) vs. FIGURE 2-11: Power Supply Ripple
Junction Temperature (TJ). Rejection (PSRR).

52.0 0
Thermistor Bias Current (PA)

VAC = 100 mVp-p

51.5 IOUT = 100 mA
-10
COUT = 4.7 µF, X7R
51.0
Attenuation (dB)

Ceramic
50.5
-20

50.0 -30
49.5
-40
49.0
48.5 -50

48.0 -60
4.50 4.75 5.00 5.25 5.50 5.75 6.00 0.01 0.1 1 10 100 1000
Supply Voltage (V) Frequency (kHz)

FIGURE 2-9: Thermistor Bias Current FIGURE 2-12: Power Supply Ripple
(ITHRERM) vs. Supply Voltage (VDD). Rejection (PSRR).

DS22005B-page 8 © 2009 Microchip Technology Inc.

 MCP73833/4
TYPICAL PERFORMANCE CURVES (Continued)
Note: Unless otherwise indicated, VDD = 5.2V, VREG = 4.20V, IOUT = 10 mA and TA= +25°C, Constant-voltage mode.

14 0.10 1.40 0.10

12 0.05 1.20 0.05
Source Voltage (V)

Output Current (A)

Output Ripple (V)

Output Ripple (V)

10 0.00 1.00 0.00
8 -0.05 0.80 -0.05
6 -0.10 0.60 -0.10
4 -0.15 0.40 -0.15
2 IOUT = 10 mA -0.20 0.20 -0.20
COUT = 4.7 µF, X7R COUT = 4.7 µF, X7R
0 -0.25 0.00 Ceramic -0.25
Ceramic
-2 -0.30 -0.20 -0.30
0
20
40
60
80
100
120
140
160
180
200

0
20
40
60
80
100
120
140
160
180
200
Time (µs) Time (µs)

FIGURE 2-13: Line Transient Response. FIGURE 2-16: Load Transient Response.

14 0.10 5.0 200

12 0.05
4.0 160

Charge Current (A)

Battery Voltage (V)
Source Voltage (V)

Output Ripple (V)

10 0.00
8 -0.05 3.0 120
6 -0.10
4 -0.15 2.0 80

2 IOUT = 100 mA -0.20 MCP73833-FCI/MF

COUT = 4.7 µF, X7R
1.0 VDD = 5.2V 40
0 -0.25 RPROG = 10.0 k:
Ceramic
-2 -0.30 0.0 0
0
20
40
60
80
100
120
140
160
180
200

30

60

90

120

150

180

210
Time (µs) Time (Minutes)

FIGURE 2-14: Line Transient Response. FIGURE 2-17: Complete Charge Cycle
(180 mA Li-Ion Battery).

0.35 0.04 5.0 200

0.30 0.02
4.0 160

Charge Current (A)

Battery Voltage (V)
Output Current (A)

Output Ripple (V)

0.25 0.00
0.20 -0.02 3.0 120
0.15 -0.04
0.10 -0.06 2.0 80
0.05 -0.08 MCP73833-FCI/MF
COUT = 4.7 µF, X7R 1.0 VDD = 5.2V 40
0.00 Ceramic -0.10 RPROG = 10.0 k:
-0.05 -0.12 0.0 0
0
20
40
60
80
100
120
140
160
180
200

0 2 4 6 8 10
Time (µs) Time (Minutes)

FIGURE 2-15: Load Transient Response. FIGURE 2-18: Charge Cycle Start -
Preconditioning (180 mAh Li-Ion Battery).

© 2009 Microchip Technology Inc. DS22005B-page 9

MCP73833/4
NOTES:

DS22005B-page 10 © 2009 Microchip Technology Inc.

 MCP73833/4
3.0 PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.

TABLE 3-1: PIN FUNCTION TABLE

Pin No.
Symbol Function
DFN-10 MSOP-10
1 1 VDD Battery Management Input Supply
2 2 VDD Battery Management Input Supply
3 3 STAT1 Charge Status Output
4 4 STAT2 Charge Status Output
5 5 VSS Battery Management 0V Reference
6 6 PROG Current Regulation Set and Charge Control Enable
7 7 PG, TE MCP73833: Power Good output, MCP73834: Timer Enable input
8 8 THERM Thermistor input
9 9 VBAT Battery Charge Control Output
10 10 VBAT Battery Charge Control Output
11 — EP Exposed Thermal Pad (EP); must be connected to VSS.

3.1 Battery Management Input Supply 3.6 Timer Enable Input (TE)
(VDD) MCP73834 Only
A supply voltage of [VREG (typical) + 0.3V] to 6V is The timer enable (TE) input option is used to enable or
recommended. Bypass to VSS with a minimum of 1 µF. disable the internal timer. A low signal on this pin
enables the internal timer and a high signal disables
3.2 Charge Status Outputs (STAT1, the internal timer. The TE input can be used to disable
STAT2) the timer when the charger is supplying current to
charge the battery and power the system load. The TE
STAT1 and STAT2 are open-drain logic outputs for con- input is compatible with 1.8V logic.
nection to a LED for charge status indication.
Alternatively, a pull-up resistor can be applied for 3.7 Thermistor Input (THERM)
interfacing to a host microcontroller.
An internal 50 µA current source provides the bias for
3.3 Battery Management 0V Reference most common 10 kΩ negative-temperature coefficient
thermistors (NTC). The MCP73833/4 compares the
(VSS) voltage at the THERM pin to factory set thersholds of
Connect to negative terminal of battery and input 1.20V and 0.25V, typically.
supply.
3.8 Battery Charge Control Output
3.4 Current Regulation Set (PROG) (VBAT)
Preconditioning, fast charge, and termination currents Connect to positive terminal of battery. Drain terminal
are scaled by placing a resistor from PROG to VSS. of internal P-channel MOSFET pass transistor. Bypass
The charge management controller can be disabled by to VSS with a minimum of 1 µF to ensure loop stability
allowing the PROG input to float. when the battery is disconnected.

3.5 Power Good Indication (PG) 3.9 Exposed Thermal Pad (EP)
MCP73833 Only There is an internal electrical connection between the
Exposed Thermal Pad (EP) and the VSS pin; they must
The power good (PG) option is a pseudo open-drain
be connected to the same potential.
output. The PG output can sink current, but not source
current. However, there is a diode path back to the
input, and, as such, the PG output should only be
pulled up to the input. The PG output is low whenever
the input to the MCP73833 is above the UVLO
threshold and greater than the battery voltage.

© 2009 Microchip Technology Inc. DS22005B-page 11

MCP73833/4
NOTES:

DS22005B-page 12 © 2009 Microchip Technology Inc.

 MCP73833/4
4.0 FUNCTIONAL DESCRIPTION
The MCP73833/4 is a highly advanced linear charge
management controller. Refer to the functional block
diagram and Figure 4-1 that depicts the operational
flow algorithm from charge initiation to completion and
automatic recharge.

SHUTDOWN MODE * * Continuously Monitored

VDD < VUVLO
VDD < VBAT
STAT1 = HI-Z
STAT2 = HI-Z
PG = HI-Z

SYSTEM TEST (LDO) MODE

VTHERM > (VDD - 100 mv) STANDBY MODE *
PROG > 20 kΩ VBAT (VREG + 100 mv)
STAT1 = LOW PROG > 200 kΩ
STAT2 = LOW STAT1 = HI-Z
PG = LOW STAT2 = HI-Z
Timer Suspended PG = LOW

VBAT < VPTH

PRECONDITIONING MODE
Charge Current (IPREG
STAT1 = LOW
STAT2 = Hi-Z
PG = LOW
Timer Reset

VBAT > VPTH

VBAT > VPTH
TEMPERATURE FAULT FAST CHARGE MODE TIMER FAULT
No Charge Current Charge Current (IREG No Charge Current
STAT1 = Hi-Z STAT1 = LOW STAT1 = Hi-Z
STAT2 = Hi-Z STAT2 = Hi-Z Timer Expired STAT2 = Hi-Z
PG = LOW PG = LOW VBAT < VRTH PG = LOW
Timer Suspended Timer Enabled Timer Suspended

VBAT = VREG

CONSTANT VOLTAGE MODE

Charge Voltage (VREG
STAT1 = LOW
STAT2 = Hi-Z
PG = LOW

VBAT < ITERM

Timer Expired

CHARGE COMPLETE MODE

No Charge Current
STAT1 = HI-Z
STAT2 = LOW
PG = LOW
Timer Reset

FIGURE 4-1: Flow Chart.

© 2009 Microchip Technology Inc. DS22005B-page 13

MCP73833/4
4.1 Under Voltage Lockout (UVLO)
An internal under voltage lockout (UVLO) circuit
monitors the input voltage and keeps the charger in
shutdown mode until the input supply rises above the
UVLO threshold. The UVLO circuitry has a built-in
hysteresis of 100 mV.
In the event a battery is present when the input power
is applied, the input supply must rise +150 mV above
the battery voltage before the MCP73833/4 becomes
operational.
The UVLO circuit places the device in shutdown mode
if the input supply falls to within +50 mV of the battery
voltage.
The UVLO circuit is always active. At any time the input
supply is below the UVLO threshold or within +50 mV
of the voltage at the VBAT pin, the MCP73833/4 is
placed in a shutdown mode.
During any UVLO condition, the battery reverse
discharge current shall be less than 2 µA.
4.2 Charge Qualification
For a charge cycle to begin, all UVLO conditions must
be met and a battery or output load must be present.
A charge current programming resistor must be
connected from PROG to VSS. If the PROG pin is open
or floating, the MCP73833/4 is disabled and the battery
reverse discharge current is less than 2 µA. In this
manner, the PROG pin acts as a charge enable and
can be used as a manual shutdown.
If the input supply voltage is above the UVLO
threshold, but below VREG(Typical)+0.3V, the
MCP73833/4 will pulse the STAT1 and PG outputs as
the device determines if a battery is present.
4.3 Preconditioning
If the voltage at the VBAT pin is less than the
preconditioning threshold, the MCP73833/4 enters a
preconditioning or trickle charge mode. The
preconditioning threshold is factory set. Refer to
Section 1.0 “Electrical Characteristics” for
preconditioning threshold options.
In this mode, the MCP73833/4 supplies a percentage
of the charge current (established with the value of the
resistor connected to the PROG pin) to the battery. The
percentage or ratio of the current is factory set. Refer to
Section 1.0 “Electrical Characteristics” for
preconditioning current options.
When the voltage at the VBAT pin rises above the pre-
conditioning threshold, the MCP73833/4 enters the
constant current or fast charge mode.
DS22005B-page 14
4.4 Constant Current - Fast Charge
Mode
During the constant current mode, the programmed
charge current is supplied to the battery or load. The
charge current is established using a single resistor
from PROG to VSS. The program resistor and the
charge current are calculated using Equation 4-1:
EQUATION 4-1:
1000V-
I REG = ----------------
Where: R PROG
RPROG = kilo-ohms
IREG = milliampere
Constant current mode is maintained until the voltage
at the VBAT pin reaches the regulation voltage, VREG.
When constant current mode is invoked, the internal
timer is reset.
4.4.1 TIMER EXPIRED DURING
CONSTANT CURRENT - FAST
CHARGE MODE
If the internal timer expires before the recharge voltage
threshold is reached, a timer fault is indicated and the
charge cycle terminates. The MCP73833/4 remains in
this condition until the battery is removed, the input
power is removed, or the PROG pin is opened. If the
battery is removed or the PROG pin is opened, the
MCP73833/4 enters the Standby mode where it
remains until a battery is reinserted or the PROG pin is
reconnected. If the input power is removed, the
MCP73833/4 is in Shutdown. When the input power is
reapplied, a normal start-up sequence ensues.
4.5 Constant Voltage Mode
When the voltage at the VBAT pin reaches the
regulation voltage, VREG, constant voltage regulation
begins. The regulation voltage is factory set to 4.20V,
4.35V, 4.40V, or 4.50V with a tolerance of ± 0.75%.
4.6 Charge Termination
The charge cycle is terminated when, during constant
voltage mode, the average charge current diminishes
below a percentage of the programmed charge current
(established with the value of the resistor connected to
the PROG pin) or the internal timer has expired. A 1 ms
filter time on the termination comparator ensures that
transient load conditions do not result in premature
charge cycle termination. The percentage or ratio of the
current is factory set. The timer period is factory set
and can be disabled. Refer to Section 1.0 “Electrical
Characteristics” for charge termination current ratio
and timer period options.
The charge current is latched off and the MCP73833/4
enters a charge complete mode.
© 2009 Microchip Technology Inc.
 MCP73833/4
4.7 Automatic Recharge 4.9 Thermal Shutdown
The MCP73833/4 continuously monitors the voltage at The MCP73833/4 suspends charge if the die
the VBAT pin in the charge complete mode. If the temperature exceeds +150°C. Charging will resume
voltage drops below the recharge threshold, another when the die temperature has cooled by approximately
charge cycle begins and current is once again supplied +10°C. The thermal shutdown is a secondary safety
to the battery or load. The recharge threshold is factory feature in the event that there is a failure within the
set. Refer to Section 1.0 “Electrical Characteristics” thermal regulation circuitry.
for recharge threshold options.

4.8 Thermal Regulation

The MCP73833/4 limits the charge current based on
the die temperature. The thermal regulation optimizes
the charge cycle time while maintaining device
reliability. Figure 4-2 depicts the thermal regulation for
the MCP73833/4.

1200
RPROG = 1 kΩ
1000
Charge Current (mA)

800

600

400

200

0
25
35
45
55
65
75
85
95
105
115
125
135
145
155

Junction Temperature (°C)

FIGURE 4-2: Thermal Regulation.

© 2009 Microchip Technology Inc. DS22005B-page 15

MCP73833/4
NOTES:

DS22005B-page 16 © 2009 Microchip Technology Inc.

 MCP73833/4
5.0 DETAILED DESCRIPTION pass transistor and holding the timer value. The charge
cycle resumes when the voltage at the THERM pin
returns to the normal range.
5.1 Analog Circuitry
If temperature monitoring is not required, place a
5.1.1 BATTERY MANAGEMENT INPUT standard 10 kΩ resistor from THERM to VSS.
SUPPLY (VDD)
5.1.4.1 System Test (LDO) Mode
The VDD input is the input supply to the MCP73833/4.
The MCP73833/4 automatically enters a Power-down The MCP73833/4 can be placed in a system test mode.
mode if the voltage on the VDD input falls below the In this mode, the MCP73833/4 operates as a low
UVLO voltage (VSTOP). This feature prevents draining dropout linear regulator (LDO). The output voltage is
the battery pack when the VDD supply is not present. regulated to the factory set voltage regulation option.
The available output current is limitted to the
5.1.2 CURRENT REGULATION SET programmed fast charge current. For stability, the VBAT
(PROG) output must be bypassed to VSS with a minimum
capacitance of 1 µF for output currents up to 250 mA.
Fast charge current regulation can be scaled by placing A minimum capacitance of 4.7 µF is required for output
a programming resistor (RPROG) from the PROG input currents above 250 mA.
to VSS. The program resistor and the charge current
are calculated using the Equation 5-1: The system test mode is entered by driving the THERM
input greater than (VDD-100 mV) with no battery
connected to the output. In this mode, the MCP73833/
EQUATION 5-1:
4 can be used to power the system without a battery
1000V-
I REG = ---------------- present.
R PROG
Where:
Note 1: ITHERM is disabled during shutdown,
RPROG = kilo-ohms stand-by, and system test modes.
IREG = milliampere 2: A pull-down current source on the
THERM input is active only in stand-by
The preconditioning trickle-charge current and the and system test modes.
charge termination current are ratiometric to the fast 3: During system test mode, the PROG
charge current based on the selected device options. input sets the available output current
limit.
5.1.3 BATTERY CHARGE CONTROL
OUTPUT (VBAT) 4: System test mode shall be exited by
releasing the THERM input or cycling
The battery charge control output is the drain terminal input power.
of an internal P-channel MOSFET. The MCP73833/4
provides constant current and voltage regulation to the
5.2 Digital Circuitry
battery pack by controlling this MOSFET in the linear
region. The battery charge control output should be
5.2.1 STATUS INDICATORS AND POWER
connected to the positive terminal of the battery pack.
GOOD (PG - OPTION)
5.1.4 TEMPERATURE QUALIFICATION The charge status outputs have two different states:
(THERM) Low (L), and High Impedance (Hi-Z). The charge status
The MCP73833/4 continuously monitors battery outputs can be used to illuminate LEDs. Optionally, the
temperature during a charge cycle by measuring the charge status outputs can be used as an interface to a
voltage between the THERM and VSS pins. An internal host microcontroller. Table 5-1 summarize the state of
50 µA current source provides the bias for most the status outputs during a charge cycle.
common 10 kΩ negative-temperature coefficient TABLE 5-1: STATUS OUTPUTS
(NTC) or positive-temperature coefficient (PTC)
thermistors.The current source is controlled, avoiding Charge Cycle State STAT1 STAT2 PG
measurement sensitivity to fluctuations in the supply Shutdown Hi-Z Hi-Z Hi-Z
voltage (VDD). The MCP73833/4 compares the voltage Standby Hi-Z Hi-Z L
at the THERM pin to factory set thersholds of 1.20V Charge in Progress L Hi-Z L
and 0.25V, typically. Once a volage outside the
Charge Complete (EOC) Hi-Z L L
thresholds is detected during a charge cycle, the
MCP73833/4 immediately suspends the charge cycle. Temperature Fault Hi-Z Hi-Z L
The MCP73833/4 suspends charge by turning off the Timer Fault Hi-Z Hi-Z L
System Test Mode L L L

© 2009 Microchip Technology Inc. DS22005B-page 17

MCP73833/4
5.2.2 POWER GOOD (PG) OPTION 5.2.4 DEVICE DISABLE (PROG)
The power good (PG) option is a pseudo open-drain The current regulation set input pin (PROG) can be
output. The PG output can sink current, but not source used to terminate a charge at any time during the
current. However, there is a diode path back to the charge cycle, as well as to initiate a charge cycle or
input, and as such, the PG output should only be pulled initiate a recharge cycle.
up to the input. The PG output is low whenever the Placing a programming resistor from the PROG input to
input to the MCP73833 is above the UVLO threshold VSS enables the device. Allowing the PROG input to
and greater than the battery voltage. If the supply float or by applying a logic-high input signal, disables
voltage is above the UVLO, but below the device and terminates a charge cycle. When
VREG(Typical)+0.3V, the MCP73833 will pulse the PG disabled, the device’s supply current is reduced to
output as the device determines if a battery is present. 100 µA, typically.
5.2.3 TIMER ENABLE (TE) OPTION
The timer enable (TE) input option is used to enable or
disable the internal timer. A low signal on this pin
enables the internal timer and a high signal disables
the internal timer. The TE input can be used to disable
the timer when the charger is supplying current to
charge the battery and power the system load. The TE
input is compatible with 1.8V logic.

DS22005B-page 18 © 2009 Microchip Technology Inc.

 MCP73833/4
6.0 APPLICATIONS
The MCP73833/4 is designed to operate in conjunction cells Constant-current followed by Constant-voltage.
with a host microcontroller or in stand-alone Figure 6-1 depicts a typical stand-alone application
applications. The MCP73833/4 provides the preferred circuit, while Figures 6-2 and 6-3 depict the
charge algorithm for Lithium-Ion and Lithium-Polymer accompanying charge profile.

Li-Ion Battery Charger

1,2 VBAT 9,10

VDD + Single
CIN COUT Li-Ion
- Cell
LED LED LED
3 8
Regulated STAT1 THERM
Wall Cube RLED RT1
4 6
STAT2 PROG
RLED
RPROG RT2 T 10 kΩ
7 VSS 5
PG
RLED
MCP73833

FIGURE 6-1: Typical Application Circuit.

6.1 Application Circuit Design
5.0 2.00
Due to the low efficiency of linear charging, the most
4.0 1.60
important factors are thermal design and cost, which
Charge Current (A)
Battery Voltage (V)

are a direct function of the input voltage, output current

3.0 1.20 and thermal impedance between the battery charger
and the ambient cooling air. The worst-case scenario is
2.0 0.80
when the device has transitioned from the
MCP73833-FCI/MF
1.0 VDD = 5.2V 0.40 Preconditioning mode to the Constant-current mode. In
RPROG = 1.00 k: this situation, the battery charger has to dissipate the
0.0 0.00 maximum power. A trade-off must be made between
0

20

40

60

80

100

120

140

160

the charge current, cost and thermal requirements of

Time (Minutes) the charger.

FIGURE 6-2: Typical Charge Profile with 6.1.1 COMPONENT SELECTION

Thermal Regulation (1700 mAh Li-Ion Battery). Selection of the external components in Figure 6-1 is
crucial to the integrity and reliability of the charging
system. The following discussion is intended as a guide
5.0 2.00 for the component selection process.
4.0 1.60 6.1.1.1 Current Programming Resistor
Charge Current (A)
Battery Voltage (V)

3.0 1.20
(RPROG)
The preferred fast charge current for Lithium-Ion cells
2.0 0.80 is at the 1C rate, with an absolute maximum current at
MCP73833-FCI/MF the 2C rate. For example, a 500 mAh battery pack has
1.0 VDD = 5.2V 0.40
a preferred fast charge current of 500 mA. Charging at
RPROG = 1.00 k:
0.0 0.00
this rate provides the shortest charge cycle times
without degradation to the battery pack performance or
0

10

Time (Minutes) life.

FIGURE 6-3: Typical Charge Cycle Start

with Thermal Regulation (1700 mAh Li-Ion
Battery).

© 2009 Microchip Technology Inc. DS22005B-page 19

MCP73833/4
6.1.1.2 Thermal Considerations
The worst-case power dissipation in the battery char-
ger occurs when the input voltage is at the maximum
and the device has transitioned from the
Preconditioning mode to the Constant-current mode. In
this case, the power dissipation is:
PowerDissipation = ( V DDMAX – V PTHMIN ) × I REGMAX
Where:
VDDMAX = the maximum input voltage
IREGMAX = the maximum fast charge current
VPTHMIN = the minimum transition threshold
voltage
Power dissipation with a 5V, ±10% input voltage source
is:
PowerDissipation = ( 5.5V – 2.7V ) × 550mA = 1.54W
This power dissipation with the battery charger in the
MSOP-10 package will cause thermal regulation to be
entered as depicted in Figure 6-3. Alternatively, the
DFN-10 (3 mm x 3 mm) package could be utilized to
reduce charge cycle times.
6.1.1.3 External Capacitors
The MCP73833/4 is stable with or without a battery
load. In order to maintain good AC stability in the
Constant-voltage mode, a minimum capacitance of
4.7 µF is recommended to bypass the VBAT pin to VSS.
This capacitance provides compensation when there is
no battery load. In addition, the battery and
interconnections appear inductive at high frequencies.
These elements are in the control feedback loop during
Constant-voltage mode. Therefore, the bypass
capacitance may be necessary to compensate for the
inductive nature of the battery pack.
Virtually any good quality output filter capacitor can be
used, independent of the capacitor’s minimum
Effective Series Resistance (ESR) value. The actual
value of the capacitor (and its associated ESR)
depends on the output load current. A 4.7 µF ceramic,
tantalum or aluminum electrolytic capacitor at the
output is usually sufficient to ensure stability for output
currents up to a 500 mA.
6.1.1.4 Reverse-Blocking Protection
The MCP73833/4 provides protection from a faulted or
shorted input. Without the protection, a faulted or
shorted input would discharge the battery pack through
the body diode of the internal pass transistor.
DS22005B-page 20
6.1.1.5 Charge Inhibit
The current regulation set input pin (PROG) can be
used to terminate a charge at any time during the
charge cycle, as well as to initiate a charge cycle or
initiate a recharge cycle.
Placing a programming resistor from the PROG input to
VSS enables the device. Allowing the PROG input to
float or by applying a logic-high input signal, disables
the device and terminates a charge cycle. When
disabled, the device’s supply current is reduced to
100 µA, typically.
6.1.1.6 Temperature Monitoring
The charge temperature window can be set by placing
fixed value resistors in series-parallel with a thermistor.
The resistance values of RT1 and RT2 can be
calculated with the following equations in order to set
the temperature window of interest.
For NTC thermistors:
R T2 × R COLD
24k Ω = R T1 + --------------------------------
-
R T2 + R COLD
R T2 × R HOT
5k Ω = R T1 + ----------------------------
-
R T2 + R HOT
Where:
RT1 = the fixed series resistance
RT2 = the fixed parallel resistance
RCOLD = the thermistor resistance at the
lower temperature of interest
RHOT = the thermistor resistance at the
upper temperature of interest
For example, by utilizing a 10 kΩ at 25C NTC
thermistor with a sensitivity index, β, of 3892, the
charge temperature range can be set to 0C - 50C by
placing a 1.54 kΩ resistor in series (RT1), and a
69.8 kΩ resistor in parallel (RT2) with the thermistor as
depicted in Figure 6-1.
6.1.1.7 Charge Status Interface
A status output provides information on the state of
charge. The output can be used to illuminate external
LEDs or interface to a host microcontroller. Refer to
Table 5-1 for a summary of the state of the status
output during a charge cycle.
© 2009 Microchip Technology Inc.
 MCP73833/4
6.2 PCB Layout Issues
For optimum voltage regulation, place the battery pack
as close as possible to the device’s VBAT and VSS pins,
recommended to minimize voltage drops along the
high current-carrying PCB traces.
If the PCB layout is used as a heatsink, adding many
vias in the heatsink pad can help conduct more heat to
the backplane of the PCB, thus reducing the maximum
junction temperature. Figures 6-4 and 6-5 depict a
typical layout with PCB heatsinking.

MCP73833
VSS
CIN COUT
VDD VBAT
STAT1 THERM
STAT2 PG
RPROG

FIGURE 6-4: Typical Layout (Top).

VSS

VDD VBAT

FIGURE 6-5: Typical Layout (Bottom).

© 2009 Microchip Technology Inc. DS22005B-page 21

MCP73833/4
NOTES:

DS22005B-page 22 © 2009 Microchip Technology Inc.

 MCP73833/4
7.0 PACKAGING INFORMATION

7.1 Package Marking Information

10-Lead DFN (3x3) Example:

Marking Marking
Part Number * Part Number *
Code Code
XXXX AAAA
YYWW MCP73833-AMI/MF AAAA 0918
NNN MCP73833-BZI/MF AAAB 256
MCP73833-FCI/MF AAAC MCP73834-FCI/MF BAAC
MCP73833-GPI/MF AAAD MCP73834-GPI/MF BAAD
MCP73833-NVI/MF AAAF MCP73834-NVI/MF BAAF
MCP73833-6SI/MF AAAH MCP73834-6SI/MF BAAH
MCP73833-CNI/MF AAAK MCP73834-CNI/MF BAAK
* Consult Factory for Alternative Device Options.

10-Lead MSOP Example:

Marking Marking
Part Number * Part Number *
Code Code
MCP73833-AMI/UN 833AMI
XXXXXX MCP73833-BZI/UN 833BZI 833AMI
YWWNNN MCP73833-FCI/UN 833FCI MCP73834-FCI/UN 834FCI 918256
MCP73833-GPI/UN 833GPI MCP73834-GPI/UN 834GPI
MCP73833-NVI/UN 833NVI MCP73834-NVI/UN 834NVI
MCP73833-CNI/UN 833CNI MCP73834-CNI/UN 834CNI
* Consult Factory for Alternative Device Options.

Legend: XX...X Customer-specific information

Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
e3 Pb-free JEDEC designator for Matte Tin (Sn)
* This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.

Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.

© 2009 Microchip Technology Inc. DS22005B-page 23

MCP73833/4


      
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DS22005B-page 24 © 2009 Microchip Technology Inc.

 MCP73833/4


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© 2009 Microchip Technology Inc. DS22005B-page 25

MCP73833/4
NOTES:

DS22005B-page 26 © 2009 Microchip Technology Inc.

 MCP73833/4
APPENDIX A: REVISION HISTORY

Revision B (May 2009)

The following is the list of modifications:
1. Added the MCP73833-6SI/MF and
MCP73834-6SI/MF10-lead DFN packages.
2. Updated DFN pinout.
3. Updated Package Outline Drawings.
4. Updated Appendix A Revision History.

Revision A (September 2006)

• Original Release of this Document.

© 2009 Microchip Technology Inc. DS22005B-page 27

MCP73833/4
NOTES:

DS22005B-page 28 © 2009 Microchip Technology Inc.

 MCP73833/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

PART NO. XX X/ XX Examples: * *

a) MCP73833-AMI/UN: 10-lead MSOP pkg.
Device Output Temp. Package
b) MCP73833-BZI/UN: 10-lead MSOP pkg.
Options*
c) MCP73833-CNI/MF: 10-lead DFN pkg.
d) MCP73833-FCI/UN: 10-lead MSOP pkg.
Device: MCP73833: 1A Fully Integrated Charger, e) MCP73833-GPI/UN: 10-lead MSOP pkg.
PG function on pin 7 f) MCP73833-NVI/MF: 10-lead DFN pkg.
MCP73833T: 1A Fully Integrated Charger, g) MCP73833-6SI/MF: 10-lead DFN pkg.
PG function on pin 7
(Tape and Reel)
MCP73834: 1A Fully Integrated Charger, a) MCP73834-CNI/MF: 10-lead DFN pkg.
TE function on pin 7 b) MCP73834-FCI/UN: 10-lead MSOP pkg.
MCP73834T: 1A Fully Integrated Charger,
c) MCP73834-GPI/UN: 10-lead MSOP pkg.
TE function on pin 7
(Tape and Reel) d) MCP73834-NVI/MF: 10-lead DFN pkg.
e) MCP73834-6SI/MF: 10-lead DFN pkg.
Output Options * * * Refer to table below for different operational options.
* * Consult Factory for Alternative Device Options
* * Consult Factory for Alternative Device Options.

Temperature: I = -40°C to +85°C

Package Type: MF = Plastic Dual Flat No Lead (DFN)

(3x3x0.9 mm Body), 10-lead
UN = Plastic Micro Small Outline Package (MSOP),
10-lead

Part Number VREG IPREG/IREG VPTH/VREG ITERM/IREG VRTH/VREG Timer Period

MCP73833-AMI/MF 4.20V 10% 71.5% 7.5% 96.5% 0 hours
MCP73833-BZI/MF 4.20V 100% N/A 7.5% 96.5% 0 hours
MCP73833-CNI/MF 4.20V 10% 71.5% 20% 94% 4 hours
MCP73833-FCI/MF 4.20V 10% 71.5% 7.5% 96.5% 6 hours
MCP73833-GPI/MF 4.20V 100% N/A 7.5% 96.5% 6 hours
MCP73833-NVI/MF 4.35V 10% 71.5% 7.5% 96.5% 6 hours
MCP73833-6SI/MF 4.50V 10% 71.5% 7.5% 96.5% 6 hours

MCP73833-AMI/UN 4.20V 10% 71.5% 7.5% 96.5% 0 hours

MCP73833-FCI/UN 4.20V 10% 71.5% 7.5% 96.5% 6 hours

MCP73834-BZI/MF 4.20V 100% N/A 7.5% 96.5% 0 hours

MCP73834-CNI/MF 4.20V 10% 71.5% 20% 94% 4 hours
MCP73834-FCI/MF 4.20V 10% 71.5% 7.5% 96.5% 6 hours
MCP73834-NVI/MF 4.35V 10% 71.5% 7.5% 96.5% 6 hours
MCP73834-6SI/MF 4.50V 10% 71.5% 7.5% 96.5% 6 hours

MCP73834-FCI/UN 4.20V 10% 71.5% 7.5% 96.5% 6 hours

© 2009 Microchip Technology Inc. DS22005B-page 29

MCP73833/4
NOTES:

DS22005B-page 30 © 2009 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device Trademarks

applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
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FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, rfPIC, SmartShunt and UNI/O are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
FilterLab, Hampshire, Linear Active Thermistor, MXDEV,
MXLAB, SEEVAL, SmartSensor and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, In-Circuit Serial
Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, nanoWatt XLP,
PICkit, PICDEM, PICDEM.net, PICtail, PIC32 logo, PowerCal,
PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select
Mode, Total Endurance, TSHARC, WiperLock and ZENA are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2009, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.

Microchip received ISO/TS-16949:2002 certification for its worldwide

headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.

© 2009 Microchip Technology Inc. DS22005B-page 31


AMERICAS
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DS22005B-page 32
WORLDWIDE SALES AND SERVICE
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China - Xian Thailand - Bangkok
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Fax: 86-29-8833-7256 Fax: 66-2-694-1350
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
03/26/09
© 2009 Microchip Technology Inc.