Digital Measurements

(Ch4 Continue)

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• Digital Voltmeters DVMs
DVMs are essentially analog-to-digital converter
ADC, with digital display

• Digital Frequency Meters

are a digital counter combined with an accurate
timing system, and digital display

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Ramp-Type Digital Voltmeter
• A ramp-type digital voltmeter, shown in the next figure,
essentially consists of:
– Ramp-type analog to digital converter (ADC)
• Ramp generator
• Voltage comparator
• Clock generator
• Gating circuit
– Counting circuit
– Latch circuit
– Digital display
• BCD to seven segment decoder/drivers
• A set of seven-segment numerical displays

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• The voltage comparator is essentially a 1-bit
A/D converter, as the input signal is analog
but the output behaves digitally:
– If the non-inverting input is greater than the
inverting input, the output will be High
– If the non-inverting input is equal to or less than
the inverting input, the output will be Low

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• The ramp- type ADC uses a ramp generator
to produce a time period that is proportional
to the analog input voltage.
• During the time that the input voltage Vi is
above the level of the ramp voltage Vr, the
comparator output is ”High”, and this allows
pulses from the clock generator to pass
through the AND gate to the counting circuit

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• When Vi becomes exactly equal to Vr, the
comparator output switches to “Low” level,
thus stopping further clock pulses from
toggling the counting circuit.
• The time period (t1) when the comparator
output is “High”, is directly proportional to
amplitude of input voltage Vi
• Thus, because the counting circuits are
toggled only during t1, the count is the digital
equivalent of the analog input.
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• The negative going voltage step at the end of the
ramp resets the counter to its zero count, before
another cycle recommences.
• If the counting circuit are simple cascade of flip flops,
the digital output is in binary form, but if a cascade of
decade counters is employed, the output is in Binary-
Coded Decimal (BCD) form.
• The latch circuit isolate the display from the counting
circuit during the time that counting is in progress
• A display enable control, that connects/disconnects
the supply voltage to/from the display devices, is
sometimes used instead of the latch .

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Decade Counter
• The decade counter, shown in the next figure,
consists of 4 Flip-Flops FF0, FF1, FF2, FF3
• The FF terminals are: CLK, CLR, J, K, Q and Q¯
• Four FF in cascade progress through 16 distinct
states from 0 (0000) to 15 (1111)
• A decade (10) counter resets its output to 0
(0000) after the circuit counting 9 (1001) and
before counting 10 (1010)

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Refer to wave forms in the previous figure:
• After 10 clock pulses have been applied to the
circuit, the output will be 10 (1010)
• This count makes FF1 and FF3 outputs (inputs
of NAND gate) to be high (binary 1)
• Thus the NAND gate output will reset all FFs to
0 (0000), and the counting sequence is
repeated.

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Range Changing
• The attenuator functions exactly as explained for
an analog electronic voltmeter.
• An input of 1.999 V or less is applied directly to
the comparator of the DVM circuit, at this time
the rotary switch selects the decimal point after
the first numeral in the display.
• When the voltage range is switched to 19.99 V,
the decimal point after the second numeral is
selected, and so on.
• The next figure shows a switching arrangement
for DVM range selection

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 Many DVMs have automatic ranging circuits (auto-
ranging) which evaluate the input voltage, select the
appropriate range, and illuminate the correct decimal
point.
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Digital Frequency Meter
• A digital frequency meter, shown in the next
figure, essentially consists of:
– Accurate timing source (time base)
– Amplifier/attenuator circuit
– Waveform shaping circuit
– Gating circuit
– Digital counting circuit (register)
– Latch circuit
– Digital display
• BCD to seven segment decoder/drivers
• A set of seven-segment numerical displays

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• The input signal is first amplified or attenuated, as
necessary, and then applied to the wave shaping
circuit, which converts it into a square waveform
with the same frequency.
• The shaped waveform is fed to one input terminal of
a two-input AND gate, the other input is controlled
by the Q output from a flip flop.
• The FF is controlled by the timing circuit, and
changing state on the negative going-edge of the
time base output.

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• When the timing circuit output frequency is 1 Hz,
the FF output will be “High” for a period of 1 sec and
“Low” for 1 sec.
• Thus the counting circuit is toggled by the input
shaped waveform for a period of 1 sec, and the total
count indicates the input frequency directly in hertz
• The counting circuit is reset to zero-count by the
negative going edge of FF output Q¯ before another
cycle recommences.
• As in case of DVM, latch or display enable circuit is
employed to make the digital display readable.

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Range Changing in Frequency
• When a 1s time period is used for counting the input
pulses, the digital display might have a Hz unit
identification alongside it (1999 Hz) .
• Alternatively, the frequency units could be identified as
kHz if a decimal point is included after the first numeral
1.999 kHz
• Now consider the effect of using a 100 ms counting time
instead of a 1s time period, the decimal point must also
be switched, and the display range indicates 19.99 kHz.
• Similarly, if the time base is switched to 10 ms, the
decimal point is moved right once again, so that the
maximum measurable frequency is 199.9 kHz.
• A further switch of the time base to a period of 1 ms gives
a maximum pulse count of 1.999 MHz (1999 kHz) .
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