2013 10th IEEE International Conference on Control and Automation (ICCA)
Hangzhou, China, June 12-14, 2013
Modeling and control of VSC-HVDC supplying passive network
Wei Wang, Xinchun Shi, Jianhui Meng and Tianfu Huang
Abstract—Based on the mathematical model analysis of
VSC-HVDC under abc reference frame and dq reference frame,
the controller of VSC-HVDC system supplying power for
passive networks is designed in this paper. Rectifier controller
adopts double closed-loop structure. The inner-loop adopts
deadbeat control to achieve no-error tracking from the control
variable to the given value. The outer-loop adopts constant DC
voltage controller and constant reactive power controller to
achieve independent control of active power and reactive power.
A set of VSC-HVDC physical experiments platform supplying
power for passive networks is set up to have the experimental
verification. The experimental results indicate that the
controller have good control performance and certain
engineering application value.
I. INTRODUCTION
High voltage direct current (HVDC) transmission based
on voltage source converter (VSC), namely VSC-HVDC
transmission, is new and developing DC transmission based
on VSC, IGBT and PWM technology [1-3], this transmission
has the merits to supply passive network, not only can quickly
transmit active power but also can flexibly compensate
reactive power to grid-connected system. These features
make VSC-HVDC transmission attractive for application
such as the connection of island networks and renewable
sources to a main grid, power trading etc.
A number of potential advantages of the VSC–HVDC are
reported in different works. For example, the VSC–HVDC
can feed power into passive networks with no local power
generation [4], and enables fast control of active and reactive
power independently of each other [5]. This allows reactive
power support to an area, if needed, independently of the
active power transmitted, provided that the rating of the
converter can handle the total apparent power. Moreover,
active power flow can be quickly reversed, which is a
desirable feature since it enables short-term transactions in
electric power markets [6].
The VSC-HVDC is a multi-variable and non-linear
system. Simulation is difficult to give a true reflection of
Wei Wang is with the State Key Laboratory of Alternate Electrical Power
System with Renewable Energy Sources, North China Electric Power
University, Baoding, 071003 P. R. China (e-mail: wangwei_ncepu@ 163.com).
Xinchun Shi is with the State Key Laboratory of Alternate Electrical Power
System with Renewable Energy Sources, North China Electric Power
University, Baoding, 071003 P. R. China (e-mail: sxc2289@sohu.com).
Jianhui Meng is with the State Key Laboratory of Alternate Electrical Power
System with Renewable Energy Sources, North China Electric Power
University, Baoding, 071003 P. R. China (e-mail: mengjianhui2008@
163.com).
Tianfu Huang is with the State Key Laboratory of Alternate Electrical Power
System with Renewable Energy Sources, North China Electric Power
University, Baoding, 071003 P. R. China (e-mail: huangtianfu1988@
163.com).
978-1-4673-4708-2/13/$31.00 ©2013 IEEE
VSC-HVDC actual operating characteristics of the system. It
is necessary to establish the actual physical experiment
platform for experimental study of VSC-HVDC system.
In this paper, an optimal control design for VSC-HVDC
supplying power for passive networks based on the transient
mathematical model for the VSC-HVDC system in
synchronous reference frame is proposed. A new kind of
deadbeat decoupling controller is designed in the
rectifier-side, not only controlling between the active power
and reactive power independently, but also achieving well
dynamic response performance [7-10]. The control algorithm of
deadbeat decoupling is simple and the parameters of the
controller are certain, which greatly simplifies the controller
design. Constant AC voltage controller which is based on the
steady state mathematical model of the converter is used in
the inverter-side. Finally, VSC-HVDC physical experiment
platform powered for passive networks is built to verify
validation of the proposed control strategy.
II. ANALYSIS OF VSC-HVDC TRANSMISSION
The schematic diagram of a typical two terminal
VSC-HVDC transmission is shown in Fig.1. R1, R2 are
equivalent loss resistors of the converter. L1, L2 are the
reactance of the converter. C1, C2 are the DC capacitor. ZL is
the equivalent impedance of the passive networks. Rst is the
start limiting resistor of the rectifier side.
DC transmission line
K1st Rst
uc 2C1 us2
us1R 2C2 uc2
L1 L2 R2
1
1
Udc1 Udc2
K2st i i2
1
2C1 ZL
Filter 2C2
Rectifier Inverter
Fig.1. Schematic diagram of VSC-HVDC system power supply to a passive
network
A. The transient mathematical model of the VSC-HVDC
system
The rectifier-side and the inverter-side in VSC-HVDC
power supply to the passive network have the same topology.
Now set the rectifier-side for example. The topology of
VSC-HVDC one station is shown in Fig.2. The physical
quantities are defined as follows: usa, usb, and usc respectively
stand for the three-phase grid voltage. ia, ib and ic respectively
stand for the three-phase current which flows into the
converter. uca, ucb, and ucc respectively stand for AC-side
voltage of the converter. Udc stands for DC bus voltage. L is
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the commutation reactor inductance. R is the equivalent Q respectively. That is to say, controlling the d-axis current
resistance of the switching loss in the converter. and q-axis current can control the active power and reactive
DC line
power.

B. The rectifier controller design

L ia 2C
usa R
uca
As is shown in Fig. 2, according to Kirchhoff Voltage
usb L R ib Laws of three-phase symmetric system, the circuit voltage
ucb Udc
usc L R ic equation is shown as follows:
ucc
2C  dia dib
usa  usb  L dt  L dt  Ria  Rib  uca  ucb

 dib di
Fig.2. Basic structure of the voltage source converter usb  usc  L  L c  Rib  Ric  ucb  ucc (5)
 dt dt
 dic dia
As is shown in Fig. 2, the equation of the converter usc  usa  L dt  L dt  Ric  Ria  ucc  uca
mathematical model under three-phase stationary coordinate 
system is given in (1): The semiconductor power switch turning on and turning
off are defined as follows: dk=1 corresponds to the up-leg
 dia   R 
 dt    L 0 0  semiconductor power switch turning on and the down-leg
    ia  usa  uca  semiconductor power switch turning off, dk =0 corresponds
 dib    0  R 0  i   1 u  u  (1) to the up-leg semiconductor power switch turning off and the
 dt   L   b  L  sb ca 
down-leg semiconductor power switch turning on (k=a,b,c).
    ic  usc  uca 
 dic   0 0  R  So the circuit voltage equation can be expressed as
 dt   L  follows:
According to Park transform, the equation (1) can be  dia dib
represented by following function: usa  usb  L dt  L dt  Ria  Rib  (d aU dc -d bU dc )

 dib di
 did  usb  usc  L  L c  Rib  Ric  (d bU dc -d cU dc ) (6)
 dt  1   R   L  id  1 usd  1 ucd   dt dt
         (2)  dic dia
 diq  L  L  R  iq  L usq  L ucd  usc  usa  L dt  L dt  Ric  Ria  (d cU dc -d aU dc )
 dt  
Set a control period as T, discretize the circuit voltage
usd, usq are the d-axis and q-axis component of the grid equation, in the meantime, and respectively set three-phase
voltage in (2). ucd, ucq are the d-axis and q-axis component of switch duty cycle as △ da, △ db and △ dc. Suppose that control
AC-side voltage of the converter. id, iq are the d-axis and period is far less than fundamental period of grid, the change
q-axis component of grid current.  is the angular frequency of three-phase grid voltage and DC bus voltage can be
of the grid. ignored. So the circuit voltage equation in a control period
According to the theory of instantaneous power, the active can be rewritten as equation (7):
power P and reactive power Q of three-phase grid-connected
converter in the dq synchronous rotating reference frame can  ia  k  1  ia  k  i  k  1  ib  k 
be expressed as follows: usa (k )  usb (k )  L L b
 T T
 3   Ria  k   Rib  k   (d a  k U dc  k 
 P  2 (usd id  usq iq ) 
 (3)   db  k U dc  k )
Q  3 (u i  u i ) 
 2
sq d sd q u (k )  u (k )  L ib  k  1  ib  k   L ic  k  1  ic  k 
 sb sc
T T

b  c   b   dc  k 
If d-axis is positioned as grid voltage synthesized vector,   Ri k  Ri k  ( d k U (7)
namely usq=0, so (3) can be expressed as follows: 
  d c  k U dc  k )
 3  i  k  1  ic  k  i  k  1  ia  k 
 P  2 ed id usc (k )  usa (k )  L c L a
 (4)  T T
Q   3 e i   Ric  k   Ria  k   (d c  k U dc  k 
 2
d q

  d a  k U dc  k )
According to (4), the d-axis current and q-axis current is 
linear proportional to the active power P and reactive power 

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 Assuming that they are in one sampling period, and d c  k   [1.5U dc  k   (usa (k )  usb (k )
achieving tracking with no-error between the control variable
to the given value, the effect of deadbeat control can be ia   k   ia  k  ib   k   ib  k 
L L
reached: T T
 Ria  k   Rib  k )  2(usb (k )  usc (k ) (13)
ia (k  1)  ia (k )
  ib   k   ib  k  ic   k   ic  k 
ib (k  1)  ib (k ) (8) L L
 
T T
ic (k  1)  ic (k )  Rib  k   Ric  k )] / 3U dc  k 
Combined (7), (8), it can be expressed as follows: The duty cycle da (k ) , db (k ) and dc (k ) can be
obtained by (11),(12) and (13) to control switch devices of the
 ia   k   ia  k  i   k   ib  k  converter. Then the needed output waveforms can be
usa (k )  usb (k )  L L b
obtained by realizing deadbeat control.
 T T
  Ria  k   Rib  k   (d a  k U dc  k  In order to ensure the normal work, one side of

  db  k U dc  k ) VSC-HVDC system must be used constant DC voltage
 control so that maintaining the stability of the DC voltage. In
 u (k )  u (k )  L ib   k   ib  k   L ic   k   ic  k  the VSC-HVDC system supply power to passive network, the
 sb sc
T T rectifier side must be given DC voltage control to balance the

  Rib  k   Ric  k   (db  k U dc  k  (9) active power of the system and maintain the stable of DC
 voltage. When the active power fluctuates, the fluctuation of
  d c  k U dc  k )
the DC voltage will be produced. At the same time, according
 i   k   ic  k  i   k   ia  k  to the equation (4) which shows that active current and active
usc (k )  usa (k )  L c L a
 T T power keep a linear relationship, the DC voltage can be
 controlled by changing the active current. It is shown that
 Ric  k   Ria  k   (d c  k U dc  k 
 reactive current and power also keep a linear relationship, so
  d a  k U dc  k ) the reactive power of the converter can be controlled by
 controlling the reactive current.

The above three voltage equations can be only equivalent Fig. 3(a) shows that constant DC voltage control is used
to two independent equations. Because the on-time of upper in the rectifier side. After setting the deviation between the
and lower bridge arm is peer to peer in a control period, the DC voltage and the DC voltage reference value, PI regulator
total on-time of upper bridge arm of three switch devices are obtains active current reference value id*.
equal to the one of lower bridge arm of three switch devices in
Fig. 3(b) shows that constant reactive power control is
a control period. Namely, we can get the following equation:
used in the rectifier side. After setting the deviation between
da  db  dc  1.5 (10) the reference value of the reactive power and reactive power,
PI regulator gets the reactive current reference value iq*.
Combined (9), (10), we can get the duty cycle of PWM
signal of the three-phase converter: idmax
Udcref
PI id*
d a  k   [1.5U dc  k   2(usa (k )  usb (k )
Udc id min
ia   k   ia  k  ib   k   ib  k 
L L (a) Constant DC voltage controller
T T iqmax
 Ria  k   Rib  k )  (usb (k )  usc (k ) (11) Qref
PI i*q
ib   k   ib  k  ic   k   ic  k 
L L Q iqmin
T T
(b) Reactive power controller
 Rib  k   Ric  k )] / 3U dc  k 
Fig.3. Outer loop controller
db  k   [1.5U dc  k   (usa (k )  usb (k )
ia   k   ia  k  ib   k   ib  k  In conclusion, block diagram of the rectifier side’s outer
L L loop controller is shown in Fig. 3.
T T
 Ria  k   Rib  k )  (usb (k )  usc (k ) (12)
ib   k   ib  k  ic   k   ic  k 
L L
T T
 Rib  k   Ric  k )] / 3U dc  k 

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 III. EXPERIMENT
U dc U dc (k )
In order to verify the correction of the control strategy of
Udcref id  ia  (k ) d a (k )
dq VSC-HVDC power supply towards the passive network, a
Outer loop
ib (k ) Deadbeat db (k ) physical experimental platform is built. The main parameters
control PWM
Qref
controller
iq  ic (k ) d c (k ) of the experimental system are: the DC voltage is 100V, the
abc
value of the line to line voltage at the rectifier side is 80V,
iabc (k ) the value of the line to line voltage at the passive side is
PLL 80V.Grid fundamental frequency is 50Hz.The transformer is
the kind of 220V/380V step-up isolated transformer, the
usabc (k )
inductance is 1.1mH, and the DC capacitor is 3300μF. The
IGBT switching frequency is 6kHz, the dead-time is 2µs.
Master control unit of converter comes from TI company’s
Fig.4. Block diagram of rectifier side control TMS320F28335, and its CPU clock frequency is 150MHz.
This chop is a kind of floating-point chip, compared with
In Fig. 4, current inner loop controller and outer loop previous fixed-point DSP. The chip has characteristics of low
controller are used in the rectifier controller. The deadbeat cost, high accuracy and low power consumption. In addition,
current inner loop controller achieves rapid, accurate its A/D conversion is more accurate and faster and so on.
tracking of the current reference value obtained by the outer
loop controller. The outer-loop power controller implements A. Directive changes in AC voltage at the passive side
constant DC voltage control and constant reactive power
control. As is shown in Fig.6, the AC voltage command at the
passive side is changed from 0V to 80V at a certain time. As
C. The design of inverter controller is seen in Fig.6, when the AC voltage directive mutation in
the passive side, the AC voltage of the passive side smooth
In VSC-HVDC system supply power to passive network, upper to the given value quickly, and stabilize at the given
the inverter side is connected to passive network. So AC value. DC voltage fluctuations and stabilizes fast with small
voltage control is used in the inverter side. And it is AC scale.
voltage control to ensure the stabilization of output AC
voltage. In order to simplify the controller design, stable
usa1(29V/div)

isa1(2.4A/div)
mathematical model under synchronous rotating coordinate
system is taken in AC voltage controller. The inverter side
variable reference’s direction is provided by symmetrical of
the direction shown in Fig.2. Combined (2), the inverter side
t(100ms/div) t(100ms/div)
steady-state mathematical model is:
(a) (b)
ucd  Rid   Liq  usd
usa2(29V/div)

isa2(2.4A/div)
 (14)
ucq  Rid   Liq  u sq
If d-axis is positioned as inverter side of grid voltage
synthesized vector Us2, namely usd= Us2, usq=0. So (14) can be t(100ms/div) t(100ms/div)
expressed as follows: (c) (d)
udc(50V/div)

ucd  Rid   Liq  U s 2

 (15)
ucq  Rid   Liq
By (15), as is shown in Fig. 5, AC voltage controller can t(250ms/div)
be obtained in the inverter side with the introduction of the PI (e)
regulator.
Fig.6. Experimental waveform for voltage reference change at the passive side
U s*2 PI

U s2 ucd
R B. The load change at the passive side
id L As is shown in Fig.7, the load of the passive side doubles
at a certain time. It can be seen from Fig.7, the sudden
iq L increase of the load doubles in the passive side, and the AC
ucq
R voltage of the passive side changes little. However, the AC
current of the passive side rises and keeps stabilization
*
usq 0 PI rapidly, and the DC voltage downward fluctuating, which
usq also reflects the process of the load input.
Fig.5. Constant AC voltage controller

216
 strategies which are the deadbeat control, constant DC

isa1(4.8A/div)
usa1(29V/div)
voltage control and constant AC voltage control. The
experimental results are shown as follows.
The design of deadbeat control can achieve tracking
t(100ms/div) t(100ms/div) current fast and accurately, resulting excellent dynamic
(a) (b) characteristics and steady-state characteristics. The
controller of the rectifier can achieve controlling active and
usa2(29V/div)

isa2(4.8A/div)
reactive power independently. The change of the reactive
power impacting on the DC voltage is very small, and it is no
effection on the passive side. Moreover the AC voltage
controller in the inverter side has good voltage control
t(100ms/div) t(100ms/div) performance.
(c) (d)
In a word, the optimal controller designed to supply
udc(50V/div)

passive network VSC-HVDC system has certain values

towards engineering applications.

t(250ms/div) REFERENCES
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usa1(29V/div)

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udc(50V/div)

t(100ms/div)
(e)

Fig.8. Experimental waveform for reactive power reference change at the

rectifier side

IV. CONCLUSION
This paper presents mathematical modeling procedure of
rectifier side and inverter side, and proposes different control

217