Memory Banking in Intel 8086

Manav Gupta

SID:17103037
Computer Science and Engineering
Punjab Engineering College, Chandigarh

April 23, 2019

 Abstract

8086 was the first 16 bit microprocessor developed by Intel in 1976. It was the micro-
processor which was used in IBM PC. My presentation is focusses on concept memory
banking which was introduced in 8086.
Contents

1 Understanding Memory Banking 2

1.1 Big Endian Rule . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2 The Problem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.3 An Obvious Thought . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.4 Proposed Solution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.5 Aligned and Misaligned Data . . . . . . . . . . . . . . . . . . . . . . . . 4
1.6 BHE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.7 Working of BHE and A0 . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Bibliography 7

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Chapter 1

Understanding Memory Banking

[Thakur, 2015, p. 2] 8086 was the first 16 bit microprocessor developed by Intel. It was
designed in between 1976 and 1978. It has a 16 bit data bus and a 20 bit address bus which
means it can transfer 16 bits of data at a time. Because of its 20 bit address bus it can
point to 2 raised to power 20 memory locations. 2 raised to power 20 memory locations
constitute to the 1 MB memory of 8086. Each memory location is of 8 bits.

1.1 Big Endian Rule

Big Endian is the rule used to specify the order in which bytes of data get stored in the
memory. According to this rule whenever data needs to be written to the memory the
lower byte of data is stored at lower address and higher byte of data is stored at higher
address. For example consider the case of storing the data 1234H in the memory. 1234H
is 16 bit data so 12 forms the higher byte and 34 becoms the lower byte in 1234H. Now
according to Big Endian rule when we store 1234H in contigous memory location starting
from say, 00000H then 34 will occupy the 00000H location in memory and 12 will occupy
00001H location in memory.

1.2 The Problem

[Morse, 2017, p. 2][Lotanker, p.2] Before studying about concept of Memory Banking in
8086 we need to understand the problem to which memory banking is the solution. 8086
is a 16 bit microprocessor which means it has data bus of size 16 bits. This means 8086
can transfer 16 bits of data in one cycle. At the same time each memory location is of 8
bits which means each memory location can hold upto 8 bits of data. The address bus of
the microprocessor can point to single address in one cycle of fetch and decode instruction.
That creates a problem because during one cycle 8086 can transfer 16 bits of data but
address bus can’t point to two memory locations for doing this. So a lot of computational

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power of microprocessor could get wasted if 8086 just transfers 8 bits of data in every cycle
instead of 16 bits.

1.3 An Obvious Thought

[Morse, 2017, p. 2][Singh, p.2] After analyzing the problem faced in case of Intel 8086,
the obvious thing which comes to everyone’s mind is to increase the size of each memory
location and make it equal to the size of data bus of the microprocessor. But it can’t be done
because in increasing the size of every location of microprocessor’s memory we would not
only give a facility to transfer more bits of data at a time but rather make it compulsory
to transfer that much data. This means that even if the data to be stored is of 8 bits only,
a memory of 16 or 32 bits would be allocated to store the data. It would result in sheer
wastage of memory.
This could be understood by taking the example of country’s currency denomination.
Everyone wants the denomination of the currency to be as small as possible so that it could
be put to maximum use. Larger denominations tend to rise the minimum price of the
commodity. So keeping in view the the above said example its better to resort to smaller
memory location rather than bigger location to avoid wastage.

1.4 Proposed Solution

Keeping in view the above said discussion, Intel engineers reached the concept of Memory
Banking to avoid the wastage of the memory in 8086. In this approach the 1 MB memory
of microprocessor is split up into two equal parts of memory which are 512 KB each. Each
seperate part of memory can be used independently in this case of splitting. So by this
approach we are giving the microprocessor a facility of accessing two memory locations
that is it can access 16 bits of data and at the same time , not making it compulsory to
transfer 16 bits of data as both these split up parts of the memory can be used independently.

How to Split Up the Memory ?

The main goal for the concept of Memory Banking was to access two consecutive memory
locations in one cycle of instruction decoding of microprocessor. In order to achieve this
the only splitting algorithm that can be followed while splitting of the memory is to divide
the memory in odd and even banks. All the odd memory location would be part of odd
bank and all the even memory locations would be part of even bank.
This could be understood by the example of pages in a book. When we open a book at
any page number, we would be having the book split up into two banks that is odd bank

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and even bank. On one side are all the odd numbered pages of the book and on other side
are the even numbered pages.

1.5 Aligned and Misaligned Data

Here comes two important terms that we need to discuss. Alligned Data refers to the data
stored in corrospondingly same location in both the chips of the ripped memory. Whereas
misalligned data refers to the data stored in corrospondingly different locations in both
chips of the ripped memory yet forms consecutive memory location.
In the figure below the 00001 and 00000 form alligned data as both of these are the
first locations of odd bank and even bank respectively wheras 00001 and 00002 form mis-
alligned data as the former one forms the first location of odd bank and later one forms 2nd
location of even bank yet are consecutive.

Figure 1.1: Aligned and Misaligned Data

Why misalligned data can’t be accessed in one cycle?

With the concept of alligned and misalligned data clear, we come to the fact that only
aligned data can be accessed by the microprocessor in one cycle. If we focus on the bit
representation of the memory addresses, we come to the conclusion that binary pattern of
aligned data is almost same. It differes only in the Least Significant Bit which is known as
LSB. While selecting the two different memory locations, the microprocessor just ignores
the LSB of addresses and makes the selection only on basis of bits A1 - A19. This is not
the case with misaligned data as binary pattern of misaligned memory locations is not at
all similar. This makes it impossible for the microprocessor to access misaligned memory
locations in one cycle.

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 Figure 1.2: Bit Representation of first 8 memory locations

A0 bit only selects the chip from which the memory location is to be accessed. It has
no role in selecting the memory location once the microprocessor knows which bank to
select, either odd bank or the even bank. The bits A1-A19 actually make the selection
of the memory location inside the desired chip. So it is not at all possible to access the
misaligned memory locations as the chip lines which go to both the chips (A1 - A19) are
the same and misaligned data requires different set of chip lines to get accessed.

1.6 BHE
BHE stands for Bus High Enable. It is available at the 34th location in the pin description
of 8086. Its is used to indicate the transfer of data using data bus D8 - D15 . This signal is
low during the first clock cycle, thereafter it is active. It is used to access the odd bank of
memory which is also known as higher bank of memory.

Figure 1.3: Memory Banking in 8086

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1.7 Working of BHE and A0
The chip signals BHE and A0 are used to decribe the state of the microprocessor whether
microprocessor wants to access odd bank, even bank or both these banks of memory.
Whenever both of the BHE and A0 are 0, processor can read/write 16 bits of data from
both chips.
Whenever BHe is 0 and A0 is 1, processor can read/write 8 bits of data from odd bank
(higher bank).
Whenever BHe is 1 and A0 is 0, processor can read/write 8 bits of data from even bank
(lower bank).
Whenever both of the BHE and A0 are 1, processor is said to be idle state that is it
is not performing any memory operation rather it could be busy doing some arithmetic or
logical operations but from view of memory, it is idle.

Figure 1.4: Working of BHE and A0

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Bibliography

Sonali Lotanker. Computer organisation and memory banking. Computer Science. URL
https://www.geeksforgeeks.org/computer-organization-memory-banking/.

Stephen P. Morse. The intel 8086 chip and the future of microprocessor. Micropro-
cessors, 2017. URL https://www.computer.org/csdl/magazine/co/2017/04/
mco2017040008/13rRUwfqpJW.

Devinder Singh. How are even and odd addressed bytes accessed in 8086 mem-
ory address space? Computer Science. URL https://www.quora.com/
How-are-even-and-odd-addressed-bytes-accessed-in-8086-memory-address-space.

Sumit Thakur. 8086 microprocessors seminar ppt with pdf re-

port. Computer Science, 2015. URL https://studymafia.org/
8086-microprocessors-seminar-ppt-with-pdf-report/.