1628
6, NOVEMBER 2006
A Line-Interactive Single-Phase to
Three-Phase Converter System
Ricardo Quadros Machado, Simone Buso, Member, IEEE, and José Antenor Pomilio, Senior Member, IEEE
Abstract—This paper describes a line-interactive single-phase to
three-phase converter. A typical application is in rural areas sup-
plied by a single-wire with earth return system. The traditional ob-
jective of feeding a three-phase induction motor is not anymore
the main concern for such conversion. Due to the evolution of the
farm technology, some of the local loads (as electronic power con-
verters, computers, communication equipments, etc) require high
power quality that is intended as sinusoidal, symmetrical, and bal-
anced three-phase voltage. Additionally, to maximize the power
from the feeder, the system provides a unity power factor to the
grid. A three-phase voltage source inverter–pulsewidth modulation
converter is used for this purpose. The power converter processes
a fraction of the load power and the energy necessary to regulate
the dc link voltage. As it does not need to supply active power, it
is not necessary to have a source at the dc side. However, if island
mode operation is needed, a dc source must be available at the dc
link to supply the load. The control strategy, design criteria, and
experimental results are presented.
Index Terms—Digital control, pulsewidth modulation (PWM)
inverter, single-phase to three-phase conversion, uninterrupted
power supplies (UPS).
I. INTRODUCTION
VEN if the distribution of electric power is typically three-
E phase, in some situations the consumer can have access
only to a single-phase grid. This happens in residential, light in-
dustrial, and rural areas. Sometimes, a specific appliance needs
three-phase power, requiring some kind of power conversion
[1]. In rural areas, the use of a single wire feeder with earth
return is common. The power quality is normally very poor in
terms of voltage regulation and distortion.
In a typical situation, the load is a three-phase induction motor
and the conversion is made using some kind of pulsewidth mod-
ulation (PWM) converter [2]–[8]. For such an application, it is
not important to filter out the switching high-frequency com-
ponents produced by the converter, because the load naturally
acts as a low-pass filter. In the conventional conversion system,
the load power is processed twice: by a single-phase rectifier
and a three-phase inverter. The topologies presented in [2]–[8]
also have a rectifier followed by an inverter, but they incorporate
Manuscript received September 9, 2004; revised October 17, 2005. The paper
was presented at the Power Electronics Specialists Conference (PESC), Aachen,
Germany, June 2004. This work was supported by CAPES and FAPESP Projects
BEX0277/02-9 and 00/11038-9. Recommended by Associate Editor A. von
Jouanne.
R. Q. Machado and J. A. Pomilio are with the School of Electrical and Com-
puter Engineering, State University of Campinas, Campinas 13081-970, Brazil
(e-mail: ricardom@dsce.fee.unicamp.br; ricardombr2002@yahoo.it).
S. Buso is with the Department of Information Engineering, University of
Padova, Padova 35131, Italy (e-mail: simone.buso@dei.unipd.it).
Digital Object Identifier 10.1109/TPEL.2006.882963
0885-8993/$20.00 © 2006 IEEE
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 21, NO.
some upgrades to improve performance aspects such as: mini-
mization of the number of power switches; cost reduction; im-
provement of the power factor to the single-phase feeder; guar-
antee of good voltage quality to the load; etc.
Besides the motors, even in rural applications, there is an
increase in the use of electric and electronic loads that are sen-
sitive to the power quality as, for example, power electronics
converters, computers, etc. Some of these are nonlinear, single-
phase loads with low power factor. The single-phase feeder
could directly feed these loads. However, considering the power
limitation of the feeder, it is interesting to maximize the active
power availability, which can be achieved with a unity power
factor. This improvement could be done using some kind of
power factor corrector or active power filter.
This paper presents a single-phase to three-phase conversion
system that improves the local power quality for linear and non-
linear loads, and guarantees unity power factor at the single-
phase feeder. The system is shown in Fig. 1. The single-phase
feeder is connected to the local three-phase bus through an
inductor. A three-phase static power converter (SPC) is con-
nected to the bus through a low-pass filter . The
inverter controls the local power quality, producing three-phase
balanced, symmetrical and sinusoidal voltages. It also controls
the single-phase power flow, by adjusting the local voltage am-
plitude and phase angle. Harmonic currents of the load flow lo-
cally, so that the resulting feeder current is sinusoidal, except for
the harmonic components already present in the single-phase
voltage. In this sense, the converter also works as an active filter
for the current harmonics and as a reactive power compensator
[9]. Additionally, part of the load power is not processed by the
converter, and flows directly from the grid, which can improve
the overall efficiency.
As this SPC does not deliver active power to the load in other
words, it only processes a fraction of the load power and the
energy necessary to regulate the dc link, a dc power source is
not necessary. However, the system could operate also as an
uninterrupted power supply (UPS) if a dc source is available on
the dc side, since then the islanding situation can be adequately
managed. After grid failure, the solid state relay must be opened
and fixed voltage amplitude must be produced by the SPC [10].
II. BASIC SYSTEM OPERATION
As explained before, one of the control strategy goals is to
produce a grid current that results in unity power factor. As the
voltage at the single-phase feeder can vary, both amplitude and
phase of the ac three-phase bus voltage must be adjusted, as
shown in Fig. 2. The limits for the amplitude variation, which
MACHADO et al.: LINE-INTERACTIVE SINGLE-PHASE TO THREE-PHASE CONVERTER SYSTEM 1629

The operation point is calculated considering the active

load power ( , average power) and the actual source voltage
( , RMS value), as indicated by

(1)

(2)

III. CONTROL STRATEGY

To guarantee the inverter voltage quality, closed loop con-
trols of the output current and voltage have been implemented
(Fig. 3). The proportional-integral controller (PI) was chosen
as the control technique. The current and voltage controls are
implemented in the reference. The and gains rep-
resent output to input scale factors while the feedforward gains
and are always lower than 1. The SVM block is the gain
between space-vector routine and the output voltage applied by
the inverter, always in .

A. AC Current Control
Table II presents the design parameters for the PI current
controller shown in the block diagram of Fig. 3. Open loop
gain , closed loop cut-off angular frequency and
phase margin define the proportional and integral con-
stants ( and ) according to the following equations:

(3)

(4)

Fig. 1. Single-phase to three-phase conversion system. An internal current loop employs another PI controller to reduce
the converter output impedance and guarantees a good dynamic
performance to the system. The closed loop cut-off frequency
of the current PI was chosen one decade below the sam-
pling frequency so that the current PI still has a good compen-
sation capability in the frequency range of interest. To improve
this capability, a feedforward of the reference voltage could be
used to compensate the residual error in the closed loop gain at
low frequencies [12], [13].
Fig. 2. Phasorial diagram.
B. AC Voltage Control
Table III presents the design parameters for the PI voltage
TABLE I
THREE-PHASE BUS VOLTAGE RANGE controller. The open loop gain , closed loop cut-off an-
gular frequency and phase margin define the
proportional and integral constants (5) and

(5)

(6)

Due the digital implementation and to the need for a reduced

switching and sampling frequency (as required by the converter
are within an acceptable range, are shown in Table I [11]. The re- power rating) the voltage controller exhibits a low regulation
actor that connects the grid with the three-phase bus is designed bandwidth (a few hundred Hertz). To cope with that and pro-
considering the feeder power rating [12]. vide good control of the output voltage fundamental harmonic
1630 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 21, NO. 6, NOVEMBER 2006

Fig. 3. Inverter output voltage control system.

TABLE II
CURRENT LOOP CONTROL PARAMETERS

TABLE III
VOLTAGE LOOP CONTROL PARAMETERS

Fig. 4. DC voltage correction.

component a tuned resonant filter and a feedforward of the ca- from the phasor diagram of Fig. 2, it is possible to obtain the
pacitive current are put in parallel to the conventional voltage power flow at the single-phase feeder, when unity power factor
regulator, so as to boost the loop gain at the fundamental fre- is assumed. This is given by
quency [12], [13].
(8)
C. DC Link Voltage Control
According to (9), the dc link power flow is
When an ac power disturbance is detected, due to a load vari-
(9)
ation or to a grid voltage fluctuation, the control system reacts
adjusting the voltage in order to alter the power flow at the As the dc link voltage should be almost constant, a relatively
single-phase feeder. During such transient, the power unbalance large dc link capacitor was used (4700 F). In other words, we
flows through the inverter, changing the dc link voltage. After can assume that variations only take place in the dc link current,
the transient, whose power demand is supplied by the inverter, according to
the load power is supposed to be constant.
The strategy adopted to regulate the dc link voltage is to ex- (10)
change the necessary power with the single-phase feeder. In
order to maintain the ac bus voltage amplitude constant, this The variation of can then be expressed as in (11).
control circuit adjusts only the angle, based on the dc link Assuming small values (11) can be linearized as in (12) as
voltage error, as illustrated in Fig. 4. follows:
Considering the power balance condition
(11)

(12)
(7)
MACHADO et al.: LINE-INTERACTIVE SINGLE-PHASE TO THREE-PHASE CONVERTER SYSTEM 1631

Fig. 5. DC link control.

TABLE IV
DC VOLTAGE CONTROL PARAMETERS

Fig. 6. SPC voltage and  angle versus source voltage (nominal power).

Neglecting load power variations (considered as a distur-

bance input), (7) results in the following control law:

(13)

Substituting (10) and (12) into (13), the relation between a

small angle variation and the dc link current variation can be
found

(14)

Based on this analysis, it is possible to derive the block dia-

gram of Fig. 5, which represents a linear approximation of the
system, and allows the design of the dc link PI controller.
Similarly to the current and voltage control, Table IV defines
the parameters for the PI dc link controller. The open loop gain
(15), closed loop cut-off angular frequency
and phase margin define the proportional (16) and in-
tegral (17) constants and
(15)
(16)
(17)
D. Limits of the Line-Interactive Converter
Fig. 6 shows the variation of the inverter voltage (that is the
local load voltage) and angle for different source voltage
(see Table I, worst case), and for nominal power. If the inverter
voltage cannot be varied due to its limitations 5% 10% ,
the control strategy does not maintain unity power factor, as
can be seen in Fig. 7.
The range in which the system maintains unity power factor
varies according to the load demand because, as the current re-
duces, the voltage on the inductor, the angle and the difference
between inverter and source voltage decrease as well. Anyway,
for reduced demand, the resulting power factor is high for a wide
source voltage range.
Fig. 7. Power factor versus source voltage (nominal power).
E. Design Technique That Maps the Power Flow
If the proposed system is conceived to operate also as an UPS,
the consequence is that the inverter must be designed to process
the whole load power In this case; the inverter dimensioning is
the same as for the double-conversion topology. This consider-
ation includes the inverter output filter components and the dc
bus capacitor. However, other system components present dif-
ferences, as Table V indicates.
For a comparison of the physical dimension of the source
inductor, we consider the cross-section-window-area product,
which is given by:
(18)
where is the maximum flux density, is the desired cur-
rent density and is the window filling coefficient.
From these results one can conclude that the drawback for
eliminating the input rectifier is to use a higher and bigger in-
ductance. The inductor volume (supposing equal and squared
window and core sections) is about twice the one for the double
conversion with PFC alternative.
1632
TABLE V
L DIMENSION
F. Comparative Efficiency Between of the Line-Interactive
and Double Conversion UPS
The efficiency of the solution discussed in this paper can be
compared to that of the conventional three-phase rectifier-in-
verter arrangement (double-conversion system).
It is important to underline that the percentage of load power
flowing through the inverter stage of the proposed solution is
always lower than unity, depending on the load configuration.
Because of that, even if we neglect the losses that, in a con-
ventional double conversion solution, take place in the rectifier
stage, the proposed solution offers an efficiency improvement.
To quantify that, it is possible to define a relationship between
double-conversion and line-interactive efficiencies
(19)
(20)
Now, if we assume the inverter stage has a given efficiency
, assumed to be constant for the two solutions, we can
say that
(21)
where represents the power lost in the inverter stage,
is the input power (assumed to be the same in both cases)
and “ ” is the percentage of input power that flows through the
three-phase inverter in the line-interactive solution (depending
on the load arrangement). Equation (21) basically says that the
power lost in the inverter stage is directly related to the power
flowing through it, being the inherent inverter efficiency the
same. This is a worst case assumption because, often, the con-
verter processing lower power will have a higher efficiency.
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 21, NO. 6, NOVEMBER 2006
Fig. 8. Efficiency gain as a function of x and  .
Fig. 9. (a) Flow-chart of the control strategy part I.
Nevertheless, substituting (21) into (19) and (20), we can de-
rive the “efficiency gain” as follows:
efficiency gain (22)
Fig. 8 represents the efficiency gain between the single-phase
line-interactive UPS and a double-conversion system. As can
be seen, in all cases when the inverter of the line interactive so-
lution processes a fraction of the input power, there is an effi-
ciency improvement, which can be particularly significant if the
adopted inverter happens to have a relatively low inherent effi-
ciency .
IV. CONTROL PROGRAM DESCRIPTION
The 16-b fixed-point DSP-based controller ADMC 401 has
been used for implementing the control strategy. Space-vector
modulation was used to command the inverter switches at
12 kHz. The sampling frequency is also 12 kHz, which means
that we have 200 samples for each period of 60 Hz.
According to Fig. 9, that reports a flow chart of the control al-
gorithms, in the occurrence of an interrupt (PWMSYNC_INT),
the input variables are read.
Then, the control algorithm computes the voltage reference
for the SPC. This is done using the built-in sine function of
the DSP. The instantaneous angle of the sine function is equal
to the single-phase feeder instantaneous angle that is provided
by the synchronization algorithm explained in the following,
MACHADO et al.: LINE-INTERACTIVE SINGLE-PHASE TO THREE-PHASE CONVERTER SYSTEM
Fig. 9. (b) Flow-chart of the control strategy part II
summed to a suitable correction angle. The correction angle has
two components: the steady state component, , is given by (3)
the other, , is given by the PI control of the inverter dc link
voltage [12].
angle depends of the quadratic RMS computation,
the average power in the load, and the knowledge of the series
reactance value. The component is used to adjust the power
flow, so as to keep the dc link voltage to the desired level. The
1633
Fig. 9. (c) Flow-chart of the control strategy part III.
reference computation is completed by determining the proper
amplitude value that is given by (2).
AC voltage and current controllers guarantee a low error be-
tween references and the output variables at the SPC terminals.
Sequentially, there are the PWM update and the return to the
main program.
ETU interrupt service routine (ETU_ISR) calculates the PLL
based synchronization algorithm that, thanks to a PI controller,
guarantees the synchronism between the internal reference and
the single-phase input voltage. At the end of this routine, the
switching (and sampling) period update is operated. This in-
terrupt routine is started in the event of zero crossing of the
single-phase voltage or at the end of sinusoidal reference pe-
riod. The PLL PI controller block diagram, whose detailed de-
scription is given in [14], is shown in Fig. 6, within the interrupt
service routine flowchart.
Port 1 interrupt service routine (PIO1_ISR), whose flowchart
is also shown in Fig. 6, monitors the grid failure. To detect grid
failures a band pass filter is used to amplify the switching ripple
at the single-phase feeder input. In normal conditions this is very
small, because the coupling inductance is much higher than the
source output impedance. When the grid fails, the ripple is no
longer negligible. The increase in the measured ripple ampli-
tude, following any grid failure, triggers interrupt PIO1_ISR.
To prevent PIO1_ISR unwanted triggering, an analog band pass
filter with a relatively low pass frequency (12 kHz) was imple-
mented. When the PIO1_ISR routine is entered, a flag is set
(PIO1_active) so that the PWMSYNC_ISR routine takes a dif-
ferent path and generates a constant amplitude voltage
. While the algorithm is operating in the grid failure
mode the ETU_ISR is disabled, since synchronization is no
longer required.
When the grid voltage is restored, the Port 2 interrupt ser-
vice routine (PIO2_ISR) restarts the ETU_ISR, to obtain the
synchronization, and reconfigures the system. After a suitable
delay, that allows proper synchronization with the input voltage,
the solid state relay is closed. Indeed, both routines introduce a
1 s delay (Count1 and Count2 shown in Fig. 6) also to prevent
repetitive entering of the island mode of operation in the pres-
ence of transient input voltage perturbations.
1634
Fig. 10. From top to bottom: single-phase current (10 A/div), ac bus voltage
(500 V/div.), dc link voltage (200 V/div) and motor current (5 A/div). Hori-
zontal: 50 ms/div.
Fig. 11. Steady-state single-phase feeder voltage (100 V/div) and current
(10 A/div). Horizontal: 10 ms/div.
V. EXPERIMENTAL RESULTS
A 3-kW experimental setup was built to verify the system op-
eration. Several test conditions were taken into account, among
these: motor start up, nonlinear load and grid failure.
A. Motor Start-Up
Fig. 10 shows a three-phase induction motor startup. The ad-
ditional power necessary during the acceleration is partially pro-
vided by the inverter dc bus capacitor, while the control circuit
changes the angle in order to absorb power from the grid. The
three-phase bus voltage remains almost constant due to good
decoupling control between ac and dc voltage controls. The dc
voltage sag does not reflect in the ac voltage, but produces an
oscillation in single-phase current through angle adjustments.
In Fig. 11, the displacement between and is less
than 2 . The source voltage THD is 1%.
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 21, NO. 6, NOVEMBER 2006
Fig. 12. From top to bottom: load current (10 A/div), ac bus voltage (90 V/div),
single-phase current (10 A/div) and ac bus voltage (250 V/div). Horizontal:
10 ms/div.
TABLE VI
STEADY-STATE POWER MEASUREMENTS
B. Nonlinear Load Analysis
A 2000-W nonlinear load (three-phase rectifier with resis-
tive 1 mF capacitive load) was connected to the ac bus. From
Fig. 12, it is possible to verify the harmonic compensation pro-
vided by the system. The grid current has a very low distortion
(6.8%), compared with the 60% THD of the load current. The
resulting ac bus voltage THD is 3.2%. Note that a selective filter
has been implemented to boost the voltage loop gain for the fun-
damental and fifth harmonic.
C. Power Flow Through the SPC
A 1500-W three-phase resistive load was connected at the ac
bus. The total power comes from the single-phase feeder but
only one-third of it is processed by the inverter in order to feed
the load connected to phase as shown in Table VI, that reports
the result of steady-state power measurements.
Figs. 13 and 14 represent a comparative dynamic response to
experimentally verify the control algorithm presented in Fig. 5.
Both tests take into account a 500-W single-phase resistive load
step, imposed at the ac bus. As can be seen, the system behaves
as expected, according to the design procedure. The simulated
and measured response times are very close (200 ms) and so is
the resulting dc link voltage sag (17–18 V).
D. Grid Failure (Island Mode)
A 1000-W three-phase resistive load was connected at the
ac bus. When an island situation is detected, an interrupt rou-
tine automatically changes the SPC reference dependent of the
single-phase voltage to a fixed value; in this case, 220 V. After
the island detection, the energy is provided by the dc source,
as shown in Fig. 15. The oscillation present in the waveform
is due to the quick connection of the dc source. When the
single-phase returns, another interrupt routine detects that the
MACHADO et al.: LINE-INTERACTIVE SINGLE-PHASE TO THREE-PHASE CONVERTER SYSTEM 1635

Fig. 16. From top to bottom: ac bus voltage (250V/div), single-phase current
(10 A/div) and single-phase feeder voltage (90 V/div). Horizontal: 10 ms/div.

Fig. 13. DC link voltage under a load step (45 V/div.) Horizontal: 40 ms/div.
(experimental result).
single-phase voltage is present and waits about 1 s to close the
solid state relay and reconnect the system (Fig. 16).

VI. CONCLUSION
A line-interactive single-phase to three-phase conversion
system was presented. It is suitable for sensitive loads be-
cause it guarantees the three-phase power quality that means:
sinusoidal, balanced, and symmetrical voltages even with
nonlinear and unbalanced loads. A three-phase inverter is
controlled in order to stabilize the three-phase voltage while
absorbing current from the single-phase feeder, under unity
power factor. Experimental results on a 3-kVA system confirm
the expectations.

Fig. 14. DC link voltage under a load step (50 V/div.) Horizontal: 50 ms/div.
(simulation result).
Fig. 15. From top to bottom: ac bus voltage (250V/div), single-phase current
(10 A/div), Single-phase feeder voltage (90 V/div) and failure bit detector of the
single-phase voltage. Horizontal: 10 ms/div.
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1636
[11] Standard for Power Delivery Using the Single Wire Earth Return
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Ricardo Quadros Machado was born in Santa
Maria, Brazil. He received the B.S. degree from the
University of Santa Maria, Santa Maria, Brazil, in
1997, and the M.S. and Ph.D. degrees in electrical
engineering from the University of Campinas,
Campinas, Brazil, in 2000 and 2005, respectively.
From 2002 to 2003, he was a Visiting Researcher
at the University of Padova, Padova, Italy. He is a
Post-Doctorate at the University of Santa Maria and
his main research interests are: dc–dc and ac–dc
converters, digital control of power converters,
power quality, active power filters, and renewable energy supplies.
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 21, NO. 6, NOVEMBER 2006
Simone Buso (M’97) received the M.S. degree
in electronic engineering and the Ph.D. degree
in industrial electronics and informatics from the
University of Padova, Padova, Italy, in 1992 and
1997, respectively.
Since 1993, he has worked with the Power Elec-
tronics Research Group, Department of Information
Engineering (DEI), University of Padova, where he is
currently a Scientific Researcher. His main research
interests are in the industrial and power electronics
fields and are specifically related to: dc/dc and ac/dc
converters, smart power integrated circuits, digital control and robust control of
power converters, solid state lighting, electromagnetic compatibility applied to
integrated circuits, and switch mode power supplies.
José Antenor Pomilio (M’92–SM’02) was born in
Jundiaí, Brazil, in 1960. He received the B.S., M.S.,
and Ph.D. degrees in electrical engineering from the
University of Campinas, Campinas, Brazil, in 1983,
1986, and 1991, respectively.
From 1988 to 1991, he was head of the Power
Electronics Group, Brazilian Synchrotron Labora-
tory. Currently, he is a Professor at the School of
Electrical and Computer Engineering, University of
Campinas, where he has taught since 1984. In 1993
and 2003, he was Visiting Professor at the University
of Padova, Padova, Italy, and at the Third University of Rome, Rome, Italy,
respectively. His main interests are switching-mode power supplies, power
factor correction, electrical drives, and active power filters.
Dr. Pomilio is currently an Associate Editor of the IEEE TRANSACTIONS ON
POWER ELECTRONICS.