EN2012: Laboratory Practice

Analog Electronic Laboratory Experiment: 02

Differential Amplifiers
Post-Laboratory Exercise

Group: EE 08 Name:
Group Members: Admission No:
Date of Experiment:
Date of Submission:

01) BJT discrete Differential Amplifier

1.1
1.1.1. Voltage drop across the two diodes =2×700 mV =1.4 V
1.4 =VBE+ Ic ×1K (Appling KVL for BE loop)
Ic = 1.4-0.71K
Ic= 0.7 mA
IE=IC+IB assume IB ≪IC
IE=IC=I3 =0.7 mA

1.1.2. Appling KCL at node A

I3=I1+I2
I1+I2= 0.7 mA
I1=I2 (due to symmetry)
I1=I2= 0.72=0.35 mA
1.1.3
Voltage drop across the 33k =IR=0.35 A
mA×33000=11.55 V
Vc =VC1=VC2=15V-11.55V=3.45 V
1.1.4
If there is no input signal, we can assume VB≈0V (due to symmetry VB1=VB2)
Therefore VE=VE1= VB1-VBE1
=0-0.7 V= -0.7 V
VCE=VCE1=VCE2=VC-VE
=3.45 V-(-0.7 V)
=4.15 V
1.1.5
For calculate VB1
IB1=IE1β+1
=0.35 mA300+1=1.16 µA
VB1=VB2 = IB1 ×R=1.16 µA ×22000 (This is very small compared to other values.
=25.52 mV Therefore our assumption in above is right)
 1.2
We got slightly different values for practical because the assumption we made in theoretical calculation is
not applicable in practical situations. In above calculations we consider that Q1 and Q2 are same. However, they
are not exactly same. This is same for resistors. In addition, voltage drops across the diodes and transistors may
not be same values that we used in calculations.

02) Amplification
2.1
Absolute gain = VOUTVIn
=4.16 V.05 V=83.2
Gain dB =20log10VOUTVIn
=20log1083.2
=38.40 dB

2.2
There are various reasons to add capacitor to the amplifier circuit. One is to avoid any unwanted DC bias
voltage naturally present in the signal to be amplified. Some AC signals may be superimposed on an uncontrolled
DC voltage right from the source, and an uncontrolled DC voltage would make reliable transistor biasing
impossible. The high-pass filtering offered by a coupling capacitor would work well here to avoid biasing
problems. Another one might be to reduce the signal attenuation.

03) Frequency Response of the Differential Amplifier

3.1

Frequency (Hz) Input pk-pk (mV) Output pk-pk (V) Log10(Frequency) Gain VoutVin
50 50 4.36 1.69897 87.2
100 50 4.22 2.00000 84.4
1K 50 4.16 3.00000 83.2
10K 50 3.34 4.00000 66.8
100K 50 0.56 5.00000 11.2
500K 50 0.20 5.69897 4
1M 50 0.16 6.00000 3.2

3.2

04) Common Mode Rejection Ratio

4.1
Common mode rejection ratio (CMRR) refers to the ratio between differential mode gain and common
mode gain. The most important feature of the difference amplifier is its ability to cancel or reject certain types of
unwanted voltage signals. These unwanted signals are refers to as noise and can be occurred as voltages
induced by stray magnetic fields in ground or signal wires. These noise signals appear equally at both inputs of
the circuit. So its important to know if undesirable noise occur, how much does the amplifier reject or cancel out.
A measure of this rejection of signals common to both inputs is called amplifier’s Common Mode Rejection and a
numerical value is assigned, which is called the Common Mode Rejection Ratio (CMRR). [1]

CMRR= Differential Mode GainCommon Mode Gain CMRR (dB)= 20log

Differential Mode GainCommon Mode Gain

4.2
Frequency Input pk-pk Output pk-pk Common Mode Differential CMRR
Hz mV mV Gain (Ac) Mode Gain (Ad) (dB)
50 100 2.44 0.0244 87.2 71.0625
100 100 2.44 0.0244 84.4 70.7791
1000 100 2.64 0.0264 83.2 69.9704
10000 100 2.97 0.0297 66.8 67.0404
100000 100 5.76 0.0576 11.2 45.7759
500000 100 6.08 0.0608 4 36.3631
1000000 100 6.58 0.0658 3.2 33.7385

05) Differential Mode and Common Mode Input Resistance

5.1
Iin= Vs-VinRin
= 100 mV-25.6 mV56k
Diff. mode input resistance = VinIin=25.6 mV ×56k100 mV-25.6 mV=19.2688 kΩ
5.2
Common mode input resistance = VinIin= 18.05 mV ×56k100 mV-18.05 mV=12.3344 kΩ
06) Simple Differential Mode Pre – Amplifier
6.1
Gain of the simple differential mode pre-amplifier=VoutVin
=240 mV100 mV=2.4

References
[1] Electronic Devices and Circuit Theory, Fourth Edition by Robert Boylestad, Louis Nashelsky.