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PD - 95147

IRFZ24NS/LPbF
HEXFET® Power MOSFET
l Advanced Process Technology
l Surface Mount (IRFZ24NS) D
l Low-profile through-hole (IRFZ24NL) VDSS = 55V
l 175°C Operating Temperature
l Fast Switching RDS(on) = 0.07Ω
l Fully Avalanche Rated G
l Lead-Free ID = 17A
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on- D 2 P ak T O -26 2
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate
up to 2.0W in a typical surface mount application.
The through-hole version (IRFZ24NL) is available for low-
profile applications.
Absolute Maximum Ratings
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V… 17
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V… 12 A
IDM Pulsed Drain Current … 68
PD @TA = 25°C Power Dissipation 3.8 W
PD @TC = 25°C Power Dissipation 45 W
Linear Derating Factor 0.30 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy‚… 71 mJ
IAR Avalanche Current 10 A
EAR Repetitive Avalanche Energy 4.5 mJ
dv/dt Peak Diode Recovery dv/dt ƒ… 6.8 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 3.3
°C/W
RθJA Junction-to-Ambient ( PCB Mounted,steady-state)** ––– 40

04/19/04
IRFZ24NS/LPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ.Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 55 –––––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.052
––– V/°C Reference to 25°C, ID =1mA…
RDS(on) Static Drain-to-Source On-Resistance ––– –––0.07 Ω VGS =10V, ID = 10A „
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 4.5 –––––– S VDS = 25V, ID = 10A…
––– ––– 25 VDS = 55V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– –––100 VGS = 20V
IGSS nA
Gate-to-Source Reverse Leakage ––– –––-100 VGS = -20V
Qg Total Gate Charge ––– ––– 20 ID = 10A
Qgs Gate-to-Source Charge ––– ––– 5.3 nC VDS = 44V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 7.6 VGS = 10V, See Fig. 6 and 13 „…
td(on) Turn-On Delay Time ––– 4.9––– VDD = 28V
tr Rise Time ––– 34 ––– ID = 10A
ns
td(off) Turn-Off Delay Time ––– 19 ––– RG = 24Ω
tf Fall Time ––– 27 ––– RD = 2.6Ω, See Fig. 10 „…
Between lead,
LS Internal Source Inductance ––– 7.5 ––– nH
and center of die contact
Ciss Input Capacitance ––– 370 ––– VGS = 0V
Coss Output Capacitance ––– 140 ––– pF VDS = 25V
Crss Reverse Transfer Capacitance ––– 65 ––– ƒ = 1.0MHz, See Fig. 5…

Source-Drain Ratings and Characteristics


Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current MOSFET symbol D

––– ––– 17
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G
––– ––– 68
(Body Diode)  p-n junction diode. S

V SD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 10A, VGS = 0V „


t rr Reverse Recovery Time ––– 56 83 ns TJ = 25°C, IF = 10A
Q rr Reverse Recovery Charge ––– 120 180 nC di/dt = 100A/µs „…
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
 Repetitive rating; pulse width limited by „ Pulse width ≤ 280µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
‚ Starting TJ = 25°C, L =1.0mH … Uses IRFZ24N data and test conditions
RG = 25Ω, IAS = 10A. (See Figure 12)
ƒ ISD ≤ 10A, di/dt ≤ 280A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C

** When mounted on 1" square PCB (FR-4 or G-10 Material ).


For recommended footprint and soldering techniques refer to application note #AN-994.
IRFZ24NS/LPbF

100 100 VGS


VGS
TOP 15V TOP 15V
10V 10V
8.0V 8.0V
7.0V 7.0V

I , D rain-to-S ource C urrent (A )


6.0V
I , D rain-to-Source Current (A )

6.0V
5.5V 5.5V
5.0V 5.0V
BOTTOM 4.5V BOTTOM 4.5V

10 10

4 .5V

4.5V

D
D

20 µ s P U LS E W ID TH 2 0µ s P U L S E W ID T H
T
TCJ == 25°C
2 5°C TTCJ == 175°C
17 5°C
1 A 1 A
0.1 1 10 100 0.1 1 10 100
V D S , D rain-to-S ourc e V oltage (V ) V DS , D rain-to-S ource V oltage (V )

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

100 3.0
I D = 17 A
R D S (on ) , D rain -to-S ou rc e O n R es is tan c e
I D , D rain-to-So urce C urren t (A )

2.5
TJ = 2 5 °C
T J = 1 7 5 °C 2.0
(N orm a liz ed)

10 1.5

1.0

0.5

V DS = 2 5V
2 0µ s P U L S E W ID TH V G S = 1 0V
1 0.0
A A
4 5 6 7 8 9 10 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
V G S , G ate-to -So urce Voltag e (V) T J , J unc tion T em perature (°C )

Fig 4. Normalized On-Resistance


Fig 3. Typical Transfer Characteristics
Vs. Temperature
IRFZ24NS/LPbF

700 20
V GS = 0V , f = 1M H z I D = 10 A
C is s = C g s + C g d , Cd s S H O R T E D V D S = 44 V
C rs s = C gd

V G S , G ate-to-S ource V oltage (V )


600 V D S = 28 V
C o ss = C d s + C gd 16

500 C iss
C , Capacitance (pF)

12
400 C oss

300
8

200 C rss
4
100
FO R TE S T C IRC UIT
S E E FIG U R E 1 3
0 A 0 A
1 10 100 0 4 8 12 16 20
V D S , D rain-to-S ourc e V oltage (V ) Q G , T otal G ate C harge (nC )

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.


Drain-to-Source Voltage Gate-to-Source Voltage

100 1000
O P E R A T IO N IN T H IS A R E A L IM ITE D
B Y R D S (o n)
I S D , R everse Drain C urrent (A )

I D , D rain Current (A )

T J = 1 75 °C 100

TJ = 25 °C
10µ s
10

10 100µ s

T C = 25 °C 1m s
T J = 17 5°C
V G S = 0V S ing le P u lse 10m s
1 A 1 A
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 1 10 100

V S D , S ourc e-to-D rain V oltage (V ) V D S , D rain-to-S ource V oltage (V )

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area


Forward Voltage
IRFZ24NS/LPbF
RD
V DS
20 VGS
D.U.T.
RG
+
-V DD
16

10V
I D , Drain Current (A)

Pulse Width ≤ 1 µs
12 Duty Factor ≤ 0.1 %

Fig 10a. Switching Time Test Circuit


8
VDS
90%
4

0
25 50 75 100 125 150 175 10%
TC , Case Temperature ( ° C) VGS
td(on) tr t d(off) tf

Fig 9. Maximum Drain Current Vs. Fig 10b. Switching Time Waveforms
Case Temperature

10
Thermal Response (Z thJC )

D = 0.50

1
0.20

0.10


0.05

0.1
0.02
0.01  SINGLE PULSE
(THERMAL RESPONSE)
PDM

t1
t2

0.01
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC

0.00001 0.0001 0.001 0.01 0.1 1


t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case


IRFZ24NS/LPbF
140
ID

E A S , S ingle Pulse Avalanc he E nergy (m J)


L TOP 4.2 A
VDS 7.2A
120
B O T TO M 1 0A
D.U.T.
100
RG +
VDD
-
80
10 V IAS
tp
0.01Ω 60

Fig 12a. Unclamped Inductive Test Circuit 40

V(BR)DSS 20

tp V D D = 25 V
0 A
VDD 25 50 75 100 125 150 175
S tarting T J , J unc tion T em perature (°C )

VDS

Fig 12c. Maximum Avalanche Energy


IAS
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.

50KΩ

12V .2µF
QG .3µF

10 V +
V
QGS QGD D.U.T. - DS

VGS
VG
3mA

IG ID
Charge Current Sampling Resistors

Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit
IRFZ24NS/LPbF
Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations


D.U.T
• Low Stray Inductance
• Ground Plane
ƒ
• Low Leakage Inductance
Current Transformer
-

+
‚
„
- +
-


RG • dv/dt controlled by RG +
• Driver same type as D.U.T. V DD
-
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test

Driver Gate Drive


P.W.
Period D=
P.W. Period

VGS=10V *

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD

Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 14. For N-Channel HEXFETS


IRFZ24NS/LPbF
D2Pak Package Outline

D2Pak Part Marking Information (Lead-Free)


T H IS IS AN IR F 530S WIT H P AR T N U MB E R
L OT CODE 8024 IN T E R N AT IONAL
AS S E MB L E D ON WW 0 2, 2000 R E CT IF IE R F 53 0S
IN T H E AS S E MB L Y L INE "L " L OGO
DAT E CODE
N ote: "P " in as s embly line YE AR 0 = 2000
pos ition indicates "L ead-F ree" AS S E MB L Y
L OT CODE WE E K 02
L INE L

OR
P AR T NU MB E R
INT E R NAT IONAL
R E CT IF IE R F 530S
L OGO
DAT E CODE
P = DE S IGNAT E S L E AD-F R E E
AS S E MB L Y P R ODU CT (OP T IONAL )
L OT CODE YE AR 0 = 2000
WE E K 02
A = AS S E MB L Y S IT E CODE
IRFZ24NS/LPbF
TO-262 Package Outline

TO-262 Part Marking Information


E X AM P L E : T H IS IS AN IR L 3103 L
L OT COD E 178 9 P AR T N U MB E R
IN T E R N AT ION AL
AS S E MB L E D ON W W 19 , 199 7
R E CT IF IE R
IN T H E AS S E MB L Y L IN E "C" L OGO
N ote: "P " in as s embly line D AT E COD E
pos ition indicates "L ead-F ree" YE AR 7 = 19 97
AS S E MB L Y
L OT COD E WE E K 19
L IN E C

OR
P AR T N U MB E R
IN T E R N AT ION AL
R E CT IF IE R
L OGO
D AT E COD E
P = D E S IGN AT E S L E AD -F R E E
AS S E MB L Y P R OD U CT (OP T ION AL )
L OT COD E YE AR 7 = 19 97
WE E K 19
A = AS S E MB L Y S IT E COD E
IRFZ24NS/LPbF

D2Pak Tape & Reel Information

TR R

1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
1 .6 0 (.0 6 3 )
4 .1 0 (.1 6 1 ) 1 .5 0 (.0 5 9 )
3 .9 0 (.1 5 3 ) 0 .3 6 8 (.0 1 4 5 )
0 .3 4 2 (.0 1 3 5 )

F E E D D IRE CTIO N 1 .8 5 (.0 7 3 ) 1 1.6 0 (.4 57 )


1 .6 5 (.0 6 5 ) 1 1.4 0 (.4 49 ) 2 4 .3 0 (.9 5 7 )
1 5.4 2 (.6 0 9 )
2 3 .9 0 (.9 4 1 )
1 5.2 2 (.6 0 1 )
TR L
1 .7 5 (.0 6 9 )
1 0.9 0 (.4 2 9 ) 1 .2 5 (.0 4 9 )
1 0.7 0 (.4 2 1 ) 4 .7 2 (.1 3 6)
1 6 .1 0 ( .6 3 4 ) 4 .5 2 (.1 7 8)
1 5 .9 0 ( .6 2 6 )

F E E D D IRE CTIO N

13 .5 0 (.53 2) 27 .40 (1.0 79)


12 .8 0 (.50 4) 23 .90 (.94 1)

3 30 .0 0 60.00 (2.3 62)


(14.1 73) M IN .
MAX.

30 .40 (1.19 7)
NO TES : MAX.
1. C O M F O R M S T O E IA-4 18. 26 .40 (1 .03 9) 4
2. C O N TR O LL IN G D IM E N S IO N : M IL LIM E T E R . 24 .40 (.9 61 )
3. D IM E N S IO N M E A SU R E D @ H U B .
3
4. IN C LU D E S F L AN G E D IS T O R T IO N @ O U TE R E D G E.

Data and specifications subject to change without notice.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 04/04
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/

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