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𝐴2
തതത
𝐴1 തതത
𝐴0
0
തതത
𝐴1 𝐴0
1
𝐴1 തതത
𝐴0
2
𝐴1 𝐴0
3
2-bit binary Decoder
Figure 1
1
𝐴𝑜 LSB
2
3 𝐴1
4
5
6 𝐴2 MSB
7
o A0, A1 were changed to all possible logical stated and the outputs were observed.
o One of each input zero, through seven was given logical HIGH. Only one input was kept
at HIGH value at each time.