You are on page 1of 63

Operating Systems

(MCA-2007)

Dr. B. B. Sagar
Department of Computer Science and Engineering
Birla Institute of Technology, Ranchi
(Noida Campus)
Overview of Operating Systems: OS and the Computer System,
Efficiency, System Performance and User Convenience, Classes of
Operating Systems, Batch Processing Systems, Multiprogramming
Systems, Time Sharing Systems, Real Time Operating Systems,
Distributed Operating Systems, Modern Operating Systems.
Introduction

• Fundamental Principles of OS Operation


• The Computer
• OS Interaction with the Computer and
User Programs
Fundamental Principles of OS Operation

• The kernel of the OS is the collection of


routines that form the core of the operating
system
– Implements control functions
– Set of services to user programs
– Exists in memory during operation of the OS
• An interrupt diverts the CPU to execution
of the kernel code
• A software interrupt is used by programs
to communicate their requests to the
kernel
Fundamental Principles of OS Operation
(continued)

• CPU has two modes of operation:


– Kernel mode
• CPU can execute all instructions
• Kernel operates with CPU in this mode so that it can
control computer operations
– User mode
• CPU cannot execute instructions that could interfere
with other programs or with the OS if used
indiscriminately
• CPU is put in this mode to execute user programs
The Computer
The Computer (continued)

• The CPU
• Memory Management Unit (MMU)
• Memory Hierarchy
• Input/Output
• Interrupts
The CPU

• Two features of the CPU are visible to


user programs or the OS:
– General-purpose registers (GPRs)
• Also called program-accessible registers
• Hold data, addresses, index values, or the stack
pointer during execution of a program
– Control registers
• Contain information that controls or influences
operation of the CPU
• Set of control registers is called the program
status word (PSW)
The CPU (continued)

• CPU can operate in two modes:


– Kernel mode
• Can execute privileged instructions
• OS puts CPU in kernel mode when it is executing
instructions in the kernel
– User mode
• Cannot execute privileged instructions
• OS puts CPU in user mode while executing user
programs
• Mode (M) field of PSW contains 0 if CPU
is in privileged mode and 1 if it is in user
mode
State of the CPU

• GPRs and PSW contain the information


needed to know what the CPU is doing
– State of the CPU
• Kernel saves state of CPU when it takes
away the CPU from program
– When program is to be resumed, it reloads
the saved CPU state into GPRs and PSW
Example 2.1: State of the CPU (Contd)
Memory Management Unit (MMU)

• Virtual memory is an illusion of memory


that may be larger than the real memory of
a computer
– Implemented using noncontiguous memory
allocation and the MMU
• CPU passes the address of data or instruction
used in an instruction to MMU
– It is called the logical addresses
• MMU translates logical address to physical
address
Memory hierarchy

• The memory hierarchy provides a large


and fast memory, at a low cost
– It is an arrangement of several memories with
different access speeds and sizes
• The CPU accesses only the fastest memory; i.e.,
the cache
• If a required byte is not present in the memory
being accessed, it is loaded there from a slower
memory
Operation of a memory hierarchy
Memory Hierarchy (continued)

• When CPU performs a cache lookup, a


cache hit or miss may occur
– Hit ratio (h) of the cache is the fraction of
bytes accessed by the CPU that score a hit in
the cache

tema = h × tcache + (1 – h) × (ttra + tcache)


= tcache + (1 – h) × ttra
where
tema = effective memory access time,
tcache = access time of cache, and
ttra = time taken to transfer a cache block from memory to
cache.
Memory Hierarchy (continued)

• Operation of memory is analogous to


operation of a cache
– Blocks of bytes (pages) are transferred from
disk to memory or from memory to disk
– But,
• Memory management and transfer of blocks
between memory and disk are performed by SW
• In the cache, the transfer is performed by HW
• Memory hierarchy comprising MMU,
memory, and the disk is called the virtual
memory
Memory Hierarchy (continued)

• Memory protection is implemented by


checking whether a memory address used
by a program lies outside the memory
area allocated to it
– Control registers used:
• base and size (also called limit)
– Address of first byte = <base>
– Address of last byte = <base> +<size> – 1
Example 2.2: Basics of Memory Protection

• Execution of •interrupt
Load instruction causes protection violation

A memory protection violation interrupt would be generated if an address used during execution of P1
lies outside the range 20000 – 25000.
Input/Output
Interrupts

• An event is a situation that requires OS’s


attention
– Designer associates an interrupt with each
event
• Purpose is to report occurrence of the event to OS
and enable it to perform event handling actions
• Interrupt action saves CPU state and
loads new contents into the PSW and
GPRs
– CPU starts executing instructions of an
interrupt servicing routine (ISR) in the kernel
Interrupts (continued)
OS Interaction with the Computer and User
Programs
• OS interacts with the computer to
– know information about events, so that it can service
them
– restore CPU state to resume a program after
servicing an interrupt
• Programs need to use services of the OS for
purposes such as initiating an I/O operation
– The method to cause an interrupt and pass
requirement to the OS is known as a System call
• Will learn about:
– Controlling Execution of Programs
– Interrupt Servicing
– System Calls
Controlling Execution of Programs
1. When user program starts, PSW should
contain:
a. Program counter (PC) field
b. Mode (M) field, set to user mode (1)
c. Memory protection information (MPI) field contains
start address in memory and size of program
d. Interrupt mask (IM) field, set to enable interrupts
2. When program is interrupted, CPU state (PSW
and GPRs) are saved
• Program table or process control block (PCB)
3. When program is resumed, its CPU state is
restored
Interrupt Servicing

• Context save saves CPU state


of the program
• The scheduler selects a
a program for execution
Interrupt Servicing (continued)
Figure 2.8(a) shows the arrangement of interrupt vectors and interrupt servicing routines in
memory, while Figure 2.8(b) shows contents of the PSW at various times during servicing of
an I/O interrupt. The interrupt vectors are formed by the OS boot procedure. Each interrupt
vector contains the address of an interrupt servicing routine, an interrupt mask and a 0 in the
mode field. A user program is about to execute the instruction that exists at the address ddd in
memory when an interrupt occurs signaling the end of an I/O operation on device d1. The
leftmost part of Figure 2.8(b) shows the PSW contents at this time.

Step 1 of the interrupt action puts d1 in the IC field of the PSW and saves the PSW in the
saved PSW information area. The saved PSW contains a 1 in the mode field, ddd in the PC
field, and d1 in the IC field. The contents of the interrupt vector for the I/O completion interrupt
are loaded into the PSW. Effectively, the CPU is put in the kernel mode of operation, and
control is transferred to the routine that has the start address bbb, which is the I/O interrupt
servicing routine (see the arrow marked A in Figure 2.8(a), and the
PSW contents shown in Figure 2.8(b)).
The I/O interrupt servicing routine saves the PSW and contents of the GPRs in the program
table. It now examines the IC field of the saved PSW, finds that device d1 has completed its
I/O operation, and notes that the program that had initiated the I/O operation can be
considered for scheduling. It now transfers control to the scheduler (see the arrow marked B
in Figure 2.8(a)). The scheduler happens to select the interrupted program itself for execution,
so the kernel switches the CPU to execution of the program by loading back the saved
contents of the PSW and GPRs (see arrow marked C in Figure 2.8(a)). The Program would
2/1/2017
resume execution at the instruction with the address ddd (see the PSW contents in the
rightmost part of Figure 2.8(b)).
Interrupt Servicing (continued)

• Two approaches for nested interrupt servicing:


– Disable nested interrupts through masking
– Handle nested interrupts─preemptible kernel
System Calls
Example 2.4: System Call in a Hypothetical OS

• CPU provides the SI instruction to cause a


software interrupt
• OS provides system call for obtaining current
time
– Code is 78: Instruction SI 78 causes a SW interrupt
• 78 is entered in IC field of PSW before it is
saved
• Interrupt vector for program contains aaa in PC
– CPU is switched to routine with start address aaa
– It finds that IC is 78 and determines that program
needs time of day
• Time is returned to program in a standard location, typically a
data register
System Calls (continued)
Computing Environments and Nature of
Computations

• A computing environment consists of a


computer system, its interfaces with other
systems, and the services provided by its
operating system to its users and their
programs
• Evolution:
– Noninteractive Computing Environments
– Interactive Computing Environments
– Real-Time, Distributed, and Embedded
Environments
– Modern Computing Environments 34
Computing Environments and Nature of
Computations (continued)

• Noninteractive Computing Environments


– OS focuses on efficient use of resources
– Computations in form of program or job
• Interactive Computing Environments
– OS focuses on reducing average amount of
time required to implement an interaction
between a user and his computation
– Execution of a program is called a process

35
Computing Environments and Nature of
Computations (continued)

36
Computing Environments and Nature of
Computations (continued)

• Real-Time, Distributed, and Embedded


Environments
– A real-time computation has specific time constraints
• OS ensures computations complete within constraints
– Distributed computing environment: enables a
computation to use resources located in several
computer systems through a network
– Embedded computing environment: computer system
is a part of a specific hardware system
• OS has to meet the time constraints arising from the nature
of the system being controlled

37
Computing Environments and Nature of
Computations (continued)
• Modern Computing Environments
– Has features of several of the computing
environments described earlier
• OS uses complex strategies to manage user
computations and resources

38
Efficiency, System Performance, and
User Service

• Two of the fundamental goals of an OS:


– Efficiency of use
• Present utilization of a resource
– User convenience
• Measurable aspect: User service
– Turnaround time
– Response time
• To a system administrator, performance of a
system in its environment is more important
– Typically measured as throughput

39
Efficiency, System Performance, and User
Service (continued)

40
Classes of Operating Systems

41
Batch Processing Systems
• Batch: sequence of user jobs formed for
processing by the OS
• Batching kernel initiates processing of jobs
without requiring computer operator’s intervention
• Card readers and printers were a performance
bottleneck in the 1960s
– Virtual card readers and printers implemented through
magnetic tapes were used to solve this problem
• Control statements used to protect against
interference between jobs
• Command interpreter read a card when currently
executing program in job wanted the next card
42
43
Multiprogramming Systems

• Provide efficient resource utilization in a


noninteractive environment
• Uses DMA mode of I/O
– Can perform I/O operations of some
program(s) while using the CPU to execute
some other program
• Makes efficient use of both the CPU and I/O
devices
• Turnaround time of a program is the
appropriate measure of user service in
these systems 44
Multiprogramming Systems (continued)

45
Multiprogramming Systems (continued)

46
Multiprogramming Systems
(conti…)

• An appropriate measure of performance of a


multiprogramming OS is throughput
– Ratio of the number of programs processed and the
total time taken to process them
• OS keeps enough programs in memory at all
times, so that CPU and I/O devices are not idle
– Degree of multiprogramming: number of programs
– Uses an appropriate program mix of CPU-bound
programs and I/O-bound programs
– Assigns appropriate priorities to CPU-bound and I/O-
bound programs
47
Priority of Programs

48
Priority of Programs (continued)
In multiprogramming environments, an I/O-bound program should
have a higher priority than a CPU-bound program.

49
Performance of Multiprogramming systems

• How to improve performance?

50
Performance of Multiprogramming systems (cont..)

When an appropriate program mix is maintained, an increase in


the degree of multiprogramming would result in an increase in
throughput.

51
Time-Sharing Systems

• Provide a quick response to user


subrequests
– Round-robin scheduling with time-slicing
• Kernel maintains a scheduling queue
• If time slice (δ) elapses before process completes
servicing of a subrequest, kernel preempts it,
moves it to end of queue, and schedules another
process
– Implemented through a timer interrupt

52
Time-Sharing Systems (continued)

53
Time-Sharing Systems (cont….)

• Response time (rt): measure of user


service
– If processing of a subrequest requires δ CPU
seconds
rt = n × (δ + σ)
η = δ / (δ + σ)
where η: CPU efficiency,
σ: scheduling overhead,
n: number of users using system,
δ: time required to complete a subrequest

• Actual response time would be different 54


Time-Sharing Systems (cont…)

55
Swapping of Programs

56
Real-Time Operating Systems
• In real-time applications, users need computer
to perform some actions in a timely manner
– To control activities in an external system, or to
participate in them
– Timeliness depends on time constraints

• If application takes too long to respond to an


activity, a failure can occur in the external
system
– Response requirement
– Deadline: time by which action should be performed
57
Hard and Soft Real-Time Systems

• A hard real-time system meets response


requirements under all conditions
– It is typically dedicated to processing real-time
applications
• A soft real-time system makes best effort
to meet response requirement of a real-
time application
– Cannot guarantee that it will be able to meet it
• Meets requirements in a probabilistic manner
– E.g., multimedia applications
58
Features of a Real-Time Operating
System

59
Distributed Operating Systems

• A distributed computer system consists of


several individual computer systems
connected through a network
– Each computer system could be a PC, a
multiprocessor system, or a cluster
– Many resources of a kind exist in system
• This feature is used to provide the benefits
summarized in Table 3.8
– Handling network or individual computers’
failure requires special techniques
– Users must use special techniques to access
60
resources over the network
Distributed Operating Systems
(continued)

61
Special Techniques of Distributed
Operating Systems

62
Modern Operating Systems

63

You might also like