Professional Documents
Culture Documents
(MCA-2007)
Dr. B. B. Sagar
Department of Computer Science and Engineering
Birla Institute of Technology, Ranchi
(Noida Campus)
Overview of Operating Systems: OS and the Computer System,
Efficiency, System Performance and User Convenience, Classes of
Operating Systems, Batch Processing Systems, Multiprogramming
Systems, Time Sharing Systems, Real Time Operating Systems,
Distributed Operating Systems, Modern Operating Systems.
Introduction
• The CPU
• Memory Management Unit (MMU)
• Memory Hierarchy
• Input/Output
• Interrupts
The CPU
• Execution of •interrupt
Load instruction causes protection violation
A memory protection violation interrupt would be generated if an address used during execution of P1
lies outside the range 20000 – 25000.
Input/Output
Interrupts
Step 1 of the interrupt action puts d1 in the IC field of the PSW and saves the PSW in the
saved PSW information area. The saved PSW contains a 1 in the mode field, ddd in the PC
field, and d1 in the IC field. The contents of the interrupt vector for the I/O completion interrupt
are loaded into the PSW. Effectively, the CPU is put in the kernel mode of operation, and
control is transferred to the routine that has the start address bbb, which is the I/O interrupt
servicing routine (see the arrow marked A in Figure 2.8(a), and the
PSW contents shown in Figure 2.8(b)).
The I/O interrupt servicing routine saves the PSW and contents of the GPRs in the program
table. It now examines the IC field of the saved PSW, finds that device d1 has completed its
I/O operation, and notes that the program that had initiated the I/O operation can be
considered for scheduling. It now transfers control to the scheduler (see the arrow marked B
in Figure 2.8(a)). The scheduler happens to select the interrupted program itself for execution,
so the kernel switches the CPU to execution of the program by loading back the saved
contents of the PSW and GPRs (see arrow marked C in Figure 2.8(a)). The Program would
2/1/2017
resume execution at the instruction with the address ddd (see the PSW contents in the
rightmost part of Figure 2.8(b)).
Interrupt Servicing (continued)
35
Computing Environments and Nature of
Computations (continued)
36
Computing Environments and Nature of
Computations (continued)
37
Computing Environments and Nature of
Computations (continued)
• Modern Computing Environments
– Has features of several of the computing
environments described earlier
• OS uses complex strategies to manage user
computations and resources
38
Efficiency, System Performance, and
User Service
39
Efficiency, System Performance, and User
Service (continued)
40
Classes of Operating Systems
41
Batch Processing Systems
• Batch: sequence of user jobs formed for
processing by the OS
• Batching kernel initiates processing of jobs
without requiring computer operator’s intervention
• Card readers and printers were a performance
bottleneck in the 1960s
– Virtual card readers and printers implemented through
magnetic tapes were used to solve this problem
• Control statements used to protect against
interference between jobs
• Command interpreter read a card when currently
executing program in job wanted the next card
42
43
Multiprogramming Systems
45
Multiprogramming Systems (continued)
46
Multiprogramming Systems
(conti…)
48
Priority of Programs (continued)
In multiprogramming environments, an I/O-bound program should
have a higher priority than a CPU-bound program.
49
Performance of Multiprogramming systems
50
Performance of Multiprogramming systems (cont..)
51
Time-Sharing Systems
52
Time-Sharing Systems (continued)
53
Time-Sharing Systems (cont….)
55
Swapping of Programs
56
Real-Time Operating Systems
• In real-time applications, users need computer
to perform some actions in a timely manner
– To control activities in an external system, or to
participate in them
– Timeliness depends on time constraints
59
Distributed Operating Systems
61
Special Techniques of Distributed
Operating Systems
62
Modern Operating Systems
63