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16-bit MCU
An Introduction: I/O Control
About MB90385 Series
• MB90387/387S/F387/F387S/MB90V495G
• UART (SCI)
• CAN controller
Features
• Clock
• Wide choice of data types (bit, byte, word, and long word)
• Clock mode (a mode that operates sub clock and clock timer only)
• Stop mode (a mode that stops oscillation clock and sub clock)
• CMOS technology
• I/O port
• Timer
• Interrupt request is issued upon latching a count value of 16-bit free run timer by
detection of an edge on pin input.
• CAN wake-up
Features
• UART (SCI): 1 channel
P42/SOT1
P41/SCK1
X1A/P36*
X0A/P35*
P40/SIN1
P44/RX
P43/TX
AVSS
P33
P32
P31
P30
48
47
46
45
44
43
42
41
40
39
38
37
AVCC 1 36 P17/PPG3
AVR 2 35 P16/PPG2
P50/AN0 3 34 P15/PPG1
P51/AN1 4 33 P14/PPG0
P52/AN2 5 32 P13/IN3
P53/AN3 6 31 P12/IN2
P54/AN4 7 30 P11/IN1
P55/AN5 8 29 P10/IN0
P56/AN6 9 28 X1
P57/AN7 10 27 X0
P37/ADTG 11 26 C
P20/TIN0 12 25 VSS
13
14
15
16
17
18
19
20
21
22
23
24
P21/TOT0
P22/TIN1
P23/TOT1
P24/INT4
P25/INT5
P26/INT6
P27/INT7
MD2
MD1
MD0
RST
VCC
(FPT-48P-M26)
Package: FT-48P-M26
MB90385 Series
Pin Description
■ PIN DESCRIPTION
Circuit
Pin No. Pin name Function
type
1 AVcc Vcc power input pin for A/D converter.
2 AVR Power (Vref+) input pin for A/D converter. Use as input for Vcc or lower.
P50 to P57 General-purpose input/output ports.
3 to 10 E Functions as analog input pin for A/D converter. Valid when analog
AN0 to AN7
input setting is “enabled.”
P37 General-purpose input/output ports.
11 D Function as an external trigger input pin for A/D converter. Use the pin by
ADTG
setting as input port.
P20 General-purpose input/output ports.
12 D Function as an event input pin for reload timer 0. Use the pin by setting as
TIN0
input port.
P21 General-purpose input/output ports.
13 D Function as an event output pin for reload timer 0. Valid only when output
TOT0
setting is “enabled.”
P22 General-purpose input/output ports.
14 D Function as an event input pin for reload timer 1. Use the pin by setting as
TIN1
input port.
P23 General-purpose input/output ports.
15 D Function as an event output pin for reload timer 1. Valid only when output
TOT1
setting is “enabled.”
P24 to P27 General-purpose input/output ports.
16 to 19 D
INT4 to INT7 Functions as external interrupt input pin. Use the pin by setting as input port.
13 D Function as an event output pin for reload timer 0. Valid only when output
TOT0
setting is “enabled.”
P22 General-purpose input/output ports.
14 D
Pin Description
Function as an event input pin for reload timer 1. Use the pin by setting as
TIN1
input port.
P23 General-purpose input/output ports.
15 D Function as an event output pin for reload timer 1. Valid only when output
TOT1
setting is “enabled.”
P24 to P27 General-purpose input/output ports.
16 to 19 D
INT4 to INT7 Functions as external interrupt input pin. Use the pin by setting as input port.
20 MD2 F Input pin for specifying operation mode. Connect directly to Vss.
21 MD1 C Input pin for specifying operation mode. Connect directly to Vcc.
22 MD0 C Input pin for specifying operation mode. Connect directly to Vcc.
23 RST B External reset input pin.
24 Vcc Power source (5 V) input pin.
25 Vss Power source (0 V) input pin.
Capacitor pin for stabilizing power source. Connect a ceramic capacitor of
26 C
approximately 0.1 µF.
27 X0 A Pin for high-rate oscillation.
28 X1 A Pin for high-rate oscillation.
P10 to P13 General-purpose input/output ports.
29 to 32 D Functions as trigger input pins of input capture channels 0 to 3. Use the
IN0 to IN3
pins by setting as input ports.
(Continued)
7
Pin Description
MB90385 Series
(Continued)
Circuit
Pin No. Pin name Function
type
P14 to P17 General-purpose input/output ports. High-current output ports.
33 to 36 G Functions as output pin of PPG timers 01 and 23. Valid when output
PPG0 to PPG3
setting is “enabled.”
P40 General-purpose input/output port.
37 D
SIN1 Serial data input pin for UART. Use the pin by setting as input port.
P41 General-purpose input/output port.
38 D Serial clock input pin for UART. Valid only when serial clock input/output
SCK1
setting on UART is “enabled.”
P42 General-purpose input/output port.
39 D Serial data input pin for UART. Valid only when serial data input/output set-
SOT1
ting on UART is “enabled.”
P43 General-purpose input/output port.
40 D Transmission output pin for CAN. Valid only when output setting is
TX
“enabled.”
P44 General-purpose input/output port.
41 D Transmission output pin for CAN. Valid only when output setting is
RX
“enabled.”
42 to 45 P30 to P33 D General-purpose input/output ports.
X0A* Pin for low-rate oscillation.
46 A
P35* General-purpose input/output port.
X1A* Pin for low-rate oscillation.
47 A
P36* General-purpose input/output port.
48 AVss Vss power source input pin for A/D converter.
* : MB90387, MB90F387 : X1A, X0A
MB90387S, MB90F387S: P36, P35
MB90385 Series
Block Diagram
■ BLOCK DIAGRAM
Clock timer
16-bit
Time-base timer free-run timer
Input
capture IN0 to IN3
RAM (4ch)
16-bit
ROM/FLASH
PPG timer
Prescaler
RX
CAN TX
SOT1
SCK1 UART1
SIN1
DTP/External INT4 to INT7
interrupt
AVcc
AVss 8/10-bit A/D 16-bit TIN0,TIN1
AN0 to AN7 converter (8ch) reload timer
(2ch) TOT0,TOT1
AVR
ADTG
■ MEMORY MAP
MB90385 series allows specifying a memory access mode “single chip mode.”
Memory Map
1. Memory allocation of MB90385
MB90385 series model has 24-bit wide internal address bus and up to 24-bit bus of external address bus.
A maximum of 16 Mbyte memory space of external access memory is accessible.
2. Memory map
(with ROM mirroring
function enabled)
000000H Peripheral
0000C0H
000100H RAM area
Register
Address #1
003800H Extension IO
area
004000H
ROM area
(FF bank image)
010000H
FE0000H
ROM area*
FF0000H
ROM area
FFFFFFH
Model Address #1
MB90V495G 001900 H
MB90F387/S 000900 H
MB90387/S 000900 H
Note : When internal ROM is operating, F2MC-16LX allows viewing ROM data image on FF bank at upper-level of
00 bank. This function is called “mirroring ROM,” which allows effective use of C compiler small model.
F2MC-16LX assigns the same low order 16-bit address to FF bank and 00 bank, which allows referencing
MB90385 Series
■ I/O MAP
I/O Map
Register Read/
Address abbreviation Register Resource Initial value
Write
000000H (Reserved area) *
000001H PDR1 Port 1 data register R/W Port 1 XXXXXXXXB
000002H PDR2 Port 2 data register R/W Port 2 XXXXXXXXB
000003H PDR3 Port 3 data register R/W Port 3 XXXXXXXXB
000004H PDR4 Port 4 data register R/W Port 4 XXXXXXXXB
000005H PDR5 Port 5 data register R/W Port 5 XXXXXXXXB
000006H
to (Reserved area) *
000010H
000011H DDR1 Port 1 direction data register R/W Port 1 00000000B
000012H DDR2 Port 2 direction data register R/W Port 2 00000000B
000013H DDR3 Port 3 direction data register R/W Port 3 000X0000B
000014H DDR4 Port 4 direction data register R/W Port 4 XXX00000B
000015H DDR5 Port 5 direction data register R/W Port 5 00000000B
000016H
to (Reserved area) *
00001AH
8/10-bit
00001BH ADER Analog input permission register R/W 11111111B
A/D converter
00001CH
to (Reserved area) *
000025H
000026H SMR1 Serial mode register 1 R/W 00000000B
000027H SCR1 Serial control register 1 R/W, W 00000100B
For more
SIDR1/
of the I/O Map, see data sheet
Serial input data register 1/ Serial UART1 page 15
000028H R, W XXXXXXXXB
SODR1 output data register 1
000029H SSR1 Serial status data register 1 R, R/W 00001000B
MB90385 Series
■ I/O MAP
I/O Map
Register Read/
Address abbreviation Register Resource Initial value
Write
000000H (Reserved area) *
000001H PDR1 Port 1 data register R/W Port 1 XXXXXXXXB
000002H PDR2 Port 2 data register R/W Port 2 XXXXXXXXB
000003H PDR3 Port 3 data register R/W Port 3 XXXXXXXXB I/O Data
000004H PDR4 Port 4 data register R/W Port 4 XXXXXXXXB Registers
000005H PDR5 Port 5 data register R/W Port 5 XXXXXXXXB
000006H
to (Reserved area) *
000010H
000011H DDR1 Port 1 direction data register R/W Port 1 00000000B
000012H DDR2 Port 2 direction data register R/W Port 2 00000000B I/O Port
000013H DDR3 Port 3 direction data register R/W Port 3 000X0000B Direction
000014H DDR4 Port 4 direction data register R/W Port 4 XXX00000B Registers
000015H DDR5 Port 5 direction data register R/W Port 5 00000000B
000016H
to (Reserved area) *
00001AH
8/10-bit
00001BH ADER Analog input permission register R/W 11111111B
A/D converter
00001CH
to (Reserved area) *
000025H
000026H SMR1 Serial mode register 1 R/W 00000000B
000027H SCR1 Serial control register 1 R/W, W 00000100B
For more
SIDR1/
of the I/O Map, see data sheet
Serial input data register 1/ Serial UART1 page 15
000028H R, W XXXXXXXXB
SODR1 output data register 1
000029H SSR1 Serial status data register 1 R, R/W 00001000B
Interrupt Sources
■ INTERRUPT SOURCES, INTERRUPT VECTORS, AND INTERRUPT CONTROL REGISTERS
MB90385 Series
Port 1
7 6 5 4 3 2 1 0
P10
Configuring I/O
• Registers
PDRx
7 6 5 4 3 2 1 0
DDRx
7 6 5 4 3 2 1 0
Configuring I/O
means the functions of the I-O ports, timers, and A/D converter incorporated in the
microcomputer.
- For input setting, this register is used to check the input level
bit 7 6 5 4 3 2 1 0
of each pin (value read from the bit corresponding to each
PDR1 register
pin: 0 [low-level input] or 1 [high-level input]).
IO_PDR1.byte
- For output setting, this register is used to set the output level
Pin name P17 P16 P15 P14 P13 P12 P11 P10
of each pin (value written to the bit corresponding to each
pin: 0 [low-level output] or 1 [high-level output]).
bit 7 6 5 4 3 2 1 0
DDR1 register - This register is used to specify whether each port (pin) is
Pin name P17 P16 P15 P14 P13 P12 P11 P10 corresponding to each pin: 0 [input] or 1 [output]).
Figure 2.6 Explanation of registers to control the output from P10 to P14
LED and the LED is off. In the case of (b) in Figure 2.5, the signal output from pin P10 is at
the low level. Therefore, a current flows through the LED, and the LED goes on. The
Exercise
switch in the microcomputer can be operated by a program that controls the microcomputer.
DDR1
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
Blinking LED
Configure I/O Ports
LED OFF
DELAY
LED ON
DELAY
Exercise