Department of Electrical Engineering

Indian Institute of Technology, Kanpur

ESc 201 Home Assignment #13 Assigned: 25.10.18

1. Consider the closed loop system discussed in class at the beginning of the section on oscillators. If the
feedback network has a loss of 20 dB and phase shift of 180 at the oscillation frequency 0,
determine the required phase shift and the minimum gain that the basic amplifier must have for the
oscillations to begin.

2. For the phase shift oscillator discussed in class, derive the expression for its feedback factor f  . Hence,
show that the oscillation frequency 0 is given by 0 = 1/[RC6], and at this frequency, the magnitude
of f  is equal to 1/29.

3. Consider the oscillator structure shown in Fig.1. Determine the expression for the loop gain L(j),
and, hence, find the oscillation frequency, and the required ratio of R2/R1.

4. Consider the bistable circuit shown in Fig.2. Determine the values of R2 and R3 so as to get VTL = +4,9
V and VTH = +5.1 V. Data: op-amp saturation voltages VSAT+ = VSAT = 13 V.

5. Consider the bistable circuit shown in Fig.3. Determine the values of R2 and VR, such that the
threshold voltages are 0 and +V1/10, where V1 = VSAT+ = VSAT.

6. A bistable circuit with an amplitude limiter is shown in Fig.4. Sketch the voltage transfer characteristic
(VTC) of the circuit. Also, determine the maximum diode current. Use first-order diode model with V
= 0.7 V. The op-amp saturation voltages are 12 V.

7. Consider a non-inverting bistable circuit with VSAT+ = VSAT = 12 V, VTL = 1 V, and VTH = +1 V. i)
If the input is a sine wave with 0.5 V amplitude and zero average value, what is the output? ii) Now, if
the amplitude is raised to 1.5 V with an average value of +0.1 V, draw the input-output waveforms,
and determine the duty cycle of the output. iii) For case ii), how much average value of the input signal
can be tolerated, after which the output becomes a constant and independent of the input?

8. Determine the oscillation frequency of the square-wave generator discussed in class, if R1 = 10 k, R2
= 16 k, C = 10 nF, and R = 62 k. What is the duty cycle of the output?

VS R2
15 V 60 k
R1
R3
10 k R3
R2
10 k V0
R1
1 k
R2 V0
Vi D1 D2
Fig.4
Fig.2
V0 Vi
R1
R2
C R1
R
Vi 1 k
V0
R C
VR
Fig.1 Fig.3