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CHAPTER 1
The 8051 Microcontroller and Embedded Systems
Prepared by: Mitul S. Nagar
1
OBJECTIVES
• Compare and contrast microprocessors and microcontrollers
• Describe the advantages of microcontrollers for some
applications
• Explain the concept of embedded systems
• Discuss criteria for choosing a microcontroller
• Explain the variations of speed, packaging, memory, and cost
per unit and how these affect choosing a microcontroller
• Compare and contrast the various members of the 8051
family
• Compare 8051 microcontrollers offered by various
manufacturers
2
SECTION 1.1: MICROCONTROLLERS AND
EMBEDDED PROCESSORS
• Microcontroller versus general‐purpose
microprocessor
3
SECTION 1.1: MICROCONTROLLERS AND
EMBEDDED PROCESSORS
4
SECTION 1.1: MICROCONTROLLERS AND
EMBEDDED PROCESSORS
• Choosing a microcontroller
5
SECTION 1.1: MICROCONTROLLERS AND
EMBEDDED PROCESSORS
• Criteria for choosing a microcontroller
6
SECTION 1.1: MICROCONTROLLERS AND
EMBEDDED PROCESSORS
7
SECTION 1.1: MICROCONTROLLERS AND
EMBEDDED PROCESSORS
Table 1–5
Versions of 8051/52 Microcontroller From Dallas Semiconductor (Maxim)
8
SECTION 1.1: MICROCONTROLLERS AND
EMBEDDED PROCESSORS
9
SECTION 1.1: MICROCONTROLLERS AND
EMBEDDED PROCESSORS
10
A brief history of the 8051
• In 1981, Intel Corporation introduced an 8‐bit
microcontroller called the 8051.
• This microcontroller had 128 bytes of RAM, 4K
bytes of on‐chip ROM, two timers, one serial
port, and four ports (each 8‐bits wide) all on a
single chip.
• The 8051 is an 8‐bit processor, meaning that the
CPU can work on only 8 bits of data at a time.
• Data larger than 8 bits has to be broken into 8‐bit
pieces to be processed by the CPU.
11
A brief history of the 8051
• The 8051 has a total of four I/O ports, each 8 bits wide.
• Although the 8051 can have a maximum of 64K bytes of on‐
chip ROM, many manufacturers have put only 4K bytes on the
chip.
• The 8051 became widely popular after Intel allowed other
manufacturers to make and market any flavors of the 8051
they please with the condition that they remain code‐
compatible with the 8051.
• This has led to many versions of the 8051 with different
speeds and amounts of on‐chip ROM marketed by more than
half a dozen manufacturers.
12
SECTION 1.2: OVERVIEW OF THE 8051 FAMILY
13
8052 microcontroller
• The 8052 is another member of the 8051
family.
• The 8052 has all the standard features of the
8051 as well as an extra 128 bytes of RAM and
an extra timer.
• 8052 has 256 bytes of RAM and 3 timers.
• It has 8K bytes of on‐chip program ROM
instead of 4K bytes.
14
8031 microcontroller
• This chip is often referred to as a ROM‐less 8051 since it has
0K bytes of on‐chip ROM.
• To use this chip you must add external ROM to it.
• This external ROM must contain the program that the 8031
will fetch and execute.
• The ROM containing the program attached to the 8031 can be
as large as 64K bytes.
• In the process of adding external ROM to the 8031, you lose
two ports.
• To solve this problem, you can add external I/O to the 8031.
Interfacing the 8031 with memory and I/O ports such as the
8255 chip.
15
Various 8051 microcontrollers
• The 8051 is available in different memory types, such as UV‐
EPROM, flash, and NV‐RAM, all of which have different part
numbers.
• The UV‐EPROM version of the 8051 is the 8751.
• The flash ROM version is marketed by many companies
including Atmel Corp. and Dallas Semiconductor.
• The Atmel Flash 8051 is called AT89C51, while Dallas
Semiconductor calls theirs DS89C4xO (DS89C420/430/440).
• The NV‐RAM version of the 8051 made by Dallas
Semiconductor is called DS5000.
• There is also an OTP (one‐time programmable) version of the
8051 made by various manufacturers.
16
AT89S8253 from Atmel Corporation
http://www.mikroe.com/en/books/8051book/ch4/
17
AT89S8253 from Atmel Corporation
18
Microcontroller & interfacing ‐151001
CHAPTER 2 Muhamad ali Mazidi
8051 ASSEMBLY LANGUAGE PROGRAMMING
Prepared by: Mitul S. Nagar
1
OBJECTIVES
• List the registers of the 8051 microcontroller
• Manipulate data using the registers and MOV instructions
• Code simple 8051 Assembly language instructions
• Assemble and run an 8051 program
• Describe the sequence of events that occur upon 8051
power‐up
• Examine programs in ROM code of the 8051
• Explain the ROM memory map of the 8051
• Detail the execution of 8051 Assembly language instructions
• Describe 8051 data types
• Explain the purpose of the PSW (program status word)
register
• Discuss RAM memory space allocation in the 8051
• Diagram the use of the stack in the 8051
2
SECTION 2.1: INSIDE THE 8051
• Registers
4
SECTION 2.1: INSIDE THE 8051
• MOV instruction
– MOV destination, source ;copy source to destination
MOV A,#55H ;load value 55H into reg A
MOV R0,A ;copy contents of A into R0 (A=R0=55H)
MOV R1,A ;copy contents of A into R1 (A=R0=R1=55H)
MOV R2,A ;copy contents of A into R2 (A=R0=R1=R2=55H)
MOV R3,#95H ;load value 95H into R3 (R3=95H)
MOV A,R3 ;copy contents of R3 into A (A=R3=95H)
5
SECTION 2.1: INSIDE THE 8051
• ADD instruction
– ADD A, source ;ADD the source operand
;to the accumulator
MOV A,#25H ;load 25H into A
MOV R2,#34H ;load 34H into R2
ADD A,R2 ;add R2 to accumulator
Executing the program above results in A = 59H
6
SECTION 2.2: INTRODUCTION TO 8051 ASSEMBLY
PROGRAMMING
• Structure of Assembly language
.ORG 00H ;start (origin) at 0
MOV R5,#25H ;load 25H into R5
MOV R7,#34H ;load 34H into R7
MOV A,#0 ;load 0 into A
ADD A,R5 ;add contents of R5 to A
;now A = A + R5
ADD A,R7 ;add contents of R7 to A
;now A = A + R7
ADD A, #12H ;add to A value 12H
;now A = A + 12H
HERE: SJMP HERE ;stay in this loop
END ;end of asm source file
7
SECTION 2.3: ASSEMBLING AND RUNNING AN 8051 PROGRAM
• An Assembly language instruction consists of four
fields:
8
SECTION 2.3: ASSEMBLING AND RUNNING AN 8051 PROGRAM
• More about "a51" and "obj" files
– "asm" file is source file and for this reason some
assemblers require that this file have the “a51" extension
– this file is created with an editor such as Windows
Notepad or uVision editor
– uVision assembler converts the a51 assembly language
instructions into machine language and provides the obj
file
– assembler also produces the Ist file
10
SECTION 2.3: ASSEMBLING AND RUNNING AN 8051 PROGRAM
• Ist file
– lst file is useful to the programmer because it lists all the
opcodes and addresses as well as errors that the
assembler detected
– uVision assumes that the list file is not wanted unless you
indicate that you want to produce it
– file can be accessed by an editor such as Note Pad and
displayed on the monitor or sent to the printer to produce
a hard copy
– programmer uses the list file to find syntax errors
– only after fixing all the errors indicated in the lst file that
the obj file is ready to be input to the linker program
11
SECTION 2.4: THE PROGRAM COUNTER AND ROM SPACE IN THE
8051
• Program counter in the 8051
– 16 bits wide
– can access program addresses 0000 to FFFFH
– total of 64K bytes of code
12
SECTION 2.4: THE PROGRAM COUNTER AND ROM SPACE IN THE
8051
• Where the 8051 wakes up when it is powered
up:
– wakes up at memory address 0000 when it is
powered up
– first opcode must be stored at ROM address
0000H
13
SECTION 2.4: THE PROGRAM COUNTER AND ROM SPACE IN THE
8051
• Placing code in program ROM
– the opcode and operand are placed in ROM
locations starting at memory 0000
14
SECTION 2.4: THE PROGRAM COUNTER AND ROM SPACE IN THE
8051
• ROM memory map in the 8051 family
• 8051 data type and directives
– DB (define byte)
– ORG (origin)
– EQU (equate)
– END directive
16
SECTION 2.5: 8051 DATA TYPES AND DIRECTIVES
• Rules for labels in Assembly language
– each label name must be unique
– first character must be alphabetic
– reserved words must not be used as labels
17
SECTION 2.6: 8051 FLAG BITS AND THE PSW REGISTER
• PSW (program status word) register
19
SECTION 2.7: 8051 REGISTER BANKS AND STACK
• RAM memory space allocation in the 8051
Figure 2–5
RAM Allocation in the 8051
20
SECTION 2.7: 8051 REGISTER BANKS AND STACK
• Register banks in the 8051
21
SECTION 2.7: 8051 REGISTER BANKS AND STACK
• How to switch register banks
22
SECTION 2.7: 8051 REGISTER BANKS AND STACK
• Stack in the 8051
– section of RAM used to store information
temporarily
– could be data or an address
– CPU needs this storage area since there are only a
limited number of registers
23
SECTION 2.7: 8051 REGISTER BANKS AND STACK
• Viewing registers and memory with a
simulator
24
SECTION 2.7: 8051 REGISTER BANKS AND STACK
25
SECTION 2.7: 8051 REGISTER BANKS AND STACK
26
SECTION 2.7: 8051 REGISTER BANKS AND STACK
27
Microcontroller and Interfacing ‐151001
CHAPTER 3 keneth J Ayala
8051 Assembly Language Programming ‐ 8051 Architecture
Prepared by: Mitul S. Nagar
8051 Architecture
Block Diagram of 8051 Microcontroller
8051 Architecture
• 8051 Architecture consists of these specific features:
– Eight‐bit CPU with register A (Accumulator) and B
– Sixteen‐bit Program Counter (PC) and Data Pointer (DPTR)
– Eight‐bit Program Status Word (PSW)
– Eight‐bit Stack Pointer
– Internal ROM of 4 KB
– Internal RAM of 128 Bytes
• Four Register Banks, each containing eight registers
• Sixteen bytes, which may be
• Eighty bytes of general purpose data memory
– Thirty‐two I/O pins arranged as four 8‐bit ports: P0‐P3
– Two 16‐bit Timer/Counter: T0 and T1
– Full duplex serial data receiver/transmitter
– Control Registers
– Two external and three internal interrupt sources
– Oscillator and Clock Circuits
8051 Programming Model
8051 Pin Assignment
PSEN
• PSEN: PSEN stands for program store enable.
In 8051 based system in which an external
ROM holds the program code.
• PSEN is connected to the OE pin of the ROM.
• EA: EA stands for external access
EA Pin connection Program fetch
VCC 1) 0000H through 0FFFH Internal ROM
2) 1000H through FFFFH External ROM/EPROM.
GND External ROM/EPROM.
8051 Internal RAM Organization
8051 Oscillator and Clock
• Pins XTAL1 and XTAL2 are provided for
connecting a resonant network to form an
oscillator.
• The crystal frequency is the basic internal clock
frequency of the microcontroller.
• The manufacturers make available the 8051
designs that can run at specified maximum and
minimum frequencies, typically 1 MHz to 16
MHz.
• Ceramic resonators may be used as a low cost
alternative to crystal resonators, but with the cost
of decreased stability and accuracy.
8051 Oscillator and Clock
8051 Oscillator and Clock
• Clock frequency establishes smallest interval of time
within the microcontroller, called the pulse.
• The smallest interval of time to accomplish any simple
instruction is the machine cycle.
• Each machine cycle is made up of six T‐states.
• A state is basic time interval for discrete operations of
microcontroller such as fetching and op‐code,
decoding an op‐code, executing an op‐code, or
writing a data byte.
• Two oscillator pulses define each state.
• Program instruction may require one, two or four
machine cycles to be executed, depending on type of
instruction.
8051 Oscillator and Clock
Flags and Program Status Word
Control Signals
Address / Data
Port 1 Internals
NOTES: IE1 IT1 IE0 IT0 bits are related
* ISR –Interrupt service Routine to interrupt not timer
The Timer Mode (TMOD) SFR
How to set Counters and Timers
counters timers
Gate 1 0
TR0/1(TCON) 1 1
~INT0/1 1 ‐
C/~T 1 0
Clock counts External clock from Port Internal clock/12
pin3.5(T1), Port pin3.4(T0)
Timer modes and its description
Bits Description
Mode0 13 TLx (5bit)+THx (8bit)
Mode1 16 TLx (8bit)+THx (8bit)
Mode2 8 Load TLx (8bit) From THx (8bit) automatic reload
Mode3 8 TL0 (8bit), TH0(8bit) individual timers
Timer/Counter Control Logic
Timer Mode 0
Timer Mode 1
Timer Mode 2
Timer Mode 3
Serial Data Input/output
• Serial Port Control (SCON) Register:
Serial Data Input/output
Serial Data Input/output
• Power Mode Control (PCON) Register:
Instruction Set
Prepared by
Mitul S. Nagar
Addressing Mode
Addressing mode Example
Immediate Mov R0,#3Fh
Direct Mov R0,25h
Indirect Mov A, @R0 / Mov A, @DPTR
Register Mov A,B
Implicit NOP
Indexed Mov A, @A+DPTR
Arithmetic and Logical Instructions
Mnemonic oprand description byte
ADD A, Rn Add Register to accumulator 1
ADD A, Direct Add direct byte to accumulator 2
ADD A, @Ri Add Indirect RAM to accumulator 1
ADD A, #data Add Immediate data to accumulator 2
ADDC A, Rn Add Register to accumulator with carry 1
ADDC A, Direct Add direct byte to accumulator with carry 2
ADDC A, @Ri Add Indirect RAM to accumulator with carry 1
ADDC A, #data Add Immediate data to accumulator with carry 2
SUBB A, Rn Subtract register from accumulator with borrow 1
SUBB A, Direct Subtract direct from accumulator with borrow 2
SUBB A, @Ri Subtract indirect RAM form Accumulator with borrow 1
SUBB A, #data Subtract immediate data from accumulator with borrow 2
INC A Increment Accumulator by 1 1
INC Rn Increment register by 1 1
INC Direct Increment direct byte by 1 2
INC @Ri Increment indirect RAM by 1 1
Write ALP to add content of 20h location with immediate content 20h
• Mov a, 20h
• Mov r0,#20h
• Add a, r0
• End
Write ALP to add two subsequent memory locations content
• Mov a,20h
• Mov r0,#21h
• Add a, @r0
• End
Write ALP Add two 16 bit data stored at locations from 20H to 23H
Mov a, 20h
Mov r0,#22h
Add a,@r0
Mov 24h,a
Mov a,21h
Inc r0
Addc a,@r0
Mov 25h,a
end
Write ALP to subtract two 16‐bit data from memory location 20h to 23h
Mov a,20h
Mov r0,#22h
Clr c
Subb a, @r0
Mov 24h,a
Mov a,21h
Inc r0
Subb a,@r0
Mov 25h,a
end
Arithmetic and Logical Instructions
Mnemonic oprand description byte
DEC A Decrement Accumulator by 1 1
Mov a,20h
Mov b,21h
Mul ab
Mov 23h,a
Mov 24h,b
Mov a,20h
Mov b,21h
Div ab
Mov 25h,a
Mov 26h,b
end
Arithmetic and Logical Instructions
Mnemonic oprand description byte
XRL A, Rn Logical XRing of accumulator and register 1
XRL Direct, #data Logical XORing of Direct byte and immediate data 3
MOV Rn, direct Move the content of direct byte into Rgister 2
MOV Direct, Direct Move the content of direct byte to destination direct byte 3
MOV @Ri, direct Move the content of register into indirect RAM 2
MOV DPTR, #data16 Load data pointer with 16 bit immediate content 3
Data Transfer Instruction
Mnemonic oprand description byte
MOVC A, @A+DPTR Move Code byte relative to DPTR to accumulator 1
ANL C, bit Logical ANDing between carry flag and direct bit 2
ANL C, /bit Logical ANDing between carry flag and compliment of direct 2
bit
ORL C, bit Logical Oring between direct bit with carry flag 2
ORL C, /bit Logical ORing between compliment of direct bit and carry flag 2
Program Branching
Mnemonic oprand description byte
ACALL Add 11 Absolute subroutine call 2
LCALL Add16 Long Subroutine Call 3
RET Return from Subroutine 1
RETI Return from interrupt 1
AJMP Addr11 Absolute jump 2
LJMP Addr16 Long Jump 3
SJMP Rel Short jump (relative addr) 2
JMP @A+DPTR Jump 1
JZ Rel Jump if accumulator is zero 2
JNZ Rel Jump if accumulator is not zero 2
CJNE A, Direct, rel Compare direct byte with accumulator and jump if not equal 3
CJNE A, #data,rel Compare immediate byte with register and jump if not equal 3
CJNE @Ri, #data, rel Compare immediate data with indirect RAM and jump if not equal 3
CJNE Rn,#data, rel Compare immediate data with register and jump if not equal 3
DJNZ Rn,rel Decrement register and jump if not zero 2
DJNZ Direct, rel Decrement direct byte and jump if not zero 3
NOP No operation 1
Program Branching
Mnemonic oprand description byte
JC Rel Add Jump if CY flag = 1 2
JNC Rel Add Jump if CY flag = 0 2
JB Bit add, rel add Jump if bit = 1 3
JNB Bit add, rel add Jump if bit = 0 3
JBC Bit add, rel add Jump if bit = 1 and clear bit 3
Perform multiplication with out using MUL instruction
Mov r2,#00h
Mov r1,#20h
Mov r0,21h
mov a, #00h
L1: add a,@r1
Jnc L2
Inc r2
L2: Djnz r0,L1
Mov 20h,a
mov 21h,r2
end
Perform Division operation with out using DIV instruction
mov a,20h l4: jc l6
mov r0,21h jnc l7
mov r1,#00h l2: mov 23h,#00h
cjne a,00h,l1 mov 22h, #01h
ajmp l3
ajmp l2
l5: mov 23h,#00h
l1: jc l3 mov 22h, r1
l7:subb a, r0 ajmp l3
inc r1 l6: mov 23h, a
cjne a,00h, l4 mov 22h,r1
inc r1 l3:sjmp l3
ajmp l5 end
Find the largest number from the content stored at memory
location 20h to 25h stored at memory location 26h
Mov r0,#20h
Mov r1,#05h
Mov a, @r0
L1: Inc r0
Mov 02h,@r0
cjne a,02h,L2
Jmp L1
L2:jnc L4
Mov a,@r0
L4: djnz r1,L1
Mov 26h,a
end
Find the square of numbers from 00h to 0fh store them at
memory locations start from 00h to 0fh.
mov psw,#18h db 19h
mov a,#00h db 24h
mov r1,#10h db 31h
l1:mov a,r0 db 40h
add a,#06h db 51h
movc a,@a+pc
db 64h
mov @r0,a
db 79h
inc r0
djnz r1,l1 db 90H
sjmp over db 0A9H
db 00h db 0C4H
db 01h db 0E1H
db 04h over:sjmp over
db 09h end
db 10h
Microcontroller and Interfacing ‐151001
CHAPTER 5
8051 Assembler directives & Addressing Modes
Prepared by: Mitul S. Nagar
8051 data type and directives
8051 data type and directives
• The 8051 microcontroller has only one data type. It is 8 bits,
and the size of each register is also 8 bits.
DB (define byte)
• The DB directive is the most widely used data directive in the
assembler.
• It is used to define the 8‐bit data.
• When DB is used to define data, the numbers can be in
decimal, binary, hex, or ASCII formats.
• The DB directive is the only directive that can be used to
define ASCII strings larger than two characters; therefore, it
should be used for all ASCII data definitions.
DB (define byte)
Assembler directives
• ORG (origin)
• The ORG directive is used to indicate the beginning of the address.
• The number that comes after ORG can be either in hex or in decimal.
• EQU (equate)
• This is used to define a constant without occupying a memory location.
• The EQU directive does not set aside storage for a data item but
associates a constant value with a data label so that when the label
appears in the program, itp constant value will be substituted for the
label.
Assembler directives
• END directive
• Another important pseudocode is the END directive.
• This indicates to the assembler the end of the source
(asm) file.
• The END directive is the last line of an 8051 program,
meaning that in the source code anything after the
END directive is ignored by the assembler.
Introduction
• Data can be addressed in various ways, such as
register, RAM or code space.
• The 8051 provides 5 addressing modes:
– Immediate
– Register
– Direct
– Register Indirect
– Indexed
Immediate Addressing
• Operand is a constant, or value written in code.
• Signified by a leading #
MOV A, #25
MOV R4, #85H
MOV DPTR, #2550H
ACCEL EQU 32
MOV A, #ACCEL
Register Addressing
• R0‐R7 are the registers being addressed.
• The actual RAM location depends on which bank is
selected.
MOV A, R0
MOV R1, A
MOV R4, R7
• Register instructions typically use fewer bytes and
may be faster than direct addressing.
Direct Addressing
• Used to access RAM addresses 00 – FFh, though
typically above register banks.
MOV A, 45H
MOV R1, 50
MOV 35H, A
These perform the same if Register Bank 0 is selected:
MOV 4, A
MOV R4, A
SFR and Addresses
• Special Function Registers (SFRs) are in RAM
locations 80H‐FFH.
• Contain A, PSW, DTPT, B, and numerous other
registers used by the 8051.
• All registers are accessible using direct addressing
with either their address or mnemonic:
MOV 0E0H,#55
MOV A, #55
Program statement
Write code to read PORT 0, and put on PORT 1 using
their (a) names (b) addresses.
Solution
• Names
Mov P0,#23h
Mov A,P0
Mov P1,A
End
• Address
Mov 80h,#23h
Mov A,80h
Mov 90h,A
End
Register Indirect
• R0 and R1 are used to POINT to a RAM address.
• The @ is used to indicate Register Indirect
addressing.
• Allows loops and other means to access a range of
RAM.
Often, when using the accumulator, it is part of the
OpCode:
MOV A, #55
OpCode means to Move into A
Operand (2nd byte) is value 55.
Some instructions, such as PUSH and POP, cannot use A
(not part of opCode) and must use direct addressing:
PUSH 0E0H
PUSH Acc
Program statement
Write Assembly Language Program to move 10 data
from location 35H to 60H sequenciely
Solution
MOV R0, #35H
MOV R1, #60H
MOV R3, #10
Back: MOV A, @R0
MOV @R1, A
INC R0
INC R1
DJNZ R3, Back
Indexed Addressing
• Data pointer is used to access data in ROM.
• Accumulator is used as a pointer offset
MOVC A, @A+DPTR
ORG 0000H
MOV DPTR, #200H
MOV A, #00H
loop: MOVC A, @A+DPTR
MOV SBUF A
…
ORG 200H
MyData: DB "Hello World!"
• Can be used to index a lookup table
MOV DPTR, #Squares
MOV A, P1
MOVC A, @A+DPTR
…
ORG 300H
Squares: DB 0, 1, 4, 9, 16, 25, (etc)
Bit Address of P0‐P3
• All bits of all 4 ports may be independently
addressed:
SETB P2.4
CLR P1.3
MOV C, P2.1
Wait:
JNB P2.2, Wait
Bit Address of SFR
• Many SFRs in the 8051
are bit addressable,
but some are not.
• Just as RAM has byte
addresses, addressable
bits also have bit
addresses.
• User RAM also has a
section that is bit
addressable
MOV 25H, A
SETB 25
Operations with CY
• CY is the work‐horse of the bit operations just as the
Accumulator is for bytes.
Microcontroller and Interfacing ‐151001
CHAPTER 7
8051 Programming in C
Prepared by: Mitul S. Nagar
1
Sections
7.1 Data types and time delay in 8051 C
7.2 I/O programming in 8051 C
7.3 Logic operations in 8051 C
7.4 Data conversion programs in 8051 C
7.5 Accessing code ROM space in 8051 C
7.6 Data serialization using 8051 C
2
Why Program the 8051 in C
• It is easier and less time consuming to write in C than
Assembly.
• C is easier to modify and update.
• You can use code available in function libraries.
• C code is portable to other microcontrollers with little or no
modification.
3
Translation between C and Assembly
• A for‐loop in C
int z;
for (z=255; z>0; z--)
P1=z;
• A loop in Assembly
MOV R2,#255
ABC: MOV P1,R2
DJNZ R2,ABC
4
Section 7.1
Data Types and Time Delay in 8051 C
5
C Data Type
• Understanding the data types of C can help
programmers to write an efficient code.
• We will focus on (See Table7‐1)
– unsigned char, signed char
– unsigned int, signed int,
– Single bit: sbit (sfr) , bit (bit‐addressable RAM)
– Special function register: sfr
• C compiler will allocate a RAM space for your
variables (char, int & bit).
6
Data Types for 8051 C
7
Unsigned Char
• The most widely used data types for the 8051
• 8‐bit data type
• The range of unsigned char: 0‐255 (00‐FFH)
• When do you use unsigned char?
– To set counter value
– The string of ASCII character
– For toggling ports
8
Signed Char
• 8‐bit data type
• 2’s complement representation
• The range of signed char: ‐128 to +127
• When do you use signed char?
– To present a given quantity such as temperature
9
Example 7‐1 (unsigned char)
Write an 8051 C program to send values 00‐FF to port P1.
Solution:
#include <reg51.h>
void main(void)
{
unsigned char z;
for (z=0; z<=255; z++)
P1=z;
}
10
Example 7‐2 (unsigned char)
Write an 8051 C program to send hex values for ASCII characters
of 0,1,2,3,4,5,A,B,C, and D to port P1.
Solution:
#include <reg51.h>
void main(void){
unsigned char mynum[]=“012345ABCD”;
unsigned char z;
for (z=0; z<10; z++)
P1=mynum[z];
}
Note: “012345ABCD” is stored in RAM and can be changed.
11
Example 7‐3 (unsigned char)
Write an 8051 C program to toggle all the bits of P1 continuously.
Solution:
#include <reg51.h>
void main(void) {
for ( ; ; ) { //repeat forever
P1=0x55; //0x: in hex (binary)
P1=0xAA;
}
}
12
Example 7‐4 (signed char)
Write an 8051 C program to send values of ‐4 to 4 to port P1.
Solution:
#include <reg51.h>
void main(void)
{
char mynum[]={+1,-1,+2,-2,+3,-3,+4,-4};
unsigned char z;
for (z=0; z<8; z++)
P1=mynum[z];
}
Displayed hex values are 1, FFh, 2, FEh, 3,
FDh, 4, FCh
13
Integer
• 16‐bit data type
– The range of unsigned int: 0‐65535
– The range of signed int: ‐32,768 to ‐32,767
• Since the 8051 is an 8‐bit microcontroller and
the int data type takes two bytes of RAM, we
must not used the int data type unless we
have to.
• You should try to use unsigned char instead on
int.
14
Example 7‐5 (unsigned int, sbit)
Write an 8051 C program to toggle bit D0 of P1 50,000 times.
Solution:
#include <reg51.h>
sbit MYBIT=P1^0;
void main(void) {
unsigned int z;
for (z=0;z<50000;z++) {
MYBIT=0;
MYBIT=1;
}
}
15
Time Delay
• Three factors that can affect the accuracy of
the time delay:
– Crystal frequency of 8051 system
– 8051 machine cycle timing
– Compiler used for 8051 C
16
Example 7‐6 (time delay)
Write an 8051 C program to toggle bits of P1 continuously
forever with some delay.
Solution:
#include <reg51.h>
void main(void) {
unsigned int x;
for (;;) {
P1=0x55;
for (x=0;x<40000;x++); //time delay
P1=0xAA;
for (x=0;x<40000;x++); }}
17
Example 7‐7 (1/2)
Write an 8051 C program to toggle bits of P1 continuously with a
250 ms delay.
Solution:
#include <reg51.h>
void MSDelay(unsigned int);
void main(void) {
while(1) { //repeat forever
P1=0x55;
MSDelay(250); //time delay
P1=0xAA;
MSDelay(250) }}
18
Example 7‐7 (2/2)
Assume the program is tested for the DS89C420 with
XTML=11.0592MHz.
90ns 1275 = 114750ns 1ms
19
Section 7.2
I/O programming in 8051 C
20
Access SFR
• Way to access SFR and single bit of SFR
– Use name of SFR and reg51.h
#include <reg51.h>
P1=0x55; //P1=55H
• reg51. h is necessary.
• See Example 7‐6.
– Use the sfr data type and declare by yourself
sfr P1 = 0x90;
P1=0x55; //P1=55H
• reg51. h is not necessary.
21
Access Single Bit of SFR
• Way to access a single bit of SFR
– Use sbit and name of SFR
#include <reg51.h>
sbit MYBIT = P1^5; //D5 of P1
• See Example 7‐5.
– Use sbit to declare the bit of SFR and declare by
yourself
sbit MYBIT = 0x95; //D5 of P1
• reg51. h is not necessary.
• See Example 7‐17.
22
Example 7‐16 (1/2) (sfr)
Write an 8051 C program to toggle all the bit of P0, P1 and P2
continuously with a 250 ms time dealy.
Solution (a):
sfr P0 = 0x80; // declare by yourself
sfr P1 = 0x90; // declare by yourself
sfr P2 = 0xA0; // declare by yourself
void MSDelay(unsigned int);
// MSDelay is as same as one in
// Example7-1. Ignored it here.
23
Example 7‐16 (2/2) (sfr)
void main(void) {
unsigned int z;
while(1) { //repeat forever
P0=0x55;
P1=0x55;
P2=0x55;
MSDelay(250); //time delay
P0=0xAA;
P1=0xAA;
P2=0xAA;
MSDelay(250); //time delay
} }
24
Example 7‐17 (sbit)
Write an 8051 C program to turn bit P1.5 on and off 50,000 times.
Solution (a):
sbit MYBIT = 0x95; // P1^5
void main(void) {
unsigned int z;
for (z=0;z<50000;z++) {
MYBIT=1;
MYBIT=0;
} }
This program is similar to Example 7‐5.
25
Access Bit‐addressable RAM
• You can use bit to access one bit of bit‐
addressable section of the data RAM space
20H‐2FH.
#include <reg51.h>
sbit inbit = P1^0;
bit membit; //C compiler assign a RAM space for
membit
membit = inbit; //Read P1^0 to RAM
• See Example 7‐18.
26
Example 7‐18 (bit)
Write an 8051 C program to get the status of bit P1.0, save it,
and send it to P2.7 continuously.
Solution:
#include <reg51.h>
sbit inbit = P1^0;
sbit outbit = P2^7;
bit membit;
void main(void) {
while(1) { //repeat forever
membit = inbit;
outbit = membit }}
27
Section 7.3
Logic operations in 8051 C
28
Bit‐wise Operations in C
• AND & 0011 0101
AND 0000 1111
0x35 & 0x0F = 0x05 0000 0101
• OR | 0000 0100
OR 0110 1000
0x04 | 0x68 = 0x6C
0110 1100
• Exclusive‐OR ^ 0101 0100
0x54 ^ 0x78 = 0x2C XOR 0111 1000
0010 1100
• Inverter ~
NOT 0101 0101
~0x55 = 0xAA 0000 0101
29
Bit‐wise Shift Operation in C
• Shift Right >>
0x9A >> 3 = 0x13 1001 1010 0001 0011
shift right 3 times
0x77 >> 4 = 0x07 0111 0111 0000 0111
shift right 4 times
• Shift Left <<
1001 0110 0110 0000
0x96 << 4 = 0x60
shift left 4 times
30
Bit‐wise Logic Operations for C
31
Example 7‐19
Run the following program on your simulator and examine
the results.
Solution:
#include <reg51.h>
void main(void) {
P0=0x35 & 0x0F;
P0=0x04 | 0x68;
P0=0x54 ^ 0x78;
P0=~0x35;
P0=0x9A >> 3;
P0=0x77 >> 4;
P0=0x96 << 4; }
32
Section 7.4
Data conversion programs in 8051 C
33
Data Conversion
• Packed BCD to ASCII conversion
– See Example 7‐24
• ASCII to packed BCD conversion
– See Example 7‐25
• Checksum byte in ROM
– See Example 7‐29 (using +)
• Binary to decimal and ASCII conversion in C
– See Example 7‐26, 27, 28 ( using /, %)
• Look the content by yourself
34
Example 7‐24
35
Example 7‐26
36
Example 7‐29
37
Table 7‐4. ASCII Code for Digits 0‐9
38
Section 7.5
Accessing code ROM space in 8051 C
39
To Store Data
• We have three spaces to store data:
1. the 128 bytes RAM space with address range 00‐7FH
• If you declare variables (ex: char) to store data, C compiler
will allocate a RAM space for these variable.
2. Use code space
• External code memory (64K) + on‐chip ROM (64K)
• Data is embedded to code or is separated as a data section
3. External data memory for data
• RAM or ROM
• see Chapter 14
40
Data Stored in RAM
• Where are the variables assigned by C compiler?
• 8051 C compiler allocates RAM locations for
variables in the following order:
– Bank 0: addresses 0‐7
– Individual variables: addresses 08H and beyond
– Array elements: addresses right after variables
• Array size is limited in 128 bytes RAM.
– Stack: address right after array elements
• Check your simulation tool
41
8052 RAM Space
• 8052 has 256 bytes RAM.
• Based on 8052 architecture, you should
– Use the reg52.h header file.
– Choose the 8052 option when compiling the
program.
42
Using ROM to Store Data
• To make C compiler use the code space (on‐
chip ROM) instead of RAM space, we can put
the keyword “code” in front of the variable
declaration.
unsigned char mydata[] = “HELLO”
• HELLO is saved in RAM.
code unsigned char mydata[] = “HELLO”
• HELLO is saved in ROM.
• See Example 7‐33
43
Example 7‐33 (1/3)
Compare and contrast the following programs and discuss the
advantages and disadvantages of each one.
Solution (a):
#include <reg51.h>
void main(void) {
P1=“H”; P1=“E”;
P1=“L”; P1=“L”; P1=“O”;
}
Data is embedded into code.
Simple, short, not flexible.
44
Example 7‐33 (2/3)
Solution (b):
#include <reg51.h>
void main(void) {
unsigned char mydata[]=“HELLO”;
unsigned char z;
for (z=0; z<5; z++)
P1 = mydata[z];
}
Data is stored in RAM and does not occupied ROM.
45
Example 7‐33 (3/3)
Solution (c):
#include <reg51.h>
void main(void) {
code unsigned char mydata[]=“HELLO”;
unsigned char z;
for (z=0; z<5; z++)
P1 = mydata[z];
}
Data is stored in ROM. However, data and code are separate.
46
Section 7.6
Data serialization using 8051 C
47
Serializing Data
• Two ways to transfer a byte of data:
1. Using the serial port.
• For PC. See Chapter 10.
2. To transfer data one bit a time and control the
sequence of data and spaces in between them.
• For LCD, ADC, ROM
• Example 7‐34
48
Example 7‐34
Write a C program to send out the value 44H serially one bit at a
time via P1.0. The LSB should go out first.
Solution:
#include <reg51.h>
sbit P1b0 = P1^0;
sbit regALSB = ACC^0;
void main(void) {
unsigned char conbyte = 0x44;
unsigned char x;
ACC = conbyte;
for (x=0; x<8; x++) { ACC P1.0
P1b0 = regALSB; D7 D0
ACC = ACC >> 1; } }
49