FREESCALE 20 JUL 2006 (MNNIT ALLAHABAD)

12 questions. Each carries 10 points. No negative points. Time:1 ½ hrs

1.how we identify the Host b is connected wrongly in the memory

a).
[15:0] [15:0]
HOS
TA
Dual
signal

[15:0] [0:15]
HOS
TB
b). (FOR TWO ARROWS
first arrow for DATA
second for OTHER SIGNALS)

Single
signal

[15:0] [0:15]
HOS
TB

2.find the operating frequency for the ckt setup time=0.75ns , holdtime =1ns.

0.5ns

1ns 2ns

1ns

1.25ns
1ns

clk

0.75ns
3.Dipict setup time and hold time for flip flop and latch from waveforms.

4.What is body effect?

5a).How we use NAND gate for 2- input OR gate.

b).How the XOR gate is implemented by using transmission gates. And XNOR without
complimenting XOR.

6.a)find the low frequency gain of the ckt

Vcc

Rc

Vo

Vin

Rf

b) find the low frequency gain for the ckt

7. What is the value of the ckt if (A,B,C,D are the inputs Y is the o/p)

8a). Draw the characteristics of the Schmidtrigger for the i/p

b).Find the o/p of the op-amp . it is ideal. The i/p 1v sine wave and average is 0v.
9.Draw the state diagram for the o/p is “1” for which the binary value is divide by 5 (ie,,
101 divide by 5) if 0 is added to the binary no. then the no. is 10 now the o/p is “1”.

10.find the logic gates

11.Find the logic to generate the o/p for i/p

First clk is i/p

Second clk is o/p

12.Draw the o/p characterstics of the ckt.

VDD

Vout
VIN

GND