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Deania Fernandez
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1 Objective
The purpose of this lab is to learn how to prepare Spectrum Digital's eZdsp F2812 to implement a nite
impulse response (FIR) lter using an audio input. Since the F2812 does not have a digital-to-analog
converter (DAC) as one of its peripherals, this lab will cover setting up the eZdsp to use two options:
2 FIR Filtering
Before you begin, review the basics of digital ltering.
• TMS320F2812 DSP
• 150 MIPS operating speed
• 18K words on-chip RAM
• 128K words on-chip Flash memory
• 64K words o-chip SRAM memory
• 30 MHz clock
• 2 Expansion Connectors (analog, I/O)
• Onboard IEEE 1149.1 JTAG Controller
• 5-volt only operation with supplied AC adapter
• Onboard IEEE 1149.1 JTAG emulation connector
* Version 1.3: Feb 18, 2004 5:49 pm -0600
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Figure 1
4 Hardware
To begin this lab, there are several tasks you will have to accomplish in order to set up your hardware
before programming the DSP. Some background information has been provided, but if you like additional
information, please refer to the References section at the end of this lab.
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(a) (b)
Figure 2: (a) P8 Header on the eZdsp Board (b) P9 Header on the EVM
You will also need to solder a wire from pin 13 (GND) to pin 18 (VREFLO) on header P9 for proper
ADC operation.
Your eZdsp setup should look like this:
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20 GND 3 GND
23 SPISIMOA 2 SDI
25 SPICLKA 4 SCLK
26 SPISTEA 6 CS
Table 1
It should look something like this:
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After this, the boards are now set to communicate with each other:
Once the boards are connected, powering up the EVM board is the next step. The EVM operates on
four voltages: -12V, 0V, 12V, and 5V. Solder one wire to each pin in connector J7. After partially stripping
each wire, use a power supply source to deliver the proper voltage to each pin. The D1 LED should light
green when done correctly as shown in the following picture:
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Since we will be using a DSP to generate signals, we will want to make sure the EVM board is congured
as such. Look for the SW1 switch on the right side of the board and make sure the following is set:
SW1-1 O
SW1-2 On
SW1-3 O
SW1-4 O
Table 2
Once this is done, a second LED, which will light up orange, signies that the EVM is set to operate via
a DSP User Mode.
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(a) (b)
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Soldering The only preparation the eZdsp requires to interface with the audio processing daughtercard
is to solder two headers to P8 and P9 to the eZdsp:
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Once you are done with that, then all you have to do is join the two boards together through the headers:
(a) (b)
Figure 11: (a) Side View of the Mounted Boards (b) Audio Daughtercard Mounted on the eZdsp
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When you have the audio processing board mounted on the eZdsp F2812, then you will have to connect
the power supply and parallel cable to the eZdsp. The LED labeled `Power' on the daughtercard should
light up bright orange if done correctly.
You will also have to connect the provided speaker to the jumper labeled `R_SPKR' on the daughtercard.
Make sure the black wire is connected to the `-` and the red wire is connected to the `+'.
For our lab, you will be using an Apple iPod to supply the audio source and that will have to be connected
with the supplied cable to the jumper labeled J4 on the daughtercard. Since the iPod we are using does not
have a very reliable battery, be sure to have the iPod connected to a power supply. Your setup should look
like this:
To turn the iPod on, just press the Play button. To turn it o, hold the Play button until the screen
goes blank, just like in previous picture.
Controls The daughtercard features two potentiometers that will be programmed later in this lab to
control the volume of the output signal and the spectrum of lters that will be applied to the input signal.
5 Software
In this part of the lab, we will be using Code Composer Studio to set up the software implementation of the
FIR lter on an audio signal. If you are not familiar with Code Composer Studio, you might want to read
over the ELEC 424 tutorial before you begin.
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There are several peripherals and interfaces we will work with and a little background information will
be given for each, but if you would like more information, please look under the References section at the
end of this lab manual.
SPICCR.all 0x005F
SPICTL.all 0x001F
SPISTS.all 0x0000
SPIBRR.all 0x0002
SPIFFTX.all 0xC028
SPIFFRX.all 0x0028
SPIFFCT.all 0x00
SPIPRI.all 0x0010
SPICCR.bit.SPISWRESET 1
SPIFFTX.bit.TXFIFO 1
SPIFFRX.bit.RXFIFORESET 1
Table 3
note: The FIFOs are enabled and the SPI is interrupt driven. You also control the bit transfer
rate in the SPI baud rate register (SPIBRR).
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For this lab, we will be using sequential sampling, 16-bit cascaded mode and enable the event manager
A (EVA) to be the source trigger for the SOC sequence. We will set up the following registers to do
so:
AdcRegs.ADCCHSELSEQ1.bit.CONV00 0x3
AdcRegs.ADCCHSELSEQ1.bit.CONV01 0x2
AdcRegs.ADCTRL2.bit.EVA_SOC_SEQ1 1
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 1
Table 4
note: The second and third registers listed select ADCIN3 and ADCIN2 for input channels,
respectively. The rst register is set to do one conversion on the sequence.
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The ADC places its results in 16 registers, ADCRESULT0-ADCRESULT15, which are left-justied,
meaning that the four least signicant bits are reserved. Each ADCRESULTn register corresponds to one of
the ADCINA0-ADCINA7 or ADCINB0-ADCINB7 registers.
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EvaRegs.T1PR 0x1f4
EvaRegs.GPTCONA.bit.T1TOADC 1
EvaRegs.T1CON.all 0x1043
Table 5
5.4 Interrupts
Interrupts, as described by Dr. Choi in one of his lab manuals in ELEC 434, provide a mechanism for
handling any infrequent or exception event. The interrupt causes a CPU to make a temporary transfer of
control from its current location to another location that services the event. Variety of sources, internal and
external to the CPU, can generate interrupts. The use of interrupts greatly increases the performance of the
CPU by allowing the I/O devices direct and rapid access to the CPU and by freeing the CPU from the task
of continually testing the status of its I/O devices. The I/O devices assert interrupts to request the CPU
to start a new I/O operation, to signal the completion of an I/O operation, and to signal the occurrence of
hardware and software errors.
The F2812 DSP supports one nonmaskable interrupt (NMI) and 16 maskable prioritized interrupt requests
(INT1-INT14, RTOSINT, and DLOGINT) at the CPU level.
For the purpose of our lab, we will be using interrupts for the ADC and the SPI.
6 Lab Exercise
After you have prepared the eZdsp F2812 for either the EVM or the audio processing daughtercard and
have read the software section of this lab manual, you are to implement an FIR lter on an audio input
signal:
• `remez', `fir1', and `fir2' are dierent commands you can use to in order to get coecients for
low-pass, high-pass, and band-pass lters. You can refer to FIR ltering using Matlab.
• After you run one of the commands, you will have to take the two's complement of the coecients
1
in order to use in the A/D-D/A conversion. Use the twocomplement.m le (written by Dr. H.
Choi). Make sure you divide the coecients by 2 before taking the two's complement.
• To make it easy to include the coecients in your program, you can create assembly les by using
2
save_coef.m le (written by Dr. H. Choi).
• You can view the frequency response by running the `freqz' command.
2. In Code Composer Studio, set up the interrupts for the ADC and SPI.
3. Write the proper functions for the ADC and SPI to implement the lter:
4. You will probably need to write extra functions to initialize the registers, interrupts, and so forth.
5. If you are using the EVM, test your lter by using an oscilloscope to view the output. If you are using
the audio processing daughtercard, you can test the lter by listening to the output signal.
1 http://www.ece.rice.edu/∼choi/elec434/matlab/twocomplement.m
2 http://www.ece.rice.edu/∼choi/elec434/matlab/save_coef.m
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