ACTIVITY#2

NAME: __________________________________ YR. & SEC: ____________ DATE:_________

1. A hot-carrier diode is a diode that ____.

a. Emits light when forward biased
b. Switches very fast
c. Varies resistance with temperature
d. Changes its capacitance with voltage
2. Which of the following are categories of computer system
software?
I. Operating system (OS)
II. Utility Programs
III. Languages Translator
a. I and II only
a. for bias current compensation.
b. II and III only
b. for input offset voltage compensation.
c. I and III only
c. to set input impedance.
d. I, II, and III
d. to set input impedance and voltage gain.
3. A type of filter that passes a narrow band of frequencies
9. For an op-amp having a slew rate SR = 5 V/ms, what is
though a current and attenuates the desired band of
the maximum closed-loop voltage gain that can be used
frequencies that are high or lower than the desired band
when the input signal varies by 0.2 V in 10 ms?
of frequencies.
a. 150
a. Low-pass filter
b. 250
b. Band-reject filter
c. 350
c. Band-pass filter
d. 450
d. High-pass filter
10. The component symbol shown in the figure is a/an:
4. Calculate the new threshold voltage of a germanium diode
when it operates at 100 °C.
a. 0.113 V
b. 0.513 V
c. 0.188 V
d. 0.215 V a. Output regulated operational amplifier
5. A transistor constructed with three-doped semiconductor b. Gated operational amplifier
region separated by two pn junction is called a _____. c. Operational transconductance amplifier
a. Metal oxide semiconductor FET d. Current-controlled operational amplifier
b. Field effect transistor 11. What is the output voltage of any signals applied to the
c. Junction field effect transistor input terminals?
d. Bipolar junction transistor a. The differential gain times the difference input
6. Refer to this figure. The value of VBC is: voltage.
b. The common-mode gain times the common
input voltage.
c. The sum of the differential gain times the
difference input voltage and the common-
mode gain times the common input voltage.
d. The difference of the differential gain times the
difference input voltage and the common-
mode gain times the common input voltage.
12. In a P-channel JFET, the gate-source voltage must be
connected so that the positive polariy is applied to the
_________terminal of the JFET and the negative polarity
is applied to the _______terminal.
a. 9.2V a. gate, source
b. 9.9V b. drain, source
c. -9.2V c. source, gate
d. -9.9V d. source, drain
7. Refer to the figure in No.6. The value of VCE is: 13. What value of input resistance is needed in the given
a. 9.9V circuit to produce the given output voltage?
b. 9.2V
c. 0.7V
d. 19.3V
8. Refer to this figure. The purpose of R 3 is

a. 50 Ω
b. 4.08 kΩ
 c. 4 kΩ b. Both A and R are true but R is not a correct
d. 5 kΩ explanation of A
14. A transistor data sheet usually identifies DC as c. A is true but R is false
a. hre d. A is false but R is true
b. hFE 24. The battery (VE) connections required to forward bias
c. IC the PN junction of the diode are
d. VCE a. - VE terminal to the anode and the - VE terminal
15. How many op-amps does a window comparator to cathode
require? b. + VE terminal to the anode and the + VE
a. 2 terminal to cathode
b. 4 c. + VE terminal to the anode and the - VE terminal
c. 3 to cathode
d. 1 d. - VE terminal to the anode and the + VE
16. Common base (CB) amplifier has _____ compared to terminal to cathode
Common-emitter and common collector amplifiers. 25. There are two mechanisms by which holes and
a. a higher input resistance electrons move through a silicon crystal. They are
b. a large current resistance a. Covalent bond and recombination
c. a lower input resistance b. Diffusion and drift
d. a larger voltage gain c. Free and charge particles
17. What is pin 1 in figure below? d. Forward and reverse bias
26. A diode modelling circuit which considers the threshold
voltage, average resistance and switch as the diode’s
equivalent circuit.
a. Ideal model
b. Simplified model
c. Piecewise linear model
a. Emitter d. Real model
b. Base 27. It is known through experiment that the input bias
c. Collector current at the non- inverting (IB+) and inverting inputs (IB-
d. Gate ) of a certain op-amp is 100 nA and 80 nA respectively.
18. Which is not a MOSFET terminal? Determine the op-amp’s input offset current.
a. Gate a. -20nA
b. Source b. 90nA
c. Drain c. 20nA
d. Base d. 180nA
19. The departure of free electron leaves a vacancy in the 28. A circuit that uses an amplifier with passive filter
valence orbit called holes. Occasionally, a free electron elements is called:
will approach a hole, fill its attraction, and fall into it. a. relaxation oscillator
This merging of free electron and a hole is called b. differential amplifier
_________. c. signal generator
a. Lifetime d. active filter
b. Depletion 29. The circuit shown in figure below is a:
c. Ionization
d. Recombination
20. The primary function of the bias circuit is to
a. hold the circuit stable at VCC
b. hold the circuit stable at vin
c. ensure proper gain is achieved
d. hold the circuit stable at the designed Q-point
21. What is the maximum signal frequency that can be used
in an op- amp having a specified slew rate of 0.5 V/μs?
The maximum output voltage desired is 5V. a. A low pass filter with f = 1/(R1C) rad/s
a. 16 kHz b. A high pass filter with f = 1/(R1C) rad/s
b. 100 kHz c. A low pass filter with f = 1/(R1+R2)C rad/s
c. 32 kHz d. A high pass filter with f = 1/(R1+R2)C rad/s
d. 1 MHz 30. The value of the voltage dropped across two diodes one
22. The electrons in the largest orbit travel ________ than silicon and one germanium, connected in their forward-
the electrons in the smaller orbits. biased direction in parallel with each other and in series
a. More slowly with a 12 V source and a 1 K ohm resistor is:
b. In the same velocity a. 10.6 V
c. Faster b. 0.3 V
d. A little bit slower c. 0.7 V
23. Assertion (A): A decrease in temperature increases the d. 1.0 V
reverse saturation current in a p-n diode. 31. For a tunnel diode astable circuit
Reason (R): When a diode is reverse biased surface a. the load line cuts the characteristics at one
leakage current flows. point on the positive resistance region
a. Both A and R are true and R is correct b. the load line cuts the characteristics in two
explanation of A points
 c. the load line cuts the characteristics in three a. 10 V
points b. 11 V
d. none of these c. 12 V
32. A collector characteristic curve is a graph showing: d. 13 V
a. emitter current (IE) versus collector-emitter 37. The acceptable logic 0 (low level) for a +5 V CMOS
voltage (VCE) with (VBB) base bias voltage held ranges from _________.
constant a. 0 to 0.5 V
b. collector current (IC) versus collector-emitter b. 0 to 1.3 V
voltage (VCE) with (VBB) base bias voltage held c. 0 to 0.8 V
constant d. 0 to 1.5 V
c. collector current (IC) versus collector-emitter 38. If the input to the digital circuit in figure consisting of a
voltage (VC) with (VBB) base bias voltage held cascade of 100 XOR gates is X, then the output Y is equal
constant to:
d. collector current (IC) versus collector-emitter
voltage (VCC) with (VBB) base bias voltage held
constant
33. Which of the following is a symbol for a PIN Diode?

a.
a. 0
b. X
c. 1
d. X’
39. The most commonly used amplifier in sample and hold
b. circuits is
a. a unity gain inverting amplifier
b. unity gain non-inverting amplifier
c. an inverting amplifier with a gain of 10
d. an inverting amplifier with a gain of 100
c. -Answer C
40. In the circuit shown in figure below, what is the output
voltage if a silicon transistor Q and an ideal op-amp are
used?
d.
34. A digital-to-analog converter is an application of the
a. scaling adder
b. voltage-to-current converter
c. noninverting amplifier
d. adjustable bandwidth circuit
35. In a common base connection, current amplification
factor is 0.9. If the emitter current is 1 mA, determine
the value of base current.
a. 0.09 mA
b. 0.9 mA
c. 0.1 mA a. -15 V
d. none of the above b. +15 V
36. For the common base circuit shown in Figure, c. -0.7 V
determine VCB assuming the transistor is made of d. +0.7 V
silicon