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TABLE OF CONTENTS

1. INTRODUCTION...................................................................................................................... 5
1.1. General Block Diagram.................................................................................................. 6
1.2. MB60 Placement of Blocks............................................................................................ 7
1. TUNER(TU102)......................................................................................................................... 8
1.1. General description of Samsung DTOS403LH122X:.................................................... 8
1.2. Features of DTOS403LH122X: ..................................................................................... 8
1.3. Pinning: .......................................................................................................................... 9
2. SAW FILTER – Audio – Epcos K9656M(Z101) ...................................................................... 9
2.1. Standart........................................................................................................................... 9
2.2. Features ........................................................................................................................ 10
2.3. Pin configuration .......................................................................................................... 10
2.4. Frequency response ...................................................................................................... 10
3. SAW FILTER – Video – Epcos K3958M(Z102) .................................................................... 11
3.1. Standart......................................................................................................................... 11
3.2. Features ........................................................................................................................ 11
3.3. Frequency response ...................................................................................................... 12
4. AUDIO AMPLIFIER STAGE WITH AZAD2102(U163, U164) ........................................... 12
4.1. General Description...................................................................................................... 12
4.2. Features ........................................................................................................................ 13
4.3. Absolute Ratings .......................................................................................................... 14
4.3.1. Electrical Characteristics.......................................................................................... 14
4.3.2. Operating Specifications .......................................................................................... 15
4.4. Pinning ......................................................................................................................... 16
5. AUDIO AMPLIFIER STAGE WITH TPA3113(U168) ......................................................... 16
5.1. General Description...................................................................................................... 16
5.2. Features ........................................................................................................................ 17
5.3. Absolute Ratings .......................................................................................................... 17
5.3.1. Electrical Characteristics.......................................................................................... 17
5.3.2. Operating Specifications .......................................................................................... 18
5.4. Pinning ......................................................................................................................... 18
6. POWER STAGE ...................................................................................................................... 19
6.1. Power Management...................................................................................................... 22
7. MICROCONTROLLER – MSTAR(U157) ............................................................................. 23
7.1. General Descripction.................................................................................................... 23
7.2. General Features........................................................................................................... 24
7.3. MSTAR Block Diagram............................................................................................... 28
7.4. Reset Circuit ................................................................................................................. 29
8. CI INTERFACE ....................................................................................................................... 29
7.1 Block Diagram ............................................................................................................. 29
7.1 CI Interface Power Switch ........................................................................................... 30
9. T2 Demodulator CXD2820R (U167)....................................................................................... 30
9.1. General Description...................................................................................................... 30
9.2. Features ........................................................................................................................ 30
9.3. Pinning ......................................................................................................................... 32
10. USB INTERFACE ............................................................................................................... 35
11. DDR2 SDRAM 8M × 4 BANKS × 16 BIT (W9751G6JB) (U154, U155) ......................... 35
11.1. General Description...................................................................................................... 35
11.2. Features ........................................................................................................................ 36
11.3. Electrical Characteristics.............................................................................................. 36
11.4. Pinning ......................................................................................................................... 37
12. SCALER AND LVDS SOCKETS....................................................................................... 39
12.1. LVDS sockets Block Diagram ..................................................................................... 39
12.2. Panel Supply Switch Circuit ........................................................................................ 39
13. NAND FLASH MEMORY - MX25L1005 (U158)............................................................. 40
13.1. General Description...................................................................................................... 40
13.2. Features ........................................................................................................................ 40
13.3. Absolute Maximum Ratings......................................................................................... 41
13.4. Pinning ......................................................................................................................... 41
14. NAND FLASH MEMORY – NAND512XXA2C (U162) .................................................. 42
14.1. General Description...................................................................................................... 42
14.2. Features ........................................................................................................................ 42
14.3. Pinning ......................................................................................................................... 43
15. USB2.0 to Fast Ethernet – ASIX AX88X72A (U171) ........................................................ 44
15.1. General Description...................................................................................................... 44
15.2. Features ........................................................................................................................ 44
15.3. Block Diagram ............................................................................................................. 45
15.4. Pinning ......................................................................................................................... 46
16. LM1117(U175, U180, U181)............................................................................................... 46
16.1. General Description...................................................................................................... 46
16.2. Features ........................................................................................................................ 46
16.3. Applications ................................................................................................................. 47
16.4. Absolute Maximum Ratings......................................................................................... 47
16.5. Pinning ......................................................................................................................... 47
17. MP2012 (U176).................................................................................................................... 47
17.1. General Description...................................................................................................... 47
17.2. Features ........................................................................................................................ 47
17.3. Pinning ......................................................................................................................... 48
18. RTA8283A (U23, U173)...................................................................................................... 48
18.1. General Description...................................................................................................... 48
18.2. Features ........................................................................................................................ 49
18.3. Pinning ......................................................................................................................... 49
19. MP1583 (U174).................................................................................................................... 49
19.1. General Description...................................................................................................... 49
19.2. Features ........................................................................................................................ 50
19.3. Pinning ......................................................................................................................... 50
20. FDC642 ................................................................................................................................ 51
20.1. General Description...................................................................................................... 51
20.2. Features ........................................................................................................................ 51
20.3. Pinning ......................................................................................................................... 51
21. FDC604P.............................................................................................................................. 51
21.1. General Description...................................................................................................... 51
21.2. Features ........................................................................................................................ 51
21.3. Pinning ......................................................................................................................... 52
22. CONNECTORS ................................................................................................................... 52
22.1. SCART (SC1) .............................................................................................................. 52
22.2. HDMI (CN707,CN708) ............................................................................................... 52
22.3. VGA (CN132) .............................................................................................................. 53
23. SERVICE MENU SETTINGS............................................................................................. 54
23.1. Video Settings .............................................................................................................. 55
23.2. Audio Settings .............................................................................................................. 56
23.3. Options ......................................................................................................................... 57
23.4. Tuning Settings ............................................................................................................ 59
23.5. Source Settings ............................................................................................................. 60
23.6. Diagnostic..................................................................................................................... 61
23.7. USB Operations............................................................................................................ 61
24. SOFTWARE UPDATE........................................................................................................ 62
25. TROUBLESHOOTING ....................................................................................................... 63
25.1. No Backlight Problem .................................................................................................. 63
25.2. CI Module Problem...................................................................................................... 64
25.3. Led Blinking Problem .................................................................................................. 66
25.4. IR Problem ................................................................................................................... 67
25.5. Keypad Touchpad Problems ........................................................................................ 67
25.6. USB Problems .............................................................................................................. 68
25.7. No Sound Problem ....................................................................................................... 69
25.8. No Sound Problem at Headphone ................................................................................ 69
25.9. Standby On/Off Problem.............................................................................................. 70
DVD Problems ......................................................................................................................... 70
25.10. No Signal Problem ................................................................................................... 71
1. INTRODUCTION

17MB60 mainboard is driven by MStar SOC. This IC is capable of handling Video and
audio processing, Scaling-Display processing, 3D comb filter, OSD and text processing,
LVDS transmitting, channel and MPEG2/4 decoding, integrated DVB-T/C demodulator
and media center functionality.

TV supports PAL, SECAM, NTSC colour standards and multiple transmission standards
as B/G, D/K, I/I’, and L/L’ including German and NICAM stereo. Also DVB T, DVB-C are
supported internal demoulators of Mstar IC and DVB-T2 is supported with externall
demodulator.

Sound system output is supplying max. 2x2,5W ( less 10%THD at max output) with 4Ω
speakers or 2x6W for stereo 8Ω speakers.

Supported peripherals are:

1 RF input VHF I, VHF III, UHF @ 75Ohm(Common)


1 Side AV (CVBS, R/L_Audio)
1 SCART socket(Common)
1 YPbPr (Optional)
1 PC input(Common)
2 HDMI 1.3 input(1 HDMI input is common, 1 input is optional)
1 S/PDIF output(Optional)
1 Headphone(Optional)
1 Common interface(Common)
1 USB(Common)
1 DVD(Optional)
1 iPod(Optional)
1 On-board Keypad(Optional)
1 External Keypad(Optional)
1 External TouchPad(Optional)
1.1. General Block Diagram
1.2. MB60 Placement of Blocks

USB Keypad YPbPr SAV HP

Nand
Flash
(U162) Speaker
CI Connector Con.
Tuner(TU102)
Saw
Filters

SCART
DDR2 Connector
RAM Main IC
External
Keyboard
(U154) (U157) HDMI VGA Led
Touchboard Connectors Con

SPI
Flash
DVD Inv.
Connector Con
LVDS Ethernet
Connectors Ethernet Connector or SPDIF
DDR2 IC Adapter DC Out
RAM (U171) Input
Power Connector (U155)
1. TUNER(TU102)
A horizontal mounted and Digital Half-Nim tuner is used in the product, which covers 3
Bands(From 48MHz to 862MHz for COFDM, from 45.25MHz to 863.25MHz for CCIR CH).
The tuning is available through the digitally controlled I2C bus (PLL). Below you will find
info about the tuner.

In active antenna option, the following circuit are used. ANT_CTRL pin is controlled by
microcontroller. If ANT_CTRL is low, ANT_PWR will be low. If ANT_CTRL is high,
ANT_PWR will be high.

OVER_CUR_DETECT pin is a monitor for short circuit in antenna. OVER_CUR_DETECT


is low, ANT_CTRL will be low, so ANT_PWR will be low. Finally, short circuit protection is
done by circuits and microcontroller.

1.1. General description of Samsung DTOS403LH122X:


The Tuner covers 3 Bands(from 48MHz to 862MHz for COFDM, from 45.25MHz to
863.25MHz for CCIR CH). Band selection and Tuning are performed digitally via the I2C
bus.

1.2. Features of DTOS403LH122X:


 Receiving System: This TUNER is designed to cover the air channels in VHF and
UHF, compliant with DVB-T standard. and It covers all Analog channels from
48.25MHz to 863.25MHz
 Receiving Channel (Digital, Center frequency):
VHF Low CH. E2 ~ S10 ( 50.5MHz ~ 170.5MHz )
VHF High CH. E5 ~ S41 ( 177.5MHz ~ 466 MHz )
UHF CH. E21 ~ E69 ( 474 MHz ~ 858 MHz )
 Receiving Channel (PAL, Picture carrier frequency):
VHF Low CH. E2 ~ S10 ( 48.25MHz ~ 168.25MHz )
VHF High CH. E5 ~ S41 ( 175.25MHz ~ 463.25MHz )
UHF CH. E21 ~ E70 ( 471.25MHz ~ 863.25MHz )
 Intermediate Frequency:
Digital(center) DVB-T (36.167 MHz)
Digital(center) DVB-C (36.125 MHz)
Analog(picture) 38.9 MHz
 Input Impedance: 75Ω, Unbalanced
 Band Change-Over System
PLL Control System
 Tuning System
Electronic Tuning System With PLL
 Internal(or External) RF AGC function
Built in wideband AGC detector with 6 programmable take-over points

1.3. Pinning:
Terminal
Pin no. Name Pin Description
1 Ant Power Active Antenna Power
2 B+ +5V, Supply Voltage (Preamplifier, DC/DC)
3 RF AGC RF AGC (internal or external mode)
4 CL I2C Serial Clock
5 DA I2C Serial Clock
6 BP +5V, Supply Voltage (RF Amp, PLL, IF Amp)
7 BT(T.P) +33V, within DC/DC circuit
8 AS I2C Address Selection of the PLL
9 IF AGC Control voltage for the IF AGC
10 IF OUT + Output 2 of the IF Amplifier
11 IF OUT - Output 1 of the IF Amplifier
12 AIF Output IF output of the Analog BroadBand

2. SAW FILTER – Audio – Epcos K9656M(Z101)


2.1. Standart
 B/G
 D/K
 I
 L/L’
2.2. Features
 TV IF audio filter with two channels
 Channel 1 (L’) with one pass band for sound carriers at 40,40 MHz (L’) and 39,75
MHz (L’- NICAM)
 Channel 2 (B/G,D/K,L,I) with one pass band for sound carriers between 32,35 MHz
and 33,40 MHz

2.3. Pin configuration


1 Input
2 Switching input
3 Chip carrier - ground
4 Output
5 Output

2.4. Frequency response


3. SAW FILTER – Video – Epcos K3958M(Z102)
3.1. Standart
 B/G
 D/K
 I
 L/L’

3.2. Features
 TV IF filter with Nyquist slopes at 33.90 MHz and 38.90 MHz
 Constant group delay
Pin configuration:
1 Input
2 Input - ground
3 Chip - carrier ground
4 Output
5 Output
3.3. Frequency response

4. AUDIO AMPLIFIER STAGE WITH AZAD2102(U163, U164)


4.1. General Description
17MB60 uses two 2,5W Class D Mono Audio Amplifers for from 16” to 24” TVs.
AZAD2102B is a 2.9 Watts (max. can offer 3.0 Watts @ Load = 3Ω,THD=10%,
AVdd=DVdd=5.5Volt)with high efficiency filter-free class-D audio power amplifier in a
1613 mm x 1613 mm wafer chip scale package (WCSP). AZAD2102B uses Current-
switch technology to achieve high performance class-d amplifier that features 0.03%
THD, 85% efficiency, –70 dB PSRR, to improve RF-rectification immunity.
AZAD2102B provide a Vibration-Spectrum modulation clock for PWM Output. This
vibration frequency is around 10KHZ shift (+/- 5KHZ of Fpwm).

The advantage of the small size package (WCSP) makes AZAD2102B very suitable for
mobile phone and PDA device application. And the Class-D amplifier structure let
AZAD2102B to have highly efficiency power consumption than Class-AB amplifier.
AZAD2102B can shrink the application board, reduce system cost, and external
components.

ESD level protection I/O embedded in AZAD2102B. For general applications, doesn’t
need to add extra ESD protection device (like Varistors) in application system for
AZAD2102B’s I/O.

4.2. Features
 CMOS Technology
 High Efficiency 85%
 High PSRR 70dB at 217Hz
 Differential OP-amp Input
 AZAD2102B provides Vibration-Spectrum Modulation clock for reduce EMI
 Provide Mute function(set Mute_B to GND will go into Mute status)
 For the input stage AZAD2102B built-in a 10Kohm resistors (Gain setting=29.5dB)
 Maximum Battery Life and Minimum Heat
 Efficiency With an 8-Ω Speaker:
 3.5 mA Quiescent Current
 Output Power at 10% THD
 2.85Watts at AVdd=DVdd=5.0Volt, Rload=4Ω
 1.45Watts at AVdd=DVdd=3.6Volt, Rload=4Ω
 0.30Watts at AVdd=DVdd=3.0Volt, Rload=4Ω
 1.75Watts at AVdd=DVdd=5.5Volt, Rload=8Ω
 0.87Watts at AVdd=DVdd=3.6Volt, Rload=8Ω
 0.41Watts at AVdd=DVdd=3.0Volt, Rload=8Ω
 Eliminate Power on and Power-off “Pop” noise
 A Fewer External Components
 Optimized PWM Output Stage Eliminates LC Output Filter
 Internally generate 290 kHz Switching Frequency to eliminate Capacitor and
Resistor
 Improve PSRR (–70 dB) and Wide Supply Voltage (3.0 V to 5.5 V)
 Fully Differential Design Reduces RF Rectification
 This chip has been built-in a very strong ESD protection.
 System level ESD 4KV (IEC 61000-4-2 ESD Contact Level)
 Wafer Chip Scale Package (WCSP)
 TSSOP Package with Exposed Pad
4.3. Absolute Ratings

4.3.1. Electrical Characteristics


4.3.2. Operating Specifications
4.4. Pinning

5. AUDIO AMPLIFIER STAGE WITH TPA3113(U168)


5.1. General Description
17MB60 uses a 6W Class D Mono Audio Amplifers for from 26” to 32” TVs. The
TPA3113D2 is a 6-W (per channel) efficient, Class-D audio power amplifier for driving
bridged-tied stereo speakers. Advanced EMI Suppression Technology enables the use of
inexpensive ferrite bead filters at the outputs while meeting EMC requirements.
SpeakerGuard™ speaker protection circuitry includes an adjustable power limiter and a
DC detection circuit. The adjustable power limiter allows the user to set a "virtual" voltage
rail lower than the chip supply to limit the amount of current through the speaker. The DC
detect circuit measures the frequency and amplitude of the PWM signal and shuts off the
output stage if the input capacitors are damaged or shorts exist on the inputs.

The TPA3113D2 can drive stereo speakers as low as 4 Ω. The high efficiency of the
TPA3113D2, 87%, eliminates the need for an external heat sink when
playing music.

The outputs are also fully protected against shorts to GND, VCC, and output-to-output.
The short-circuit protection and thermal protection includes an auto-recovery feature.
5.2. Features
 6-W/ch into an 8-Ω Loads at 10% THD+N From a 10-V Supply
 12-W into a 4-Ω Mono Load at 10% THD+N From a 10-V Supply
 87% Efficient Class-D Operation Eliminates Need for Heat Sinks
 Wide Supply Voltage Range Allows Operation from 8 V to 26 V
 Filter-Free Operation
 SpeakerGuard™ Speaker Protection Includes Adjustable Power Limiter plus DC
Protection
 Flow Through Pin Out Facilitates Easy Board Layout
 Robust Pin-to-Pin Short Circuit Protection and Thermal Protection with Auto
Recovery Option
 Excellent THD+N / Pop-Free Performance
 Four Selectable, Fixed Gain Settings
 Differential inputs

5.3. Absolute Ratings

5.3.1. Electrical Characteristics


5.3.2. Operating Specifications

5.4. Pinning
6. POWER STAGE
The DC voltages required at various parts of the chassis and panel are provided by a
main power supply unit. MB60 chassis can operate with IPS60, IPS16, IPS17, PW26,
PW27 as main power supply and also with 12V adaptor.

CN706 is used for IPS60, IPS16 and IPS17 and CN1 is used for PW26 and PW27.

JK9 is used for the adapter option and also CN705 inverter socket or DB32 chassis with
CN706 is used to supply backlight.

The power supplies generate 18V, 12V, 5V, 3,3V and 12V, 5V, stand by mode DC
voltages. Power stage which is on-chassis generates 5V, 3V3 stand by voltage and 12V,
8V, 5V, 3V3, 2.5V, 1,8V and 1,2V supplies for other different parts of the chassis. Chassis
block diagram is indicated below.
The blocks on power block diagram is using dependent to main supply. For PW26 and
PW27 just common blocks are enough for proper operation.

For IPS16, IPS17, IPS60 below blocks must work properly.

For adopter case also below blocks are necessary.


Short CCT Protection Circuit

Short circuit protection is necessary for protecting chassis and main IC against damages
when any Vcc supply shorts to ground. Protect pin should be logic high while normal
operation. When there is a short circuit protect pin shold be logic low. After any short
detection, SW forces LEDs on LED card to blink.
6.1. Power Management
7. MICROCONTROLLER – MSTAR(U157)
7.1. General Descripction
The MSD9WB7PX-2 integrates DTV/multi-media all-purpose AV decoder, DVB-T
demodulator, VIF demodulator, and Sound/Video processor into a single device. This
allows the overall BOM to be reduced significantly making the MSD9WB7PX-2 a very
competitive multi-media DTV solution. For ATV users, the MSD9WB7PX-2 provides multi-
standard analog TV support with adaptive 3D video decoding and VBI data extraction.
The build-in audio decoder is capable of decoding FM, AM, NICAM, A2, BTSC and EIA-J
sound standards. The MSD9WB7PX-2 supplies all the necessary A/V inputs and outputs
to complete a receiver design including a multi-port HDMI receiver and component video
ADC. All input selection multiplexed for video and audio are integrated, including full
SCART support with CVBS output. The equipped MStar MACE-5 color engine is the
latest masterpiece from MStar famous color engine series providing excellent video and
picture quality in Full-HD and large-scale displaying system. To meet the increasingly
popular energy legislative requirements without the use of additional hardware, the
MSD9WB7PX-2 has an ultra low power standby mode during which an embedded MCU
can act upon standby events and wake up the system as required.

7.2. General Features


MSD9WB9PX-2, an SOC solution that supports channel decoding, MPEG decoding, and
media-centre functionality enabled by a high performance AV CODEC and CPU Key
features include,
 Digital and Analog DVB Front-End Demodulator
 A Multi-Standard A/V Format Decoder
 The MACE-5 Video Processor
 Home Theater Sound Processor
 Peripheral and Power Management

Transport Stream De-multiplexer


 Supports parallel and serial TS interface, with or without sync signal
 Supports TS input and output for external CI module
 Maximum TS data rate is 104 Mb/sec for serial or 16 MB/sec for parallel
 32 general purpose PID filters and section filters for each transport stream de-
multiplexer
 Supports additional audio/video/PCR filters
 Supports TS DMA channel for time-shift
 Supports 3DES/DES and AES encryption/decryption

MPEG-2 Video Decoder


 ISO/IEC 13818-2 MPEG-2 video MP@HL
 Automatic frame rate conversion
 Supports resolution up to HDTV (1080i, 720p) and SDTV

MPEG-4 Video Decoder


 ISO/IEC 14496-2 MPEG-4 ASP video decoding
 Supports resolutions up to HDTV (1080p@30fps)
 Supports DivX1 Home Theater & HD profilesOptional
 Supports VC-1Optional, FLV video format decoding

H.264 Decoder
 ITU-T H.264, ISO/IEC 14496-10 (main and high profile up to level 4.1) video
decoding
 Supports resolutions for all DVB, ATSC, HDTV, DVD and VCD
 Supports resolution up to 1080p@30fps
 Supports CABAC and CAVLC stream types
 Processing of ES and PES streams, extraction and provision of time stamps
 Up to 40 Mbits bitrate (Blu-ray spec.)

Hardware JPEG
 Supports sequential mode, single scan
 Supports both color and grayscale pictures
 Following the file header scan the hardware decoder fully handles the decode
process
 Supports programmable Region of Interest (ROI)
 Supports formats: 422/411/420/444/422T
 Supports scaling down ratios: 1/2, 1/4, 1/8
 Supports picture rotation

NTSC/PAL/SECAM Video Decoder


 Supports NTSC-M, NTSC-J, NTSC-4.43, PAL (B, D, G, H, M, N, I, Nc), and
SECAM standards
 Automatic standard detection
 Motion adaptive 3D comb filter
 Five configurable CVBS & Y/C S-video inputs
 Supports Teletext, Closed Caption (analog CC 608/ analog CC 708/digital CC
608/digital CC 708), V-chip and SCTE

Multi-Standard TV Sound Processor


 SIF audio decoding
 Supports BTSC/A2/EIA-J demodulation
 Supports NICAM/FM/AM demodulation
 Supports MTS Mode Mono/Stereo/SAP in BTSC/EIA-J mode
 Supports Mono/Stereo/Dual in A2/NICAM mode
 Built-in audio sampling rate conversion (SRC)
 Audio processing for loudspeaker channel, including volume, balance, mute, tone,
EQ, virtual stereo/surround and treble/bass controls
 Advanced sound processing options available, for example: Dolby, SRS, BBE,
QSound, Audyssey
 Supports digital audio format decoding:
 MPEG-1, MPEG-2 (Layer I/II), MP3, Dolby Digital (AC-3), AAC-LC
 Supports Optional Dolby Digital Plus, Dolby Pulse, and MS10 multistream
decoder, including Dolby Digital Encoder for transcoding streams to Dolby Digital
5.1 (DDCO)
 Supports MPEG Audio, Dolby Digital, Dolby Digital Plus format AD (Audio
Description)
 Supports PVR and time-shifting

Audio Interface
One SIF audio input interface with minimal external saw filters
 Four L/R audio line-inputs including Mic. input
 Two L/R outputs for main speakers and additional line-outputs
 Supports stereo headphone driver
 I2S digital audio input & output
 S/PDIF digital audio output
 HDMI audio channel processing
 Programmable delay for audio/video synchronization

Analog RGB Compliant Input Port


 Three analog ports support up to 1080P
 Supports PC RGB input up to SXGA@75Hz
 Supports HDTV RGB/YPbPr/YCbCr
 Supports Composite Sync and SOG Sync-on-Green
 Automatic color calibration
 AV-link support

Analogue RGB Auto-Configuration & Detection


 Auto input signal format and mode detection
 Auto-tuning function including phasing, positioning, offset, gain, and jitter detection
 Sync Detection for H/V Sync

DVI/HDCP/HDMI Compliant Input Port


 Three HDMI/DVI Input ports
 HDMI 1.3 Compliant
 HDCP 1.1 Compliant
 225MHz @ 1080P 60Hz input with 12-bit Deep-color support
 CEC support
 Single link DVI 1.0 compliant
 Robust receiver with excellent long-cable support

MStar Advanced Color Engine (MStarACE-5)


 10/12-bit internal data processing
 Fully programmable multi-function scaling engine
 Nonlinear video scaling supports various modes including Panorama
 Supports dynamic scaling for VC-1
 High-Quality DTV video processor
 3D motion video deinterlacer with motion object stabilizer
 Edge-oriented deinterlacer with edge and artifact smoother
 Automatic 3:2/2:2/M:N pull-down detection and recovery
 3D multi-purpose noise reduction for DTV or lousy air/cable input
 MPEG artifact removal including de-blocking and mosquito noise reduction
 Arbitrary frame rate conversion
 MStar Professional Picture Enhancement:
o Dynamic brilliant and fresh color
o Dynamic Blue Stretch
o Intensified contrast and details
o Dynamic Vivid Skin
o Dynamic sharpened Luma/Chroma edges
o Global and local dynamic depth of field perception
o Accurate and independent color control
o Supports sRGB and xvYCC color processing
o Supports HDMI 1.3 deep color format
 Programmable 12-bit RGB gamma CLUT

Output Interface
 Single/dual link 8/10-bit LVDS output
 Supports panel resolution up to Full-HD (1920x1080) @ 60Hz
 Supports TH/TI format
 Supports dithering options to 6/8-bit output
 Spread spectrum output for EMI suppression

CVBS Video Encoder


 Supports all NTSC/PAL TV Standard
 Stand-alone scaling engine
 Programmable Hue, Contract, Brightness
 Supports TTX/CC/WSS output

CVBS Video Output


 Allows CVBS output of all source inputs

2D Graphics Engine
 Hardware Graphics Engine for responsive interactive applications
 Supports point draw, line draw, rectangle draw/fill, text draw and trapezoid draw
 BitBlt, stretch BitBlt, trapezoid BitBlt, mirror BitBlt and rotate BitBlt
 Raster Operation (ROP)
 Support Porter-Duff

VIF Demodulator
 Compliant with NTSC M/N, PAL B, G/H, I, D/K, SECAM L/L' standards
 Audio/Video dual-path processor
 Stepped-gain PGA with 25 dB tuning range and 1 dB tuning resolution
 Maximum IF gain of 37 dB
 Programmable TOP to accommodate different tuner gain and SAW filter insertion
loss to optimize noise and linearity performance
 Multi-standard processing with single SAW
 Supports silicon tuner low IF output architecture

DVB-T/DVB-C Demodulator
 Digital carrier frequency offset correction: ±500KHz
 Optimised for SFN channels with pre/post-cursive echoes inside/outside the guard
 Acquisition range ±857kHz includes up to 3x: ±1/6 MHz transmitter offset
 Meets Nordig Unified 1.0.3, D-Book 5.0, EICTA E-Book/C-Book test requirement
 ITU J.83 Annex A/C, DVB-C (EN 300 429) compliant
 Supports DVB-C 0.7-7M Baud symbol rate
 ±400kHz internal carrier offset recovery range
 6.8 usecs echo cancellation at 7 Msym/s
 Supports IF, low-IF, zero-IF inputs
 Ultra-fast automatic blind UHF/VHF channel scan (constellations and symbol rate)

Connectivity
 Two USB 2.0 host ports
 USB architecture designed for efficient suppor of external storage devices in
conjunction with off air broadcasting

Miscellaneous
 DRAM interface supporting two 16-bit DDR2 @ 1066MHz
 Supports PVR
 Supports Common Interface for conditional access support
 Bootable SPI interface with serial flash support
 Parallel interface for external OneNAND and NAND flash support
 Power control module with ultra low power
 MCU available in standby mode
 523-ball LFBGA package
 Operating Voltages: 1.26V (core), 1.8V (DDR2), 2.5V and 3.3V (I/O and analog)

7.3. MSTAR Block Diagram


7.4. Reset Circuit
Reset circuit using for initiliazing main Mstar IC. Reset condition is high and nomal
working condition is low for RESET pin.

8. CI INTERFACE
7.1 Block Diagram
7.1 CI Interface Power Switch
It is used for CI module supply, when Module is inserted (it means CI detect is low) This
circuit is opened or closed by CI_POWER_CTRL port of main uController

9. T2 Demodulator CXD2820R (U167)


9.1. General Description
This demodulator is optionall for support T2 reception. The Sony CXD2820R is a
combined DVB-T2, DVB-T and DVB-C demodulator that conforms to the ETSI EN 302-
755 (second generation Terrestrial) ETSI EN 300-744 (Terrestrial) and ETSI EN 300-429
(Cable) standards.

9.2. Features
 Single, 41MHz crystal (can be shared with CXD2813Ranalogue demod IC)
 High performance differential signal ADC
 RF power level monitor ADC
 Low IF and high IF (36MHz) mode input
 Fast 400kHz I2C compatible bus interface
 Quiet I2C interface for dedicated tuner control
 Automatic IF AGC and optional programmable
 RF AGC/GPIO functions
 Configurable parallel and serial MPEG-2 TS outputs with smoothing buffer
 3.3V, 2.5V, 1.2V supplies
 Temperature range -20°C to +85°C
 Supplied with full reference design, including software driver, PCB
schematic/layouts, GUI and documentation
 3.3V for VDD and 2.5V for VDDQ power supply
 All inputs and outputs are compatible with SSTL_2 interface
 JEDEC standard 400mil 66pin TSOP-II with 0.65mm pin pitch
 Fully differential clock inputs (CK, /CK) operation
 Double data rate interface
 Source synchronous - data transaction aligned to bidirectional data strobe (DQS)
 x16 device has 2 bytewide data strobes (LDQS, UDQS) per each x8 I/O
 Data outputs on DQS edges when read (edged DQ) Data inputs on DQS centers
when write (centered DQ)
 Data(DQ) and Write masks(DM) latched on the both rising and falling edges of the
data strobe
 All addresses and control inputs except Data, Data strobes and Data masks
latched on the rising edges of the clock
 Write mask byte controls by LDM and UDM
 Programmable /CAS latency 3 / 4 supported
 Programmable Burst Length 2 / 4 / 8 with both sequential and interleave mode
 Internal 4 bank operations with single pulsed /RAS
 tRAS Lock-Out function supported
 Auto refresh and self refresh supported
 4096 refresh cycles / 32ms
 Full, Half and Matched Impedance(Weak) strength driver option controlled by
EMRS
9.3. Pinning
10. USB INTERFACE
Main Concept IC has integrated 2 USB 2.0 interface. One of them is used for ethernet
function, the other one is used for USB connectivity for last user. Last user can play video,
picture and audio files. Also digital channels can be record to externall storage device by
this interface. All SW files can be updated with interface.

USB circuit has 3 main parts


 Integrated USB 2.0 Host interface of D3 (U157)
 Protection IC (U145)
 Over Curent Protection IC (U149)

11. DDR2 SDRAM 8M × 4 BANKS × 16 BIT (W9751G6JB)


(U154, U155)
11.1. General Description
The W9751G6JB is a 512M bits DDR2 SDRAM, organized as 8,388,608 words × 4 banks
× 16 bits. This device achieves high speed transfer rates up to 1066Mb/sec/pin (DDR2-
1066) for general applications. W9751G6JB is sorted into the following speed grades: -18,
-25 and -3. The -18 is compliant to the DDR2-1066/CL7 specification. The -25 is
compliant to the DDR2-800 (5-5-5) or DDR2-800 (6-6-6) specification. The -3 is compliant
to the DDR2-667 (5-5-5) specification. All of the control and address inputs are
synchronized with a pair of externally supplied differential clocks. Inputs are latched at the
cross point of differential clocks (CLK rising and CLK falling). All I/Os are synchronized
with a single ended DQS or differential DQS- DQS pair in a source synchronous fashion.
11.2. Features
 Power Supply: VDD, VDDQ = 1.8 V± 0.1 V
 Double Data Rate architecture: two data transfers per clock cycle
 CAS Latency: 3, 4, 5, 6 and 7
 Burst Length: 4 and 8
 Bi-directional, differential data strobes (DQS andDQS ) are transmitted / received
with data
 Edge-aligned with Read data and center-aligned with Write data
 DLL aligns DQ and DQS transitions with clock
 Differential clock inputs (CLK and CLK )
 Data masks (DM) for write data
 Commands entered on each positive CLK edge, data and data mask are
referenced to both edges of DQS
 Posted CAS programmable additive latency supported to make command and data
bus efficiency
 Read Latency = Additive Latency plus CAS Latency (RL = AL + CL)
 Off-Chip-Driver impedance adjustment (OCD) and On-Die-Termination (ODT) for
better signal quality
 Auto-precharge operation for read and write bursts
 Auto Refresh and Self Refresh modes
 Precharged Power Down and Active Power Down
 Write Data Mask
 Write Latency = Read Latency - 1 (WL = RL - 1)
 Interface: SSTL_18

11.3. Electrical Characteristics


11.4. Pinning
12. SCALER AND LVDS SOCKETS
12.1. LVDS sockets Block Diagram

12.2. Panel Supply Switch Circuit


This switch is used to open and close panel supply of TCON. It is controlled by port of
main ucontroller. Also with this circit panel sequency could be adjusted correctly. 3 panel
supplys are connected to this circuit. All of them are optional according to panels.
13. NAND FLASH MEMORY - MX25L1005 (U158)
13.1. General Description
MX25L1005 is a CMOS 1,048,576 bit serial Flash memory, which is configured as
131,072 x 8 internally.The MX25L1005 feature a serial peripheral interface and software
protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock
input (SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the
device is enabled by CS# input. The MX25L1005 provide sequential read operation on
whole chip. After program/erase command is issued, auto program/ erase algorithms
which program/ erase and verify the specified page or sector/block locations will be
executed. Program command is executed on page (256 bytes) basis, and erase
command is executes on chip or sector(4K-bytes) or block(64K-bytes). To provide user
with ease of interface, a status register is included to indicate the status of the chip. The
status read command can be issued to detect completion status of a program or erase
operation via WIP bit. When the device is not in operation and CS# is high, it is put in
standby mode and draws less than 10uA DC current. The MX25L1005 utilize MXIC's
proprietary memory cell, which reliably stores memory contents even after 100,000
program and erase cycles.

13.2. Features
 Serial Peripheral Interface (SPI) compatible -- Mode 0 and Mode 3
 1,048,576 x 1 bit structure
 32 Equal Sectors with 4K byte each, Any Sector can be erased individually
 2 Equal Blocks with 64K byte each, Any Block can be erased individually
 Single Power Supply Operation
 2.7 to 3.6 volt for read, erase, and program operations
 Latch-up protected to 100mA from -1V to Vcc +1V
 Low Vcc write inhibit is from 1.5V to 2.5V

13.3. Absolute Maximum Ratings

RATING VALUE
Ambient Operating 0°C to 70°C
Temperature
Storage Temperature -55°C to 125°C
Applied Input Voltage -0.5v to 4.6v
Applied Output Voltage -0.5v to 4.6v
VCC to Ground Potential -0.5v to 4.6v

13.4. Pinning
8-PIN SOP (150mil)

SYMBOL DESCRIPTION
CS# Chip select
SI Serial Data Input
SO Serial Data Output
SCLK Clock Input
HOLD# Hold, to pause the device without
deselecting the device
VCC +3.3v Power Supply
GND Ground
14. NAND FLASH MEMORY – NAND512XXA2C (U162)
14.1. General Description
The NAND flash 528-byte/ 264-word page is a family of non-volatile flash memories that
uses the single level cell (SLC) NAND technology. It is referred to as the small page
family.

The NAND512R3A2C, NAND512R4A2C, and NAND512W3A2C have a density of 512


Mbits and operate with either a 1.8 V or 3 V voltage supply. The size of a page is either
528 bytes (512 + 16 spare) or 264 words (256 + 8 spare) depending on whether the
device has a x8 or x16 bus width.

The address lines are multiplexed with the Data Input/Output signals on a multiplexed x8
or x16 input/output bus. This interface reduces the pin count and makes it possible to
migrate to other densities without changing the footprint.

To extend the lifetime of NAND flash devices it is strongly recommended to implement an


error correction code (ECC). The use of ECC correction allows to achieve up to 100,000
program/erase cycles for each block. A write protect pin is available to give a hardware
protection against program and erase operations.

14.2. Features
 High density NAND flash memories
o 512-Mbit memory array
o Cost effective solutions for mass storage applications

 NAND interface
o x8 or x16 bus width
o Multiplexed address/ data

 Supply voltage: 1.8 V, 3 V


 Page size
o x8 device: (512 + 16 spare) bytes
o x16 device: (256 + 8 spare) words

 Block size
o x8 device: (16K + 512 spare) bytes
o x16 device: (8K + 256 spare) words

 Page read/program
o Random access: 12 μs (3 V)/15 μs (1.8 V) (max)
o Sequential access: 30 ns (3 V)/50 ns (1.8 V) (min)
o Page program time: 200 μs (typ)
 Copy back program mode
 Fast block erase: 2 ms (typ)
 Status register
 Electronic signature
 Chip Enable ‘don’t care’
 Security features
o OTP area

 Serial number (unique ID) option


 Hardware data protection
o Program/erase locked during power transitions

 Data integrity
o 100,000 program/erase cycles (with ECC)
o 10 years data retention

 RoHS compliant packages


 Development tools
o Error correction code models
o Bad blocks management and wear leveling algorithms

14.3. Pinning
15. USB2.0 to Fast Ethernet – ASIX AX88X72A (U171)
15.1. General Description
The AX88772A/AX88172A Low-pin-count USB 2.0 to 10/100M Fast Ethernet controller is
a high performance and highly integrated ASIC which enables low cost, small form factor,
and simple plug-and-play Fast Ethernet network connection capability for desktops,
notebook PC’s, Ultra-Mobile PC’s, docking stations, game consoles, digital-home
appliances, and any embedded system using a standard USB port.

The AX88772A/AX88172A features a USB interface to communicate with a USB Host


Controller and is compliant with USB specification V1.1 and V2.0. The
AX88772A/AX88172A implements 10/100Mbps Ethernet LAN function based on
IEEE802.3, and IEEE802.3u standards with 24KB of embedded SRAM for packet
buffering. The AX88772A/AX88172A integrates an on-chip 10/100Mbps Ethernet PHY to
simplify system design.

The AX88172A provides an optional External Media Interface (EMI) for external PHY or
external MAC for different application purposes. The EMI can be a media-independent
interface (MII) for implementing 100BASE-FX Ethernet or HomePNA functions. The EMI
can also be a Reverse-MII or Reverse Reduced-MII (Reverse-RMII) for glueless MAC-to-
MAC connections to any MCU with Ethernet MAC MII or RMII interface. In addition, the
EMI can be configured to Dual-PHY mode allowing AX88172A to act as an Ethernet PHY
or USB 2.0 PHY for external MAC device that needs Ethernet and USB interfaces in their
system applications. The optional serial interface such as I2C, SPI, and UART are
provided as a control channel from the USB Host Controller to communicate with the
external MCU chip.

15.2. Features
Single chip USB 2.0 to 10/100M Fast Ethernet controller – AX88772A

USB Device Interface


 Integrates on-chip USB 2.0 transceiver and SIE compliant to USB Spec 1.1 and
2.0
 Supports USB Full and High Speed modes with Bus-Power or Self-Power
capability
 Supports 4 or 6 programmable endpoints on USB interface
 High performance packet transfer rate over USB bus using proprietary burst
transfer mechanism
 Supports USB to Ethernet bridging or vice versa in hardware

Fast Ethernet Controller


 Integrates 10/100Mbps Fast Ethernet MAC/PHY
 IEEE 802.3 10BASE-T/100BASE-TX compatible
 Supports twisted pair crossover detection and auto-correction (HP Auto-MDIX)
 Embedded 16KB SRAM for RX packet buffering and 8KB SRAM for TX packet
buffering
 Supports both Full-duplex with flow control and
 Half-duplex with backpressure operation
 Supports 2 VLAN ID filtering, received VLAN Tag (4 bytes) can be stripped off or
preserved MAC/PHY loop-back diagnostic capability

Support Wake-on-LAN Function


 Supports Suspend Mode and Remote Wakeup via Link-up, Magic packet, MS
wakeup frame and external pin
 Optional PHY power down during Suspend Mode

Versatile External Media Interface


 Optional MII interface in MAC mode allows AX88172A to work with external
100BASE-FX Ethernet PHY or HomePNA PHY
 Optional Reverse-MII or Reverse-RMII interface in PHY mode allows AX88172A to
work with external HomePlug PHY or glueless MAC-to-MAC connections
 Optional Reverse-MII interface in Dual-PHY mode allows AX88172A to act as an
Ethernet PHY or USB 2.0 PHY for external MAC device that needs Ethernet and
USB in system application

 Supports 256/512 bytes (93c56/93c66) of serial EEPROM (for storing USB


Descriptors)
 Supports automatic loading of Ethernet ID, USB Descriptors and Adapter
Configuration from EEPROM after power-on initialization
 Provides optional serial interface, I2C, SPI and UART
 Integrates on-chip voltage regulator and only requires a single 3.3V power supply
 12MHz and 25Mhz clock input from either crystal or oscillator source
 Integrates on-chip power-on reset circuit

15.3. Block Diagram


15.4. Pinning

16. LM1117(U175, U180, U181)


16.1. General Description
The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA
of load current. It has the same pin-out as National Semiconductor’s industry standard
LM317. The LM1117 is available in an adjustable version, which can set the output
voltage from 1.25V to 13.8V with only two external resistors. In addition, it is also
available in five fixed voltages, 1.8V, 2.5V, 2.85V, 3.3V, and 5V. The LM1117 offers
current limiting and thermal shutdown. Its circuit includes a zener trimmed bandgap
reference to as-sure output voltage accuracy to within ±1%. The LM1117 series is
available in SOT- 223, TO-220, and TO-252 D-PAK packages. A minimum of 10μF
tantalum capacitor is required at the output to improve the transient response and
stability.

16.2. Features
 Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions
 Space Saving SOT-223 Package
 Current Limiting and Thermal Protection
 Output Current 800mA
 Line Regulation 0.2% (Max)
 Load Regulation 0.4% (Max)
 Temperature Range
 LM1117 0°C to 125°C
 LM1117I -40°C to 125°C
16.3. Applications
 2.85V Model for SCSI-2 Active Termination
 Post Regulator for Switching DC/DC Converter
 High Efficiency Linear Regulators 15
 32” TFT TV Service Manual 10/01/2005
 Battery Charger
 Battery Powered Instrumentation

16.4. Absolute Maximum Ratings

16.5. Pinning

17. MP2012 (U176)


17.1. General Description
The MP2012 is a fully integrated, internally compensated 1.2MHz fixed frequency PWM
step-down converter. It is ideal for powering portable equipment that runs from a single
cell Lithium-Ion (Li+) Battery, with an input range from 2.7V to 6V. The MP2012 can
provide up to 1.5A of load current with output voltage as low as 0.8V. It can also operate
at 100% duty cycle for low dropout applications. With peak current mode control and
internal compensation, the MP2012 is stable with ceramic capacitors and small inductors.
Fault condition protection includes cycle-by-cycle current limiting and thermal shutdown.

17.2. Features
 2.7-6V Input Operation Range
 Output Adjustable from 0.8V to VIN
 1μA Max Shutdown Current.
 Up to 95% Efficiency
 100% Duty Cycle for Low Dropout
 Applications
 1.2MHz Fixed Switching Frequency
 Stable with Low ESR Output Ceramic
 Capacitors
 Thermal Shutdown
 Cycle-by-Cycle Over Current Protection
 Short Circuit Protection
 Available in 6-pin 3x3mm QFN

17.3. Pinning

Pin Name Description


#
1 FB Feedback input. An external resistor divider from
the output to GND, tapped to the FB pin sets the
output voltage.
2 GND, Ground pin. Connect exposed pad to ground
Exposed plane for proper thermal performance.
Pad
3 SW Switch node to the inductor.
4 PVIN Input supply pin for power FET.
5 VIN Input Supply pin for controller. Put small
decoupling ceramic near this pin.
6 EN Enable input, “High” enables MP2012. EN is
pulled to GND with 1Meg internal resistor.

18. RTA8283A (U23, U173)


18.1. General Description
The RT8283A is a high-efficiency, monolithic synchronous step-down DC/DC converter
that can deliver up to 3A output current from a 4.5V to 23V input supply. The RT8283A's
current mode architecture and external compensation allow the transient response to be
optimized over a wide range of loads and output capacitors. Cycle-by-cycle current limit
provides protection against shorted outputs and soft-start eliminates input current surge
during start-up. The RT8283A also provides output under voltage protection and thermal
shutdown protection. The low current (<3μA) shutdown mode provides output disconnect,
enabling easy power management in batterypowered systems. The RT8283A is available
in a SOP-8 package.
18.2. Features
 ±1.5% High Accuracy Feedback Voltage
 Integrated N-MOSFET Switches
 Current Mode Control
 Fixed Frequency Operation : 340kHz
 Output Adjustable from 0.8V to 20V
 Up to 95% Efficiency
 Thermal Shutdown Protection

18.3. Pinning

Pin No. Pin Description


Name
1 BOOT Bootstrap for high-side gate driver. Connect a 0.1μF or
greater ceramic capacitor from BOOT to SW pins.
2 VIN Input Supply 4.5V to 23V. Must bypass with a suitably
large ceramic capacitor.
3 SW Phase Node--Connect to external L-C filter..
4, 9 (Exposed GND Ground.
Pad)
5 FB Feedback Input pin is connected to the converter output.
It is used to set the output of the converter to regulate to
the desired value via an internal res divider. For an
adjustable output, an external res divider is connected to
this pin.
6 COMP Compensation Node. COMP is used to compensate the
regulation Control loop. Connect a series RC network
from COMP to GND. In some cases, an additional
capacitor from COMP to GND is required.
7 EN Enable Input Pin. Logic high enables the converter; a
logic low forces the RT8253A into shutdown mode.
Attach this pin to VIN with a 100kΩ pull up resistor for
automatic startup.
8 SS Soft-Start Control Input. SS controls the soft-start period.
Connect a capacitor from SS to GND to set the soft-start
period. A 0.1μF capacitor sets the soft-start period to
13.5ms.

19. MP1583 (U174)


19.1. General Description
The MP1583 is a step-down regulator with a built-in internal Power MOSFET. It achieves
3A of continuous output current over a wide input supply range with excellent load and
line regulation. Current mode operation provides fast transient response and eases loop
stabilization. Fault condition protection includes cycle-by-cycle current limiting and thermal
shutdown. An adjustable soft-start reduces the stress on the input source at start-up. The
MP1583 requires a minimum number of external components, providing a compact
solution.

19.2. Features
 3A Output Current
 Programmable Soft-Start
 100mΩ Internal Power MOSFET Switch
 Stable with Low ESR Output Ceramic Capacitors
 Up to 95% Efficiency
 20μA Shutdown Mode
 Fixed 385KHz Frequency
 Thermal Shutdown
 Cycle-by-Cycle Over Current Protection
 Wide 4.75V to 23V Operating Input Range
 Output Adjustable from 1.22V to 21V
 Under-Voltage Lockout

19.3. Pinning

Pin Pin Description


No. Name
1 BOOT High-Side Gate Drive Bootstrap Input. BS supplies the drive for the
high-side N-Channel MOSFET switch.
2 IN Power Input. Drive IN with a 4.75V to 23V power source.
3 SW Power Switching Out is the switching node that supplies power to the
output
4 GND Ground.
5 FB Feedback Input. FB senses the output voltage and regulates it. Drive
FB with a resistive voltage divider from the output voltage. FB
threshold is 1.222V.
6 COMP Compensation Node is used to compensate the regulation control
loop.
7 EN Enable/UVLO. A voltage greater than 2.71V enables operation. For
complete low current shutdown the EN pin voltage needs to be at less
than 900mV. When the voltage on EN exceeds 1.2V, the internal
regulator will be enabled and the soft-start capacitor will begin to
charge. The MP1583 will start switching after the EN pin voltage
reaches 2.71V.
8 SS Soft-Start Control Input. SS controls the soft-start period.
20. FDC642
20.1. General Description
This P-Channel 2.5V specified MOSFET is produced using Fairchild’s advanced
PowerTrench® process that has been especially tailored to minimize on-state resistance
and yet maintain low gate charge for superior switching performance.

These devices have been designed to offer exceptional power dissipation in a very small
footprint for applications where the larger packages are impractical.

20.2. Features
 Max rDS(on) = 65 mΩ at VGS = -4.5 V, ID = -4.0 A
 Max rDS(on) = 100 mΩ at VGS = -2.5 V, ID = -3.2 A
 Fast switching speed
 Low gate charge (11nC typical)
 High performance trench technology for extremely low rDS(on)
 SuperSOTTM-6 package: small footprint (72% smaller than standard SO-8);
low profile (1 mm thick)
 Termination is Lead-free and RoHS Compliant

20.3. Pinning

21. FDC604P
21.1. General Description
This P-Channel 1.8V specified MOSFET uses Fairchild’s low voltage PowerTrench
process. It has been optimized for battery power management applications.

21.2. Features
 –5.5 A, –20 V. RDS(ON) = 33 mΩ @ VGS = –4.5 V
 RDS(ON) = 43 mΩ @ VGS = –2.5 V
 RDS(ON) = 60 mΩ @ VGS = –1.8 V
 Fast switching speed.
 High performance trench technology for extremely low RDS(ON)(S)
21.3. Pinning

22. CONNECTORS
22.1. SCART (SC1)

22.2. HDMI (CN707,CN708)


22.3. VGA (CN132)
23. SERVICE MENU SETTINGS
In order to reach service menu, First Press “MENU” Then press the remote control code
two times, which is “4725”.

In first screen following items can be seen:


23.1. Video Settings
23.2. Audio Settings
23.3. Options
Options-1
Options-2
23.4. Tuning Settings
23.5. Source Settings
23.6. Diagnostic

23.7. USB Operations


USB operations option can not be used directly. It can be used for updating panel tool, hw
congiguration etc.
24. SOFTWARE UPDATE
In MB60 project there is only one software. From following steps software update
procedure can be seen:

1. MB60_en.bin, mboot.bin and usb_auto_update_T4.txt documents should copy directly


inside of a flash memory(not in a folder).
2. Put flash memory to the tv when tv is powered off.
3. Power on the and wait when the tv is opened.
4. If First Time Installition screen comes, it means software update procedure is
succesful.
25. TROUBLESHOOTING
25.1. No Backlight Problem
Problem: If TV is working, led is normal and there is no picture and backlight on the panel.

Possible couses: Backlight pin, dimming pin, backlight supply, stby on/off pin

Backlight pin should be high in open position. If it is low, please check Q181 and panel
cables.

Dimming pin should be high or square wave in open position. If it is low, please check
S16 for Mstar side and panel or power cables, connectors.

Backlight power supply should be in panel specs. Please check CN705 for MB60, related
connectors for power supply cards.
STBY_ON/OFF should be low for standby on condition, please check R1677.

25.2. CI Module Problem


Problem: CI is not working when CI module inserted.

Possible couses: Supply, suply control pin, detect pins, mechanical positions of pins
CI supply shoul be 5V when CI module inserted. If it is not 5V please check
CI_POWER_CTRL, this pin should be low.
Please check mechanical positions of CI module.

Detect ports should be low. If it is not low please check CI connector pins, CI module pins
and 3V3_VCC on MB60.
25.3. Led Blinking Problem
Problem: LED blinking, no other operation

This problem indicates a short on Vcc voltages. Protect pin should be logic high while
normal operation. When there is a short circuit protect pin will be logic low. If you detect
logic low on protect pin, unplug the TV set and control voltage points with a multimeter to
find the shorted voltage to ground.
25.4. IR Problem
Problem: LED or IR not working
Check LED card supply on MB60 chasis.

25.5. Keypad Touchpad Problems


Problem: Keypad or Touchpad is not working

Check keypad supply and KEYBOARD pin on MB60.


25.6. USB Problems
Problem: USB is not working or no USB Detection.

Check USB Supply, It should be nearly 5V. Also USB Enable should be logic high.
25.7. No Sound Problem
Problem: No audio at main TV speaker outputs.

Check supply voltages of VDD_AUDIO, 5V_VCC and 3V3_VCC with a voltage-meter.


There may be a problem in headphone connector or headphone detect circuit (when
headphone is connected, speakers are automatically muted). Measure voltage at
HP_DETECT pin, it should be 3.3v.

25.8. No Sound Problem at Headphone


Problem: No audio at headphone output.

Check HP detect pin, when headphone is. Check 5V_VCC and 3V3_VCC with a voltage-
meter.
25.9. Standby On/Off Problem
Problem:
Device cannot boot, TV hangs in standby mode.

There may be a problem about power supply. Check 12V_VCC, 5V_VCC and 3V3_VCC
with a voltage-meter. Also there may be a problem about SW. Try to update TV with latest
SW. Additionally it is goood to check SW printouts via hyper-terminal (or Teraterm).
These printouts may give a clue about the problem.

DVD Problems
Problem: DVD is not working.

Check that DVD source is selected in Service menu. Check supply voltage of DVD
namely 12V_VCC.
25.10. No Signal Problem
Problem: No signal in TV mode.

Check tuner supply voltage; 5V_TUN. Check tuner options are correctly set in Service
menu. Check AGC voltage at RF_AGC pin of tuner.
1 2 3 4 5 6 7 8

DDR18V
DDR18V C723 C721 C722 C719 C720 C717
2 2 2 2 2 2
DDR18V 100n 100n 100n 100n 100n 100n DDR18V
1 1 1 1 1 1

2 C718 2 C715 2 C714 2 C716 2 C711 2 C713 10V 10V 10V 10V 10V 10V
100n 100n 100n 100n 100n 100n

M9

M9
1 1 1 1 1 1

G9

G7

G3

G1

G9

G7

G3

G1
R1

C9

C7

C3

C1

R1

C9

C7

C3

C1
E1

A1

E9

A9

E1

A1

E9

A9
J1

J9

J1

J9
10V 10V 10V 10V 10V 10V

VDDL

VDD5

VDD4

VDD3

VDD2

VDD1

VDDQ10

VDDQ9

VDDQ8

VDDQ7

VDDQ6

VDDQ5

VDDQ4

VDDQ3

VDDQ2

VDDQ1

VDDL

VDD5

VDD4

VDD3

VDD2

VDD1

VDDQ10

VDDQ9

VDDQ8

VDDQ7

VDDQ6

VDDQ5

VDDQ4

VDDQ3

VDDQ2

VDDQ1
A A
AA_MDATA0 AA_MADR0 BB_MDATA0 BB_MADR0
DQ0 A0 DQ0 A0
A_MADR0 C10 E23 B_MADR0 G8 M8 G8 M8
A_MADR[0] B_MADR[0]
A_MADR1 A22 U24 B_MADR1 AA_MDATA1 AA_MADR1 BB_MDATA1 BB_MADR1
A_MADR[1] B_MADR[1] R1328 DQ1 A1 DQ1 A1
A_MADR2 A9 D24 B_MADR2 B_MADR13 22R BB_MADR13 G2 M3 G2 M3
A_MADR[2] B_MADR[2] 56R
A_MADR3 B23 V25 B_MADR3 AA_MDATA2 AA_MADR2 BB_MDATA2 BB_MADR2
A_MADR[3] B_MADR[3] DQ2 A2 DQ2 A2
A_MADR4 B9 D25 B_MADR4 B_MADR5 22R BB_MADR5 H7 M7 H7 M7
A_MADR[4] B_MADR[4] R4
A_MADR5 A23 V24 B_MADR5 B_MADR10 4 5 BB_MADR10 AA_MDATA3 AA_MADR3 BB_MDATA3 BB_MADR3
A_MADR[5] B_MADR[5] R3 DQ3 A3 DQ3 A3
A_MADR6 C9 D23 B_MADR6 B_MADR1 3 6 BB_MADR1 H3 N2 H3 N2
A_MADR[6] B_MADR[6] R2
A_MADR7 C23 W25 B_MADR7 B_BADR_BA2 2 7 BB_BADR_BA2 AA_MDATA4 AA_MADR4 BB_MDATA4 BB_MADR4
A_MADR[7] B_MADR[7] R1 DQ4 A4 DQ4 A4
A_MADR8 B8 C25 B_MADR8 1 8 H1 N8 H1 N8
A_MADR[8] B_MADR[8] 56R
A_MADR9 A24 W24 B_MADR9 R1373 AA_MDATA5 AA_MADR5 BB_MDATA5 BB_MADR5
A_MADR[9] B_MADR[9] DQ5 A5 DQ5 A5
A_MADR10 B22 V23 B_MADR10 B_MADR12 22R BB_MADR12 H9 N3 H9 N3
A_MADR[10] B_MADR[10] R4
A_MADR11 C8 C24 B_MADR11 B_MADR7 4 5 BB_MADR7 AA_MDATA6 AA_MADR6 BB_MDATA6 BB_MADR6
A_MADR[11] B_MADR[11] R3 DQ6 A6 DQ6 A6
A_MADR12 B24 W23 B_MADR12 B_MADR9 3 6 BB_MADR9 F1 N7 F1 N7
A_MADR[12] B_MADR[12] R2
A_MADR13 B7 B25 B_MADR13 B_MADR3 2 7 BB_MADR3 AA_DDR2_DQS0 AA_MADR7 BB_DDR2_DQS0 BB_MADR7
A_MADR[13] B_MADR[13] R1 LQDS A7 LQDS A7
1 8 F7 P2 F7 P2
56R
A_MDATA0 C13 R1611 AA_DDR2_DQSB0 AA_MADR8 BB_DDR2_DQSB0 BB_MADR8
B A_MDATA1 A19
A_MDATA[0]
H23 B_MDATA0 E8
LQDS_P A8
P8 E8
LQDS_P A8
P8 B
A_MDATA[1] B_MDATA[0] R1608
A_MDATA2 A12 P24 B_MDATA1 AA_DDR2_DQM0 AA_MADR9 BB_DDR2_DQM0 BB_MADR9
A_MDATA[2] B_MDATA[1] 56R LDM A9 LDM A9
A_MDATA3 B19 G24 B_MDATA2 B_MADR2 22R1 8 BB_MADR2 F3 P3 F3 P3
A_MDATA[3] B_MDATA[2] R1
A_MDATA4 C20 R23 B_MDATA3 B_MADR0 2 7 BB_MADR0 AA_MDATA7 AA_MADR10 BB_MDATA7 BB_MADR10
A_MDATA[4] B_MDATA[3] R2 DQ7 A10 DQ7 A10
A_MDATA5 B12 R24 B_MDATA4 B_CASZ 3 6 BB_CASZ F9 M2 F9 M2
A_MDATA[5] B_MDATA[4] R3
A_MDATA6 C19 G25 B_MDATA5 B_RASZ 4 5 BB_RASZ AA_MDATA8 AA_MADR11 BB_MDATA8 BB_MADR11
A_MDAT[6] B_MDATA[5] R4 DQ8 A11 DQ8 A11
A_MDATA7 A13 P23 B_MDATA6 C8 P7 C8 P7

HY5PS121621C

HY5PS121621C
A_MDATA[7] B_MDATA[6]
A_MDATA8 B14 H24 B_MDATA7 AA_MDATA9 AA_MADR12 BB_MDATA9 BB_MADR12
A_MDATA[8] B_MDATA[7] DQ9 A12 DQ9 A12
A_MDATA9 C18 J25 B_MDATA8 C2 R2 C2 R2
A_MDATA[9] B_MDATA[8] R1349
A_MDATA10 C14 N23 B_MDATA9 B_MCLK22R BB_MCLK AA_MDATA10 AA_BADR_BA0 BB_MDATA10 BB_BADR_BA0

U155

U154
A_MDATA[10] B_MDATA[9] 56R DQ10 BA0 DQ10 BA0
A_MDATA11 A18 J24 B_MDATA10 D7 L2 D7 L2
A_MDATA[11] B_MDATA[10] R1315
A_MDATA12 B18 N24 B_MDATA11 B_MCLKZ22R BB_MCLKZ AA_MDATA11 AA_BADR_BA1 BB_MDATA11 BB_BADR_BA1
A_MDATA[12] B_MDATA[11] 56R DQ11 BA1 DQ11 BA1
A_MDATA13 B13 N25 B_MDATA12 D3 L3 D3 L3
A_MDATA[13] B_MDATA[12]
A_MDATA14 B17 J23 B_MDATA13 AA_MDATA12 AA_RASZ BB_MDATA12 BB_RASZ
A_MDATA[14] B_MDATA[13] DQ12 RAS_P DQ12 RAS_P
A_MDATA15 C15 M25 B_MDATA14 D1 K7 D1 K7
A_MDATA[15] B_MDATA[14]
K23 B_MDATA15 B_MDATA1122R BB_MDATA11 AA_MDATA13 AA_CASZ BB_MDATA13 BB_CASZ
B_MDATA[15] R4 DQ13 CAS_P DQ13 CAS_P
A_DDR2_DQS0 A16 B_MDATA12 4 5 BB_MDATA12 D9 L7 D9 L7
A_DQS[0] R3
A_DDR2_DQSB0 C16 L24 B_DDR2_DQS0 B_MDATA9 3 6 BB_MDATA9 AA_MDATA14 AA_WEZ BB_MDATA14 BB_WEZ
A_DQSB[0] B_DQS[0] R2 DQ14 WE_P DQ14 WE_P
A_DDR2_DQS1 A15 L23 B_DDR2_DQSB0 B_MDATA14 2 7 BB_MDATA14 B1 K3 B1 K3
C A_DDR2_DQSB1 B15
A_DQS[1] B_DQSB[0]
K24 B_DDR2_DQS1 1
R1
8 AA_MDATA15 BB_MDATA15 C
A_DQSB[1] B_DQS[1] 56R DQ15 CS_P DQ15 CS_P
K25 B_DDR2_DQSB1 R1375 B9 L8 B9 L8
B_DQSB[1]
A_DDR2_DQM0 B16 AA_DDR2_DQS1 AA_MCLKE BB_DDR2_DQS1 BB_MCLKE
A_DQM[0] UDQS CKE UDQS CKE
A_DDR2_DQM1 C17 M23 B_DDR2_DQM0 B7 K2 B7 K2
A_DQM[1] B_DQM[0]
M24 B_DDR2_DQM1 AA_DDR2_DQSB1 AA_MCLK BB_DDR2_DQSB1 BB_MCLK
B_DQM[1] UDQS_P CK UDQS_P CK
A_MCLK C12 A8 J8 A8 J8
A_MCLK
A_MCLKZ B11 G23 B_MCLK AA_DDR2_DQM1 AA_MCLKZ BB_DDR2_DQM1 BB_MCLKZ
A_MCLKZ B_MCLK UDM CK_P UDM CK_P
A_MCLKE C21 F25 B_MCLKZ B3 K8 B3 K8
A_MCLKE 1 B_MCLKZ

R1944
150R
T23 B_MCLKE AVDD_DDR AA_ODT BB_ODT
B_CKE 1k NC1 ODT 150R NC1 ODT
A_WEZ B20 A2 K9 A2 K9
A_RASZ B10
A_WEZ U157 R25 B_WEZ
R1365
MVREF
R1943
A_RASZ B_WEZ NC2 VSS1 NC2 VSS1
A_CASZ A10 F23 B_RASZ E2 A3 E2 A3
A_CASZ B_RASZ
A_BADR_BA0 A21 E24 B_CASZ AA_BADR_BA2 BB_BADR_BA2
A_BADR[0] B_CASZ NC3 VSS2 NC3 VSS2
R1356

A_BADR_BA1 B21 T24 B_BADR_BA0 2 C683 L1 E3 L1 E3


1k

A_BADR[1] B_BADR[0] 100n


A_BADR_BA2 C22 T25 B_BADR_BA1 1
A_BADR[2] B_BADR[1] 10V NC4 VSS3 NC4 VSS3
A_ODT C11 U23 B_BADR_BA2 R3 J3 R3 J3
A_ODT B_BADR[2]
F24 B_ODT
B_ODT NC5 VSS4 NC5 VSS4
R7 N1 R7 N1

D MSD9WB7PX-2 AA_MADR13
NC6 VSS5
BB_MADR13
NC6 VSS5 D
D22 MVREF R8 P9 R8 P9

VSSQ10

VSSQ10
MVREF

VSSQ9

VSSQ8

VSSQ7

VSSQ6

VSSQ5

VSSQ4

VSSQ3

VSSQ2

VSSQ1

VSSQ9

VSSQ8

VSSQ7

VSSQ6

VSSQ5

VSSQ4

VSSQ3

VSSQ2

VSSQ1
VSSDL

VSSDL
VREF

VREF
DDR18V 1k

H8

H2

D8

D2

H8

H2

D8

D2
E7

B8

B2

A7

E7

B8

B2

A7
F8

F2

F8

F2
J2

J7

J2

J7
R1363
DDR18V 1k
R1364
A_MDATA1122R AA_MDATA11
R4

R1354
A_MDATA12 4 5 AA_MDATA12
COMMON 2 C689

1k
R3 R1602 100n F181
A_MDATA9 3 6 AA_MDATA9 A_MADR13 22R AA_MADR13 1
R2 56R 10V DDR18V
R1355

2 7 C687 1V8_VCC
A_MDATA14 AA_MDATA14 2

OPTIONAL 60R
1k

R1 100n C712 C709 C710 C782


1 8 A_MADR5 22R AA_MADR5 1 2 2 2
56R R4 10V 100n 100n 100n 22u
R1367 A_MADR10 4 5 AA_MADR10 1 1 1
R3 10V 10V 10V 16V
A_MDATA7 22R AA_MDATA7 A_MADR1 3 6 AA_MADR1
R4 R2
A_MDATA0 4 5 AA_MDATA0 A_BADR_BA2 2 7 AA_BADR_BA2
R3 R1
A_MDATA2 3 6 AA_MDATA2 1 8
R2 56R
A_MDATA5 2 7 AA_MDATA5 R1380
R1 R1371
1 8
56R 56R
R1369 A_MADR12 22R AA_MADR12 B_MDATA6 22R1 8 BB_MDATA6
E A_MADR7 4
R4
5 AA_MADR7 B_MDATA1 2
R1
7 BB_MDATA1 E
R1610 R3 R2
A_MADR9 3 6 AA_MADR9 B_MDATA3 3 6 BB_MDATA3
56R R2 R3 R1346
A_MDATA6 1 8 AA_MDATA6 A_MADR3 2 7 AA_MADR3 B_MDATA4 4 5 BB_MDATA4 B_ODT 22R BB_ODT
R1 R1 R4 56R 1N4148

TP14
1 8
A_MDATA1
A_MDATA3
2
3
R2
R3
7
6
AA_MDATA1
AA_MDATA3
56R
R1370 A_ODT
R1603
56R
22R AA_ODT R1612
56R 3V3_STBY
SERIAL FLASH NC
2

D165
1

A_MDATA4 4 5 AA_MDATA4 B_MDATA1522R BB_MDATA15 B_WEZ 22R1 8 BB_WEZ


R4 R1613 R4 R1 F172
B_MDATA8 4 5 BB_MDATA8 B_MCLKE 2 7 BB_MCLKE

1
1 2
56R R3 R2

R1357

R1358
R1368 3V3_STBY
A_WEZ 22R1 8 AA_WEZ B_MDATA10 3 6 BB_MDATA10 B_BADR_BA1 3 6 BB_BADR_BA1 330R

1k

1k

TP15
TP40
TP11
56R R1 R2 R3 C658
A_MDATA1522R AA_MDATA15 A_MADR2 22R1 8 AA_MADR2 A_MCLKE 2 7 AA_MCLKE B_MDATA13 2 7 BB_MDATA13 B_BADR_BA0 4 5 BB_BADR_BA0 2
R4 R1 R2 R1 R4

R1183
4 5 1 8 100n
A_MDATA8 AA_MDATA8 A_MADR0 2 7 AA_MADR0 A_BADR_BA1 3 6 AA_BADR_BA1 U158

4k7
1
R3 R2 R3 56R 10V
A_MDATA10 3 6 AA_MDATA10 A_CASZ 3 6 AA_CASZ A_BADR_BA0 4 5 AA_BADR_BA0 R1377 MX25L512

TP12
R2 R3 R4

1
A_MDATA13 2 7 AA_MDATA13 A_RASZ 4 5 AA_RASZ SPI_CSN_1 1 8
R1 R4 R1327 R4 CS# VCC
1 8 B_MDATA7 22R BB_MDATA7 B_DDR2_DQM122R BB_DDR2_DQM1 4 5 2 7
56R R4 56R SPI_SDO R3 SO HOLD# R1248
R1366 B_MDATA0 4 5 BB_MDATA0 3 6 3 6 1 2
R1332 R3 R1319 R2 WP# SCLK

1
3 6 FLASH_WPN 2 7 100R SPI_SCK
A_MADR4 22R AA_MADR4 A_DDR2_DQM1
22R AA_DDR2_DQM1 B_MDATA2 BB_MDATA2 B_DDR2_DQM022R BB_DDR2_DQM0 4 5
R4 56R R2 56R SPI_SDI_1 R1 SPI_SDI GND SI
A_MADR6 4 5 AA_MADR6 B_MDATA5 2 7 BB_MDATA5 1 8
R3 R1314 R1313 R1 R1323 56R SPI_SDI
A_MADR8 3 6 AA_MADR8 A_MCLK 22R AA_MCLK A_DDR2_DQM0
22R AA_DDR2_DQM0 1 8 B_DDR2_DQS022R BB_DDR2_DQS0

1
R2 56R 56R 56R 56R R1379
A_MADR11 2 7 AA_MADR11 R1378 100R
R1 R1321

TP41
1 8 22R 22R B_DDR2_DQSB022R BB_DDR2_DQSB0
F 56R
R1609 AA_MCLKZ
56R
A_MCLKZ AA_DDR2_DQS0
56R
A_DDR2_DQS0 B_MADR4 22R BB_MADR4
56R F
R1350 R1333 R4 R1325
B_MADR6 4 5 BB_MADR6 B_DDR2_DQS122R BB_DDR2_DQS1
R1331 R3 56R
A_DDR2_DQSB0
22R AA_DDR2_DQSB0 B_MADR8 3 6 BB_MADR8
56R R2 R1317
B_MADR11 2 7 BB_MADR11 B_DDR2_DQSB122R BB_DDR2_DQSB1
R1335 R1 56R
1 8
A_DDR2_DQS122R
56R
AA_DDR2_DQS1
56R PROJECT NAME : 17mb60 A3
R1330 R1374
A_DDR2_DQSB1
22R AA_DDR2_DQSB1 SCH NAME : <DRAWING NAME HERE> SHEET: 2 OF: 2
56R

DRAWN BY : <YOUR NAME HERE> 04-03-2010_14:44


1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8

AUDIO OUTPUTs HDMI2 CN708


21
R1877 20
1
MAIN_L 4k7 DSP_MAIN_L HDMI_0_RX2P 2
10R 1
R1900 C1197 2

HDMI1_5V
R1869
SCART_AUDIO_IN_L 10u R4 G2 2 1
C1198 AUL0 RXA0N HDMI_1_RX0N HDMI_0_RX2N 3

R1899

C1183
100R 10R

OPTIONAL
R5 H3

16V
4k7
10u

10n
SCART_AUDIO_IN_R C1196 AUR0 RXA0P HDMI_1_RX0P HDMI_0_RX1P 2 10R 1 4
SAV_AUDIO_IN_L 10u T6 H2 R1868 R1887
22K 33n C1195 10V AUL1 RXA1N HDMI_1_RX1N 5
SAV_AUDIO_IN_R 10u U6 J3
A 10V C1193
10u V6
AUR1 RXA1P
J2
HDMI_1_RX1P HDMI_0_RX1N 2
10R
1
6 A
IPOD_AUDIO_IN_L C1194 10V AUL2 RXA2N HDMI_1_RX2N R1909 HDMI_0_RX0P 1 10R 2 7
IPOD_AUDIO_IN_R 10u U5 J1 2 1
R1867 R1886
MAIN_R 4k7 DSP_MAIN_R 10V AUR2 RXA2P HDMI_1_RX2P 1k 8

2
AD6 G3 2 1
R1897 AUL3 RXACKN HDMI_1_CLKN HDMI_0_RX0N 9

C1184

R1896
10V 10R
AC6 G1

16V

4k7
10n
R1898 100R 10V AUR3 RXACKP HDMI_1_CLKP HDMI1_HPD HDMI_0_CLKP 2 10R 1 10
M4
4k7 V1
DDCDA_CK
M5
HDMI_1_SCL 3
R1879 R1880 11
33n

1
DSP_MAIN_L AUOUTL0 DDCDA_DA HDMI_1_SDA R1912 HDMI_0_CLKN 2
10R
1
12
V2 K6 2 1 2 Q204
22K DSP_MAIN_R AUOUTR0 HOTPLUGA 1k CEC 13
AA6 BC848B
DSP_SCART_L AUOUTL1 14

HDMI0_5V
R1888
Y5 D2 1 2 1
DSP_SCART_R AUOUTR1 RXB0N HDMI_0_RX0N HDMI_0_SCL 10R 15
C1168 HPL_MUTE E3 10R
L119 RXB0P HDMI_0_RX0P HDMI_0_SDA 2
1 16
2 1 AD5 E2 R1885
HP_L DSP_HP_L DSP_HP_L EAR_OUTL RXB1N HDMI_0_RX1N 17
10u AE5 F3
100u DSP_HP_R EAR_OUTR RXB1P HDMI_0_RX1P HDMI0_5V 18
F2 10R
RXB2N HDMI_0_RX2N 19
R1858

16V R1910 HDMI0_HPD


200R

2 1
AB4 F1 2 1
R1878
AUVRP RXB2P HDMI_0_RX2P 1k

2
220R AB5 D3
AUVAG 3 RXBCKN HDMI_0_CLKN

R1895

R1864

R1865
AC3 D1

47k

47k
4k7
C1170 C1174 C1199 C1201 C1200 AUVRM RXBCKP HDMI_0_CLKP HDMI0_HPD
10u
2

100n 10V 1u 4u7


U157 DDCDB_CK
J6 HDMI_0_SCL 3
1 L6
MSD9WB7PX-2

1
10V 10V 10u 6V3 10V DDCDB_DA HDMI_0_SDA R1911
J4 2 Q203
B A6
HOTPLUGB 2
1k
1

BC848B B
R1892 I2S_OUT_MCK I2S_OUT_MCK
C1169 HPR_MUTE 3V3_VCC 2 1
I2S_OUT_SD B5 AC8 1
CN707
L120 4k7 I2S_OUT_SD RXC0N
HP_R
2 1

10u
DSP_HP_R ANT_CTRL
I2S_OUT_BCK
B6
C6
I2S_OUT_WS
I2S_OUT_BCK
RXC0P
RXC1N
AD9
AC9 HDMI1 R1874
21
20
100u AD10
3V3_VCC 2 1
RXC1P HDMI_1_RX2P 1
1
R1859

16V 4k7 10R


200R

RST_ETH C1 AE10
R1674 I2S_IN_BCK RXC2N R1870 2
220R H6 AC10 2 1
TP223 1 I2S_IN_SD RXC2P HDMI_1_RX2N 10R 3
WAKEUP_ETH G6 AE8 10R 1
I2S_IN_WS RXCCKN HDMI_1_RX1P 4
AD8 R1884 R1871
C1171 RXCCKP 5

COMMON
AE7 2 1
10u DDCDC_CK HDMI_1_RX1N 10R 6
10V 2 1 AD7 10R 2
3V3_VCC 4k7 DDCDC_DA HDMI_1_RX0P 7
AC7 R1872 R1882
R1894 HOTPLUGC 8
2 1
R223 R1917 HDMI_1_RX0N 10R 9
SC_L_OUT 2 1 P5 K5 2 1
CEC 10R 1
100R DSP_SCART_L SPDIF_OUT SPDIFO CEC 10R HDMI_1_CLKP 10
2

R1876 R1883 11
R1924

C1185

16V
22k

10n

2 1
HDMI_1_CLKN 10R 12
CEC 13
1

R1873 14
C R222 HDMI_1_SCL
2
10R
1
15 C
SC_R_OUT
2
100R
1
DSP_SCART_R HDMI_1_SDA 2 10R 1 16
2

R1875 17
R1925

C1186

16V
22k

10n

HDMI1_5V 18

PRE-AMP for SCART AUDIO HDMI1_HPD 2 10R 1 19


1

R1881

2
R1863

R1862
47k

47k
1

1
AUDIO INPUTs MODE SELECTION V+ 1 33k 2 12V_VCC

2
R1916

R1915
C1182

33k
10u
I2S_OUT_SD I2S_OUT_BCK 10V

1
R1902
R1840

R1836

SC_AUD_R_IN 10k SCART_AUDIO_IN_R


10k

10k

C1177
2
F301
1
HDMI2 EDID EEPROM
R1921

C1187

12V_VCC
470p
50V
12k

C1181 600R
100n
D SC_AUD_R_OUT 16V R1913 D
C1206 1 2 C1180 BAV70
10u R1914 33k D200
CFG_PWM1 10V
2
33k
1
SC_AUD_L_OUT
CFG_PWM0 C1205 5V_VCC 2 1 HDMI0_5V
10u

3
100p
R1901
R1835

50V 10V TP219


R1833

10k

1
SC_AUD_L_IN 10k SCART_AUDIO_IN_L R1927
10k

1 2 1 8 100p C1207

2
82k OUT1 VDD 50V
2

R1931
C1203 100n
U178
R1920

C1188

R1929 R1926

4k7
1
470p

2 7 10V
50V
12k

TP218
1 2 1 2
SC_R_OUT 20k IN1- OUT2 82k
TL062 R1928 C1202 1 8
1u

1
V+ 3 6 1 2 A0 VCC
3V3_STBY

6V3 IN1+ IN2- 20k SC_L_OUT


2
U179 7
4 5 1u A1 WP

1
VSS IN2+ V+ 6V3
3
24LC02 6 3

A2 SCL HDMI_0_SCL R1935


R1903 Q206 2 2 1
HDMI_WP
SAV_R_IN 10k 1k
SAV_AUDIO_IN_R 4 5
VSS SDA HDMI_0_SDA
R1838

1:NAND
1
10k

1
R1918

C1189

470p

BC848B
50V
12k

TP220

TP221
E
I2S_OUT_MCK COAX SPDIF OUT E

0:IPS
R1839

NC
10k

5V_VCC
R1904
SAV_L_IN 10k SAV_AUDIO_IN_L
R1919

C1190

470p
50V
12k

2
R1889
4k7

R1906 50V
3
220p NC C1175
1

IPOD_R_IN 10k IPOD_AUDIO_IN_R R1907


1 2 Q202 2 1
100R
2
SPDIF_OUT
1 2
BC848B
R1923

C1192

C1178
C1179 100n
470p

220p
2

1
50V

50V
12k

1
R1890

10V
4k7

C1176 2

2 NC
F 3 1 2 1
S92
2 F
1

JK10 100n
2

1
2

R1908
C5V6

10V
D199

1k

R1905
IPOD_L_IN 10k IPOD_AUDIO_IN_L
NC PROJECT NAME : 17mb60 A3
1

1
R1922

C1191

470p
50V
12k

SCH NAME : <DRAWING NAME HERE> SHEET: 4 OF: 4

DRAWN BY : <YOUR NAME HERE> 04-03-2010_15:13


1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
5V_VCC
SCART PC INPUT

2
1
TP13

BAV70
D169
2

2
3

NUP4004M5

NUP4004M5

NUP4004M5
SCART VIDEO OUTPUT AMPLIFIER C663

2
2

D175

D174

D176

1
R1479

R1311

R1310

R1265
100n

75R

10k

10k

10k
1
R124 F179 10V VGA_DDC_5V

C835
2

220p
50V
1 2
12V_VCC 470R
21

1
3

4
5

1
3

4
5

1
3

4
5
330R

1
A 220R
C120
8 1 A
SC_CVBS_IN 10u 15 VCC A0

R102

R103
390R
20

68k
16V R1948 U161
50V SC_CVBS_OUT 7 2
1 14 1
100R
2
WP A1
19 220p C836 C860 R1947 ST24LC21
2 1 Q146 6 3
2 13 1
100R
2
SCL A2
18 BC858B
R1233 1n 3 R1946
3 C378 5 4
220R 50V 12 1
100R
2
SDA GND
17 Q119 2
SCART_CVBS_OUT R1949

1
1

1
47R 1 BC848B
SC_FB 11 1 2

R1209

R1206
100R
16
2
10u

2k2

2k2

TP3

TP2
TP36
TP37
1
R1249 R1587 R620 10V
50V SC_CVBS_OUT 1 2 2K7 2K7
SC_R 75R 300R 10
N.C.

1
15 220p

2
R1682

R221
R104
100R

33k
2 1 C788 9 VGA_DDC_5V VGA_VSNC
1
33R
2
RX/SCL_SC
14 12K
C833 R1480 R1243 R1681

2
2 75R 1 2 75R 1
12p NC 8 1
100R
2
VGA_HSNC
1
33R
2
TX/SDA_SC
13 R1481
SCART LT1

50V 50V
75R 1 220p N.C.
SC1

2 TX/SDA_SC 7
12 R1482 2 1

SC_G hindistan opt.


B 11 C832 6 B
R1403
2 75R 1 RX/SCL_SC R1182 5 1
33R
2
TX/SDA_SC
10 R1483 1 2
D178 4k7 R1404
9
2 1
INDIA OPTION 4 1
33R
2
RX/SCL_SC
C15V R1187 2 1
1 2
22k 100n SC_PIN8 3 VGA_B
8 50V
10V SC_CVBS_IN 4
220p SC_B C664 YEL 2 VGA_G
7 2 1
C853
50V
C831 SCART_AUD_L_IN 1 VGA_R
6 75R 1 3 JK7
2
3n3 F205 WHT

1
1 2
R1489 CN132

R1516

R1515

R1517
SC_AUD_L_IN

NUP4004M5
5

75R

75R

75R
1
3

4
5
SCART_AUD_L_IN 600R SCART_AUD_R_IN

C825

C826

C827
2

2
50V

50V

50V
2

27p

27p

27p
D173
4 1 RED

2
F200 R1244
1 2 1
100R
2
SC_AUD_L_OUT
3 C854 600R
SCART_AUD_R_IN

2
50V C857
2
C 3n3 C
F206 4n7
1 1 2
SC_AUD_R_IN 50V
F201 600R R1245
1

600R
2 1
100R
2
SC_AUD_R_OUT
47n
SIDE AV INPUT
C858 16V 1
1
R1420 C808 R1415 TP245
M2 AC5 16V C795 SC_CVBS_IN 2
4n7 33R RIN0M CVBS0 33R SAV_CVBS_IN
47n
50V R1409 C807 R1413
47n M3 W4 16V C800 6
VGA_R 33R RIN0P CVBS1 33R DVD_Y_IN

C5V6
D171

C830
16V

1
47n

220p
50V
DVD INTERFACE (for 26" to 32") R1422
16V C810 L2 W5 16V C801
R1414
3
50V
C856

2
33R GIN0M CVBS2 33R DVD_C_IN
47n 47n
R1408 R1412
16V C806 L3 AA5 16V C799 4
1
TP250
R1652 R1653 VGA_G 33R GIN0P CVBS3 33R SAV_CVBS_IN F203
47n 47n 1 2 3n3
75R CN704 75R R1421 R1411 SAV_L_IN
16V C809 K1 W2 16V C794 JK3 5
R1650 R1651 33R
47n
BIN0M CVBS4
47n
33R IPOD_C_IN SAV_L 600R
DVD_Y_IN 180R 1 2 180R DVD_C_IN
! VGA_B
R1419
33R
16V C802K3
BIN0P CVBS5
W3 16V C793
R1410
33R
1 S93 2
IPOD_Y_IN
SC_R
7 1
TP2471
F202
2
SAV_R_IN
C18V

D181

47n 47n SC SVHS opt 600R C855


D 3 4 R1423 D
C973

1
C861 K2
25V
10u

FS1 470R SOGIN0

R1484

R1486
R1624 VGA_G SAV_R

270R
50V 1n

R11
75R

75R
1 2 1 2
DVD_SENSE 100R 5 6 12V_VCC 3n3
N4 V3 SCART_CVBS_OUT
4A/24VDC VGA_HSNC HSYNC0 CVBSOUT0
1

50V
1

1
YPbPr INPUT

2
7 8
R1616

R1485
C628

270R
100n

1 2
2

R12
75R
N5
10V

S80
4k7

TP242

VGA_VSNC VSYNC0
7
1

9 10 DVD_IR DVD_WAKEUP
50V AA4
2

CVBSOUT1

2
C650

5
2

JK2
50V

220p
27p

1
R1623 R1507 C882 TP246

16V
16V R3 W1
1

DVD_SPDIF 100R 33R RIN1M VCOM RCA_PR


47n 4

47n
C972 R1418 C798

C959
16V P2 1
SC_R 33R RIN1P TP248
47n 3
IPOD INTERFACE R1510
33R
16V C885 P3
GIN1M 5
RCA_Y

R1530
47n 6

33R
1
R1417 TP249
12V_VCC 30 29 12V_VCC SC_G 33R
47n C797N2 U157
GIN1P RCA_PB
16V 2

27p 50V
R1509 MSD9WB7PX-2

C829

C823

C828
NUP4004M5
16V C884

2
50V
1
3

4
5
N3

27p

50V 27p
28 27 1 2 33R BIN1M
1

1
S79 47n

D177

1
R1416 C796

R1619

R1620

R1621
1 2 5V_STBY

75R

75R

75R
S78 M1
E 26 25
NC
SC_B 33R
16V 47n
BIN1P E
R1505
C862 N1

2
24 23 SC_CVBS_IN 33R SOGIN1
1n 50V

2
W6
22 21 AMP_MUTE HSYNC1
Y6
IPOD_Y_IN 20 19 IPOD_C_IN SC_FB VSYNC1
SAV/YPbPr INPUT

BC848B
18 17 DVD_IR

Q157
F199 F198 R1506 RCA_PR
2 1 1 2 16V C881 U2
1
S43
2

IPOD_R_IN 16 15 IPOD_L_IN 33R RIN2M R694 JK4


600R 600R 47n IR_IN 2 1
3V3_VCC
R1407 4k7 SAV_CVBS_IN

3
16V C805U3 6
1
S9
2

14 13 RCA_PR 33R RIN2P YEL


47n 5 RCA_PB
R1508

2
16V 1 2

1
C883 T2 S41
MAIN_R 12 11 MAIN_L 33R GIN2M

R263
2
47n 4

4k7
R1405 WHT 3 SAV_L

R498
1 2
16V C803 T1 S42

47k
10 9 RCA_Y 33R GIN2P
100RR1938 47n

2
56R R1511 RCA_Y
1 8 16V C886 R1 2
1
S40
2

1
SDA_SYS R1 8 7 IPOD_DETECT 33R BIN2M RED
47n DVD_IR_ON/OFF 1
F 2 7 1
F207
2
R1406
16V
C804
R2 1
S39
2 SAV_R F
SCL_SYS R2 6 5 IR_IN RCA_PB 33R BIN2P
600R 47n
R1494
3 6 C824 T3
RX/SCL_SC R3 4 3 RCA_Y 470R SOGIN2
C859
1 2 1n
TX/SDA_SC 4
R4
5
2 1
27p 50V
V4
HSYNC2 PROJECT NAME : 17mb60 A3
50V
CN133 SCH NAME : <DRAWING NAME HERE> SHEET: 5 OF: 5

DRAWN BY : <YOUR NAME HERE> 09-03-2010_18:03


1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8

R1402
P_D1 PCM_D1 P_D0 W21 Y16 TS1_D0 TS1_D0 TS_MDI0 TS0_D2 TS_MDO2 TS0_VALID TSMOVALID
R4 PCMDATA[0]/CI_DATA[0] TS1DATA[0] R4 R4 33R
P_D0 5 4 PCM_D0 P_D1 U21 AD14 TS1_D1 TS1_D1 5 4 TS_MDI1 TS0_D1 4 5 TS_MDO1
P_D2 6
R3
R2
3 PCM_D2 P_D2 U19
PCMDATA[1]/CI_DATA[1]
PCMDATA[2]/CI_DATA[2]
TS1DATA[1]
TS1DATA[2]
AD15 TS1_D2 TS1_D2 6
R3
R2
3 TS_MDI2 TS0_D0 3
R3
R2
6 TS_MDO0 TS0_SYNC
R1401
33R
TSMOSTART CI INTERFACE
P_A0 7 2 PCM_A0 P_D3 AD12 AC15 TS1_D3 TS1_D3 7 2 TS_MDI3 TS0_D3 2 7 TS_MDO3
R1 PCMDATA[3]/CI_DATA[3] TS1DATA[3] R1 R1 R1424
8 1 P_D4 AC12 AC16 TS1_D4 8 1 1 8 TS0_CLK TSMOCLK
A 33R
R1393 P_D5 AD13
PCMDATA[4]/CI_DATA[4] TS1DATA[4]
Y17 TS1_D5
33R
R1383
33R
R1384
33R A
PCMDATA[5]/CI_DATA[5] TS1DATA[5] R1632
P_D6 Y12 AB17 TS1_D6 TS1_D4 TS_MDI4 TS0_D4 TS_MDO4 CN141
PCMDATA[6]/CI_DATA[6] TS1DATA[6] R4 R4 R1512 3V3_VCC 10k
P_D5 PCM_D5 P_D7 AA11 AB19 TS1_D7 TS1_D5 5 4 TS_MDI5 TS0_D5 5 4 TS_MDO5 TS1_CLK TSMICLK
R4 PCMDATA[7]/CI_DATA[7] TS1DATA[7] R3 R3 33R 35 1
P_D6 5 4 PCM_D6 Y18 TS1_CLK TS1_D6 6 3 TS_MDI6 TS0_D6 6 3 TS_MDO6 PCM_D3
R3 TS1CLK R2 R2 R1514 PCM_CD1_N 36 2
P_D7 6 3 PCM_D7 P_A0 Y24 AE16 TS1_VALID TS1_D7 7 2 TS_MDI7 TS0_D7 7 2 TS_MDO7 TS1_VALID TSMIVALID TS_MDO3 PCM_D4
R2 PCMADR[0]/CI_A[0]/PF_D[0] TS1VALID R1 R1 33R 37 3
P_A6 7 2 PCM_A6 P_A1 Y22 AB16 TS1_SYNC 8 1 8 1 TS_MDO4 PCM_D5
R1 PCMADR[1]/CI_A[1]/PF_D[1] TS1SYNC C969 33R 33R R1513 38 4
8 1 P_A2 AB22 R1382 R1390 TS1_SYNC TSMISYNC TS_MDO5 PCM_D6
33R PCMADR[2]/CI_A[2]/PF_D[2] 12p 33R 39 5
R1397 P_A3 AA22 50V TS_MDO6 PCM_D7
PCMADR[3]/CI_A[3]/PF_D[3] 40 6
P_A1 PCM_A1 P_A4 AA20 F304 TS_MDO7 PCM_CE_N
R4 PCMADR[4]/CI_A[4]/PF_D[4] 41 7
P_D3 5 4 PCM_D3 P_A5 Y21 PCM_A10
R3 PCMADR[5]/CI_A[5]/PF_D[5] 60R 42 8
P_D4 6 3 PCM_D4 P_A6 AA18 PCM_OE_N
R2 PCMADR[6]/CI_A[6]/PF_D[6] 43 9
P_A4 7 2 PCM_A4 P_A7 TS0_D0

BSH103
AA19 U20 PCM_IORD_N PCM_A11
R1 PCMADR[7]/CI_A[7]/PF_D[7] TS0DATA[0] 44 10
8 1 P_A8 TS0_D1 PCM_IOWR_N PCM_A9

Q209
AA16 V20
33R PCMADR[8]/CI_A[8] TS0DATA[1] 45 11
R1395 P_A9 AA14 R19 TS0_D2 TSMISYNC PCM_A8
PCMADR[9]/CI_A[9] TS0DATA[2] 46 12
P_A2 PCM_A2 P_A10 AA12 AE13 TS0_D3 TS_MDI0 PCM_A13
R4 PCMADR[10]/CI_A[10] TS0DATA[3] 5V_VCC VCC_PCMCIA
47 13 R1172
P_REG_N 5 4 PCM_REG_N P_A11 Y15 AC13 TS0_D4 TS_MDI1 PCM_A14
R3 PCMADR[11]/CI_A[11] TS0DATA[4] C654 C653 48 14 4k7 3V3_VCC
P_A3 6 3 PCM_A3 P_A12 AA17 Y11 TS0_D5 2 2
C970 TS_MDI2 PCM_WE_N
R2 PCMADR[12]/CI_A[12] TS0DATA[5] 100n 100n 49 15 R1425
P_RESET 7 2 PCM_RST P_A13 AA15 AB11 TS0_D6 1 1 22u TS_MDI3 PCM_IRQA_N
R1 PCMADR[13]/CI_A[13] TS0DATA[6] 10V 10V 6V3 50 16 33R
8 1 P_A14 AE14 AB13 TS0_D7
B 33R
R1392 P_RESET Y20
PCMADR[14]/CI_A[14] TS0DATA[7]
Y19 TS0_CLK VCC_PCMCIA 51 17 VCC_PCMCIA B
CI_RST TS0CLK 52 18
P_A14 PCM_A14 Y23 TS0_VALID R1951 R1950 50V TS_MDI4 TSMIVALID
R4 TS0VALID C968 12V_VCC 53 19
P_A10 5 4 PCM_A10 P_IRQA_N AD16 W20 TS0_SYNC L121 4k7 4k7 12p TS_MDI5 TSMICLK
R3 PCM_IRQ/CI_INT TS0SYNC 12p 330N 54 20
P_A9 6 3 PCM_A9 P_OE_N Y13 50V 3 TS_MDI6 PCM_A12 C966
R2 PCMOEN 270n 55 21
P_A5 7 2 PCM_A5 P_IORD_N Y14 R1953 TS_MDI7 PCM_A7
R1 PCMIOR/CI_RD Q208 56 22
TSMOCLK C967

C906
2
CI_POWER_CTRL

33p
8 1 P_CE_N AA13 4k7 PCM_A6

50V
33R PCMCEN/CI_CS BC848B 57 23 12p
R1394 P_WE_N AC14 30p PCM_RST PCM_A5
PCMWEN DIGITAL_IF_P 1 R1171 58 24 50V
P_A7 PCM_A7 P_CD2_N AB23 PCM_A4
R4 PAD_PCM_CD_N R1548 3V3_VCC 4k7 59 25

C905

50V
P_A8 5 4 PCM_A8 P_WAIT_N AB20 AA3 PCM_A3
R3 PCMWAIT/CI_WACK IP 33R 30p R1427 60 26
P_A11 6 3 PCM_A11 P_IOWR_N AB14 AA2 DIGITAL_IF_N PCM_WAIT_N PCM_REG_N PCM_A2
R2 PCMIOW/CI_WR IM 33R 33R 61 27
P_A12 7 2 PCM_A12 P_REG_N AA21 TSMOVALID PCM_A1
R1 PCMREG/CI_CLK R1547 62 28

33p
8 1 Y3 TSMOSTART PCM_A0
33R QP 63 29
R1396 Y2 L122 TS_MDO0 PCM_D0
3V3_VCC 2 QM 330N 64 30
P_IOWR_N PCM_IOWR_N Y25 TS_MDO1 PCM_D1
R4 GPIO125 330R 270n 65 31
5
P_IORD_N 4 PCM_IORD_N TS_MDO2 PCM_D2
2

AB1
R3 U157 VIFP VIFP 5V_TUN 66 32
R1660

R1173

P_A13 6 3 PCM_A13 AA1 2 1


PCM_CD2_N
4k7

4k7

R2 VIFM VIFM 10V F268 67 33 4k7 VCC_PCMCIA


P_WE_N 7 2 PCM_WE_N 33R 1

R1 MSD9WB7PX-2 100n R1642 68 34 R1177

R1529
8 1 AB2

4k7
2
C913
1

33R SIFP SIFP 3V3_VCC 10k


R1385 AB3 SIFM
C NAND_CE2 SIFM C

5V_VCC
R1426
P_CD2_N PCM_CD2_N PF_ALE T21 AD3 IF_AGC_MST
33R PF_ALE/NAND_ALE IF_AGC

RST_ETH
1V8_VCC_ETH

1V8_VCC_ETH
3V3_VCC
PF_AD15 T19 AE3 RF_AGC_MST
PF_AD[15]/NAND_WPZ RF_AGC
PF_CE0Z P21
PF_CE0Z/NAND_CEZ
P_WAIT_N PCM_WAIT_N PF_CE1Z P20 AC4 RF_AGC_CTL
R4 PF_CE1Z/NAND_CLE GPIO66 C1052
P_CE_N 5 4 PCM_CE_N PF_OEZ R20 AD2
R3 PF_OEZ/NAND_REZ GPIO67 SIF_CTL 100n

R1673
P_OE_N 6 3 PCM_OE_N PF_WEZ T20 AD4

4k7
R2 PF_WEZ/NAND_WEZ GPIO68 TUN_SCL_MST 16V
P_IRQA_N 7 2 PCM_IRQA_N P19 AE4
R1 R1942 F_RBZ/NAND_RBZ GPIO69 TUN_SDA_MST
8 1 F_RBZ
33R 33R
R1399

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33
3V3_VCC
NAND FLASH

EEDIO
VCCK4

GND4

GND3

TEST0

TEST1

VCC3IO2

TCLK_0

TCLK_1

GND6

VCCK3
V_BUS

EECS

EECK
TCLK_EN
RESET_N
C1053
49 32 SCL_SYS
F280 100n VCC3IO3 SI_0
FLH_3.3V 1V8_VCC 1V8_VCC_ETH 16V
NAND_WPz 1 48 60R 50 31 SDA_SYS
NC1 NC29 C1057 C1063 C1065 C1056 C1066 1V8_VCC_ETH VCCK5 SI_1
F187 100n 100n 100n 100n 100n
R1496

2 47 51 30
3k9

NC2 NC28 3V3_VCC FLH_3.3V 16V 16V 16V 16V 16V X4 XTL12P SI_2
60R
D 3 46
C868 2 C657 2 C656 1 4 52 29 D
S49 NC3 NC27 22u 100n 100n XTL12N SI_3
F_RBZ 6V3
1
10V
1
10V 2 3
A3V3_VCC
4 45 53 28
NC4 NC26 F279 F278 C1120 41MHz C1119 C1069 VCC33A_H GPIO_0/PME P0_ETH
R1155 1V8_VCC A1V8_VCC 3V3_VCC A3V3_VCC 15p 12Mhz 15p 100n
5 44 NAND_D7 60R 60R 50V 16V 54 27
4k7 NC5 I/O7 C1059 C1072 50V GND33A_H GPIO_1
100n 100n R1763
NC 6 43 NAND_D6 33R 16V 16V 55 26
NC6 I/O6 12k RREF GPIO_2
NAND_WEz S5 PF_WEZ
7 42 NAND_D5 C1118 56 25
RB I/O5 USB_DM_ETH 50V
DM U171 VCCK6 1V8_VCC_ETH

NAND_REz 8 41 NAND_D4 33R 1p 57 24


R I/O4
NAND_REz S25 PF_OEZ USB_DP_ETH DP AX88772 EXTWAKEUP_N WAKEUP_ETH
NAND_CEz 9 40 58 23
E NC25 A3V3_VCC VCC33A_PLL GND2
R1389 C1068
NAND_CE2 10 39 59 22
NC7 NC24
NAND_D0 8
33R
1 PCM_A0 Ethernet lines must be 100ohm differential pairs A1V8_VCC 100n GND33A_PLL USB_LED
R1 16V
11 38 NAND_D1 7 2 PCM_A1 60 21 1V8_VCC_ETH
NC8 NC23 R2 GND5 VCCK2
NAND_D2 6 3 PCM_A2
U162 R3 C890

C1060

16V
NAND_D3 5 PCM_A3

100n
12 37 4 61 20
E FLH_3.3V VDD1 VDD2 FLH_3.3V R4 100n R1707 VCC18A2 LINK_LED E
R1132

R1133
47R

47R

13
NAND512-A 36
16V 1M
62 19
VSS1 VSS2 R1398 CN711 XTL25P SPEED_LED
33R X3
14 35 NAND_D4 8 1 PCM_A4 1 63 18

RSET_BG
NC9 NC22 R1 ETH_TXP TD+ XTL25N FDX_LED

VCC18A1
NAND_D5 7 PCM_A5 1 4

GND3R3
2

GND3A3

GND18A

VCC3R3
VCC3A3
1
R2 TP234

VCCK0

VCCK1
15 34 NAND_D6 6 3 PCM_A6 2 64 17

GND0

GND1
TXON
2 3

TXOP

V18F
RXIN
3V3_VCC

RXIP
NC10 NC21 R3 ETH_TXN TCT GND18A1 VCC3IO1
NAND_D7 5 4 PCM_A7 1
R4 TP235 C1116 41MHz C1117 C1055
NAND_CLE 16 33 1 3
CL NC20 TP233 TD- 33p 25MHz 33p 100n

10

11

12

13

14

15

16
50V 50V 16V

9
NAND_ALE 17 32 NAND_D3 ETH_RXP 4
AL I/O3 R1388 RD+

1V8_VCC
1
33R TP236
NAND_WEz 18 31 NAND_D2 PF_AD15 8 1 NAND_WPz ETH_RXN 5
W I/O2 R1 RCT

R1762
PF_ALE 7 2 NAND_ALE

12k
1
R1495 R2 TP237 C1067
19 30 NAND_D1 PF_CE1Z 6 3 NAND_CLE 6 1V8_VCC_ETH
FLH_3.3V 3k9 WP I/O1 R3 RD- 100n
R1134

R1131

PF_CE0Z 4 NAND_CEz
47R

47R

5 16V
R4
NAND_WPz 20 29 NAND_D0 7
NC11 I/O0 NC 3V3_VCC

A3V3_VCC
C1050 C1054
21 28 8

ETH_RXP

ETH_RXN

A1V8_VCC
NC12 NC19 C889 GND 100n 100n

ETH_TXP

ETH_TXN
F 100n 16V 16V F
22 27 16V
NC13 NC18
23 26
NC14 NC17 A3V3_VCC
C888
24
NC15 NC16
25
100n PROJECT NAME : 17mb60 A3
16V
SCH NAME : <DRAWING NAME HERE> SHEET: 6 OF: 6

DRAWN BY : <YOUR NAME HERE> 08-03-2010_10:37


1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8

AUDIO AMP for 16" to 24" HEADPHONE OUTPUT

VDD_AUDIO
1
F283
1
12V_VCC TP230 HP_L
60R 2
A U163 PT2333 HP_L A
F285

GNDA

GNDB
OUTN

VDDA

OUTP
6

VDD1
24V_VCC

SDB
INN
INP
60R TP229 1

Q160 3
MAIN_L F284 D192 HP_R
BC848B

C1

C2

C3
A1

A2

A3

B1

B2

B3
18V_VCC C1172 C729

2
C612 60R 4

R1854

R1855
R623 SK24 10n 10n

10k

10k
15k F294 16V 16V
5 JK6
100n L_AUDIO_P_OUT 5V_VCC VDD_AUDIO

AMP_EN
60R

1
10V 10V 10V 35V 35V
R817
100R

220u 220u 1 7
C665 2
100u 100u TP228
L_AUDIO_N_OUT 100n C615 C870 C1208 C1209
10V
1 R1954
HP_DETECT 1
100R
2
4k7 1 3V3_VCC

R624
W/2.5W opt. R1149

15k

2
C15V

D203
VDD_AUDIO 3V6 lik zener kullanilmali

C617

100n
10V

1
B B
VDD_AUDIO

U164 PT2333

POP NOISE CIRCUIT


GNDA

GNDB
OUTN

VDDA

OUTP
VDD1

SDB
INN

3
INP

2 BC848B
MAIN_R Q133
C1

C2

C3
A1

A2

A3

B1

B2

B3

1
C602 1 S87 2
R613 12V_VCC
15k CN710 S86
1 2
5V_VCC

opt diode altina yerlestir


100n R_AUDIO_P_OUT
NC
AMP_EN

VDD_AUDIO
10V CN140

1
3V3_STBY

3V3_VCC

1N4148
C666
R818

R614

D191
100R

NC

2
1
15k

1N4148
R_AUDIO_N_OUT 10V 1 2

R1941
R_AUDIO_P

D190

10k
100n
1
C1032

2
C R_AUDIO_N 2 3 C

1
10u
C608

100n

2
10V

3 4

R1699
VDD_AUDIO L_AUDIO_P 25V

10k
NC

2
4 5

R1712

R1309
L_AUDIO_N

R616
NC

15k

10k

10k

1
1

6
Q195

1
2
BC858B
AMP_EN BC848B

2
3
Q186

R1711

R1701
C1058 3

10k
3k9
100n R1702
16V 2 2
10k
1

2
1

1
R1718
100k
3
1
R1684 BC848B R1695
AMP_MUTE 1
10k
2 2
R1694
2
10k
1
5V_VCC
Q185

1
5V_VCC 2
10k
1

1
HPL_MUTE
HPR_MUTE

D AUDIO AMP for 26" to 32" BC848B


Q192
3

2 2
R1704
10k
1 1
R1703
10k
2 2
3

BC848B
Q187
D
AMP_EN

1 1

F282
VDD_AUDIO
60R
C1121

100n
50V

1 28
SD PVCCL2
S85 2 27 600R
FAULT PVCCL1 L_AUDIO_P_OUT L_AUDIO_P
100k C1077 C1045 F296
C942

1u 3 26 220n
50V
1n

R1715 MAIN_L LINP BSPL


6V3 25V
VDD_AUDIO 100k
C1075 1u 4 25
R1714 LINN OUTPL
NC 6V3
CONNECT TO DSP_M_L GND 600R
NC 5 24
100k GAIN0 PGND1 L_AUDIO_N_OUT L_AUDIO_N
R1717 F299
C943

6 23
50V

C1123
1n

VDD_AUDIO 100k GAIN1 OUTNL


E R1716
1 8 7
U168 22
C1046 E
ANALOG VCC
R1 1u AVCC BSNL 25V
2 7 50V 8
TPA3110D2 21 C1044
220n R_AUDIO_N_OUT 600R
R2 AGND BSNR R_AUDIO_N
C1074 25V
VDD_AUDIO 220n F298
C944

3 6 1u 9 20
50V
1n

R3 GVDD OUTNR
25V
R1687 R1696
4 5 10 19
R4 10k 10k PLIMIT PGND2
R1741 C1076 1u R_AUDIO_P_OUT 600R
C1073 11 18
56R RINN OUTPR R_AUDIO_P
100R 1u
6V3 F297
C945

25V 12 17 C1043 220n


50V
1n

RINP BSPR
25V
6V3
13 16
MAIN_R 1u NC PVCCR1
C1078 F281
14 15 VDD_AUDIO
CONNECT TO DSP_M_R GND PBTL PVCCR2
60R
C1122

100n
50V

F F

PROJECT NAME : 17mb60 A3


SCH NAME : <DRAWING NAME HERE> SHEET: 7 OF: 7

DRAWN BY : <YOUR NAME HERE> 10-03-2010_16:03


1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
CFG_PWM0
CFG_PWM1
ONBOARD KEYBOARD LED SOCKET
R1615
AB25
AB24
PWM0 LVB0P
AC24
AC25
TX_B_0_P TWISTED PAIR LVDS OPTION

TP10
3V3_VCC 2 1
PWM1 LVB0M TX_B_0_N TX_B_0_N 30

CN703
4k7
E6 AD24 TX_B_1_P
PWM2 LVB1P

5
BACKLIGHT_DIM
D6 AD25

TP21
PWM3 LVB1M TX_B_1_N TX_B_0_P 29
3V3_STBY AE24 TX_B_2_P
LVB2P

1
5V_STBY

2
AC23 TX_B_2_N TX_B_1_N
LVB2M KEYBOARD_ONBOARD F259 28
R1528
CN136

2
AE23

4k7
1 2
LVBCKP TX_B_CLK_P

R1940

1
IR_IN

220R
AD23 TX_B_CLK_N + - P/VOL STBY C949 600R TX_B_1_P TX_B_0_N
A 1

J5
LVBCKM
AE22
27 1 2 A
KEYBOARD SAR0 LVB3P TX_B_3_P TP23 1

SW3

SW4

SW2

SW1
1 2
G4 AC22

1
DVD_SENSE SAR1 LVB3M TX_B_3_N TX_B_2_N 26 TX_B_0_P 3 4
B4 AC21 27p
SC_PIN8 SAR2 LVB4P TX_B_4_P Q170 50V TP19 1

RF_AGC_MONITOR AA7 AD22 TX_B_4_N TX_B_2_P TX_B_1_N


SAR3 LVB4M BC848B 25 5 6

19" TO 22" DOUBLE LVDS FFC OPTIONS


3

2
R1522 1

4k7 NC TP17

R1499

R1294

R1498

R1497
R1567

270R
3

2
AC20

1k2

2k7
10k
2 1 2
LVA0P TX_A_0_P 10k 24 TX_B_1_P 7 8

R1563

R1571

R1562
R1568

220R
DVD_WAKEUP 1 2

220R 2
4k7 AD21

10k

10k
R1 LVA0M TX_A_0_N Q171 2
10k TP16 1

R1572
R1523 NC C4 AE20 1 BC848B

1
3V3_STBY 2 4k7 1 GPIO12 LVA1P TX_A_1_P TX_B_CLK_N 23 TX_B_2_N 9 10
A4 AD20 1

1
NC SPI_CSN_1 SCZ LVA1M TX_A_1_N TP18 1 1
TP9
A2 AE19

1
SPI_SCK SCK LVA2P TX_A_2_P 3 3
TX_B_CLK_P 22 TX_B_2_P 11 12 TX_B_4_N
B3 AC19

LED2
SPI_SDI_1 SDI LVA2M TX_A_2_N 1
TP8
A3 AC18

LED1
SPI_SDO SDO LVACKP TX_A_CLK_P 2 Q174
Q173 2
TX_B_3_N 21 13 14 TX_B_4_P
B2 AD19 TX_A_CLK_N 1
FLASH_WPN GPIO14 LVACKM TP20
AC17 TX_A_3_P BC858B 1 1 BC858B TX_B_3_P TX_B_CLK_N
LVA3P 20 15 16
AD18 TX_A_3_N 1
LVA3M TP22

2
3V3_VCC AE17 TX_A_4_P TX_A_0_N TX_B_CLK_P
LVA4P 19 17 18

R1569

R1570
220R

220R
RX/SCL_SC P6 AD17 TX_A_4_N 1
DDCA_CK/UART0_RX LVA4M TP24
1

TX/SDA_SC N6 TX_A_0_P TX_B_3_N


DDCA_DA/UART0_TX 18 19 20
R1524

R1527

PANEL_VCC
AA10
4k7

4k7

1
B GPIO137 USB_ENABLE TP26 1
B
T5 TX_B_3_P
GPIO138 IPOD_DETECT 5V_STBY 17 21 22 S57
AB10 1 2
2

1
GPIO139/SPDIFI DVD_SPDIF TP28
SCL_SYS AA23 AB7 TX_A_1_N TX_A_0_N
DDCR_CK GPIO140 PCM_CD1_N 16 23 24
SDA_SYS AA24 AA9 1
10k 1
DDCR_DA GPIO141 USB_OCD TP25 2 3V3_VCC
V5 TX_A_1_P TX_A_0_P R1266
GPIO142 STBY_INFO 15 25 26
AC11 10k
GPIO143 RESET_T2 2 1 3V3_VCC
AA8 1 2
3V3_STBY R1301
R1543 GPIO144 R1659 4k7 14 27 28
IR_IN 1 2 G5 1 2
3V3_VCC R1656 1
MEGA_DCR_OUT
100R IRIN 4k7 TP30

3V3_VCC
R6 OVER_CUR_DETECT NC TX_A_2_N TX_A_1_N
GPIO146 13 29 30
4 Y8
GPIO147
C952

Y9 S10
U157 1 2
50V

HP_DETECT TX_A_2_P TX_A_1_P


18p

GPIO148 12 31 32

XIN MSD9WB7PX-2
AD1 TX_A_CLK_N 1
R1601 11 TP27 33 34
AE2 1 2
3V3_STBY 1
XOUT TP29
24MHz
R1533

4k7 S4

2
T4
1M

X2

1 2
GPIO152 R1618 TX_A_CLK_P 10 TX_A_2_N 35 36

R1662
4k7
1
4k7
2
3V3_VCC TP31 1

R1663 TX_A_3_N 9 TX_A_2_P 37 38 OPTION6


NC

1
1
4k7
2
3V3_VCC R344 TP34 1
C951

50V

S81
18p

100R E5 TX_A_3_P TX_A_CLK_N


C 2 1 HWRESET
A7
1
4k7
2
BACKLIGHT_ON/OFF 8 39 40 C
R1666 AMP_MUTE

2
GPIO32 3

RESET C7 TX_A_CLK_P
GPIO33 R1661 7 41 42

S36

S34
OPTION1
F4

OPTION7
GPIO34 1
4k7
2 2 Q181 TP33 1

E4 BC848B TOUCH_PAD_OPTION 2 S15 1


GPIO35 PANEL_VCC_ON/OFF C630 6 TX_A_3_N 43 44 OPTION2

1
C2 C3 1 S76 2
1
USB_DP_ETH USB0_DP GPIO36 PROTECT KEYBOARD_ONBOARD 100n TP35
B1 D4 DVD_IR_ON/OFF
1
PANEL_VCC TX_A_3_P
USB_DM_ETH USB0_DM GPIO37 R1614 10V 2 1 5 45 46 OPTION3
AD11 F6 P0_ETH 1 2
3V3_STBY S32 1 1
USB_DP USB1_DP GPIO44/UART1_RX 4k7 R793 F248 TP32 TP6
AE11 F5 MECH_SWITCH 1 2 1 2
TX_A_4_P
USB1_DM GPIO45/UART1_TX R1669 4 47 48

PANEL_VCC
USB_DM 47R KEYBOARD 2 1
1
4k7 2 3V3_VCC 600R F249 S33 1
TP7
1 2
CI_POWER_CTRL R1952 3V3_STBY PANEL_VCC 3 MEGA_DCR_IN 49 50 TX_A_4_N

1
1
4k7 2 3V3_VCC 600R

S6
R1945 2

CN702
1 2

4
4k7 3V3_STBY
AB8

2
GPIO6 R1607 HDMI_WP 1
H5
GPIO7 18k HDMI0_5V R1937
C5 STBY_ON/OFF_NOT CN139

MEGA_DCR_IN
1 2
GPIO10 47R SCL_SYS

PANEL_VCC

PANEL_VCC

MEGA_DCR_OUT
K4 R1606
GPIO11 18k HDMI1_5V R1936

OPTION2

OPTION1
F11 L5

D RESET E11
GND0
GND1
GPIO17
GPIO18
M6
LED1
1
47R
2
SDA_SYS
SINGLE LVDS FFC OPTIONS D

CN709
LED2

PANEL_VCC
1

R1668
R1604

R1605

R1617

R1672

R1671

PANEL_VCC
33k

33k

4k7

4k7

4k7

3V3_STBY 1k
EXT KEYPAD
C1016

100n
2

1
10V

R1280

R1300

PANEL_VCC
OPTION4

OPTION3
2
S56

S19

S30
10k

10k
1

C1031

S58
3V3_STBY

3V3_STBY

3V3_STBY

22u

OPTION5
1

2
16V

1
1
RESET

R1296

R1297
PANEL_VCC

10k

10k
TX_A_CLK_N
TX_A_CLK_P

R1295

S55
10k
1N4148

TX_A_3_N

TX_A_2_N

TX_A_1_N

TX_A_0_N
TX_A_3_P

TX_A_2_P

TX_A_1_P

TX_A_0_P
R1667

C1015
D189

PANEL_VCC = 5V/12V
10k

2
100n

1
1

1
10V

R1274
S99

S14

S13

S94
10k
S3
USB INTERFACE

PANEL_VCC
PANEL VCC = 5V/12V
CN138
E E

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30
1

9
R844
2 1 1 6
USB_DP 10R IO1 IO4 4
2
U145 5
USB

GND VDD 3
R845
3
AZ099-04S 4

CN137
2 1
USB_DM 10R IO2 IO3 2

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30
1

9
1
C610 S2

OPTION3
10u CN128
2 1

10V MEGA_DCR_OUT
S54

2
2 1
TX_A_4_N

TX_B_4_N
TX_A_4_P

TX_B_4_P
1 5

S98
OUT IN 5V_VCC R1275
U149 R1198 PANEL_VCC 1
10k
2

1
5V_VCC
TX_A_CLK_N

TX_B_CLK_N
TX_A_CLK_P

TX_B_CLK_P
GND 47k
1

R1201 STMP2161
TX_A_3_N

TX_A_2_N

TX_A_1_N

TX_A_0_N

TX_B_3_N

TX_B_2_N

TX_B_1_N

TX_B_0_N
TX_A_3_P

TX_A_2_P

TX_A_1_P

TX_A_0_P

TX_B_3_P

TX_B_2_P

TX_B_1_P

TX_B_0_P

OPTION5
OPTION4

OPTION2
OPTION1
3 4
S12

S35
S37

USB_OCD 47k FAULT EN USB_ENABLE


2

2
2

F F
R884

R809
100k

S71

S72

S73
S74

S11
4k7

OPTION6
OPTION7
1

1
PANEL_VCC

PROJECT NAME : 17mb60 A3

CN135
5V_VCC

51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
SCH NAME : <DRAWING NAME HERE> SHEET: 9 OF: 9

DRAWN BY : <YOUR NAME HERE> 08-03-2010_14:00


1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8
5V_TUN 5V_TUN

LG ANALOG_IF
R1546
IF_AGC_MST 1 2

2
AIF

47p150p
DIGITAL_IF_P 100R

2
12

R473

R231
R1597 2K7

C1211
R1552

6k8

3k3
C964
L115
120nH

2
50V

50V
47p
1u
1 2
DIF1 10k 100R IF_AGC_TUNER
11

1
R1545 C912 C910

1
2 2
IF_AGC_T2 1 2

1
DIF2 DIGITAL_IF_N 100R 100n 100n C546 Z101
10
TDTC-G101D
1 1

A 10V 10V
R138
1 IN1 OUT1 4
SIFP A
IF_AGC IF_AGC_TUNER 1 2
K9656M
9 1k

5V_TUN
10n 2 1

2
2 IN2 OUT2 5
16V D145 SIFM

R474
AS R1591 GND

6k8
8 3
R139 F266 5V_TUN BA782
10k 3V3_VCC R1939

3
2 C904 2 12V_VCC 1k
1 2

NC 100n R1588 RF_AGC_CTL 10k Q207 330R

1
7 1

C143
1

1
2

1
10V 100R BC848B
8 1

16V

R252

R735
680R
1
5V_TUN TUN_SDA_MST

L114

1
B2

47u
R1

4k7
6 3

1u
2

R594
C135
100n
R1932

22k
10V
7 2 TUN_SDA_T2 2
TU102

2 2
SDA R2 100k
1 Q205

2
5

2
R1580
TU?

BC848B R483
Q140

2
1 2
6 3 1 1k2 47R R209
SCL R3 TUN_SCL_MST SIF_CTL
4 150nH 2 1

2
3 100k
1
BSN20
0R

R1933
C545

100k
3
5 4 L124 R1857
RF_AGC RF_AGC_TUNER R4 TUN_SCL_T2

1
3 ANALOG_IF 200R
2 Q144
330R R1592 10n BF799
B1 10k 3V3_VCC 47p C1210 0R 1
2 50V

5V_TUN
F261 2 100k
1
RF_AGC_MONITOR
2
5V_TUN R1934

2
ANT_PWR 100n C547 Z102
1 NC 82p 47p VIFM

R1582
1

R384

2
10V

10R
S28 R1549 1 IN1 OUT1 4

1k
50V

L104
B C907 1
100R
2
RF_AGC_TUNER
1 2
K3958M B

2u2
10n 2 IN2 OUT2 5
5V_VCC

C902

1
2
C14 100n 16V GND

1
B0 A 10V
1
10V VIFP

3
R1598
3 4

6k8
2
FSA3157 1
100n
GND VCC 5V_VCC
2 5
TH1

2R1

R1595 R1551 R1589 R1550 U3


10k 12V_VCC RF_AGC_MST 1 2
12k 1 2
B1 S

R1596
100R 100R 1 6

10k
2 C901 2 C903
R1581 100n 100n
1 1
1k 10V 10V
FDN336P RF_AGC_CTL
R1590
Q175 Q172
R1594 10k ANT_CTRL
OVER_CUR_DETECT 10k BC848B
C965
100n
R1586

R1593
20k

10k

16V

3V3_DVDD

C954

3V3_DVDD
C C

C955

50V

50V
12p

12p

R1565
2V5_VCC

10k
X1
1 4
2 3

1V2_MVDD
1V2_PVDD
47R RESET_T2

1V2_CVDD
41MHz R1856

C914
100n
10V
R1564
10k
R1560

600R
F260
10k
R1561
10k 3V3_DVDD
F263

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33
1V2_CVDD
330R
100n 100n 100n 100n 100n 100n

XTALI

XTALO

MVSS4

MVDD4

MVDD3

MVSS3

CVDD5

VSS7

A0
XVSS

PVSS

OSCMODE
XVDD

PVDD

RESETN

OSCENBN
S97 C915
10V 10V 10V 10V 10V 10V 49 32
DIGITAL_IF_N AINM TESTMODE
C920 C921 C922 C925 C919 C923
F134 F269 S96 C918 100n
50 31
1V2_VCC 1V2_MVDD DIGITAL_IF_P 10V AINP VSS6
330R 330R
D C956 100n 100n 100n 100n 51 30 D
22u 10V AVSS1 CVDD4 1V2_CVDD
16V 10V 10V 10V R1576
C929 C927 C928 52 29
F264 2V5_AVDD AVDD1 SDA 47R SDA_SYS
1V2_PVDD
330R 53 28
RFAIN SCL 47R SCL_SYS

T2 DEMOD
100n
R1575
10V 54 27 3V3_DVDD
3V3_RVDD RVDD DVDD2
C931
55 26
VSS8 VSS5
33R
56 25
F267
2V5_AVDD
1V2_CVDD CVDD6 U167 TSDATA7
5
R4
4 TS_MDI7
2V5_VCC
330R 57 24
100n TUN_SDA_T2 TUNERDAT CXD2820R TSDATA6
6
R3
3 TS_MDI6

10V TUN_SCL_T2 58 23
TUNERCLK TSDATA5 R2 TS_MDI5
C916 7 2
59 22 R1
3V3_DVDD DVDD TSDATA4 TS_MDI4
8 1
F265 47R
3V3_RVDD 60 21 R1584
E 3V3_VCC
330R
VSS9 VSS4 E
C957 100n 61 20
22u 1V2_CVDD CVDD CVDD3 1V2_CVDD
16V 10V
C932 62 19
PLLBPN MVDD2 1V2_MVDD

TSERR_GPIO2
F262
3V3_DVDD 63 18
RFAGC_GPIO1 MVSS2

TSDATA0

TSDATA1

TSDATA2
TSVALID
TSSYNC
330R

MVDD1
CVDD1

DVDD1

CVDD2
MVSS1
TSCLK
100n 100n 100n

GPIO0
64 17

VSS1

VSS2

VSS3
IFAGC TSDATA3
10V 10V 10V
C917 C933 C935

R1566
10k

10

11

12

13

14

15

16
1

9
R1583
33R
47R
IF_AGC_T2 R4 TS_MDI3
5 4

1V2_CVDD

1V2_MVDD

3V3_DVDD

1V2_CVDD
R1578

R1573

R1579
C911
100n

47R

47R

47R
10V

R3 TS_MDI2
6 3
33R 33R 33R
R2 TS_MDI1
7 2
F F
C953 R1 TS_MDI0
8 1
12p
50V

TSMICLK PROJECT NAME : 17mb60 A3


TSMIVALID
TSMISYNC SCH NAME : <DRAWING NAME HERE> SHEET: 10 OF: 10

DRAWN BY : <YOUR NAME HERE> 12-03-2010_10:48


1 2 3 4 5 6 7 8 AX M
1 2 3 4 5 6 7 8

ADAPTER SOCKET W/ADAPTOR POWER BLOCK DIAGRAM

TP243
LDO2 LDO2
W_ADAPTER 8V 5V_VCC

TP239
LDO LDO

A
5
! DC/DC1 SW2 SW1
A

1
12V_STBY 12V_VCC
C1038 5V_VCC
4 U174 DC-DC4
FS3 100n

1
C1112 5V_STBY
MP1583

6
2
1 2
12V_STBY 10n 10V
JK9 3 1 1 8 DC 1V2_VCC
F287 16V BS SS

FDC642P
7A/32VDC
!
1 2

1
2 7 DC-DC1 DC

Q198
1 2
IN EN

C1047

R1729
2 12V_STBY R1709

220n
3 6

33k
FS2 60R
C1091 C10922 C1037 SW COMP R1690
1
3k9
2
25V
1 2
4 5 DC 5V_STBY

1
1 2
12V_INV 22u 22u 100n GND FB 1
10k
2

1 1 5n6 DC

2
7A/32VDC 16V 16V 10V 9.1K 50V R1722
SW2

1
1 2
C1130 47R
0R 5V_VCC

1
R1728
DC-DC2

33k
INVERTER SOCKET W/ADAPTER

TP211
R1737
CN705 DC 3V3_STBY

33k

2
DC
1 12V_INV D197 L118 3
1 2 1 2 SW3
5V_STBY

1
R1698
15u 2 1 2 Q184 3V3_VCC
2 SS33 C1102 C1103 MOSFET_CONTROL 10k
22u 22u BC848B
1
B 3 16V 16V B
DC-DC3
4
DC 1V8_VCC
DIMMING DC
5
LDO1
6 BACKLIGHT_ON/OFF
2V5_VCC
LDO

W/ADAPTOR & W/IPS16&17&60


C
SW1 DC/DC2 SW3 C

C1036
FS5 FS4

TP238

100n
10V
1 2 1 2
12V_VCC 3V3_VCC
12V_STBY 7A/32VDC C1114 3V3_STBY 7A/32VDC
1 8
4

6
2

1
10n BS SS
1
U23
FDC642P

FDC642P
F286 16V
1
R1689
1

1
2 7
Q200

Q197
1 2
IN EN 2 1
12V_STBY
C1049

R1732

C1048

R1731
12V_STBY 10k
220n

220n
2

2
25V

25V
33k

33k
60R C1089 C1090 MP1484 C1129 R1708
3 6 5K6
1

1
1 2
22u 22u SW COMP 1 2 3k9
3N3
2

2
R1724 16V 16V R3 R1723
5n6
3

1
1 2 4 5 2 1 1 2
47R GND FB 50V 10k 47R
1

1
R1733

R1730
33k

33k
for 3v3 Panel Sup.

TP244
L123

33k
2

2
1 2

R1735
15u
3 3
L16 10UH

1
R1692 R1697
2 Q182 2 Q183
D MOSFET_CONTROL
2
10k
1

BC848B 15u
3V3_STBY MOSFET_CONTROL
2
10k
1

BC848B D
C1096 C1097
2

1 1
for 3v3 Panel Sup. SS33 22u 22u
D202

16V 16V
1

COMMON

TP251
U181

DC/DC4 F305
3
LM1117
2

1
1 2
12V_VCC IN OUT 8V_VCC

DC/DC3 330R C1213

C1214
2

LDO1
GND VOUT

100u
16V

R1958
100n

330R
TP232

C1035
E F303 100K 1 4 10V E

100n
1 2

10V
5V_VCC R1738 R1769
60R U175 R1957
18k 390k C1113
LM1117 20K 2
1 8 1k

1
F276 3V3_STBY BS SS
1

10n
1 2 3 2 1
3V3_VCC IN OUT 2V5_VCC R1770 F273 16V U173 R1691
TP241

60R 6 1 1 2 2 7 2 1
12V_VCC
EN FB 510k IN EN
C1080

GND VOUT C1033 12V_VCC 10k


1

100u

2
6V3

60R
U176 MP1484
LDO 2

TP240
22u F291 150K C1131 R1710
R1721

C1085 C1084
C1107
10V
100R

100n

1 4 16V 3V3_VCC 1 2 5 2 10UH 3 6 1 2


2

VIN GND 22u 22u SW COMP 1 2 3k9


60R
F292 MP2012 L116 16V 16V
1

5n6 R1686
1 2 4 3 4 5 U180
1

5V_VCC PVIN SW 1V8_VCC GND FB 50V


2
10k
1

LM1117

1
100R 60R 15u R1768 F300
1 2

R1720 33K 1 2 3 2 5V_TUN


C1094 C1093 C1101 C1098 1k8 8V_VCC IN OUT
0R C1212

C1079
330R C1034

100u
22u 22u 22u 22u

16V
2
GND VOUT

TP231
16V 16V 16V 16V 22u 100n

R1956
1

330R
12K 1 4 16V 10V

33k
NC 10UH

R1736
S89 L117 R1955

1
STBY_ON/OFF
1V2_VCC 1k
15u
S83 C1087 C1086
F STBY_ON/OFF_NOT MOSFET_CONTROL 22u 22u F
16V 16V

PROJECT NAME : 17mb60 A3


SCH NAME : <DRAWING NAME HERE> SHEET: 11 OF: 9

DRAWN BY : <YOUR NAME HERE> 12-03-2010_10:49


1 2 3 4 5 6 7 8 AX M
F
E
B
A

D
C
3V3_STBY

2V5_VCC
1V8_VCC
1V2_VCC

60R
F271

1
1

KEYBOARD_ONBOARD
60R
60R
60R

F275
F272
F277

10u
6V3
C6

5V_VCC
5V_VCC

PIN_10

12V_VCC
PIN_7_8
STBY_INFO
NC
22u

PIN_10

12V_VCC
PIN_7_8
16V 16V

S91
100n

10u
22u
10u

C1030 C1024

6V3
16V
6V3
C1081

8
6
4
2
2
4
6
8
16V
C990 100n

16V
16V

28
26
24
22
20
18
16
14
12
10
10
12
14
16
18
20
100n
100n

C1028 C1009
C1025
16V
100n
C997

CN1

9
7
5
3
1
1
3
5
7
9

27
25
23
21
19
17
15
13
11
11
13
15
17
19

CN706
16V
100n

C1004 C1001

16V
16V

100n
100n

C1008
C1022

1
16V

SOFT_SW
100n
C1005

C7 C5

R2
22u 22u

4k7
16V 16V

PIN_9
AVDD_DDR

2
PIN_11
AVDD_3V3

PIN_7_8
16V
100n

DIMMING
24V_VCC
NC
C1070

AVDD_2V5

3V3_VCC
3V3_VCC

2
2

SOFT_SW

STBY_ON/OFF
1
26" to 32" POWER SOCKET
16" to 24" POWER SOCKET

PIN_9
2V5_VCC

PIN_11
PIN_7_8
DIMMING

BACKLIGHT_ON/OFF
A/D DIMMING SELECTION
VDDC_1V2

S95
3V3_VCC

F250

600R
3V3_VCC

STBY_ON/OFF

W/IPS16
60R
F274

BACKLIGHT_ON/OFF
60R_100MHz_400mA_0.3R_SMD0603

PIN_9
PIN_7_8
ferrite

F295
60R
F270

60R
16V
100n
C1007

MECH_SWITCH
10u
6V3

S1
S7

S23
S24
16V
100n
C1029 C1014
AVSS_PGA

W/PW26
W/IPS16
W/IPS16
W/PW26
AVDD_2V5_PGA

3
3

VDD_3V3

E22 AC2
5V_VCC

5V_STBY VDDC0 GND29


12V_STBY

F22 AE1
3V3_STBY

VDDC1 GND30
E21 Y10
VDDC2 GND31
F21 V7
VDDC3 GND32
G21 W7
VDDC4 GND33
H21 V8
VDDC5 GND34
PIN_11

E20 W8
VDDC6 GND35
PIN_10

F20 V9
VDDC7 GND36
G20 W9
VDDC8 GND37
G22 J10
VDDC9 GND38
K10
VDDC_1V2 GND39
H20 M10
DVDD_DDR0 GND40
J20 N10
NC
S8

DVDD_DDR1 GND41
S22

MEGA_DCR_IN
P10
GND42
S20
S21

BACKLIGHT_DIM
J21 R10
AVDD126 GND43
T10
GND44
U10
W/PW26
W/IPS16
W/PW26
W/IPS16

GND45

3V3_VCC

PANEL_VCC_ON/OFF
V10

5V_VCC
NC
GND46

S18
W10

12V_VCC
GND47
M8 D11

2
AVDD_ADC25_0 GND48

4
4

5V_STBY

12V_VCC

M9 G11

1
AVDD_ADC25_1 GND49
18V_VCC

H11
5V_VCC

NC
1
1
1
1
GND50

10k
N8 J11

R1685
AVDD_REF25_0 GND51

S82
S16

1
N9 K11
AVDD_REF25_1 GND52
MEGA_DCR_OUT

60R
60R
60R
60R

2
F290
F288
F289
F302
L11
NC

2
AVDD_2V5 GND53

2
2
2
2
S17 R9 M11
AVDD_AU25 GND54

1
3
N11

2
1

1 4k7 2 3V3_VCC GND55


P8 P11
1

R1678 AVDD_MOD25_0 GND56


P9 R11
AVDD_MOD25_1 GND57

10k
4k7

50V
2

220p
C838

T11

R1693
R1165

25V GND58

1
2

100n
BC848B
Q19410V
T8 U11

C1042
470n AVDD_2V5_PGA AVDD_PGA25 GND59

1
2
V11
GND60
U8 W11

2
2

C1128 AVSS_PGA PGA_COM GND61


D12
R1749 R1221 GND62
PIN_7_8

1
3
1
3

1 2 E12
22k 1 33k 2 1k 3V3_VCC GND63
F12

1
R1734 GND64
G12
GND65

Q190
Q189

E9 H12
AVDD_ALIVE_0 GND66

47R

BC848B
BC848B

E10 J12

R1725
AVDD_ALIVE_1 GND67

2
PIN_7_8

F9 K12
1
1

AVDD_ALIVE_2 GND68

5
5

F10 L12
1
1

AVDD_ALIVE_3 GND69
3 4 G9 M12
AVDD_ALIVE_4 GND70
4k7
4k7
3

50V
50V
R13

2
2

220p
220p

C840
C839
910R

N12
NC

R1166
R1158

GND71
2
2

2 5 G10 P12
NC
IN

AVDD_DMPLL GND72
S29
1

R12
AVDD_3V3 GND73
1 6 H9 T12
2
2
NC U1

AVDD_CVBS33_0 GND74
FDC642P H10 U12
LM1117

AVDD_CVBS33_1 GND75
4

1
3
3
1

Q199 V12
NC
ADJ VOUT
OUT

GND76
R14
560R

K9 W12
AVDD_AU33 GND77
2

PANEL SUPPLY SWITCH

1 D13
TP213 GND78
Q193

5
6
7
8

Q188

J9 E13
AVDD_EAR33 GND79
BC858B

BC848B

F13
R4
R3
R2
R1

GND80
5V_STBY

100R

H13
R1761
DIMMING CIRCUIT

GND81
4
3
2
1

J13
GND82
E19 K13
VDDP0 GND83
F19 L13
VDDP1 GND84
PANEL_VCC

M13
1

VDD_3V3 GND85
PW27 LOW POWER Option

G18 N13
3V3_STBY

10u
10V

AVDD_LPLL GND86
C774

P13
GND87
4k7

R13
R1679

6 GND88
2

T13
6

6
GND89
U157 U13
GND90
D14
MSD9WB7PX-2 GND91 E14
GND92
E17 F14
AVDD_DDR AVDD_DDR_0 GND93
E18 G14
AVDD_DDR_1 GND94
DIMMING

F17 H14
AVDD_DDR_2 GND95
100n
10V
C971

F18 J14
AVDD_DDR_3 GND96
1
2

1 G17 K14
TP202 AVDD_DDR_4 GND97
G16 L14
AVDD_DDR_5 GND98
H16 M14
1
3

PROTECT AVDD_DDR_6 GND99


H17 N14
AVDD_DDR_7 GND100
2

J16 P14
AVDD_DDR_8 GND101
Q178

J17 R14
BC848B
1

AVDD_DDR_9 GND102
T14
GND103
U14
GND104
10k

D15
Q180

R1638
BC858B

R1639 GND105
2

1 2 E15
3
1

10k GND106
L10 F15
BYPASS GND107
2

G15
STBY_ON/OFF_NOT

3V3_STBY

1
2

GND108
1u

H15
6V3
C974

GND109
7

J15
1

GND110
10k
10k

K15
R1636
R1635

GND111
2
1

N19 L15
SCH NAME :

GND3 GND112
DRAWN BY :
4k7

M19 M15
R1748

GND4 GND113
2

L19 N15
3
3
3

GND5 GND114
1 2 1 2 1 2 K19 P15
2

GND6 GND115
N20 R15
D184 D186 D185 GND7 GND116
1
3

M20 T15
BAW56 BAW56 BAW56 1 4k7 2 GND8 GND117
L20 U15
1

R1676 GND9 GND118


K20 U16
3V3_STBY

2
1
2
1

GND10 GND119
Q191

N21 T16
GND11 GND120
4k7

BC848B

M21 R16
R1677

GND12 GND121
22k
33k
10k
33k
10k
2

L21 P16
R1750
R1727
R1631
R1649
R1688

GND13 GND122
1
2
1
2

K21 N16
5V_TUN
5V_VCC

GND14 GND123
3V3_VCC

<YOUR NAME HERE>

N22 M16
GND15 GND124
SHORT CCT PROTECTION

M22 L16
VCC_PCMCIA

GND16 GND125
L22 K16
<DRAWING NAME HERE>
PROJECT NAME :

GND17 GND126
K22 F16
GND18 GND127
J22 E16
A3

GND19 GND128
12V_VCC
24V_VCC
18V_VCC

H22 D16
GND20 GND129
STBY_ON/OFF
8

U18 K17
GND21 GND130
T18 L17
GND22 GND131
R18 M17
GND23 GND132
P18 N17
GND24 GND133
N18 P17
GND25 GND134
M18 R17
SHEET: 1

GND26 GND135
L18 T17
GND27 GND136
K18 U17
GND28 GND137
OF: 8

10-03-2010_16:12
A3
F
E
B
A

D
C

AX M
R1310 C888 C782 F270 S98
R1946 Q193
S2
S4

FS2 FS3 X4
S10
S58

S55
S74
S73
S54
S57
S35
S34
S36
S37
S30

C711
C718
C687

C1068 X3 S72 S12

R1711
R1712
R1699
R1364
R1355

C1058
Q185 D169 C663 R1949
R1301
R1280

R1295
R1297
R1296
R1275
R1266
R1300

S11
F278
Q195

R1948
R1206
R1209

D176
C1069 C716

D191

D190
F271
C1117
R1947

C1032
R1243

U161
Q186 R1707 R1609 C714
R1682
R1761

R1311
R1265
C774
C839

R1762 C715
R1158
R1221

C713 R1602

R344 R1681 F272 R1679


C1067
C1119 C1118

C1116 C1060
R1763
C1072
C1057
C1120 C1053

R1166

R1718
R1684
R1702
R1370

S87
S86
C1030

R1701
R1941
R1924 R1662 Q181 R1131 CN136 C840
Q188

C1185 S81 R1134

R223
C1182 R1368 C1025 CN706 CN1
R1673

C1202 R1661 U155

R1663
S79

F199
S91

R1923 C1059 CN135


R1928 R1915 R498
R2

C1063

C889 C890
Q202 R1133
C1205 R1916 R1522
S1

S8
R1656

S21

S22
S23
S20

R1132 R1165 R263 Q194


C5
C7
C6

JK10
R1926 R1380
S6

U171

U178
R1929
Q189 S17

C1192 C1191
R1906 R1922
R1674

C838 R694
R1

R1615

D200 C1050

C1203
S80

R1905R1913

CN705
R1914 S29
C972
C650

R1274 S71 S19 S56 S18 S16 R1543


R1623
R1523

S92
D181

C1206
R1927
JK9
R1603
R1350

C1177 C1054 C1029 S94 R1693


R1685

R1889C1175
C1014

R1890
R1908
CN711
S89R1677
C1052

F198 C1178
C1176 S82

R222C1186
R1925
C1181 S83R1748 Q191
R1676
FS1

F301 F279
R1943

C1180 R1907 R1618


S7

R1678
C1042

C1065
F280 R1836 CN137 CN138
R1617
R13 R14

R1902 R1369
R1366
U1
R1727

C1207
R1314

C1179 D199 F290


R1331
R1313
R1332

R1840 F284
C854 R1367

R1601
C1055
C1056
C1066
R1669
Q157 Q190 R1725

R1894
C973

C1187
R1921

CN133
R1952 C1022
F283

R1610
F206 F172 C683 F288

R1931Q206
F207 C1024 F285
R1330
R1335
R1333

R1624
R1356
R1734 F302

R1245
C858 R1613 F277
R1749C1128

C990 R1616
S3

C824
S13
S14

R1183 R1365 F289


C628
R1750 D185

F201 S24
C1081

D165
D197

C658 C1004
C997 R1650

R1358
R1357
C853R1901 F294 D192 R1688
R1880 C1001
C1005

U158

R1938
Q199

R1920

R1248

U179
R1692
R1732
CN704

F205 R1879 C1070 CN139


C1049 R1649 R1652
R1653

R1888

R1885
R1864
R1865
C1188

R1878
R1724

R1839
R1838
R1886

R1379
R1631 R1651
Q170 R1244
C857 R1867

R1671
R1567
S78 R1887
F200
C1112
Q200

R1945 R1868
R1733 Q182

Q174 R1182 R1935 CN708 R1877 R1936


S15

S99
S33
S32
FS5

R1563 R1187
C664 R1869 C1037
R1328 R1937
U174

CN703
R1572 R1569
D178 R1883

D173
R1374

R1940 R1876 L118


R1882
C1091
C1092

R1571 R1917 R1423


C861
F287

R1608

Q173 R1896 R1872 R1315 R1346


C722
C723

R1562 R1911
R1895
R1604 R1871 R1419
C802 R1349 D186 F249
R1912 R1408
C806 R1944

R1516
C1094
C1093
F291

F292

C949 R1910
R1607 R1884 R1421
C809

CN132
R1482
R1403 R1870 R1422
C810
R1873 R1409
C807 R1528
R1378

R1404C825C826
F259 R1570 R1874
C1130

R1737
R1690
R1709
C1038

R1515
C1198 C974

Q203
R1862
F286

R1420
C808 F248 R793

Q204
C1089

C1090

R1568 R1863 R1416


C796 U157 C720
R1377

C831
C827
R1909R1875 C884 R1505
C862 R1317 C721 C630 S76

R1517

R1489
R1672 Q171
C1107

C1197 R1509 R1325

D174
R1605 R1881
R1606 C1194 R1417
C797 R1321
R1614S95 F250
S93 R1323 C1102 C971
CN709
CN702

C832R1483 R1418
C798 R1510
C885 U176 D202
R1319

SC1
JK7
C1073 R1480 C1196 C1195 R1507 C882 R1511
C886 R1327
U154

C719
L116

C1103

R1716
R1714

R1687
R1899
R1479 CN707 R1494
C859 R1406
C804 U23 Q178
C717

C1074
C835

C1183S85
C1193 R1405C803

R1481
C1009
C1008 R1506
C881 F273

R1717
R1715
C1075
C1077

C1184
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R1897
C1078
C1076
R1696
R1508
C883 R1407
C805
C1085
C1084

R1738
R1769
R1770

C378 R1530C959 C1047


C1114 C1036

R1375R1371
F181
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D175
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C794 C1101

F275
R1249 R221R104 R1485 R1412
C799

C1028
R1729
C1113

R124 F179 R1410


C793
R3

C1097
C1096

C860 R1233 R1587 R1484 R1415


C795 Q198 Q180

R1900 C1123 R1741


Q119 R1413
C800
C1129
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R1735

U168 C836 Q146 C788 F274 R11 R1547 C1098


C710
C712

R620
C709

C689

C833
R1354
R1363

R1612

C120

F295
R1414
C801
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R1722

L123
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R103 R12 R1548

C1007
L16

R102
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R1835
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C654 Q184 R1723


R1373R1611

C1199
C1174
R1636
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C1200
C1201
L104 R1173 R1950
C1048

Q209 C653 R1730

C1121
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R1698 FS4
R1660
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R1697 C1087

F281
F282

C1122
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R1768
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R624C617
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R1398 R1389

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C942 C943 C945 C944
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R209 R1583

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R483
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R474C546
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R1580
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R1549
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R1592
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R1621 Q205 R1201 C1214

R1939 L120
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C1168
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C830
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R1954
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R1497 R1498 R1294 R1499

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R1694
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F134

F264
F269
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JK4 S25 R1560


R1561
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SW1 SW2 SW4 SW3


C1169

S43
S40
X1

S41
C656
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C919
C914
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S9
R1496
R1942
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S42
R1856
R1565
R1564

S39
F260
S49

Q192
R1155 C954

Q187R1703
R1704
JK6 JK3 JK2

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