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Lecture Outline

ESE 568: Mixed Signal Design and


!  Differential Source Coupled Pair
Modeling
!  Differential Amplifier
!  Opamp
Lec 4: September 12th, 2018
"  Ideal Opamp
Differential Amplifier, Basics of Opamp
"  Basic Properties
Design
"  Practical Circuits
!  2-Stage Opamp Design (if time)

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Source Coupled Pair – Large Signal Source Coupled Pair – Large Signal

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Source Coupled Pair – Large Signal Source Coupled Pair – Large Signal

IOC IOC

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Source Coupled Pair – Large Signal Source Coupled Pair – Large Signal

IOC + (IOD 2) I − (IOD 2) IOC + (IOD 2) I − (IOD 2)


VID = − OC VID = − OC
K K K K

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Source Coupled Pair – Small Signal Source Coupled Pair – Small Signal

IOC IOC

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Differential Amplifier Small Signal Modeling – Bias Current

!  Small signal analysis assumes linearity


!  Useful for amplifying signals in the presence of noise "  Impact of M4 on amplifier is to simply present its drain
"  Common-mode noise is rejected impedance to the diff pair transistors (M1 and M2)
!  Useful for high speed digital circuits "  Impact of Vin+ and Vin- can be evaluated separately than
"  Low voltage swing allows faster gate/buffer performance added (i.e., superposition)

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Differential Amplifier Analysis Differential DC Gain

!  Partition input signals into common-mode and !  Inputs are equal in magnitude but opposite in sign
differential components to each other
!  By superposition, we can add the results to !  By linearity and symmetry, is1 must equal -is2
determine the overall impact of the input signals

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Differential DC Gain Differential Amplifier Analysis

!  Inputs are equal in magnitude but opposite in sign !  Partition input signals into common-mode and
to each other differential components
!  By linearity and symmetry, is1 must equal -is2 !  By superposition, we can add the results to
This implies iR is zero, so that voltage drop across ro4 is zero
" 
determine the overall impact of the input signals
"  The sources of M1 and M2 are therefore at incremental ground and
decoupled from each other!
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Common Mode DC Gain Common Mode DC Gain

!  Inputs are equal to each other !  Inputs are equal to each other
!  By linearity and symmetry, is1 must equal is2 !  By linearity and symmetry, is1 must equal is2
"  This implies iR = 2is1 = 2is2 "  This implies iR = 2is1 = 2is2
!  We can view ro4 as two parallel resistors that have equal
current running through them

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MOS Diff Pair Gain Stage MOS Diff Pair Gain Stage

3.8 in text

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Ideal Opamp
!  The ideal opamp characterized by seven properties
Opamp "  Knowledge of these properties is sufficient to design and
analyze a large number of useful circuits
!  Basic opamp properties
"  Infinite open-loop voltage gain
"  Infinite input impedance
"  Zero output impedance
"  Zero noise contribution
"  Zero DC output offset
"  Infinite bandwidth
"  Differential inputs that stick together
"  Zero input differential voltage
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Basic Opamp Properties Basic Opamp Properties


!  Property No.1: Infinite Open-Loop Gain  !  Property No. 3: Zero Output Impedance 
"  Open-Loop Gain AVOL is the gain of the opamp without "  The ideal opamp acts as a perfect internal voltage source
positive or negative feedback  with no internal resistance 
"  In the ideal opamp AVOL is infinite  "  This internal resistance is in series with the load, reducing the
output voltage available to the load 
"  Typical values range from 20,000 to 200,000 in real devices 
"  Real opamps have output-impedance in the 10-20Ω range 
!  Property No.2: Infinite Input Impedance  "  Example
"  Input impedance is the ratio of input voltage to input
current, Zin=Vin/Iin
"  When Zin is infinite, the input current Iin=0 
"  High-grade opamps can have input impedance in the TΩ range 
"  Some low-grade opamps, on the other hand, can have mA input
currents

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Basic Opamp Properties Basic Opamp Properties
!  Property No. 4: Zero Noise Contribution  !  Property No. 5: Zero output Offset 
"  In the ideal opamp, zero noise voltage is produced "  The output offset is the output voltage of an amplifier
internally  when both inputs are grounded 
"  That is, any noise at the output must have been at the input as "  The ideal opamp has zero output offset, but real opamps
well 
have some amount of output offset voltage
"  Practical opamp are affected by several noise sources,
such as resistive and semiconductor noise 
"  These effects can have considerable effects in low signal-level
applications 

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Basic Opamp Properties Opamp Practical Circuits


!  Property No. 6: Infinite Bandwidth  !  Voltage comparator 
"  The ideal opamp will amplify all signals from DC to the
highest AC frequencies 
"  In real opamps, the bandwidth is rather limited 
"  This limitation is specified by the Gain-Bandwidth product
"  GBW = f3dB*Gain3dB

Some opamps, such as the 741 family, have very limited


Voltage follower 
" 

bandwidth of up to a few KHz  ! 

!  Property No. 7: Differential Inputs Stick Together


"  In the ideal opamp, a voltage applied to one input also
appears at the other input

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Opamp Practical Circuits Opamp Practical Circuits


!  Non-inverting amplifier  !  Summing amplifier 

!  Inverting amplifier !  Differential amplifier 

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Opamp Practical Circuits Opamp Practical Circuits
!  Integrating amplifier  !  Current-to-voltage 

!  Differentiating amplifier !  Voltage-to-current

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Steps in Designing a CMOS Opamp


!  1) Choosing or creating the basic structure of the
Opamp Design opamp
"  This step results in a schematic showing the transistors
and their interconnections 
"  This diagram does not change throughout the remainder
of the design unless the specifications cannot be met,
then a new or modified structure must be developed 
!  2) Selection of the dc currents and transistor sizes
"  a.k.a Biasing and sizing 
"  Most of the effort of design is in this category
"  Simulators are used to aid the designer in this phase

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Steps in Designing a CMOS Opamp Design Variables


!  3) Physical implementation of the design !  Boundary conditions (constraints): 
"  Layout of the transistors  "  1. Process specification (VT, μ, Cox, etc.) 
"  Floorplanning the connections, pin-outs, power supply "  2. Supply voltage and range 
buses and grounds  "  3. Supply current and range 
"  Extraction of the physical parasitics and re-simulation  "  4. Operating temperature and range 
"  Verification that the layout is a physical representation of
the circuit
!  4) Fabrication 
!  5) Measurement 
"  Verification of the specifications 
"  Modification of the design as necessary
"  Make sure it’s not necessary!
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Design Variables Specifications
!  Specifications:  !  1. Open-loop Gain 
"  1. Open-loop Gain  "  Typically an op-amp may have a maximal open-loop gain
2. Gain bandwidth 
" 
of around 105
"  3. Settling time 
V
"  4. Slew rate  AOL = + out −
Vin −Vin
"  5. Input common-mode range, ICMR 
"  6. Common-mode rejection ratio, CMRR 
!  2. Gain bandwidth 
"  7. Power-supply rejection ratio, PSRR 
"  8. Output-voltage swing 
"  9. Output resistance 
"  10. Offset 
"  11. Noise 
"  12. Layout area

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Specifications Specifications
!  3. Settling time  !  5. Input common-mode range, ICMR 
!  4. Slew rate  "  The input common-mode range is the range of common-
mode voltages over which the differential amplifier
! dv (t) $
SR = max # out &
continues to sense and amplify the difference signal with
" dt % the same gain. 
"  Typically, the ICMR is defined by the common-mode
voltage range over which all MOSFETs remain in the
saturation region.

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Specifications Specifications
!  6. Common-mode rejection ratio, CMRR !  8. Output-voltage swing 
"  CMRR is a measure of how well the differential amplifier "  Expected output swing
rejects the common-mode input voltage in favor of the !  9. Output resistance 
differential-input voltage.
"  Resistance seen into the output
avd
CMRR = !  10. Offset 
avc
"  Output offset voltage (VOS(out)) 
!  7. Power-supply rejection ratio, PSRR  "  The output offset voltage is the voltage which appears at the
a output of the differential amplifier when the input terminals are
PSRR+ = vd connected together. 
a+
"  Input referred offset voltage (VOS(in) = VOS) 
avd The input referred offset voltage is equal to the output
PSRR− = " 

a− offset voltage divided by the differential voltage gain. 


"  VOS = VOS(out)/AVD
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Opamp Design Output Opamp Design Practical Advice
!  1) The topology  !  1) Decide upon a suitable topology
"  The topology should be the one capable of meeting most of the
!  2) The dc currents  specifications
Try to avoid “inventing” a new topology but start with an existing
!  3) The W and L values of transistors  " 

topology
!  4) The values of components !  2) Determine the type of compensation needed to meet the specifications
"  Consider the load and stability requirements
"  Use some form of Miller compensation or a self-compensated approach
!  I.e Schematic and biasing !  3) Design dc currents and device sizes for proper dc, ac, and transient
performance
"  This begins with hand calculations based upon approximate design
equations.
"  Compensation components are also sized in this step of the procedure.
"  After each device is sized by hand, a circuit simulator is used to fine tune
the design

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Opamp Design Practical Advice


!  Two basic steps of design:
"  1) “First-cut” - this step is to use hand calculations to
Basic 2-stage Opamp
propose a design that has potential of satisfying the
specifications. Design robustness is developed in this
step.
"  2) Optimization - this step uses the computer to refine
and optimize the design.

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2-Stage Opamp 2-Stage Opamp

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Big Ideas Admin
!  Opamp is useful to implement basic functions !  HW 2 posted
"  Inverting, non-inverting, summing, differential, "  Due Sun 9/16
integrating, differentiating amplifiers
"  … if they’re ideal
!  Design to meet specs so opamp is “ideal enough”
!  Basic 2-stage CMOS opamp is a workhorse for
many moderate performance analog applications 
"  More next time…

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