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Penn ESE 568 Fall 2018 - Khanna Penn ESE 568 Fall 2018 - Khanna 2
Source Coupled Pair – Large Signal Source Coupled Pair – Large Signal
Penn ESE 568 Fall 2018 - Khanna 3 Penn ESE 568 Fall 2018 - Khanna 4
Source Coupled Pair – Large Signal Source Coupled Pair – Large Signal
IOC IOC
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Source Coupled Pair – Large Signal Source Coupled Pair – Large Signal
Penn ESE 568 Fall 2018 - Khanna 7 Penn ESE 568 Fall 2018 - Khanna 8
Source Coupled Pair – Small Signal Source Coupled Pair – Small Signal
IOC IOC
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Penn ESE 568 Fall 2018 - Khanna 11 Penn ESE 568 Fall 2018 - Khanna 12
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Differential Amplifier Analysis Differential DC Gain
! Partition input signals into common-mode and ! Inputs are equal in magnitude but opposite in sign
differential components to each other
! By superposition, we can add the results to ! By linearity and symmetry, is1 must equal -is2
determine the overall impact of the input signals
Penn ESE 568 Fall 2018 - Khanna 13 Penn ESE 568 Fall 2018 - Khanna 14
! Inputs are equal in magnitude but opposite in sign ! Partition input signals into common-mode and
to each other differential components
! By linearity and symmetry, is1 must equal -is2 ! By superposition, we can add the results to
This implies iR is zero, so that voltage drop across ro4 is zero
"
determine the overall impact of the input signals
" The sources of M1 and M2 are therefore at incremental ground and
decoupled from each other!
Penn ESE 568 Fall 2018 - Khanna 15 Penn ESE 568 Fall 2018 - Khanna 16
! Inputs are equal to each other ! Inputs are equal to each other
! By linearity and symmetry, is1 must equal is2 ! By linearity and symmetry, is1 must equal is2
" This implies iR = 2is1 = 2is2 " This implies iR = 2is1 = 2is2
! We can view ro4 as two parallel resistors that have equal
current running through them
Penn ESE 568 Fall 2018 - Khanna 17 Penn ESE 568 Fall 2018 - Khanna 18
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MOS Diff Pair Gain Stage MOS Diff Pair Gain Stage
3.8 in text
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Ideal Opamp
! The ideal opamp characterized by seven properties
Opamp " Knowledge of these properties is sufficient to design and
analyze a large number of useful circuits
! Basic opamp properties
" Infinite open-loop voltage gain
" Infinite input impedance
" Zero output impedance
" Zero noise contribution
" Zero DC output offset
" Infinite bandwidth
" Differential inputs that stick together
" Zero input differential voltage
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Basic Opamp Properties Basic Opamp Properties
! Property No. 4: Zero Noise Contribution ! Property No. 5: Zero output Offset
" In the ideal opamp, zero noise voltage is produced " The output offset is the output voltage of an amplifier
internally when both inputs are grounded
" That is, any noise at the output must have been at the input as " The ideal opamp has zero output offset, but real opamps
well
have some amount of output offset voltage
" Practical opamp are affected by several noise sources,
such as resistive and semiconductor noise
" These effects can have considerable effects in low signal-level
applications
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Opamp Practical Circuits Opamp Practical Circuits
! Integrating amplifier ! Current-to-voltage
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Design Variables Specifications
! Specifications: ! 1. Open-loop Gain
" 1. Open-loop Gain " Typically an op-amp may have a maximal open-loop gain
2. Gain bandwidth
"
of around 105
" 3. Settling time
V
" 4. Slew rate AOL = + out −
Vin −Vin
" 5. Input common-mode range, ICMR
" 6. Common-mode rejection ratio, CMRR
! 2. Gain bandwidth
" 7. Power-supply rejection ratio, PSRR
" 8. Output-voltage swing
" 9. Output resistance
" 10. Offset
" 11. Noise
" 12. Layout area
Penn ESE 568 Fall 2018 - Khanna 37 Penn ESE 568 Fall 2018 - Khanna 38
Specifications Specifications
! 3. Settling time ! 5. Input common-mode range, ICMR
! 4. Slew rate " The input common-mode range is the range of common-
mode voltages over which the differential amplifier
! dv (t) $
SR = max # out &
continues to sense and amplify the difference signal with
" dt % the same gain.
" Typically, the ICMR is defined by the common-mode
voltage range over which all MOSFETs remain in the
saturation region.
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Specifications Specifications
! 6. Common-mode rejection ratio, CMRR ! 8. Output-voltage swing
" CMRR is a measure of how well the differential amplifier " Expected output swing
rejects the common-mode input voltage in favor of the ! 9. Output resistance
differential-input voltage.
" Resistance seen into the output
avd
CMRR = ! 10. Offset
avc
" Output offset voltage (VOS(out))
! 7. Power-supply rejection ratio, PSRR " The output offset voltage is the voltage which appears at the
a output of the differential amplifier when the input terminals are
PSRR+ = vd connected together.
a+
" Input referred offset voltage (VOS(in) = VOS)
avd The input referred offset voltage is equal to the output
PSRR− = "
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Opamp Design Output Opamp Design Practical Advice
! 1) The topology ! 1) Decide upon a suitable topology
" The topology should be the one capable of meeting most of the
! 2) The dc currents specifications
Try to avoid “inventing” a new topology but start with an existing
! 3) The W and L values of transistors "
topology
! 4) The values of components ! 2) Determine the type of compensation needed to meet the specifications
" Consider the load and stability requirements
" Use some form of Miller compensation or a self-compensated approach
! I.e Schematic and biasing ! 3) Design dc currents and device sizes for proper dc, ac, and transient
performance
" This begins with hand calculations based upon approximate design
equations.
" Compensation components are also sized in this step of the procedure.
" After each device is sized by hand, a circuit simulator is used to fine tune
the design
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Big Ideas Admin
! Opamp is useful to implement basic functions ! HW 2 posted
" Inverting, non-inverting, summing, differential, " Due Sun 9/16
integrating, differentiating amplifiers
" … if they’re ideal
! Design to meet specs so opamp is “ideal enough”
! Basic 2-stage CMOS opamp is a workhorse for
many moderate performance analog applications
" More next time…
Penn ESE 568 Fall 2018 - Khanna 49 Penn ESE 568 Fall 2018 – Khanna 50