SJ-20110531095035-003-ZXG10 iBSC (V6.20.71) Hardware Description

ZXG10 iBSC
Base Station Controller

Hardware Description
Version: V6.20.71
ZTE CORPORATION
NO. 55, Hi-tech Road South, ShenZhen, P.R.China
Postcode: 518057
Tel: +86-755-26771900
Fax: +86-755-26770801
URL: http://ensupport.zte.com.cn
E-mail: support@zte.com.cn
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Copyright © 2011 ZTE CORPORATION.
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are disclaimed, including without limitation any implied warranty of merchantability, fitness for a particular purpose,
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The ultimate right to interpret this product resides in ZTE CORPORATION.
Revision History
Revision No. Revision Date Revision Reason
R3.0 2012-05-08 Third edition(V6.20.712)
R2.0 2011-10-31 Second edition(V6.20.711)
R1.0 2011-07-14 First edition(V6.20.710)
Serial Number: SJ-20110531095035-003
Publishing Date: 2012-5-8 (R3.0)

Contents
About This Manual ......................................................................................... I
Chapter 1 Overview .................................................................................... 1-1
1.1 Product Description ............................................................................................ 1-1
1.2 Hardware Composition ....................................................................................... 1-1
Chapter 2 Cabinet....................................................................................... 2-1

2.1 Cabinet Appearance........................................................................................... 2-1
2.2 Cabinet Structure ............................................................................................... 2-2
2.2.1 Cabinet Top ............................................................................................. 2-2
2.2.2 Front and Rear Doors ............................................................................... 2-9
2.2.3 Rack...................................................................................................... 2-10
2.2.4 Busbar....................................................................................................2-11
2.3 Cabinet Configuration ....................................................................................... 2-12
2.4 Cabinet Cabling ............................................................................................... 2-13
2.5 Process Design................................................................................................ 2-14
Chapter 3 Subrack...................................................................................... 3-1

3.1 Power Distribution Subrack ................................................................................. 3-1
3.1.1 Power Distribution Subrack Functions........................................................ 3-1
3.1.2 Power Distribution Subrack Structure ........................................................ 3-1
3.1.3 Power Distribution Subrack Panel ............................................................. 3-2
3.1.4 Indicators on the Power Distribution Subrack ............................................. 3-2
3.1.5 Switches on the Power Distribution Subrack .............................................. 3-3
3.1.6 External Interfaces on the Power Distribution Subrack ................................ 3-4
3.1.7 PWRD Board ........................................................................................... 3-4
3.2 Fan Subrack ...................................................................................................... 3-7
3.2.1 Fan Subrack Functions ............................................................................. 3-7
3.2.2 Fan Subrack Structure.............................................................................. 3-7
3.2.3 Fan Subrack Panel................................................................................... 3-8
3.2.4 Indicators on the Fan Subrack................................................................... 3-8
3.2.5 Buttons on the Fan Subrack...................................................................... 3-8
3.2.6 External Interfaces on the Fan Subrack ..................................................... 3-9
3.3 Dust-proof Subrack ............................................................................................ 3-9
Chapter 4 Shelf ........................................................................................... 4-1

4.1 Shelf Overview................................................................................................... 4-1
I
4.1.1 Shelf Classification ................................................................................... 4-1
4.1.2 Shelf Location .......................................................................................... 4-2
4.2 Shelf Configuration............................................................................................. 4-2
4.2.1 Shelf Configuration When Using Resource Shelf ........................................ 4-2
4.2.2 Shelf Configuration When Using GB Resource Shelf .................................. 4-6
4.3 Inter-Shelf Interconnection .................................................................................. 4-9
4.3.1 Inter-Shelf Connection for Resource Shelf ................................................. 4-9
4.3.2 Inter-Shelf Connection for GB Resource Shelf.......................................... 4-15
Chapter 5 Board.......................................................................................... 5-1

5.1 Board Classification............................................................................................ 5-1
5.2 Board Installation Relationship ............................................................................ 5-1
5.3 Front Board........................................................................................................ 5-2
5.3.1 BIPI Board ............................................................................................... 5-2
5.3.2 BIPI4 Board ............................................................................................. 5-5
5.3.3 CHUB Board ............................................................................................ 5-8
5.3.4 CLKG(CLKG) Board ................................................................................5-11
5.3.5 CLKG(ICM) Board .................................................................................. 5-18
5.3.6 CMP Board ............................................................................................ 5-24
5.3.7 CMP2 Board .......................................................................................... 5-28
5.3.8 DTB Board............................................................................................. 5-32
5.3.9 DTEC Board .......................................................................................... 5-36
5.3.10 EIPI Board ........................................................................................... 5-41
5.3.11 EIPI4 Board.......................................................................................... 5-44
5.3.12 ESDT Board......................................................................................... 5-47
5.3.13 ESDT2 Board....................................................................................... 5-50
5.3.14 GLI Board ............................................................................................ 5-55
5.3.15 GLI4 Board .......................................................................................... 5-59
5.3.16 GIPI Board........................................................................................... 5-62
5.3.17 GIPI4 Board ......................................................................................... 5-66
5.3.18 GUIM Board......................................................................................... 5-71
5.3.19 GUIM2 Board ....................................................................................... 5-76
5.3.20 GUP Board .......................................................................................... 5-80
5.3.21 GUP2 Board ........................................................................................ 5-85
5.3.22 ICM Board ........................................................................................... 5-89
5.3.23 OMP Board .......................................................................................... 5-97
5.3.24 OMP2 Board .......................................................................................5-102
5.3.25 PSN Board..........................................................................................5-106
II
5.3.26 SBCX Board ....................................................................................... 5-110
5.3.27 SBCX2 Board...................................................................................... 5-114
5.3.28 SDTB Board........................................................................................ 5-116
5.3.29 SDTB2 Board......................................................................................5-120
5.3.30 SPB Board..........................................................................................5-125
5.3.31 SPB2 Board ........................................................................................5-129
5.3.32 UIMC Board ........................................................................................5-133
5.3.33 UIMU Board ........................................................................................5-137
5.3.34 UPPB Board .......................................................................................5-142
5.4 Rear Board .....................................................................................................5-146
5.4.1 RCHB1 Board .......................................................................................5-146
5.4.2 RCHB2 Board .......................................................................................5-148
5.4.3 RCKG1 Board.......................................................................................5-151
5.4.4 RCKG2 Board.......................................................................................5-154
5.4.5 RDTB Board .........................................................................................5-157
5.4.6 RGER Board.........................................................................................5-159
5.4.7 RGER2 Board.......................................................................................5-160
5.4.8 RGIM1 Board........................................................................................5-161
5.4.9 RGUM1 Board ......................................................................................5-162
5.4.10 RGUM2 Board ....................................................................................5-164
5.4.11 RMNIC Board......................................................................................5-165
5.4.12 RMPB Board.......................................................................................5-167
5.4.13 RSPB Board .......................................................................................5-168
5.4.14 RSVB Board .......................................................................................5-170
5.4.15 RUIM1 Board ......................................................................................5-172
5.4.16 RUIM2 Board ......................................................................................5-173
5.4.17 RUIM3 Board ......................................................................................5-175
5.5 Backplane.......................................................................................................5-176
5.5.1 BCTC Backplane...................................................................................5-176
5.5.2 BPSN Backplane...................................................................................5-179
5.5.3 BUSN Backplane ..................................................................................5-181
5.5.4 BGSN Backplane ..................................................................................5-183
Chapter 6 Auxiliary Equipment ................................................................. 6-1

6.1 Alarm Box (ALB) ................................................................................................ 6-1
6.1.1 ALB Functions ......................................................................................... 6-1
6.1.2 ALB Principle ........................................................................................... 6-2
6.1.3 ALB Panel ............................................................................................... 6-4
III
6.1.4 ALB Interfaces ......................................................................................... 6-4
6.1.5 ALB Buttons............................................................................................. 6-6
6.1.6 ALB Indicators ......................................................................................... 6-7
6.1.7 Connection Mode ..................................................................................... 6-7
6.2 Relevant GPS Devices ....................................................................................... 6-9
6.2.1 GPS Active Antenna and Lightning Protector/Frequency Divider ................. 6-9
6.2.2 GPS L1 Signal Transponder and GPS Antenna Feeder Lightning
Protector .............................................................................................. 6-12
Appendix A Description of Combined Indicator Status......................... A-1

Figures............................................................................................................. I
Tables ...........................................................................................................VII
Glossary ........................................................................................................XI
IV
About This Manual
Purpose
This manual describes the hardware of the ZXG10 iBSC, including cabinet, subrack, shelf,
board, and auxiliary devices.
Intended Audience
l Planning engineers
l Equipment installation engineers
l Commissioning engineers
l Maintenance engineers
What Is in This Manual

This manual contains the following chapters:
Chapter Summary
Chapter 1, Overview Describes the hardware of the ZXG10 iBSC.
Chapter 2, Cabinet Describes the appearance, structure, configuration, cabling, and

process of the ZXG10 iBSC cabinet.
Chapter 3, Subrack Describes the functions, structure, and interfaces of the ZXG10 iBSC
subrack.
Chapter 4, Shelf Describes the types, configuration, and interconnection of the ZXG10
iBSC shelf.
Chapter 5, Board Describes the functions, structure, and interfaces of the ZXG10 iBSC
board.
Chapter 6, Auxiliary Devices Describes the functions and structure of the ZXG10 iBSC auxiliary
devices.
Appendix A, Combined Describes meaning of combined indicator status of the ZXG10 iBSC
Indicator Status Descriptions board.
I
II
Chapter 1
Overview
Table of Contents
Product Description ....................................................................................................1-1
Hardware Composition ...............................................................................................1-1
1.1 Product Description

ZXG10 is a GSM mobile communication system developed by ZTE. It is composed of
ZXG10 MSS switch subsystem and ZXG10 BSS subsystem. The ZXG10 BSS subsystem
provides and manages the wireless transmission in GSM. It devices include BSC and base
transceiver station.
ZXG10 iBSC is a 3rd-generation BSC of ZTE. The EMS of ZXG10 iBSC includes
NetNumen U31 and operation and maintenance module (OMM).
The NetNumen U31 is a unified NE management system. It implements networkwide

management and maintenance. The OMM implements local operation and maintenance
functions of the iBSC. It uses the SBCX board, which is installed in the iBSC subrack. The
iBSC is connected to the NetNumen U31 through the OMM.
1.2 Hardware Composition

The ZXG10 iBSC hardware is composed of the cabinet, subrack, shelf, board, and auxiliary
devices. In different scenarios, users can select the required hardware configuration.
1-1
SJ-20110531095035-003|2012-5-8 (R3.0) ZTE Proprietary and Confidential

ZXG10 iBSC Hardware Description
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1-2

Chapter 2
Cabinet
Table of Contents
Cabinet Appearance...................................................................................................2-1
Cabinet Structure .......................................................................................................2-2
Cabinet Configuration...............................................................................................2-12
Cabinet Cabling........................................................................................................2-13
Process Design ........................................................................................................2-14
2.1 Cabinet Appearance

For the ZXG10 iBSC cabinet appearance, see Figure 2-1.
Figure 2-1 Cabinet Appearance
The ZXG10 iBSC cabinet complies with the CompactPCI standard. Its front door is in dark
blue with dense air vents. The cabinet body is in dark blue.
2-1

2.2 Cabinet Structure

For the ZXG10 iBSC cabinet structure, see Figure 2-2.
Figure 2-2 Cabinet Structure
1. Cover 5. Service subrack 9. Side door

2. Filter 6. Fixing base 10. Rack
3. Wire reel 7. Rear door
4. Front door 8. Busbar
2.2.1 Cabinet Top

The cabinet top of the ZXG10 iBSC provides many function units, including power input
interface, signal cable in/out channel, top fan, and wire reel.
For the cabinet top appearance, see Figure 2-3.
2-2

Chapter 2 Cabinet
Figure 2-3 Cabinet Top Appearance
For the cabinet top structure, see Figure 2-4.
2-3

Figure 2-4 Cabinet Top Structure
1. Wire reel 4. Filter cover 7. Top shelf components

2. Top fan cover 5. Wire out module
3. Top fan 6. Top filter
Top Shelf Components

The top shelf components are the installation base of all function units on the cabinet top.
The grounding screw among top shelf components is the main grounding of the equipment.
It has a grounding ID on the side.
For the shelf component structure, see Figure 2-5.
2-4

Chapter 2 Cabinet
Figure 2-5 Top Shelf Component Structure
1. Installation plate of the wire 2. Installation plate of the top 4. Grounding screw
out module filter 5. Installation plate of the top
3. Grounding ID fan
Wire Out Module

The wire out module is a channel for leading wires in or out of the cabinet. It consists of the
wire out shelf and wire out bars (11 bars). For the wire out module structure, see Figure
2-6.
2-5

Figure 2-6 Wire Out Module Structure
1. Wire out shelf 2. Wire out bars
Top Fan
The top fan is an iminterfaceant component of the whole equipment for ventilation and
dissipation. It consists of a bottom installation plate, six fans, and a monitoring circuit
plate.
For the top fan structure, see Figure 2-7.
2-6

Chapter 2 Cabinet
Figure 2-7 Top Fan Structure
1. Monitoring circuit plate 2. Fan 3. Bottom installation plate
Top Filter
The top filter is a interface for power input of the whole equipment. The -48 V power cable
from the equipment room is connected to the input end of the top filter. After the power
is filtered, the power cable is connected to the internal power distribution subrack of the
cabinet.
For the top filter structure, see Figure 2-8.
2-7

Figure 2-8 Top Filter Structure
1. Power input 2. Power output
Wire Reel
The wire reel is used to wrap remaining fibers. It consists of the bottom plate, wire post,
and cover.
For the wire reel structure, see Figure 2-9.
2-8

Chapter 2 Cabinet
Figure 2-9 Wire Reel Structure
1. Cover 2. Wire post 3. Bottom plate
2.2.2 Front and Rear Doors

The front and rear doors of a cabinet have dense air vents for good dissipation.
The upper right corner of a cabinet is usually pasted with office information label and
ranking number label, identifying the cabinet delivery information and cabinet SN. For the
label location, see Figure 2-10.
Figure 2-10 Label Location
1. Office information label 2. Ranking number label
2-9

2.2.3 Rack
The rack is composed of the top shelf, bottom shelf, post, adjustable rail, and side door.
For its structure, see Figure 2-11.
Figure 2-11 Rack Structure
1. Top shelf 3. Adjustable rail 5. Bottom shelf

2. Post 4. Side door
2-10

Chapter 2 Cabinet
Note:
When multiple cabinets are installed side by side, only the side doors of the two cabinets
located outside need to be installed.
2.2.4 Busbar
The power distribution cable and grounding cable of the ZXG10 iBSC are connected in the
unified manner through the busbar. For the busbar structure, see Figure 2-12.
Figure 2-12 Busbar Structure
The busbar is located at the right side of the cabinet back and provides six groups of
connectors. The first group of connectors are connected to the power distribution subrack.
The 2 thru 5 groups of connectors are connected to their corresponding fan subracks and
shelves. The sixth group of connectors are connected to the third fan subrack.
2-11

1. The first and sixth groups provide six connectors each. From top to bottom, the signals
are defined as follows:
l -48 V
l -48 VGND
l PE
l PE
2. The 2 thru 5 groups provide six connectors each. From top to bottom, the signals are
defined as follows:
l -48 V
l -48 VGND
l -48 V
l -48 VGND
l PE
l PE
2.3 Cabinet Configuration

For ZXG10 iBSC cabinet configuration, see Figure 2-13.
2-12

Chapter 2 Cabinet
Figure 2-13 Cabinet Configuration
1. Power distribution subrack 3. 1 U fictitious front panel 5. Anti-dust subrack

2. Fan subrack 4. Shelf
2.4 Cabinet Cabling

For cabling of the ZXG10 iBSC cabinet, see Figure 2-14.
2-13

Figure 2-14 Cabinet Cabling (Left View)
1. Cabinet outlet 3. Rear horizontal cable tray 5. Front outlet fiber

2. Rear board cabling 4. Vertical cable tray
Note:
Among the signal cables of the ZXG10 iBSC, only fibers are led from the front board panel
and all the other cables are led from the rear board panel.
2.5 Process Design

The ZXG10 iBSC cabinet is well designed in terms of power, grounding, anti-dust,
dissipation, and electromagnetic compatibility (EMC).
2-14

Chapter 2 Cabinet
Power
1. The normal voltage for system operating is -48 V DC. It ranges from -40 V DC to -57
V DC.
2. The system power uses the fully distributed design. The board itself provides a power
module that implements one-off voltage conversion and isolation from -48 V to board
voltage such as +5 VDC, +3.3 VDC, +2.5 VDC, and +1.8 VDC.
3. The cabinet power input is a power distribution subrack that has two power inputs.
One of them is selected by using the switch to provide power for all shelves and fans.
The two power inputs are mutually backed up. The -48 V power is transmitted from
the power distribution subrack downwards through a busbar. The power of all shelves
and fan subracks is from one -48 V busbar.
Grounding
There are two grounding types.
1. -48 VGND: -48 V ground
2. GNDP: system protection ground
The active board GND and electrostatic GNDE of each shelf are converged to the
GNDP through a filter and connected to PE of the busbar. The PE binding post at the
upper right of the subrack is used to connect the GNDP to the grounding bar of the
equipment room.
Note:
Judgment method of left and right PE binding posts: From the back of the cabinet, the
PE binding post on the left is the left PE binding post and the one on the right is the
right PE binding post.
The -48 VGND is led from the power subrack and uses a busbar to connect the -48
VGND of all subsystems.
The -48 VGND is connected to the GNDP securely in the equipment room.
The subrack provides two grounding types: grounding upwards and grounding
downwards. The subrack pick-up impedance ranges from 0.1 Ω to 0.3 Ω. The
grounding impedance of the equipment room must be less than 1 Ω.
Anti-Dust
1. A anti-dust mesh is installed at the bottom air intake of the subrack. The anti-dust
mesh is made of a frame (ABS plastic) and nylon mesh. It is soft and convenient for
installation and uninstallation.
2. The anti-dust mesh on the door panel is made of a metal frame with secondary
polyurethane foaming plastic.
2-15

The two types of anti-dust meshes can be cleaned and reused. In addition, they can be
easily uninstalled or replaced.
Dissipation
For dissipation air duct of the ZXG10 iBSC, see Figure 2-15.
Figure 2-15 Dissipation Air Duct of the ZXG10 iBSC
2-16

Chapter 2 Cabinet
EMC
The EMC design lies in the shielding and grounding processes of shelves and subracks.
The shielding process is of the subrack level. The minimum shielding characteristic is 40
dB when the frequency ranges from 30 MHz to 1 GHz.
Subracks supinterface EMC shielding and adopt electroplating and surface treatment. This
ensures that the subracks have good conductivity.
The contact between subracks and plug-ins or between plug-ins are connected by using
conductive springs.
To ensure normal grounding, subracks have special anti-static grounding devices for
connecting subracks and shelves.
2-17

2-18

Chapter 3
Subrack
Table of Contents
Power Distribution Subrack ........................................................................................3-1
Fan Subrack...............................................................................................................3-7
Dust-proof Subrack ....................................................................................................3-9
3.1 Power Distribution Subrack

3.1.1 Power Distribution Subrack Functions
The power distribution subrack provides the following functions:
1. Supplies power for all shelves and fan subracks in the rack.
2. Supports automatic changeover of two external power inputs for mutual backup.
3. Provides a power distribution board (PWRD) and a power distribution board backplane
(PWRDB) for power indication, environment monitoring, and internal fan subrack
monitoring.
3.1.2 Power Distribution Subrack Structure

For the power distribution subrack structure, see Figure 3-1.
Figure 3-1 Power Distribution Subrack Structure
1. Connecting terminal 4. External shelf 7. PWRD board

2. Lightning arrester 5. Heat radiator 8. Switch
3. PWRDB board 6. Isolated diode
3-1

3.1.3 Power Distribution Subrack Panel

For the front panel of a power distribution subrack, see Figure 3-2.
Figure 3-2 Front Panel of Power Distribution Subrack
For the rear panel of a power distribution subrack, see Figure 3-3.
Figure 3-3 Rear Panel of Power Distribution Subrack
3.1.4 Indicators on the Power Distribution Subrack

For a description of the indicators on the power distribution subrack, refer to Table 3-1.
Table 3-1 Indicators on the Power Distribution Subrack
Indicator Color Meaning Description
Flashing at 1 Hz:
indicates that the power
distribution subrack
operates normally.
Not lit: indicates that
the power distribution
subrack operates
RUN Green Operating indicator abnormally.
Lit: indicates that a

-48 V undervoltage
or overvoltage alarm
occurs in channel 1.
-48 V alarm indicator for Not lit: indicates that
-48 V (I) Red channel 1 no alarm occurs.
3-2

Chapter 3 Subrack

-48 V undervoltage
or overvoltage alarm
occurs in channel 2.
-48 V alarm indicator for Not lit: indicates that
-48 V (II) Red channel 2 no alarm occurs.
Lit: indicates that

the fan operates
abnormally.
FAN Red Fan alarm indicator no alarm occurs.

temperature alarm
occurs.
Temperature alarm in- Not lit: indicates that
HOT Red dicator no alarm occurs.

smoke alarm occurs.
SMOKE Red Smoke alarm indicator no alarm occurs.

door access control
alarm occurs.
Door access control Not lit: indicates that
DOOR Red alarm indicator no alarm occurs.
Lit: indicates that the

lightning arrester is
damaged.
Lightning arrester Not lit: indicates that
ARRESTER Red alarm indicator no alarm occurs.
3.1.5 Switches on the Power Distribution Subrack

For switch descriptions of the power distribution subrack, refer to Table 3-2.
Table 3-2 Switches on the Power Distribution Subrack
Switch Name Description
Downwards: power off -48 V input.

-48 V (I) Upwards: power on -48 V input.
3-3

Switch Name Description
Downwards: power off -48 V input.

-48 V (II) Upwards: power on -48 V input.
3.1.6 External Interfaces on the Power Distribution Subrack

For a description of the external interfaces on the power distribution subrack, refer to Table
3-3.
Table 3-3 External Interfaces on the Power Distribution Subrack
Interface Name Description
Used for connecting to PD485 of the OMP rear

RS485 (top) board
Used for connecting to RS485 (top) of the power

RS485 (bottom) distribution subrack on the adjacent rack
SENSORS Used for connecting the sensor cable
DOOR Used for connecting the door access control cable
FANBO X1 Used for connecting to the top fan
Used for connecting to the fan subrack at the first

FANBO X2 layer
Used for connecting to the fan subrack at the sec-

FANBO X3 ond layer
Used for connecting to the fan subrack at the third

FANBO X4 layer
ARRESTER Used for connecting to the lightning arrester
INPUT (I) Used as power input
INPUT (II) Used as power input
OUTPUT Used as power output
3.1.7 PWRD Board

3.1.7.1 PWRD Board Functions
The PWRD board provides the following functions:
l Supplies -48 V power for all shelves and fans in the rack.
l Implements detection and alarming for rack power and environment, fan detection
and control.
3-4

Chapter 3 Subrack
l Supports being monitored and managed by the OMP board through the RS485 bus,
reports the detected information to the OMP board, and provides related indications
through the indicators on the panel of the power distribution subrack.
3.1.7.2 PWRD Principle

For the PWRD board principle, see Figure 3-4.
Figure 3-4 General PWRD Structure
The PWRD consists of several parts, including one power distribution module, one main
monitoring module, one transit board (PWRDB),and four fan group control modules.
1. The power distribution module processes the input two channels of -48 V power
including filter, lightning protection and isolation, and supplies power for all shelves
through the busbar. In addition, the power distribution module samples the power
before the two channels of power merge at the busbar and sends the power to the
PWRD for overvoltage or undervoltage monitoring.
2. The PWRD processes the two channels of -48 V voltage, including overvoltage
and undervoltage detection, rotation detection for 24 fans, temperature detection,
humidity detection, smoke sensing detection, infrared alarm detection, and door
access detection for cabinet and equipment room.
The power distribution subrack consists of the power distribution module and PWRD.
3. The fan subrack consists of the 2 x 3 fan group and fan group control module.
The fan subrack gets the -48 V power from the busbar and sends the fan monitoring
signal to the PWRD.
4. The PWRDB board provides a interface for the PWRD board to access environmental
monitoring signals.
3.1.7.3 PWRD Board Panel

For the PWRD board panel, see Figure 3-5.
3-5

Figure 3-5 PWRD Board Panel
3.1.7.4 DIP Switches on the PWRD Board

For DIP switch descriptions of the PWRD board, refer to Table 3-4.
Table 3-4 DIP Switches on the PWRD Board
Default Setting
DIP Switch
Name Usage 1 (High Bit) 2 3 4 (Low Bit)
Used for
setting the
working mode
S2 to normal or ON OFF ON ON
debug. The
default value
is debug.
Used for set-

ting the ad-
dress for com-
munication
with the 485
of the OMP
board. A 4-bit
switch is used
S3 ON ON ON ON
to set 16 (0-15)
different ad-
dresses, cor-
responding to
rack numbers.
ON indicates 0
and OFF indi-
cates 1.
3-6

Chapter 3 Subrack
3.1.7.5 Jumpers on PWRD Board

On the PWRD board, there is a 2x5 pin used as the short jumper X8 of 485 signals. When
multiple racks are installed in the ZXG10 iBSC, the working mode of the 485 bus on the
PWRD board needs to be configured in accordance with rack location.
1. When the PWRD board is located at the end of the 485 bus, resistance terminating is
required, that is, pins 1 thru 2 and 9 thru 10 are short circuited. For the default setting,
see Figure 3-6.
Figure 3-6 Jumpers on PWRD Board
2. When the PWRD board is located at the middle of the 485 bus, 485 signals need to
be transmitted to the corresponding output interface, that is, pins 3 thru 4 and 7 thru
8 are short circuited.
3.2 Fan Subrack

3.2.1 Fan Subrack Functions
The fan subrack is used for dissipation of the front board and rear board. In addition, it
helps monitor fan status and supports automatic rotation adjustment.
3.2.2 Fan Subrack Structure

For the fan subrack structure, see Figure 3-7.
Figure 3-7 Fan Subrack Structure
3-7

3.2.3 Fan Subrack Panel

For the front panel of a fan subrack, see Figure 3-8.
Figure 3-8 Front Panel of Fan Subrack
For the rear panel of a fan subrack, see Figure 3-9.
Figure 3-9 Rear Panel of Fan Subrack
1. Monitor socket 2. Power socket
3.2.4 Indicators on the Fan Subrack

For a description of the indicators on the fan subrack, refer to Table 3-5.
Table 3-5 Indicators on the Fan Subrack

fan module group
operates normally.
the fan module group
RUN Green Operating indicator operates abnormally.
Lit: indicates that an

alarm occurs in the fan
module group.
no alarm occurs in the
ALM Red Alarm indicator fan module group.
3.2.5 Buttons on the Fan Subrack

Each fan group in the fan subrack has one button on the front panel. You can press the
button and remove the fan group.
3-8

Chapter 3 Subrack
3.2.6 External Interfaces on the Fan Subrack

For a description of the external interfaces on the fan subrack, refer to Table 3-6.
Table 3-6 External Interfaces on the Fan Subrack
Interface Name Description
Used for connecting to FANBOX2 thru FANBOX4

Monitor of the power distribution subrack
POWER Power socket
3.3 Dust-proof Subrack

The Dust-proof subrack is located at the cabinet bottom. It prevents dust from entering the
cabinet.
3-9

3-10

Chapter 4
Shelf
Table of Contents
Shelf Overview ...........................................................................................................4-1
Shelf Configuration.....................................................................................................4-2
Inter-Shelf Interconnection .........................................................................................4-9
4.1 Shelf Overview

4.1.1 Shelf Classification
For classification descriptions of the ZXG10 iBSC shelf, refer to Table 4-1.
Table 4-1 Shelf Classification
Shelf Type Backplane Function
Implements global operation

and maintenance functions,
global clock functions,
Control shelf
control-plane data processing,
and control-plane Ethernet
BCTC changeover.
Implements system access

and provides various general
service processing subsystems.
Resource shelf
For inner-shelf user-plane data
changeover, a 100M resource
BUSN shelf is required.
Implements system access

and provides various general
service processing subsystems.
Gigabit resource shelf
For inner-shelf user-plane data
changeover, a GB resource
BGSN shelf is required.
Provides a large-size and

Packet switching shelf
BPSN non-blocking IP switch platform.
4-1

4.1.2 Shelf Location

For shelf location in the cabinet when GB resource shelves are used, see Figure 4-1.
Figure 4-1 Shelf Location (GB Resource Shelf)
For shelf location in the cabinet when resource shelves are used, see Figure 4-2.
Figure 4-2 Shelf Location (Resource Shelf)
4.2 Shelf Configuration

When resource shelves or GB resource shelves are installed in the ZXG10 iBSC, the shelf
configuration is different. The following sections detail the two configuration cases.
4.2.1 Shelf Configuration When Using Resource Shelf

4.2.1.1 Control Shelf Configuration
The ZXG10 iBSC requires one control shelf. The shelf is always installed in shelf 2 of
cabinet 1.
4-2

Chapter 4 Shelf
For board configuration of a control shelf, refer to Table 4-2.
Table 4-2 Board Configuration of Control Shelf
Front Board Rear Board Available Slot
OMP, OMP2 RMPB 11, 12
CMP, CMP2 - 1, 2, 3, 4, 5, 6, 7, 8
RUIM2
UIMC 9, 10
RUIM3
RCHB1
CHUB 15, 16
RCHB2
RCKG1
CLKG (CLKG), CLKG (ICM) 13, 14
RCKG2
SBCX, SBCX2 RSVB 1, 3, 5, 7
For typical board configuration of a control shelf, see Figure 4-3.
Figure 4-3 Typical Board Configuration of Control Shelf
4.2.1.2 Packet Switching Shelf Configuration

The ZXG10 iBSC requires one packet switching shelf. The shelf is always installed at the
fourth layer of the main cabinet.
For board configuration of a packet switching shelf, refer to Table 4-3.
Table 4-3 Board Configuration of Packet Switching Shelf
PSN - 7, 8
GLI, GLI4 - 1, 2, 3, 4
CMP, CMP2 - 11, 12, 13, 14
4-3

RUIM2
UIMC
RUIM3 15, 16
1. GLI or GLI4 boards must be installed in pair and from left to right.
For typical board configuration of a packet switching shelf, see Figure 4-4.
Figure 4-4 Typical Board Configuration of Packet Switching Shelf
4.2.1.3 Resource Shelf Configuration

The resource shelf can be installed in the first and third layers of No.1 cabinet and in any
layer of No.2 cabinet.
For board configuration of a resource shelf, refer to Table 4-4.
Table 4-4 Board Configuration of Resource Shelf
1, 2, 3, 4, 5, 6, 7, 8, 11, 12, 13,

DTB, DTEC RDTB
14, 17
1, 2, 3, 4, 5, 6, 7, 8, 11, 12, 13,

SDTB, ESDT RGIM1
14, 15, 16, 17
UIMU RUIM1 9, 10
1, 2, 3, 4, 5, 6, 7, 8, 11, 12, 13,

GUP -
14, 15, 16, 17
1, 2, 3, 4, 5, 6, 7, 8, 11, 12, 13,

BIPI, BIPI4 RMNIC
14, 15, 16
1, 2, 3, 4, 5, 6, 7, 8, 11, 12, 13,

SPB RSPB
14, 15, 16, 17
4-4

Chapter 4 Shelf
1, 2, 3, 4, 5, 6, 7, 8, 11, 12, 13,

UPPB -
14, 15, 16
CMP, CMP2 - 13, 14
1, 2, 3, 4, 5, 6, 7, 8, 11, 12, 13,

EIPI, EIPI4 -
14, 15, 16
1. At most three DTB or DTEC boards can be configured. You are not recommended to install DTB and
DTEC boards in slots 1 and 17. Each resource shelf can be configured with at most eight DTB or
DTEC boards.
2. When SDTB and ESDT boards do not work in active/standby state, you are recommended to install
them in slot 17. When they are installed in other slots, the adjacent slot of the active and standby
boards cannot be installed with HW boards, such as DTB and GUP.
3. When GUP boards function as BIPB or TIPB, you are recommended to install them in slots ranging
from 5 to 8 or from 11 to 14. If they are installed in slots ranging from 1 to 4 or 15 to 16, the adjacent
slot of the active and standby GUP boards can be installed with the boards that do not use internal
user-plane network interfaces, such as DTB and SDTB. When the GUP boards function as DRTB,
they can be installed in any slots except 9 and 10.
4. Only one SPB board can be installed in slot 15 or 16.
5. You are recommended to install UPPB boards in slots ranging from 5 to 8 or 11 to 14. If they are
installed in slots ranging from 1 to 4 or from 15 to 16, the adjacent slot of the active and standby
UPPB boards can be installed with the boards that do not use internal user-plane network interfaces,
such as DTB and SDTB.
6. You are recommended to install BIPI and BIPI4 boards in slots ranging from 5 to 8 or from 11 to 14.
7. You are recommended to install EIPI and EIPI4 boards in slots ranging from 5 to 8 or from 11 to
14. When they are installed in the slots for active and standby boards, the adjacent slot cannot be
installed with HW boards, such as DTB, SPB, and SDTB. If they are installed in slots ranging from 1
to 4 or from 15 to 16, the adjacent slot cannot be installed with any board.
8. In the case of only one shelf, the OMP and OMP boards must be installed in slots 11 and 12.
If the Abis interface uses the FE+E1 mode and A and Ater interfaces use the E1 mode,
the board configuration of a resource shelf is shown in Figure 4-5.
Figure 4-5 Board Configuration of Resource Shelf
4-5

4.2.2 Shelf Configuration When Using GB Resource Shelf

4.2.2.1 Control Shelf Configuration
The ZXG10 iBSC requires one control shelf. The shelf is always installed in shelf 2 of
cabinet 1.
For board configuration of a control shelf, refer to Table 4-5.
Table 4-5 Board Configuration of Control Shelf
CMP, CMP2 - 1, 2, 3, 4, 5, 6, 7, 8
RUIM2
UIMC 9, 10
RUIM3
RCHB1
CHUB 15, 16
RCHB2
RCKG1
CLKG (ICM) 13, 14
RCKG2
RCKG1
ICM 13, 14
RCKG2
SBCX, SBCX2 RSVB 1, 3, 5, 7
For typical board configuration of a control shelf, see Figure 4-6.
Figure 4-6 Typical Board Configuration of Control Shelf
4.2.2.2 Packet Switching Shelf Configuration

The ZXG10 iBSC requires one packet switching shelf. The shelf is always installed at the
fourth layer of the main cabinet.
4-6

Chapter 4 Shelf
For board configuration of a packet switching shelf, refer to Table 4-6.
Table 4-6 Board Configuration of Packet Switching Shelf
PSN - 7, 8
GLI, GLI4 - 1, 2, 3, 4, 5, 6
CMP, CMP2 - 11, 12, 13, 14
UIM rear board 2 (RUIM2)

UIMC
UIM rear board 3 (RUIM3) 15, 16
1. GLI or GLI4 boards must be installed in pair and from left to right.
For typical board configuration of a packet switching shelf, see Figure 4-7.
Figure 4-7 Typical Board Configuration of Packet Switching Shelf
4.2.2.3 GB Resource Shelf Configuration

The GB resource shelf can be installed in the first and third layers of No.1 cabinet and in
any layer of No.2 cabinet.
For board configuration of a GB resource shelf, refer to Table 4-7.
Table 4-7 Board Configuration of GB Resource Shelf
1, 2, 3, 4, 5, 6, 7, 8, 11, 12, 13,

DTB, DTEC RDTB
14, 17
1, 2, 3, 4, 5, 6, 7, 8, 11, 12, 13,

SDTB2, ESDT2 RGIM1
14, 15, 16
RGUM1
GUIM, GUIM2 9, 10
RGUM2
4-7

2, 3, 4, 5, 6, 7, 8, 11, 12, 13, 14,

GUP2 -
15, 16
1, 2, 3, 4, 5, 6, 7, 8, 11, 12, 13,

GIPI RGER, RMNIC
14, 15, 16, 17
GIPI4 RGER, RGER2 5, 6, 7, 8
1, 2, 3, 4, 5, 6, 7, 8, 11, 12, 13,

SPB2 RSPB
14, 15, 16, 17
1, 2, 3, 4, 5, 6, 7, 8, 11, 12, 13,

EIPI, EIPI4 -
14, 15, 16, 17
CMP, CMP2 - 11, 12, 13, 14
1. At most three DTB or DTEC boards can be configured. You are not recommended to install DTB and
DTEC boards in slots 1 and 17. Each resource shelf can be configured with at most eight DTB or
DTEC boards.
2. When SDTB2 and ESDT2 boards do not work in active/standby state but are installed in the slots
for active and standby boards, the adjacent slot of the active and standby boards cannot be installed
with HW boards, such as DTB, DTEC, GUP2, SPB2, EIPI, and GUP.
3. Only one EIPI, EIPI4, GIPI, or SPB2 board can be installed in slot 15 or 16.
4. The GIPI is used to provide the OMCB channel or is installed in a slot ranging from 5 to 8 or 13 to 14
when the MR server is to be connected.
5. In the case of one shelf or two shelves, the OMP boards must be installed in slots 11 and 12.
6. When the SDTB2, ESDT2, SPB2, GIPI, EIPI, EIPI4, or GUP2 board is installed in slot 15 or 16, the
TDM trunk board cannot extract the 8K clock reference and the serial interface of slot 16 cannot be
used.
If the Abis interface uses the E1 or IPoE mode and A and Gb interfaces use the E1 mode,
the board configuration of a GB resource shelf is shown in Figure 4-8.
Figure 4-8 Board Configuration of GB Resource Shelf
4-8

Chapter 4 Shelf
4.3 Inter-Shelf Interconnection

When resource shelves or GB resource shelves are installed in the ZXG10 iBSC, the
inter-shelf interconnection is different. The following sections detail the two interconnection
cases.
4.3.1 Inter-Shelf Connection for Resource Shelf

Single Cabinet
1. When only a single cabinet is configured, the cables to be connected inside the ZXG10
iBSC include:
a. Clock distribution cable and line clock extraction cable
b. Control-plane Ethernet cable
c. User-plane fiber
d. Monitoring cable
2. Connection example description
a. Clock extraction and distribution
For the schematic drawing of clock extraction and distribution when the iBSC is
configured with a single cabinet, see Figure 4-9.
Figure 4-9 Schematic Drawing of Clock Extraction and Distribution (Single

Cabinet, Resource Shelf)
4-9

Note:
In Figure 4-9, CLKG refers to CLKG (CLKG) or CLKG (ICM) and both CLKG
(CLKG) and CLKG (ICM) can provide clock signals. This is the same for other
parts of this section. DTB, STDB, and SPB can extract clock signals for CLKG.
The above figure takes DTB as an example.
Clock extraction and distribution are described as follows:

l Clock reference for clock extraction
The line clock is extracted from the CN through the interface board and sent
to the CLKG board.
The CLKG board also supports inputting BITS clock reference.
l Clock distribution
The RCKG1 and RCKG2 rear boards of the CLKG board are connected to
the UIMU/UIMC board of each shelf by using clock cables. The UIMU/UIMC
board distributes the clock to all slots of this shelf.
b. Control-plane Ethernet interconnection

For the control-plane Ethernet interconnection, see Figure 4-10.
Figure 4-10 Schematic Drawing of Control-Plane Ethernet Interconnection

(Single Cabinet, Resource Shelf)
In Figure 4-10, continuous lines represent cable connections and dotted lines
represent backplane edge connections.
4-10

Chapter 4 Shelf
The control-plane Ethernet interconnection in the iBSC is implemented through the

CHUB board. The control-plane Ethernet interconnection is described as follows:
l The UIMU board of the resource shelf is connected to the UIMC and CHUB
boards of the packet switching shelf by using electrical cables.
l The UIMC board of the control shelf is connected to the CHUB board by using
a backplane edge cable.
c. User-plane interconnection
For the user-plane interconnection, see Figure 4-11.
Figure 4-11 Schematic Drawing of User-Plane Interconnection (Single Cabinet,

Resource Shelf)
The user planes of one resource shelf are interconnected through the backplane
and the user planes among resource shelves are interconnected through the
GLI/GLI4 and PSN boards of the packet switching shelf. That is, the UIMU boards
of all resource shelves are connected to the GLI/GLI4 boards by using fibers.
d. Monitoring cable connection
For the monitoring cable interconnection, see Figure 4-12.
4-11

Figure 4-12 Schematic Drawing of Monitoring Cable Interconnection (Single

The fan subracks and power distribution subracks of all layers are connected by
using electrical cables for fan monitoring.
The OMP/OMP2 board is connected to the PWRD board in the power distribution
subrack for monitoring.
All sensors are connected to the power distribution subrack for external
environment monitoring.
Dual Cabinet
1. When two cabinets are configured, the cables to be connected inside the ZXG10 iBSC
include:
c. User-plane fiber
d. Monitoring cable

a. Clock distribution
4-12

Chapter 4 Shelf
configured with two cabinets, see Figure 4-13.
Figure 4-13 Schematic Drawing of Clock Extraction and Distribution (Dual

All shelves of the iBSC require system clock. The clock extraction and distribution
are described as follows:

to the CLKG board.
The CLKG board also supports inputting BITS clock reference.

The RCKG1 and RCKG2 rear boards of the CLKG board are connected to
the UIMU board of each shelf or the UIMC board of the packet switching shelf
by using clock cables. The UIMU or UIMC board distributes the clock to all
slots of this shelf.
For the schematic drawing of control-plane Ethernet interconnection when the
iBSC is configured with two cabinets, see Figure 4-14.
4-13


(Dual Cabinet, Resource Shelf)
The control-plane Ethernet interconnection is described as follows:
l The UIMC or UIMU boards of all shelves except the control shelf of No.1
cabinet are connected to the CHUB board by using electrical cables.
l The UIMC board in the control shelf of No.1 cabinet is connected to the CHUB
board by using a backplane edge cable.
Figure 4-15 Schematic Drawing of User-Plane Interconnection (Dual Cabinet,

Resource Shelf)
The user planes of one resource shelf are interconnected through the backplane
and the user planes among resource shelves are interconnected through the
GLI/GLI4 and PSN boards of the packet switching shelf. That is, the UIMU boards
of all resource shelves are connected to the GLI/GLI4 boards by using fibers.
4-14

Chapter 4 Shelf

Figure 4-16 Schematic Drawing of Monitoring Cable Interconnection (Dual

The fan subracks and power distribution subracks of all layers in cabinets are
connected by using electrical cables for fan subrack monitoring.
The OMP/OMP2 board of No.1 cabinet is connected to the PWRD board of this
cabinet. The PWRD board of No.2 cabinet is connected to the PWRD board of
No.1 cabinet. This helps monitor the PWRD boards of No.1 cabinet and No.2
cabinet.
All sensors are connected to the power distribution subrack of No.1 cabinet for
external environment monitoring.
4.3.2 Inter-Shelf Connection for GB Resource Shelf

Single Cabinet
1. When only a single cabinet is configured, the cables to be connected inside the ZXG10
iBSC include:

c. User-plane fiber
d. Monitoring cable
a. Clock extraction and distribution
4-15

configured with a single cabinet, see Figure 4-17.

Cabinet, GB Resource Shelf)
Note:
In Figure 4-17, CLKG (ICM) can be replaced with ICM and both CLKG (ICM) and
ICM can provide clock signals. This is the same for other parts of this section.
DTB, STDB, SDTB2, and SPB2 can extract clock signals for CLKG (ICM)/ICM.
The above figure takes DTB as an example.
Clock extraction and distribution are described as follows:

to the CLKG (ICM)/ICM board.
The CLKG (ICM)/ICM board also supports inputting BITS clock reference or
extracting clock reference from the GPS module.
The RCKG1 and RCKG2 rear boards of the CLKG (ICM)/ICM board are
connected to the GUIM/GUIM2/UIMC board of each shelf by using clock
cables. The GUIM/GUIM2/UIMC board distributes the clock to all slots of
this shelf.
4-16

Chapter 4 Shelf

For the control-plane Ethernet interconnection, see Figure 4-18.

(Single Cabinet, GB Resource Shelf)
The control-plane Ethernet interconnection in the iBSC is implemented through the
CHUB board. The control-plane Ethernet interconnection is described as follows:
l The GUIM/GUIM2 board of the GB resource shelf is connected to the UIMC
and CHUB boards of the packet switching shelf by using cables.
l The UIMC board of the control shelf is connected to the CHUB board by using
a backplane edge cable.
4-17


GB Resource Shelf)
The user planes of one GB resource shelf are interconnected through the
backplane and the user planes among GB resource shelves are interconnected
through the GLI/GLI4 and PSN boards of the packet switching shelf. That is, the
GUIM/GUIM2 boards of all GB resource shelves are connected to the GLI/GLI4
boards by using fibers.
4-18

Chapter 4 Shelf

The fan subracks and power distribution subracks of all layers are connected by
using electrical cables for fan monitoring.
The OMP/OMP2 board is connected to the PWRD board in the power distribution
subrack for monitoring.
All sensors are connected to the power distribution subrack for external
environment monitoring.
Dual Cabinet
1. When two cabinets are configured, the cables to be connected inside the ZXG10 iBSC
include:
c. User-plane fiber
d. Monitoring cable

a. Clock distribution
4-19

configured with two cabinets, see Figure 4-21.
Figure 4-21 Schematic Drawing of Clock Extraction and Distribution (Dual

All shelves of the iBSC require system clock. The clock extraction and distribution
are described as follows:

to the CLKG (ICM)/ICM board.
The CLKG (ICM)/ICM board also supports inputting BITS clock reference or
extracting clock reference from the GPS module of the ICM board.
The RCKG1 and RCKG2 rear boards of the CLKG (ICM)/ICM board are
connected to the GUIM/GUIM2 board of each GB shelf or the UIMC board of
the packet switching shelf by using clock cables. The GUIM/GUIM2 or UIMC
board distributes the clock to all slots of this shelf.
For the schematic drawing of control-plane Ethernet interconnection when the
iBSC is configured with two cabinets, see Figure 4-22.
4-20

Chapter 4 Shelf

(Dual Cabinet, GB Resource Shelf)
The control-plane Ethernet interconnection is described as follows:
l The UIMC or GUIM/GUIM2 boards of all shelves except the control shelf of
No.1 cabinet are connected to the CHUB board by using electrical cables.
l The UIMC board in the control shelf of No.1 cabinet is connected to the CHUB
board by using a backplane edge cable.

GB Resource Shelf)
The user planes of one GB resource shelf are interconnected through the
backplane and the user planes among GB resource shelves are interconnected
through the GLI/GLI4 and PSN boards of the packet switching shelf. That is, the
4-21

GUIM/GUIM2 boards of all GB resource shelves are connected to the GLI/GLI4

boards by using fibers.

The fan subracks and power distribution subracks of all layers in cabinets are
connected by using electrical cables for fan subrack monitoring.
The OMP/OMP2 board of No.1 cabinet is connected to the PWRD board of this
cabinet. The PWRD board of No.2 cabinet is connected to the PWRD board of
No.1 cabinet. This helps monitor the PWRD boards of No.1 cabinet and No.2
cabinet.
All sensors are connected to the power distribution subrack of No.1 cabinet for
external environment monitoring.
4-22

Chapter 5
Board
Table of Contents
Board Classification....................................................................................................5-1
Board Installation Relationship ...................................................................................5-1
Front Board ................................................................................................................5-2
Rear Board.............................................................................................................5-146
Backplane ..............................................................................................................5-176
5.1 Board Classification

The ZXG10 iBSC board is classified into three types:
l Front board
l Rear board
l Backplane
5.2 Board Installation Relationship

For the installation relationship among the front board, rear board, and backplane, see
Figure 5-1.
Figure 5-1 Board Installation Relationship
1. Front board panel 3. Backplane 5. Rear board

2. Front board 4. Slot 6. Rear board panel
5-1

5.3 Front Board

5.3.1 BIPI Board
5.3.1.1 BIPI Board Functions
The BIPI board provides IP interfaces for the ZXG10 iBSC.
The BIPI board is classified into three function boards:
l IP interface board IPBB (Abis interface)
l IP interface board IPAB (A interface)
l IP interface board IPGB (Gb interface)
5.3.1.2 BIPI Board Principle

For the BIPI board principle, see Figure 5-2.
Figure 5-2 BIPI Board Principle
The function modules of the BIPI board are described as follows:

l Service processing unit
Processes the protocol data and separates the user plane and the control plane.
l Logic unit
Supports all logic processing functions.
l Interface unit
Provides FE interfaces.
5.3.1.3 BIPI Board Panel

For the BIPI board panel, see Figure 5-3.
5-2

Chapter 5 Board
Figure 5-3 BIPI Board Panel
5.3.1.4 External Interfaces on the BIPI Board

The BIPI board has no external interface.
5.3.1.5 Buttons on the BIPI Board

For a description of the buttons on the BIPI board, refer to Table 5-1.
Table 5-1 Buttons on the BIPI Board
Button Description
EXCH Active/standby changeover switch
RST Reset switch
5-3

5.3.1.6 Indicators on the BIPI Board

For a description of the indicators on the BIPI board, refer to Table 5-2.
Table 5-2 Indicators on the BIPI Board
Refer to Appendix A
RUN Green Operating indicator "Combined Indicator
Status Descriptions".
Refer to Appendix A
ALM Red Alarm indicator "Combined Indicator

micro switch is turned
on. The board is not
fully seated and no
version is downloaded.
Flashing at 5 Hz:
indicates that a
micro switch alarm
is reported. The micro
switch is turned on
during board operation
and an alarm is
Board removal
ENUM Yellow reported.
indicator
Flashing at 1 Hz:
indicates that the board
can be removed. If
the micro switch is
turned on during board
operation and the board
operates in standby or
idle state, the board
can be removed.
the micro switch is in
normal state.

board operates in
Active/standby status active state.
ACT Green
indicator Not lit: indicates that
the board operates in
standby state.
5-4

Chapter 5 Board
Lit: indicates that

the FE interface is
connected.
LINK1-4 Green Interface indicator
the FE interface is not
connected.
5.3.2 BIPI4 Board

5.3.2.1 BIPI4 Board Functions
The BIPI4 board provides IP interfaces for the ZXG10 iBSC.
5.3.2.2 BIPI4 Board Principle

The BIPI4 board principle is the same as the BIPI board principle. For details, see "BIPI
Board Principle".
5.3.2.3 BIPI4 Board Panel

For the BIPI4 board panel, see Figure 5-4.
5-5

Figure 5-4 BIPI4 Board Panel
5.3.2.4 External Interfaces on the BIPI4 Board

The BIPI4 board has no external interface.
5.3.2.5 Buttons on the BIPI4 Board

For a description of the buttons on the BIPI4 board, refer to Table 5-3.
Table 5-3 Buttons on the BIPI4 Board
Button Description
RST Reset switch
5-6

Chapter 5 Board
5.3.2.6 Indicators on the BIPI4 Board

For a description of the indicators on the BIPI4 board, refer to Table 5-4.
Table 5-4 Indicators on the BIPI4 Board
Refer to Appendix A
Refer to Appendix A

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
and an alarm is
Board removal
indicator
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.

board operates in
ACT Green
standby state.
5-7

Lit: indicates that

the FE interface is
connected.
LINK1-4 Green Interface indicator
the FE interface is not
connected.
Lit: indicates that there

is data received by the
Data receive/transmit optical interface.
ACT1-4 Green indicator for the optical Not lit: indicates
interface that there is no data
received by the optical
interface.
5.3.3 CHUB Board

5.3.3.1 CHUB Board Functions
The CHUB board works together with the UIMC, UIMU, and GUIM boards to exchange
and converge the control-plane data in the system.
5.3.3.2 CHUB Board Principle

For the CHUB board principle, see Figure 5-5.
Figure 5-5 CHUB Board Principle
The function modules of the CHUB board are described as follows:
l CPU unit
5-8

Chapter 5 Board
Connects to the logic unit and Ethernet switch unit through the control bus and
configures the switch chip.
l Logic unit
l Ethernet switch unit
Implements Ethernet changeover and control-plane convergence.
5.3.3.3 CHUB Board Panel

For the CHUB board panel, see Figure 5-6.
Figure 5-6 CHUB Board Panel
5-9

5.3.3.4 External Interfaces on the CHUB Board

The CHUB board has no external interface.
5.3.3.5 Buttons on the CHUB Board

For a description of the buttons on the CHUB board, refer to Table 5-5.
Table 5-5 Buttons on the CHUB Board
Button Description
RST Reset switch
5.3.3.6 Indicators on the CHUB Board

For a description of the indicators on the CHUB board, refer to Table 5-6.
Table 5-6 Indicators on the CHUB Board
Refer to Appendix A
Refer to Appendix A

board operates in
ACT Green
standby state.

fully seated and no
Flashing at 5 Hz:
Board removal
ENUM Yellow indicates that a
indicator
micro switch alarm
switch is turned on
and an alarm is
reported.
5-10

Chapter 5 Board
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.
Lit: indicates that

the control-plane
Status indicators cascading interfaces
for control-plane are connected.
L1-L46 Green
cascading interfaces 1 Not lit: indicates
to 46 that the control-plane
cascading interfaces
are not connected.
5.3.4 CLKG(CLKG) Board

5.3.4.1 CLKG (CLKG) Board Functions
The CLKG (CLKG) board provides the following functions:
l Supplies clock for the system and supports external synchronization. The CLKG
(CLKG) board supports synchronizing the clock reference extracted from the A
interface and provides multiple channels of timing reference signals to the interface
unit.
l Configures the clock reference, including BITS clock, 8K line clock, GPS clock, and
L2 or L3 local clock.
l Outputs L3 clock.
l Detects clock loss and input reference degradation.
l Supports active/standby changeover.
5.3.4.2 CLKG (CLKG) Board Principle

For the CLKG (CLKG) board principle, see Figure 5-7.
5-11

Figure 5-7 CLKG (CLKG) Board Principle
The function modules of the CLKG (CLKG) board are described as follows:
1. Main control unit
Manages the board, communicates with the system control unit, implements the
core clock control algorithm, controls clock signal output in accordance with the data
provided by the phase discrimination and phase lock unit, and selects the clock
reference.
2. Reference selection unit
Selects a proper reference clock from multiple input reference clocks under the control
of the main control unit.
3. Voltage controlled oscillator unit
Provides a high-precision clock source for the board by using an oven controlled crystal
oscillator that meets the level-3 clock standard.
4. Phase detection and phase lock unit
Adjusts the phase comparison between the clock signal and input reference, and
provides quantitative data to the main control unit so as to control the voltage controlled
oscillator unit. The phase-lock system uses the loose coupling phase-lock principle.
5. Active/standby changeover unit

Implements the active/standby board changeover. The impact of the active/standby
switch on the clock is acceptable. The active and standby CLKG (CLKG) boards are
locked to one reference for smooth changeover.
5.3.4.3 CLKG (CLKG) Board Panel

For the CLKG (CLKG) board panel, see Figure 5-8.
5-12

Chapter 5 Board
Figure 5-8 CLKG (CLKG) Board Panel
5.3.4.4 External Interfaces on the CLKG (CLKG) Board

The CLKG (CLKG) board has no external interface.
5.3.4.5 Buttons on the CLKG (CLKG) Board

For a description of the buttons on the CLKG (CLKG) board, refer to Table 5-7.
Table 5-7 Buttons on the CLKG (CLKG) Board
Button Description
RST Reset switch
5-13

Button Description
Manual clock reference selection

Before selecting the clock reference, press the
manual reference selection button.
MANSL
When the MANI indicator is lit, press the button to
select the clock reference. The 8 K1, 8 K2, 8 K3,
and NULL indicators on the panel will be lit.
Manual selection enable

After you press the button, the MANI indicator
MANEN
is lit and the system enters the manual clock
reference selection mode.
5.3.4.6 Indicators on the CLKG (CLKG) Board

For a description of the indicators on the CLKG (CLKG) board, refer to Table 5-8.
Table 5-8 Indicators on the CLKG (CLKG) Board
Refer to Appendix A
Refer to Appendix A

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
Board removal is reported. The micro
ENUM Yellow
indicator switch is turned on
and an alarm is
reported.
Flashing at 1 Hz:
can be removed. If
the micro switch is
5-14

Chapter 5 Board

can be removed.
normal state.

board operates in
ACT Green
standby state.

CATCH Green Capture indicator board operates in fast
capturing mode.

TRACE Green Trace indicator board operates in
tracing mode.

KEEP Green Keep indicator board operates in keep
mode.

Free operating
FREE Green board operates in free
indicator
operating mode.
Lit: indicates the

2M clock reference
transmitted in HDB3
2 Mbps1 Green Reference indicator mode and provided
by the BITS device
with the highest routing
priority.
Lit: indicates the

2M clock reference
transmitted in HDB3
2 Mbps2 Green Reference indicator mode and provided
by the BITS device
with the second routing
priority.
5-15

Lit: indicates the

2M clock reference
transmitted in TTL
2 MHz1 Green Reference indicator mode and provided
by the BITS device
priority.
Lit: indicates the

2M clock reference
transmitted in TTL
2 MHz2 Green Reference indicator mode and provided
by the BITS device
priority.
Lit: indicates the 8K

clock provided by the
8 K1 Green Reference indicator
boards such as DTB
and APBE.
Lit: indicates the

8K clock reference
8 K2 Green Reference indicator
provided by the GPS
board.

8 K3 Green Reference indicator clock sent from the
UIMU or UIMC.
Lit: indicates that

there is no external
NULL Green Reference indicator reference available and
the system operates in
free oscillation mode.

Reference degradation
QUTD Red active reference is
indicator
degraded.
Lit: indicates that

manual reference
Manual reference selection is allowed.
MANI Green
selection indicator Not lit: indicates that
manual reference
selection is forbidden.
5-16

Chapter 5 Board
5.3.4.7 DIP Switches on CLKG (CLKG) Board

For DIP switches descriptions of the CLKG (CLKG) board, refer to Table 5-9.
Table 5-9 DIP Switches on the CLKG (CLKG) Board
Jumper Name Usage Description Default Setting
If pins 1 and 2 are

short circuited, it
X40 indicates the matching
Channel 1 of the BITS
X41 impedance is 75 Ω. Pins 1 and 2 short
clock, 2 Mbit/s or 2 MHz
X44 If pins 2 and 3 are circuited
matching impedance
X45 short circuited, it
indicates the matching
impedance is 125 Ω.
If pins 1 and 2 are

short circuited, it
X42 indicates the matching
Channel 2 of the BITS
X43 impedance is 75 Ω. Pins 1 and 2 short
clock, 2 Mbit/s or 2 MHz
X46 If pins 2 and 3 are circuited
matching impedance
X47 short circuited, it
indicates the matching
impedance is 125 Ω.
Debugging
X48 It is open when
- Open
X50 the board operates
normally.
Protection ground
jumper used for When pins 1 and 2
connecting to the are short circuited,
X53 Pins 1 and 2 short
coaxial cable shell the coaxial cable shell
X56 circuited
in the case of two is connected to the
channels of 2 Mbit/s or protection ground.
2 MHz clock inputs
When the serial

interface of the PC
is used to download
data during debugging,
pins 3-5 and 4-6 are
485 connection relation Pins 1-3 and 2-4 short
X60 short circuited.
jumper circuited
When the 485
communicates with
the server in daily
times, pins 1-3 and 2-4
are short circuited.
5-17

5.3.5 CLKG(ICM) Board

5.3.5.1 CLKG (ICM) Board Functions
The CLKG (ICM) board provides the following functions:
l Supplies clock for the system and supports external synchronization. The CLKG (ICM)
board supports synchronizing the clock reference extracted from the A interface and
provides multiple channels of timing reference signals to the interface unit.
l Outputs L3 clock.
5.3.5.2 CLKG (ICM) Board Principle

For the CLKG (ICM) board principle, see Figure 5-9.
Figure 5-9 CLKG (ICM) Board Principle
The function modules of the CLKG (ICM) board are described as follows:
l Main control unit

reference.
l Reference selection unit
l Voltage-controlled oscillator unit
Provides a high-precision clock source for the board by using an oven controlled
crystal oscillator that meets the level-3 clock standard.
5-18

Chapter 5 Board
l Phase detection and phase lock unit

Adjusts the phase comparison between the clock signal and input reference, and
provides quantitative data to the main control unit so as to control the voltage
controlled oscillator unit. The phase-lock system uses the loose coupling phase-lock
principle.
l Active/standby changeover unit
switch on the clock is acceptable. The active and standby CLKG (ICM) boards are
locked to one reference for smooth changeover.
5.3.5.3 CLKG (ICM) Board Panel

For the CLKG (ICM) board panel, see Figure 5-10.
Figure 5-10 CLKG (ICM) Board Panel
5-19

5.3.5.4 External Interfaces on the CLKG (ICM) Board

The CLKG (ICM) board has no external interface.
5.3.5.5 Buttons on the CLKG (ICM) Board

For a description of the buttons on the CLKG (ICM) board, refer to Table 5-10.
Table 5-10 Buttons on the CLKG (ICM) Board
Button Description
RST Reset switch

MANSL

MANEN
5.3.5.6 Indicators on the CLKG (ICM) Board

For a description of the indicators on the CLKG (ICM) board, refer to Table 5-11.
Table 5-11 Indicators on the CLKG (ICM) Board
Refer to Appendix A
Refer to Appendix A
5-20

Chapter 5 Board

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
and an alarm is
Board removal
indicator
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.

board operates in
ACT Green
standby state.
Lit: indicates the

2M clock reference
transmitted in HDB3
Bps1 Green Reference indicator mode and provided
by the BITS device
priority.
5-21

Lit: indicates the

2M clock reference
transmitted in HDB3
by the BITS device
priority.
Lit: indicates the

2M clock reference
transmitted in TTL
Hz1 Green Reference indicator mode and provided
by the BITS device
priority.
Lit: indicates the

2M clock reference
transmitted in TTL
by the BITS device
priority.

8 K1 Green Reference indicator clock extracted from
the line.

8 K2 Green Reference indicator clock provided by the
external GPS.

UIMU, GUIM, or UIMC.

GPS of this board.
Lit: indicates that

5-22

Chapter 5 Board

indicator
degraded.

capturing mode.

tracing mode.

mode.

Free operating
indicator
operating mode.
Lit: indicates that

manual reference
MANI Green
manual reference
5.3.5.7 DIP Switches on the CLKG (ICM) Board

The DIP switches on the CLKG (ICM) board are used to set the matching impedance of
input BITS clock. The default value is 75 Ω. For DIP switch descriptions of the CLKG
(ICM) board, refer to Table 5-12.
Table 5-12 DIP Switches on the CLKG (ICM) Board
Settings
Matching DIP Switch

Impedance Name 1 2 3 4
S1 ON ON ON ON
75 Ω
S5 ON ON ON ON
S1 ON ON ON ON
100 Ω
S5 OFF OFF OFF OFF
S1 OFF OFF OFF OFF

120 Ω
S5 OFF OFF OFF OFF
5-23

5.3.6 CMP Board

5.3.6.1 CMP Board Functions
The CMP board controls and manages the service calls of the PS or CS domain, and
manages the resources of various layers such as BSSAP and BSSGP and the system
resources.
5.3.6.2 CMP Board Principle

For the CMP board principle, see Figure 5-11.
Figure 5-11 CMP Board Principle
The function modules of the CMP board are described as follows:

1. CPU unit
The board has two independent CPUs, namely CPU A and CPU B. Each CPU provides
a control-plane FE electrical interface and an FE electrical interface for communication
between active and standby boards. In addition, CPU A supports board main control.
2. Logic unit
3. Power management unit
Implements board power management and distribution.
5-24

Chapter 5 Board
5.3.6.3 CMP Board Panel

For the CMP board panel, see Figure 5-12.
Figure 5-12 CMP Board Panel
5.3.6.4 External Interfaces on the CMP Board

The CMP board has no external interface.
5.3.6.5 Buttons on the CMP Board

For a description of the buttons on the CMP board, refer to Table 5-13.
5-25

Table 5-13 Buttons on the CMP Board
Button Description
Active/standby changeover switch for CPU B,

EXCH1 used as a backup unit for the CPU B of adjacent
board
RST Whole board reset switch
Active/standby changeover switch for CPU A,

EXCH2 used as a backup unit for the CPU A of adjacent
board
5.3.6.6 Indicators on the CMP Board

For a description of the indicators on the CMP board, refer to Table 5-14.
Table 5-14 Indicators on the CMP Board
Indicator Color Name Description
Refer to Appendix A
Alarm indicator of CPU
ALM1 Red "Combined Indicator
unit A
Refer to Appendix A
Operating indicator of
RUN1 Green "Combined Indicator
CPU unit A

board operates in
Active/standby active state.
ACT1 Green
indicator of CPU unit A Not lit: indicates that
standby state.

fully seated and no
Flashing at 5 Hz:
Board removal
ENUM1 Yellow indicates that a
indicator of CPU unit A
micro switch alarm
switch is turned on
and an alarm is
reported.
5-26

Chapter 5 Board
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.
Refer to Appendix A
unit B
Refer to Appendix A
CPU unit B

board operates in
ACT2 Green
indicator of CPU unit B Not lit: indicates that
standby state.

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
Board removal is reported. The micro
ENUM2 Yellow
indicator of CPU unit B switch is turned on
and an alarm is
reported.
Flashing at 1 Hz:
can be removed. If
the micro switch is
5-27


can be removed.
normal state.
5.3.7 CMP2 Board

5.3.7.1 CMP2 Board Functions
The CMP2 board controls and manages the service calls of the PS or CS domain, and
manages the resources of various layers such as BSSAP and BSSGP and the system
resources.
5.3.7.2 CMP2 Board Principle

The CMP2 board principle is the same as the CMP board principle. For details, see "CMP
Board Principle".
5.3.7.3 CMP2 Board Panel

For the CMP2 board panel, see Figure 5-13.
5-28

Chapter 5 Board
Figure 5-13 CMP2 Board Panel
5.3.7.4 External Interfaces on the CMP2 Board

The CMP2 board has no external interface.
5.3.7.5 Buttons on the CMP2 Board

For a description of the buttons on the CMP2 board, refer to Table 5-15.
Table 5-15 Buttons on the CMP2 Board
Button Description

board
5-29

Button Description

board
5.3.7.6 Indicators on the CMP2 Board

For a description of the indicators on the CMP2 board, refer to Table 5-16.
Table 5-16 Indicators on the CMP2 Board
Refer to Appendix A
unit A
Refer to Appendix A
CPU unit A

board operates in
ACT1 Green
standby state.

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
Board removal
ENUM1 Yellow switch is turned on
and an alarm is
reported.
Flashing at 1 Hz:
can be removed. If
the micro switch is
5-30

Chapter 5 Board
can be removed.
normal state.
Refer to Appendix A
unit B
Refer to Appendix A
CPU unit B

board operates in
ACT2 Green
standby state.

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
Board removal during board operation
ENUM2 Yellow
indicator of CPU unit B and an alarm is
reported.
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
5-31


normal state.
5.3.8 DTB Board

5.3.8.1 DTB Board Functions
The DTB board provides the following functions:
l Provides 32 E1/T1 links.
l Extracts 8K synchronization clock from lines.
5.3.8.2 DTB Board Principle

For the DTB board principle, see Figure 5-14.
Figure 5-14 DTB Board Principle
The function modules of the DTB board are described as follows:

Implements board management and internal connection control.
2. Interface unit
Connects to the circuit switch unit, provides E1/T1 and HW interfaces, and extracts
line clock.
3. Circuit switching unit
Switches the circuit and HW of the interface unit.
4. Logic processing unit
5-32

Chapter 5 Board
Implements inner-board logic conversion and adaption.

5. Clock processing unit
Receives the clock from the backplane. After the clock is processed such as frequency
division and timeslot adjustment, it is provided for the board.
5.3.8.3 DTB Board Panel

For the DTB board panel, see Figure 5-15.
Figure 5-15 DTB Board Panel
5.3.8.4 External Interfaces on the DTB Board

The DTB board has no external interface.
5-33

5.3.8.5 Buttons on the DTB Board

For a description of the buttons on the DTB board, refer to Table 5-17.
Table 5-17 Buttons on the DTB Board
Button Description
RST Reset switch
5.3.8.6 Indicators on the DTB Board

For a description of the indicators on the DTB board, refer to Table 5-18.
Table 5-18 Indicators on the DTB Board
Refer to Appendix A
Refer to Appendix A

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
ENUM Yellow
indicator and an alarm is
reported.
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
5-34

Chapter 5 Board

normal state.

board operates in
ACT Green
standby state.

the E1/T1 link is not
configured.
E1/T1 link is configured
32-channel E1 link
L1-L32 Green but the link is not
indicator
reachable.
Flashing at 1 Hz:
indicates that the E1/T1
link is configured and
the link is reachable.
5.3.8.7 Jumpers on DTB Board

The DTB board has two versions: 040501 and 060201.
l The DTB V040501 has only one jumper X23, used for board debugging. When the
board operates normally, X23 must be disconnected.
l The DTB V060201 has two jumpers X18 and X19, used for board debugging. When
either X18 or X19 is short circuited, the debugging mode is used. When the board
operates normally, X18 and X19 must be disconnected.
5.3.8.8 DIP Switches on the DTB Board

For DIP switch descriptions of the DTB board, refer to Table 5-19.
5-35

Table 5-19 DIP Switches on the DTB Board
Settings
DIP Switch
Name Usage Mode 1 2 3 4
Used for 75 Ω ON ON ON ON
setting the
matching
S1-S6 receive
S9 impedance
120 Ω OFF OFF OFF OFF
S12 of each E1
channel to
75 Ω or 120
Ω.
showing the
matching
S7 receive
S8 impedance 120 Ω OFF OFF OFF OFF
of each E1
chip for the
CPU.
Used for Short haul ON ON ON ON

showing
the working
long-haul
S10
and short-
S11 Long haul OFF OFF OFF OFF
haul status
of each E1
chip for the
CPU.
1. The default settings of S1 thru S12 are ON.

2. The DIP switches of S7 and S8 correspond to two E1 chips. S7 corresponds to parts 1 thru 4 of the
E1 chip (E1 channels 1 thru 16). S8 corresponds to parts 5 thru 8 of the chip (E1 channels 17 to 32).
The CPU reads the status during power-on and initializes the E1 chip in accordance with the status.
3. The DIP switches of S7 and S8 correspond to four E1 chips each. S10 corresponds to parts 1 thru
4 of the E1 chip (E1 channels 1 thru 16). S11 corresponds to parts 5 thru 8 of the chip (E1 channels
17 to 32). The CPU reads the status during power-on and initializes the E1 chip in accordance with
the status.
5.3.9 DTEC Board

5.3.9.1 DTEC Board Functions
The DTEC board provides the following functions:
l Provides 32 E1/T1 links.
5-36

Chapter 5 Board
l Extracts 8K synchronization clock from lines.

l Supports echo suppression for up to 1024 channels.
l Supports 128 ms failing for each channel.
l Supports electrical echo suppression.
l Supports the automatic noise reduction (ANR), automatic gain control (AGC), and
acoustic echo control (AEC).
l Supports transparent data transmission for subscribers that use the same encoding
format.
l Supports 2100 Hz tone detection and automatic shielding.
l Supports A/μ rate conversion.
5.3.9.2 DTEC Board Principle

For the DTEC board principle, see Figure 5-16.
Figure 5-16 DTEC Board Principle
The function modules of the DTEC board are described as follows:


2. Interface unit
Connects to the circuit switch unit, provides E1/T1 and HW interfaces, and extracts
line clock.

5-37

Receives the clock from the backplane. After the clock is processed such as frequency
division and timeslot adjustment, it is provided for the board.
6. EC subcard
Implements echo suppression.
5.3.9.3 DTEC Board Panel

For the DTEC board panel, see Figure 5-17.
Figure 5-17 DTEC Board Panel
5.3.9.4 External Interfaces on the DTEC Board

The DTEC board has no external interface.
5-38

Chapter 5 Board
5.3.9.5 Buttons on the DTEC Board

For a description of the buttons on the DTEC board, refer to Table 5-20.
Table 5-20 Buttons on the DTEC Board
Button Description
RST Reset switch
5.3.9.6 Indicators on the DTEC Board

For a description of the indicators on the DTEC board, refer to Table 5-21.
Table 5-21 Indicators on the DTEC Board
Refer to Appendix A
Refer to Appendix A

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
ENUM Yellow
indicator and an alarm is
reported.
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
5-39


normal state.

board operates in
ACT Green
standby state.

the E1/T1 link is not
configured.
32-channel E1 link
L1-L32 Green but the link is not
indicator
reachable.
Flashing at 1 Hz:
indicates that the E1/T1
link is configured and
the link is reachable.
5.3.9.7 DIP Switches on the DTEC Board

For DIP switch descriptions of the DTEC board, refer to Table 5-22.
Table 5-22 DIP Switches on the DTEC Board
DIP Settings
Switch
Used for setting the 75 Ω ON ON ON ON

S1-S6 matching receive
S9 impedance of each
S12 E1 channel to 75 Ω
or 120 Ω.
Used for showing 75 Ω ON ON ON ON

the matching
S7
receive impedance
S8 120 Ω OFF OFF OFF OFF
of each E1 chip for
the CPU.
5-40

Chapter 5 Board
DIP Settings
Switch
Used for showing Short haul ON ON ON ON

the working
S10 long-haul and
S11 short-haul status Long haul OFF OFF OFF OFF
of each E1 chip for
the CPU.
1. The default settings of S1 thru S12 are ON.

2. The DIP switches of S7 and S8 correspond to two E1 chips. S7 corresponds to parts 1 thru 4 of the
E1 chip (E1 channels 1 thru 16). S8 corresponds to parts 5 thru 8 of the chip (E1 channels 17 to 32).
The CPU reads the status during power-on and initializes the E1 chip in accordance with the status.
3. The DIP switches of S7 and S8 correspond to four E1 chips each. S10 corresponds to parts 1 thru
4 of the E1 chip (E1 channels 1 thru 16). S11 corresponds to parts 5 thru 8 of the chip (E1 channels
17 to 32). The CPU reads the status during power-on and initializes the E1 chip in accordance with
the status.
5.3.10 EIPI Board

5.3.10.1 EIPI Board Functions
The EIPI board works together with the DTB board to provide IP access over E1 or T1.
One EIPI board and two DTB boards provide up to 64 E1/T1 interfaces.
5.3.10.2 EIPI Board Principle

For the EIPI board principle, see Figure 5-18.
Figure 5-18 EIPI Board Principle
The function modules of the EIPI board are described as follows:
5-41


Processes the protocol data and implements isolation between the user plane and
control plane.
l Logic unit
l Interface unit
Supports interface functions.
5.3.10.3 EIPI Board Panel

For the EIPI board panel, see Figure 5-19.
Figure 5-19 EIPI Board Panel
5-42

Chapter 5 Board
5.3.10.4 External Interfaces on the EIPI Board

The EIPI board has no external interface.
5.3.10.5 Buttons on the EIPI Board

For a description of the buttons on the EIPI board, refer to Table 5-23.
Table 5-23 Buttons on the EIPI Board
Button Description
RST Reset switch
5.3.10.6 Indicators on the EIPI Board

For a description of the indicators on the EIPI board, refer to Table 5-24.
Table 5-24 Indicators on the EIPI Board
Refer to Appendix A
Refer to Appendix A

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
Board removal
ENUM Yellow switch is turned on
indicator
and an alarm is
reported.
Flashing at 1 Hz:
can be removed. If
the micro switch is
5-43

can be removed.
normal state.

board operates in
ACT Green
standby state.
5.3.11 EIPI4 Board

5.3.11.1 EIPI4 Board Functions
The EIPI4 board works together with the DTB board to provide IP access over E1 or T1.
One EIPI4 board and two DTB boards provide up to 64 E1/T1 interfaces.
5.3.11.2 EIPI4 Board Principle

The EIPI4 board principle is the same as the EIPI board principle. For details, see "EIPI
Board Principle".
5.3.11.3 EIPI4 Board Panel

For the EIPI4 board panel, see Figure 5-20.
5-44

Chapter 5 Board
Figure 5-20 EIPI4 Board Panel
5.3.11.4 External Interfaces on the EIPI4 Board

The EIPI4 board has no external interface.
5.3.11.5 Buttons on the EIPI4 Board

For a description of the buttons on the EIPI4 board, refer to Table 5-25.
Table 5-25 Buttons on the EIPI4 Board
Button Description
RST Reset switch
5-45

5.3.11.6 Indicators on the EIPI4 Board

For a description of the indicators on the EIPI4 board, refer to Table 5-26.
Table 5-26 Indicators on the EIPI4 Board
Refer to Appendix A
Refer to Appendix A

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
and an alarm is
Board removal
indicator
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.

board operates in
ACT Green
standby state.
5-46

Chapter 5 Board
5.3.12 ESDT Board

5.3.12.1 ESDT Board Functions
The ESDT board provides the following functions:
l Provides one 155M STM-1 interface.
l Supports APS protection.
l Supports the channel associated signaling (CAS) and common channel signaling
(CCS).
l Outputs two differential 8K synchronization clock signals.
l Supports the ANR, AGC, AEC.
format.
5.3.12.2 ESDT Board Principle

For the ESDT board principle, see Figure 5-21.
Figure 5-21 ESDT Board Principle
The function modules of the ESDT board are described as follows:

2. Interface unit
Connects to the circuit switch unit and provides an STM-1 interface.
5-47


Receives clock from the system clock board and provides the reference clock signals
extracted from the STM-1 interface.
6. EC subcard
5.3.12.3 ESDT Board Panel

For the ESDT board panel, see Figure 5-22.
Figure 5-22 ESDT Board Panel
5-48

Chapter 5 Board
5.3.12.4 External Interfaces on the ESDT Board

For a description of the external interfaces on the ESDT board, refer to Table 5-27.
Table 5-27 External Interfaces on the ESDT Board
Interface Name Direction Description
TX/RX Bidirectional 155M STM-1 interface
5.3.12.5 Buttons on the ESDT Board

For a description of the buttons on the ESDT board, refer to Table 5-28.
Table 5-28 Buttons on the ESDT Board
Button Description
RST Reset switch
5.3.12.6 Indicators on the ESDT Board

For a description of the indicators on the ESDT board, refer to Table 5-29.
Table 5-29 Indicators on the ESDT Board
Refer to Appendix A
Refer to Appendix A

fully seated and no
Flashing at 5 Hz:
Board removal
ENUM Yellow indicates that a
indicator
micro switch alarm
switch is turned on
and an alarm is
reported.
5-49

Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.

board operates in
ACT Green
standby state.
Lit: indicates that

the optical interface
operates in active
Active/standby status
state.
ACT Green indicator for the optical
module
operates in standby
state.

are optical signals
board.
SD Green Optical signal indicator
there are no optical
signals received by the
optical board.
5.3.13 ESDT2 Board

5.3.13.1 ESDT2 Board Functions
The ESDT2 board provides the following functions:
l Provides two 155M STM-1 interfaces.
5-50

Chapter 5 Board

(CCS).
l Supports the automatic noise reduction (ANR), automatic gain control (AGC), and
acoustic echo control (AEC).
format.
5.3.13.2 ESDT2 Board Principle

For the ESDT2 board principle, see Figure 5-23.
Figure 5-23 ESDT2 Board Principle
The function modules of the ESDT2 board are described as follows:

2. Interface unit

5-51


6. EC subcard
5.3.13.3 ESDT2 Board Panel

For the ESDT2 board panel, see Figure 5-24.
Figure 5-24 ESDT2 Board Panel
5.3.13.4 External Interfaces on the ESDT2 Board

For a description of the external interfaces on the ESDT2 board, refer to Table 5-30.
5-52

Chapter 5 Board
Table 5-30 External Interfaces on the ESDT2 Board
TX1/RX1 Bidirectional 155M STM-1 interface
5.3.13.5 Buttons on the ESDT2 Board

For a description of the buttons on the ESDT2 board, refer to Table 5-31.
Table 5-31 Buttons on the ESDT2 Board
Button Description
RST Reset switch
5.3.13.6 Indicators on the ESDT2 Board

For a description of the indicators on the ESDT2 board, refer to Table 5-32.
Table 5-32 Indicators on the ESDT2 Board
Refer to Appendix A
Refer to Appendix A

fully seated and no
Flashing at 5 Hz:
indicates that a
Board removal
ENUM Yellow micro switch alarm
indicator
switch is turned on
and an alarm is
reported.
Flashing at 1 Hz:
5-53

can be removed. If
the micro switch is
can be removed.
normal state.

board operates in
ACT Green
standby state.
Lit: indicates that

operates in active
state.
ACT Green indicator for optical
module 1
operates in standby
state.

are optical signals
Indicator optical signal board.
SD Green
1 Not lit: indicates that
optical board.
Lit: indicates that

operates in active
state.
module 2
operates in standby
state.
5-54

Chapter 5 Board

are optical signals
SD Green
optical board.
5.3.14 GLI Board

5.3.14.1 GLI Board Functions
The GLI board helps interconnect media planes of resource shelves or GB resource
shelves.
5.3.14.2 GLI Board Principle

For the GLI board principle, see Figure 5-25.
Figure 5-25 GLI Board Principle
The function modules of the GLI board are described as follows:

l Optical interface unit
Provides a GE optical interface and supports physical backup.
l Logic unit
l Ethernet interface unit
Supports the GE PHY and MAC functions.
Supports table query, fragmentation, forwarding, and traffic management for
bidirectional IP packets.
l Queue management unit
Supports bidirectional queue management.
5-55

5.3.14.3 GLI Board Panel

For the GLI board panel, see Figure 5-26.
Figure 5-26 GLI Board Panel
5.3.14.4 External Interfaces on the GLI Board

For a description of the external interfaces on the GLI board, refer to Table 5-33.
5-56

Chapter 5 Board
Table 5-33 External Interfaces on the GLI Board
STM-1 optical interface. Its

outlet fiber is connected to the
GUIM board of a GB resource
shelf or the UIMU board of
a resource shelf. It is used
to access the services of all
resource shelves to the switch
TX/RX Bidirectional platform. The switch platform
provides four pairs of GE optical
interfaces with each pair of
interfaces mutually backed up.
For example, SD1 and SD2 are
mutually backed, SD3 and SD4
are mutually backed up, and so
on.
5.3.14.5 Buttons on the GLI Board

For a description of the buttons on the GLI board, refer to Table 5-34.
Table 5-34 Buttons on the GLI Board
Button Description
RST Reset switch
5.3.14.6 Indicators on the GLI Board

For a description of the indicators on the GLI board, refer to Table 5-35.
Table 5-35 Indicators on the GLI Board
Refer to Appendix A
Refer to Appendix A
5-57


fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
and an alarm is
Board removal
indicator
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.

board operates in
ACT Green
standby state.
Lit: indicates that

Optical interface operates abnormally.
ACT1-8 Green
activation indicator Flashing: indicates that
the optical interface is
receiving data.
5-58

Chapter 5 Board

are optical signals
interface.
SD1-8 Green Optical signal indicator
optical interface.
5.3.15 GLI4 Board

5.3.15.1 GLI4 Board Functions
The GLI4 board helps interconnect media planes of resource shelves or GB resource
shelves.
5.3.15.2 GLI4 Board Principle

The GLI4 board principle is the same as the GLI board principle. For details, see "GLI
Board Principle".
5.3.15.3 GLI4 Board Panel

For the GLI4 board panel, see Figure 5-27.
5-59

Figure 5-27 GLI4 Board Panel
5.3.15.4 External Interfaces on the GLI4 Board

For a description of the external interfaces on the GLI4 board, refer to Table 5-36.
Table 5-36 External Interfaces on the GLI4 Board
STM-1 optical interface. Its

outlet fiber is connected to the
GUIM board of a GB resource
shelf or the UIMU board of
TX/RX Bidirectional
a resource shelf. It is used
to access the services of all
resource shelves to the switch
platform. The switch platform
5-60

Chapter 5 Board
provides four pairs of GE optical

interfaces with each pair of
interfaces mutually backed up.
For example, SD1 and SD2 are
mutually backed, SD3 and SD4
are mutually backed up, and so
on.
5.3.15.5 Buttons on the GLI4 Board

For a description of the buttons on the GLI4 board, refer to Table 5-37.
Table 5-37 Buttons on the GLI4 Board
Button Description
RST Reset switch
5.3.15.6 Indicators on the GLI4 Board

For a description of the indicators on the GLI4 board, refer to Table 5-38.
Table 5-38 Indicators on the GLI4 Board
Refer to Appendix A
Refer to Appendix A

fully seated and no
Board removal
ENUM Yellow Flashing at 5 Hz:
indicator
indicates that a
micro switch alarm
switch is turned on
5-61

and an alarm is
reported.
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.

board operates in
ACT Green
standby state.
Lit: indicates that

Optical interface operates abnormally.
ACT1-8 Green
activation indicator Flashing: indicates that
receiving data.

are optical signals
interface.
SD1-8 Green Optical signal indicator
optical interface.
5.3.16 GIPI Board

5.3.16.1 GIPI Board Functions
The GIPI board provides IP interfaces for the ZXG10 iBSC.
The GIPI board is classified into four function boards:
5-62

Chapter 5 Board
l GB IP interface board IPBB (Abis interface)

l GB IP interface board IPAB (A interface, signaling)
l GB IP interface board IPI (A interface, signaling and service)
l GB IP interface board IPGB (Gb interface)
5.3.16.2 GIPI Board Principle

For the GIPI board principle, see Figure 5-28.
Figure 5-28 GIPI Board Principle
The function modules of the GIPI board are described as follows:

control plane.
l Logic unit
l Interface unit
Provides one GE interface.
5.3.16.3 GIPI Board Panel

For the GIPI board panel, see Figure 5-29.
5-63

Figure 5-29 GIPI Board Panel
5.3.16.4 External Interfaces on the GIPI Board

For a description of the external interfaces on the GIPI board, refer to Table 5-39.
Table 5-39 External Interfaces on the GIPI Board
GB Ethernet optical interface,

used for connecting to external
NEs such as BTS, SGSN, and
MSC/MGW
It cannot be valid at the same
time as the GB Ethernet
electrical interface on the rear
TX/RX Bidirectional board.
5-64

Chapter 5 Board
5.3.16.5 Buttons on the GIPI Board

For a description of the buttons on the GIPI board, refer to Table 5-40.
Table 5-40 Buttons on the GIPI Board
Button Description
RST Reset switch
5.3.16.6 Indicators on the GIPI Board

For a description of the indicators on the GIPI board, refer to Table 5-41.
Table 5-41 Indicators on the GIPI Board
Refer to Appendix A
"Combined Indicator
RUN Green Operating indicator Status Descriptions".
Refer to Appendix A
"Combined Indicator
ALM Red Alarm indicator Status Descriptions".

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
and an alarm is
reported.
Flashing at 1 Hz:
can be removed. If
the micro switch is
Board removal indica-
ENUM Yellow tor
can be removed.
5-65


normal state.

board operates in
active state.
Active/standby status the board operates in
ACT Green indicator standby state.

are optical signals
interface.
SD Green Optical signal indicator optical interface.
Lit: indicates that

operates abnormally.
Flashing: indicates that
Optical interface activa- the optical interface is
ACT Green tion indicator receiving data.
5.3.17 GIPI4 Board

5.3.17.1 GIPI4 Board Functions
The GIPI4 board provides IP interfaces used between the ZXG10 iBSC and BTSs. In
addition, the GIPI4 board supports advanced IEEE 1588V2 functions and synchronous
Ethernet functions.
5.3.17.2 GIPI4 Board Principle

For the GIPI4 board principle, see Figure 5-30.
5-66

Chapter 5 Board
Figure 5-30 GIPI4 Board Principle
The function modules of the GIPI4 board are described as follows:

1. Service processing unit
control plane.
2. Logic unit
3. Interface unit
Provides two GE interfaces.
5.3.17.3 GIPI4 Board Panel

For the GIPI4 board panel, see Figure 5-31.
5-67

Figure 5-31 GIPI4 Board Panel
5.3.17.4 External Interfaces on the GIPI4 Board

For a description of the external interfaces on the GIPI4 board, refer to Table 5-42.
Table 5-42 External Interfaces on the GIPI4 Board
GB Ethernet optical interface,

used for connecting to the BTS
It cannot be valid at the same
time as the GB Ethernet
electrical interface on the rear
TX1/RX1 Bidirectional board.
TX2/RX2 Bidirectional Reserved
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Chapter 5 Board
5.3.17.5 Buttons on the GIPI4 Board

For a description of the buttons on the GIPI4 board, refer to Table 5-43.
Table 5-43 Buttons on the GIPI4 Board
Button Description
RST Reset switch
5.3.17.6 Indicators on the GIPI4 Board

For a description of the indicators on the GIPI4 board, refer to Table 5-44.
Table 5-44 Indicators on the GIPI4 Board
Refer to Appendix A
Refer to Appendix A

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
Board removal indica- during board operation
ENUM Yellow
tor and an alarm is
reported.
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
5-69


normal state.

board operates in
ACT Green
standby state.
Lit: indicates that

Optical interface activa- operates abnormally.
ACT1-2 Green
tion indicator Flashing: indicates that
receiving data.

is a fiber inserted in the
optical interface.
Optical fiber insertion
SD1-2 Green Not lit: indicates
indicator
that there is no fiber
inserted in the optical
interface.

ACT1 Green indicator for the optical Not lit: indicates
interface.

ACT2 Green indicator for the optical Not lit: indicates
interface.
5-70

Chapter 5 Board

electrical interface link
Link status indicator for operates normally.
LINK1 Green
the electrical interface Not lit: indicates that
the electrical interface
link is disconnected.

electrical interface link
Link status indicator for operates normally.
LINK2 Green
the electrical interface Not lit: indicates that
the electrical interface
link is disconnected.
5.3.18 GUIM Board

5.3.18.1 GUIM Board Functions
The GUIM board provides the following functions:
l Supports control-plane and user-plane L2 Ethernet changeover in the GB resource
shelf, circuit domain timeslot multiplexing and changeover, GB resource shelf
management, and provides external interfaces.
l Supports the clock driving function in the GB resource shelf. After being phase-locked
and driven, the input PP2S, 8K, and 16M signals are distributed to each slot of the GB
resource shelf. This provides 16M, 8K, and PP2S clock for the GB resource shelf.
l Supports GB resource shelf management and provides RS485 management
interfaces inside the GB resource shelf. In addition, it supports board resetting and
in-position signal collection.
5.3.18.2 GUIM Board Principle

For the GUIM board principle, see Figure 5-32.
5-71

Figure 5-32 GUIM Board Principle
The function modules of the GUIM board are described as follows:

l CPU unit
Connects the timeslot switch unit, logic unit, and Ethernet switch unit through the
control bus and implements switch unit configuration, logic unit configuration and
management, and GB resource shelf management.
l Logic unit
l Timeslot switching unit
Implement 16K circuit changeover and provides an inner circuit switch network for the
GB resource shelf.
l Ethernet switching unit
Implements user-plane and control-plane Ethernet changeover in the GB resource

shelf.
5.3.18.3 GUIM Board Panel

For the GUIM board panel, see Figure 5-33.
5-72

Chapter 5 Board
Figure 5-33 GUIM Board Panel
5.3.18.4 External Interfaces on the GUIM Board

For a description of the external interfaces on the GUIM board, refer to Table 5-45.
Table 5-45 External Interfaces on the GUIM Board
Extended user-plane 1G optical

TX1/RX1 Bidirectional interface, used for connecting to
the GLI/GLI4 board

the GLI/GLI4 board
5-73


the GLI/GLI4 board

the GLI/GLI4 board
5.3.18.5 Buttons on the GUIM Board

For a description of the buttons on the GUIM board, refer to Table 5-46.
Table 5-46 Buttons on the GUIM Board
Button Description
RST Reset switch
5.3.18.6 Indicators on the GUIM Board

For a description of the indicators on the GUIM board, refer to Table 5-47.
Table 5-47 Indicators on the GUIM Board
Refer to Appendix A
Refer to Appendix A

board operates in
ACT Green
standby state.
5-74

Chapter 5 Board

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
and an alarm is
Board removal
indicator
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.

group domain of the
local GUIM module
operates in active
state.
ACT-P Green Group domain indicator
the group domain of
the local GUIM module
operates in standby
state.

active optical interface
is activated.
Status indicator for the
ACT1-4 Green Not lit: indicates that
GE interface
the active optical
interface is not
activated.
5-75


optical module receives
optical signals.
Optical signal indicator
SD1-4 Green Not lit: indicates that
for the GE interface
the optical module
does not receive optical
signals.

circuit domain of the
local GUIM module
operates in active
state.
ACT-T Green Circuit domain indicator
the circuit domain of
the local GUIM module
operates in standby
state.
Lit: indicates that

the control-plane
cascading 100M
Status indicators interfaces 1 to 6 are
for control-plane connected.
L1-L6 Green
cascading interfaces 1 Not lit: indicates that
to 6 the control-plane
cascading 100M
interfaces 1 to 6 are not
connected.
5.3.19 GUIM2 Board

5.3.19.1 GUIM2 Board Functions
The GUIM2 board provides the following functions:
l Supports control-plane and user-plane L2 Ethernet changeover in the GB resource
shelf, circuit domain timeslot multiplexing and changeover, GB resource shelf
management, and provides external interfaces.
l Supports the clock driving function in the GB resource shelf. After being phase-locked
and driven, the input PP2S, 8K, and 16M signals are distributed to each slot of the GB
resource shelf. This provides 16M, 8K, and PP2S clock for the GB resource shelf.
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Chapter 5 Board
l Supports GB resource shelf management and provides RS485 management

interfaces inside the GB resource shelf. In addition, it supports board resetting and
in-position signal collection.
5.3.19.2 GUIM2 Board Principle

The GUIM2 board principle is the same as the GUIM board principle. For details, see
"GUIM Board Principle".
5.3.19.3 GUIM2 Board Panel

For the GUIM2 board panel, see Figure 5-34.
Figure 5-34 GUIM2 Board Panel
5-77

5.3.19.4 External Interfaces on the GUIM2 Board

For a description of the external interfaces on the GUIM2 board, refer to Table 5-48.
Table 5-48 External Interfaces on the GUIM2 Board

the GLI/GLI4 board

the GLI/GLI4 board

the GLI/GLI4 board

the GLI/GLI4 board
5.3.19.5 Buttons on the GUIM2 Board

For a description of the buttons on the GUIM2 board, refer to Table 5-49.
Table 5-49 Buttons on the GUIM2 Board
Button Description
RST Reset switch
5.3.19.6 Indicators on the GUIM2 Board

For a description of the indicators on the GUIM2 board, refer to Table 5-50.
Table 5-50 Indicators on the GUIM2 Board
Refer to Appendix A
Refer to Appendix A
5-78

Chapter 5 Board

board operates in
ACT Green
standby state.

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
and an alarm is
Board removal
indicator
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.

group domain of the
local GUIM2 module
operates in active state.
ACT-P Green Group domain indicator Not lit: indicates that
the group domain of the
local GUIM2 module
operates in standby
state.
5-79


is activated.
Status indicator for the
ACT1-8 Green Not lit: indicates that
GE interface
the active optical
interface is not
activated.

optical signals.
SD1-8 Green Not lit: indicates that
for the GE interface
the optical module
signals.

circuit domain of the
local GUIM2 module
operates in active state.
ACT-T Green Circuit domain indicator Not lit: indicates that
the circuit domain of the
local GUIM2 module
operates in standby
state.
Lit: indicates that

the control-plane
cascading 100M
L1-L6 Green
cascading 100M
connected.
5.3.20 GUP Board

5.3.20.1 GUP Board Functions
The GUP board is classified into three function boards:
l Ater interface processing board TIPB
5-80

Chapter 5 Board
Implements conversion between TDM and IP packets over the Ater interface, that is,
searches for 20 ms TRAU frames by channel and assembles them as IP packets.
l Abis interface processing board BIPB
The CS and PS services from the BTS are switched to the BIPB board through
the circuit switch network of the resource shelf. The interface searches for 20 ms
TRU (PCU) frames by channel on the BIPB board, assembles them as IP packets,
and sends them to the TCU for code pattern conversion and rate adaption or to the
user-plane processing unit (UPU).
l Dual-rate conversion board DRTB
Implements code pattern conversion, provides code pattern conversion and rate
adaption for TRAU frames, and supports the FR, EFR, HR, AMR, and TFO functions.
5.3.20.2 GUP Board Principle

For the GUP board principle, see Figure 5-35.
Figure 5-35 GUP Board Principle
The function modules of the GUP board are described as follows:

l CPU unit
Manages the board, processes Abis signaling, and provides an external control-plane
FE interface.
5-81

l Logic unit
l DSP unit
Provides multiple DSP chips for code pattern conversion, rate adaption, or data packet
conversion.
Connects multiple DSP chips over Ethernet and provides an external user-plane FE
interface.
l Clock unit
Provides necessary clock signals for all units on the board.
l Circuit switch unit
Connect the serial interfaces of multiple DSP chips to the circuit packet network.
5.3.20.3 GUP Board Panel

For the GUP board panel, see Figure 5-36.
5-82

Chapter 5 Board
Figure 5-36 GUP Board Panel
5.3.20.4 External Interfaces on the GUP Board

The GUP board has no external interface.
5.3.20.5 Buttons on the GUP Board

For a description of the buttons on the GUP board, refer to Table 5-51.
Table 5-51 Buttons on the GUP Board
Button Description
RST Reset switch
5-83

5.3.20.6 Indicators on the GUP Board

For a description of the indicators on the GUP board, refer to Table 5-52.
Table 5-52 Indicators on the GUP Board
Refer to Appendix A
Refer to Appendix A

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
and an alarm is
Board removal
indicator
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.

board operates in
ACT Green
standby state.
5-84

Chapter 5 Board
5.3.21 GUP2 Board

5.3.21.1 GUP2 Board Functions
The GUP2 board is classified into five function boards:
l Ater interface processing board TIPB2
Implements conversion between TDM and IP packets over the Ater interface, that is,
searches for 20 ms TRAU frames by channel and assembles them as IP packets.
l Abis interface processing board BIPB2
On the STM-1 or E1 Abis interface, the CS and PS services from the BTS are
switched to the BIPB2 board through the circuit switch network of the resource shelf.
The interface searches for 20 ms TRU (PCU) frames by channel on the BIPB2
board, assembles them as IP packets, and sends them to the TCU for code pattern
conversion and rate adaption or to the user-plane processing unit (UPU).Except the
above functions, the BIPB2 board uses the IP Abis interface to process RTP packets.
l A interface processing board AIPB2
Processes RTP packets on the A interface and assembles the data as IP packets.
l User-plane processing board UPPB2
Processes the data of user-plane protocols in A/Gb mode. The protocols include
BSSGP, PDCP, and GTP_U.
l Dual-rate conversion board DRTB2
Implements code pattern conversion, provides code pattern conversion and rate
adaption for TRAU frames, and supports the FR, EFR, HR, AMR, and TFO functions.
5.3.21.2 GUP2 Board Principle

For the GUP2 board principle, see Figure 5-37.
5-85

Figure 5-37 GUP2 Board Principle
The function modules of the GUP2 board are described as follows:

l CPU unit
Manages the board, processes Abis signaling, and provides an external control-plane
FE interface.
l Logic unit
l DSP unit
Provides multiple DSP chips for code pattern conversion, rate adaption, or data packet
conversion.

Connects multiple DSP chips over Ethernet and provides an external user-plane GE
interface.
l Clock unit
l Circuit switching unit

Connect the serial interfaces of multiple DSP chips to the circuit packet network.
5-86

Chapter 5 Board
5.3.21.3 GUP2 Board Panel

For the GUP2 board panel, see Figure 5-38.
Figure 5-38 GUP2 Board Panel
5.3.21.4 External Interfaces on the GUP2 Board

The GUP2 board has no external interface.
5.3.21.5 Buttons on the GUP2 Board

For a description of the buttons on the GUP2 board, refer to Table 5-53.
Table 5-53 Buttons on the GUP2 Board
Button Description
RST Reset switch
5-87

5.3.21.6 Indicators on the GUP2 Board

For a description of the indicators on the GUP2 board, refer to Table 5-54.
Table 5-54 Indicators on the GUP2 Board
Refer to Appendix A
Refer to Appendix A

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
and an alarm is
Board removal
indicator
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.

board operates in
ACT Green
standby state.
5-88

Chapter 5 Board
5.3.22 ICM Board

5.3.22.1 ICM Board Functions
The ICM board provides the following functions:
l Supplies clock for the system and supports external synchronization. The ICM
board supports synchronizing the clock reference extracted from the A interface and
provides multiple channels of timing reference signals to the interface unit.
l Receives signals from the GPS satellite system, extracts and generates the clock
reference required by the ZXG10 iBSC.
l Outputs L3 clock.
5.3.22.2 ICM Board Principle

For the ICM board principle, see Figure 5-39.
Figure 5-39 ICM Board Principle
The function modules of the ICM board are described as follows:
l Main control unit

reference.
l Reference selection unit
l Voltage-controlled crystal oscillation unit
5-89

Provides a high-precision clock source for the board by using an oven controlled
crystal oscillator that meets the level-3 clock standard.
l Phase discrimination and phase lock unit
Adjusts the phase comparison between the clock signal and input reference,
and provides quantitative data to the main control unit so as to control the
voltage-controlled crystal oscillation unit. The phase-lock system uses the loose
coupling phase-lock principle.
l Active/standby changeover unit
switch on the clock is acceptable. The active and standby ICM boards are locked to
one reference for smooth changeover.
5.3.22.3 ICM Board Panel

For the ICM board panel, see Figure 5-40.
5-90

Chapter 5 Board
Figure 5-40 ICM Board Panel
5.3.22.4 External Interfaces on the ICM Board

For a description of the external interfaces on the ICM board, refer to Table 5-55.
Table 5-55 External Interfaces on the ICM Board
GPS Input GPS antenna interface
PP2S clock output interface of

PP2S Output
the GPS module
10M clock output interface of the

10M Output
GPS module
Debugging interface of the GPS

MON Bidirectional
module
5-91

5.3.22.5 Buttons on the ICM Board

For a description of the buttons on the ICM board, refer to Table 5-56.
Table 5-56 Buttons on the ICM Board
Button Description
RST Reset switch

MANSL

MANEN
5.3.22.6 Indicators on the ICM Board

For a description of the indicators on the ICM board, refer to Table 5-57.
Table 5-57 Indicators on the ICM Board
Refer to Appendix A
Refer to Appendix A

fully seated and no
Board removal
ENUM Yellow Flashing at 5 Hz:
indicator
indicates that a
micro switch alarm
switch is turned on
5-92

Chapter 5 Board
and an alarm is
reported.
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.

board operates in
ACT Green
standby state.
Lit: indicates the

2M clock reference
transmitted in HDB3
by the BITS device
priority.
Lit: indicates the

2M clock reference
transmitted in HDB3
by the BITS device
priority.
Lit: indicates the

2M clock reference
transmitted in TTL
by the BITS device
priority.
5-93

Lit: indicates the

2M clock reference
transmitted in TTL
by the BITS device
priority.

8 K1 Green Reference indicator clock extracted from
the line.

external GPS.

GUIM or UIMC.

GPS of this board.
Lit: indicates that


indicator
degraded.

capturing mode.

tracing mode.

mode.

Free operating
indicator
operating mode.
5-94

Chapter 5 Board
Lit: indicates that

manual reference
MANI Green
manual reference

system clock operates
normally.
loss of lock occurs in
the 16CHIP phase-lock
loop.
System clock reference
SCS Green Flashing at 5 Hz:
indicator
indicates that 16CHIP
signals are output
abnormally.
Flashing at 0.5 Hz:
indicates that PP2S
signals are output
abnormally.

12.8M PPL of the
circuit clock is locked
Circuit clock reference normally.
CCS Green
loss of lock occurs in
the 12.8M PPL of the
circuit clock.
Lit: indicates that

the antenna feeder
operates normally.
the antenna feeder
Antenna status and satellite operate
ANT Green
indicator normally and are being
initialized.
Flashing at 1 Hz:
indicates that short
circuit occurs in the
antenna feeder.
5-95

Flashing at 2 Hz:
indicates that the
antenna feeder
operates normally but
fails to find the satellite.
Flashing at 0.5 Hz:
indicates that short
circuit occurs in the
antenna.
Flashing at 5 Hz:
indicates that no
message is received
during initialization.
Not lit: indicates the

GPS single-mode
receiver.
Lit green: indicates
the GPS/GONOLASS
Mode selection
TYP Green/Yellow dual-mode receiver.
indicator
Lit yellow: indicates
the GPS/GONO-
LASS/Beidou sched-
uled triple-mode re-
ceiver.
5.3.22.7 DIP Switches on the ICM Board

The DIP switches on the ICM board are used to set the matching impedance of input BITS
clock. The default value is 75 Ω. For DIP switch descriptions of the ICM board, refer to
Table 5-58.
Table 5-58 DIP Switches on the ICM Board
Settings
DIP Switch
Mode Name 1 2 3 4
S1 ON ON ON ON
75 Ω
S5 ON ON ON ON
S1 ON ON ON ON
100 Ω
S5 OFF OFF OFF OFF
5-96

Chapter 5 Board
Settings
DIP Switch
Mode Name 1 2 3 4
S1 OFF OFF OFF OFF

120 Ω
S5 OFF OFF OFF OFF
5.3.23 OMP Board

5.3.23.1 OMP Board Functions
The OMP board provides the following functions:
l Controls the global process and the OAM of the whole system.
l Monitors and manages the boards in the system directly or indirectly as the core of
the ZXG10 iBSC OAM, configures and manages the boards through the Ethernet link
and RS485 link.
5.3.23.2 OMP Board Principle

For the OMP board principle, see Figure 5-41.
Figure 5-41 OMP Board Principle
5-97

The function modules of the OMP board are described as follows:

1. CPU unit
The board has two independent CPUs, namely CPU A and CPU B. Each CPU provides
a control-plane FE electrical interface, an FE electrical interface for communication
between active and standby boards, RS232 and RS485 interfaces for communication
with other units. In addition, CPU A supports board main control.
2. Logic unit
3. Power management unit
Implements board power management and distribution.
5.3.23.3 OMP Board Panel

For the OMP board panel, see Figure 5-42.
5-98

Chapter 5 Board
Figure 5-42 OMP Board Panel
5.3.23.4 External Interfaces on the OMP Board

For a description of the external interfaces on the OMP board, refer to Table 5-59.
Table 5-59 External Interfaces on the OMP Board
USB1 Bidirectional Reserved
USB2 Bidirectional Reserved
5.3.23.5 Buttons on the OMP Board

For a description of the buttons on the OMP board, refer to Table 5-60.
5-99

Table 5-60 Buttons on the OMP Board
Button Description

board

board
5.3.23.6 Indicators on the OMP Board

For a description of the indicators on the OMP board, refer to Table 5-61.
Table 5-61 Indicators on the OMP Board
Refer to Appendix A
unit A
Refer to Appendix A
CPU unit A

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
Board removal switch is turned on
ENUM1 Yellow
indicator of CPU unit A during board operation
and an alarm is
reported.
Flashing at 1 Hz:
can be removed. If
the micro switch is
5-100

Chapter 5 Board

can be removed.
normal state.

board operates in
ACT1 Green
standby state.
Flashing at 5 Hz:
HD1 Red Hard disk indicator 1 indicates that the hard
disk is operating.
Refer to Appendix A
unit B
Refer to Appendix A
CPU unit B

board operates in
ACT2 Green
standby state.

fully seated and no
Flashing at 5 Hz:
indicates that a
Board removal
ENUM2 Yellow micro switch alarm
indicator of CPU unit B
switch is turned on
and an alarm is
reported.
Flashing at 1 Hz:
5-101

can be removed. If
the micro switch is
can be removed.
normal state.
Flashing at 5 Hz:
disk is operating.

OMC network interface
OMC1 Green OMC network interface
indicator 1
1 is connected.

indicator 2
2 is connected.
5.3.24 OMP2 Board

5.3.24.1 OMP2 Board Functions
The OMP2 board provides the following functions:
l Controls the global process and the OAM of the whole system.
l Monitors and manages the boards in the system directly or indirectly as the core of
the ZXG10 iBSC OAM, configures and manages the boards through the Ethernet link
and RS485 link.
5.3.24.2 OMP2 Board Principle

The OMP2 board principle is the same as the OMP board principle. For details, see "OMP
Board Principle".
5.3.24.3 OMP2 Board Panel

For the OMP2 board panel, see Figure 5-43.
5-102

Chapter 5 Board
Figure 5-43 OMP2 Board Panel
5.3.24.4 External Interfaces on the OMP2 Board

The OMP2 board has no external interface.
5.3.24.5 Buttons on the OMP2 Board

For a description of the buttons on the OMP2 board, refer to Table 5-62.
Table 5-62 Buttons on the OMP2 Board
Button Description

board
5-103

Button Description

board
5.3.24.6 Indicators on the OMP2 Board

For a description of the indicators on the OMP2 board, refer to Table 5-63.
Table 5-63 Indicators on the OMP2 Board
Refer to Appendix A
unit A
Refer to Appendix A
CPU unit A

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
and an alarm is
Board removal
ENUM1 Yellow reported.
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.
5-104

Chapter 5 Board

board operates in
ACT1 Green
standby state.
Flashing at 5 Hz:
disk is operating.
Refer to Appendix A
unit B
Refer to Appendix A
CPU unit B

board operates in
ACT2 Green
standby state.

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
Board removal switch is turned on
ENUM2 Yellow
indicator of CPU unit B during board operation
and an alarm is
reported.
Flashing at 1 Hz:
can be removed. If
the micro switch is
5-105


can be removed.
normal state.
Flashing at 5 Hz:
disk is operating.

indicator 1
1 is connected.

indicator 2
2 is connected.
5.3.25 PSN Board

5.3.25.1 PSN Board Functions
The PSN board helps interconnect GLI or GLI4 boards in a packet switch shelf.
5.3.25.2 PSN Board Principle

For the PSN board principle, see Figure 5-44.
5-106

Chapter 5 Board
Figure 5-44 PSN Board Principle
The function modules of the PSN board are described as follows:

l CPU unit
Connects to the control center UIMC of the switch shelf through an FE interface for
operation and maintenance and connects to the matrix switch unit through the inner
control bus for basic configuration and management.
l Logic unit
Implements inner-board logic adaption.
l Matrix switching unit
Provides a high-speed serial link and connects to the GLI or GLI4 board for data
exchange.
5.3.25.3 PSN Board Panel

For the PSN board panel, see Figure 5-45.
5-107

Figure 5-45 PSN Board Panel
5.3.25.4 External Interfaces on the PSN Board

The PSN board has no external interface.
5.3.25.5 Buttons on the PSN Board

For a description of the buttons on the PSN board, refer to Table 5-64.
Table 5-64 Buttons on the PSN Board
Button Description
RST Reset switch
5-108

Chapter 5 Board
5.3.25.6 Indicators on the PSN Board

For a description of the indicators on the PSN board, refer to Table 5-65.
Table 5-65 Indicators on the PSN Board
Refer to Appendix A
Refer to Appendix A

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
and an alarm is
Board removal
indicator
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.

board operates in
ACT Green
standby state.
5-109

5.3.26 SBCX Board

5.3.26.1 SBCX Board Functions
The SBCX board supports the local network management function.
5.3.26.2 SBCX Board Principle

For the SBCX board principle, see Figure 5-46.
Figure 5-46 SBCX Board Principle
The function modules of the SBCX board are described as follows:

l CPU dual-core system
Acts as the core processing module of the board, including CPU, memory controller,
and internal memory.
l Peripheral device interface
Provides various interfaces, such as the PS/2 interface, USB interface, and VGA
interface.
l External interface unit
Provides four FE interfaces and two GE interfaces.
l SAS controller
Provides an SAS hard disk interface for RAID 0/1.
l SAS hard disk
5-110

Chapter 5 Board
Stores service data.
5.3.26.3 SBCX Board Panel

For the SBCX board panel, see Figure 5-47.
Figure 5-47 SBCX Board Panel
5.3.26.4 External Interfaces on the SBCX Board

For a description of the external interfaces on the SBCX board, refer to Table 5-66.
Table 5-66 External Interfaces on the SBCX Board
USB1 Bidirectional USB interface
5-111

KB Input PS/2 keyboard interface
MS Input PS/2 mouse interface
VGA Output Analog display interface
RX1/TX1 - Reserved
RX2/TX2 - Reserved
5.3.26.5 Buttons on the SBCX Board

For a description of the buttons on the SBCX board, refer to Table 5-67.
Table 5-67 Buttons on the SBCX Board
Button Description
RST Reset switch
PWB Power control switch
ENUM1 Board removal switch for SAS hard disk 1
ENUM2 Board removal switch for SAS hard disk 2
5.3.26.6 Indicators on the SBCX Board

For a description of the indicators on the SBCX board, refer to Table 5-68.
Table 5-68 Indicators on the SBCX Board
RUN Green Operating indicator Reserved
ALM Red Alarm indicator Reserved
Board removal
ENUM Yellow Reserved
indicator
ACT Green Reserved
indicator

IDE hard disk is being
accessed.
HD Green IDE hard disk indicator
the IDE hard disk is
idle.
5-112

Chapter 5 Board

board is powered on.
PWR Green Board power indicator Not lit: indicates that
the board is powered
off.
Lit: indicates that SAS

hard disk 1 is being
Read/Write indicator
SAS1 Green accessed.
for SAS hard disk 1
SAS hard disk 1 is idle.

hard disk 1 is not in
Alarm indicator for SAS position or is faulty.
ALM1 Yellow
hard disk 1 Not lit: indicates that
SAS hard disk 1 is
normal.

Read/Write indicator
SAS2 Green accessed.
for SAS hard disk 2
SAS hard disk 2 is idle.

hard disk 2 is not in
Alarm indicator for SAS position or is faulty.
ALM2 Yellow
hard disk 2 Not lit: indicates that
SAS hard disk 2 is
normal.
Operating indicator for

ACT Green Reserved
FC interface 1
Rate indicator for FC

SD Yellow Reserved
interface 1
Operating indicator for

ACT Green Reserved
FC interface 2
Rate indicator for FC

SD Yellow Reserved
interface 2
5-113

5.3.27 SBCX2 Board

5.3.27.1 SBCX2 Board Functions
The SBCX2 board supports the local network management function.
5.3.27.2 SBCX2 Board Principle

The SBCX2 board principle is the same as the SBCX board principle. For details, see
"SBCX Board Principle".
5.3.27.3 SBCX2 Board Panel

For the SBCX2 board panel, see Figure 5-48.
Figure 5-48 SBCX2 Board Panel
5-114

Chapter 5 Board
5.3.27.4 External Interfaces on the SBCX2 Board

For a description of the external interfaces on the SBCX2 board, refer to Table 5-69.
Table 5-69 External Interfaces on the SBCX2 Board
KB Input PS/2 keyboard interface
MS Input PS/2 mouse interface
VGA Output Analog display interface
5.3.27.5 Buttons on the SBCX2 Board

For a description of the buttons on the SBCX2 board, refer to Table 5-70.
Table 5-70 Buttons on the SBCX2 Board
Button Description
RST Reset switch
PWB Power control switch
5.3.27.6 Indicators on the SBCX2 Board

For a description of the indicators on the SBCX2 board, refer to Table 5-71.
Table 5-71 Indicators on the SBCX2 Board
RUN Green Operating indicator Reserved
ALM Red Alarm indicator Reserved
Board removal
ENUM Yellow Reserved
indicator
ACT Green Reserved
indicator
Lit: indicates that

HD1 Green Indicator for hard disk 1 accessed.
hard disk 1 is idle.
5-115

Lit: indicates that

HD2 Green Indicator for hard disk 2 accessed.
hard disk 2 is idle.

board is powered on.
PWR Green Board power indicator Not lit: indicates that
the board is powered
off.

board subsystem is
Board subsystem powered on.
PWG Green
power-on indicator Not lit: indicates that
the board subsystem is
powered off.
DBG1 Red Debugging indicator It is used for debugging.
DBG2 Red Debugging indicator It is used for debugging.
5.3.28 SDTB Board

5.3.28.1 SDTB Board Functions
The SDTB board provides the following functions:
l Provides one 155M STM-1 interface.
(CCS).
5.3.28.2 SDTB Board Principle

For the SDTB board principle, see Figure 5-49.
5-116

Chapter 5 Board
Figure 5-49 SDTB Board Principle
The function modules of the SDTB board are described as follows:

l Main control unit
l Interface unit
l Logic processing unit
l Clock processing unit
5.3.28.3 SDTB Board Panel

For the SDTB board panel, see Figure 5-50.
5-117

Figure 5-50 SDTB Board Panel
5.3.28.4 External Interfaces on the SDTB Board

For a description of the external interfaces on the SDTB board, refer to Table 5-72.
Table 5-72 External Interfaces on the SDTB Board
155M STM-1 interface, with LC

TX/RX Bidirectional
connector
5.3.28.5 Buttons on the SDTB Board

For a description of the buttons on the SDTB board, refer to Table 5-73.
5-118

Chapter 5 Board
Table 5-73 Buttons on the SDTB Board
Button Description
RST Reset switch
5.3.28.6 Indicators on the SDTB Board

For a description of the indicators on the SDTB board, refer to Table 5-74.
Table 5-74 Indicators on the SDTB Board
Refer to Appendix A
Refer to Appendix A

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
and an alarm is
Board removal
indicator
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.
5-119


board operates in
ACT Green
standby state.
Lit: indicates that

operates in active
state.
ACT Green indicator for the optical
module
operates in standby
state.

are optical signals
board.
SD Green Optical signal indicator
optical board.
5.3.29 SDTB2 Board

5.3.29.1 SDTB2 Board Functions
The SDTB2 board provides the following functions:
l Provides two 155M STM-1 interfaces.
(CCS).
5.3.29.2 SDTB2 Board Principle

For the SDTB2 board principle, see Figure 5-51.
5-120

Chapter 5 Board
Figure 5-51 SDTB2 Board Principle
The function modules of the SDTB2 board are described as follows:

l Main control unit
l Interface unit
l Logic processing unit
l Clock processing unit
5.3.29.3 SDTB2 Board Panel

For the SDTB2 board panel, see Figure 5-52.
5-121

Figure 5-52 SDTB2 Board Panel
5.3.29.4 External Interfaces on the SDTB2 Board

For a description of the external interfaces on the SDTB2 board, refer to Table 5-75.
Table 5-75 External Interfaces on the SDTB2 Board
5.3.29.5 Buttons on the SDTB2 Board

For a description of the buttons on the SDTB2 board, refer to Table 5-76.
5-122

Chapter 5 Board
Table 5-76 Buttons on the SDTB2 Board
Button Description
RST Reset switch
5.3.29.6 Indicators on the SDTB2 Board

For a description of the indicators on the SDTB2 board, refer to Table 5-77.
Table 5-77 Indicators on the SDTB2 Board
Refer to Appendix A
Refer to Appendix A

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
and an alarm is
Board removal
indicator
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.
5-123


board operates in
ACT Green
standby state.
Lit: indicates that

operates in active
state.
module 1
operates in standby
state.

are optical signals
SD Green
optical board.
Lit: indicates that

operates in active
state.
module 2
operates in standby
state.

are optical signals
SD Green
optical board.
5-124

Chapter 5 Board
5.3.30 SPB Board

5.3.30.1 SPB Board Functions
The SPB board is classified into three function boards:
l LAPD processing board LAPD
Processes LAPD signaling.
l Signaling processing board SPB
Processes MTP2 and X.25 packets and extracts 8K synchronization clock from lines.
l Gb interface processing board GIPB
Processes FR, NS, and BSSGP packets of the GPRS and supports Gb interfaces.
5.3.30.2 SPB Board Principle

For the SPB board principle, see Figure 5-53.
Figure 5-53 SPB Board Principle
The function modules of the SPB board are described as follows:

l Interface unit
Connects to the circuit switch unit and provides an E1 interface.
Switches the circuits of the interface unit and backplane.
l CPU unit
Implements signaling processing, board management, and internal connection
control.
l Control plane switching unit
Exchanges control plane data and provides a control plane FE interface.

l User plane switching unit
Exchanges user plane data and provides a user plane FE interface.
5.3.30.3 SPB Board Panel

For the SPB board panel, see Figure 5-54.
5-125

Figure 5-54 SPB Board Panel
5.3.30.4 External Interfaces on the SPB Board

The SPB board has no external interface.
5.3.30.5 Buttons on the SPB Board

For a description of the buttons on the SPB board, refer to Table 5-78.
Table 5-78 Buttons on the SPB Board
Button Description
RST Reset switch
5-126

Chapter 5 Board
5.3.30.6 Indicators on the SPB Board

For a description of the indicators on the SPB board, refer to Table 5-79.
Table 5-79 Indicators on the SPB Board
Refer to Appendix A
Refer to Appendix A

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
and an alarm is
Board removal
indicator
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.

board operates in
ACT Green
standby state.
5-127

Not lit: indicates

that the E1/T1 link
is not configured in the
database.
in the database but the
link is not reachable.
16-channel E1 link Flashing at 1 Hz:
L1-L16 Green
indicator indicates that the E1/T1
link is configured in the
database and the link
is reachable.
Flashing at 5 Hz:
indicates that the
E1/T1 link is already
configured in the
database.
5.3.30.7 DIP Switches on the SPB Board

For DIP switch descriptions of the SPB board, refer to Table 5-80.
Table 5-80 DIP Switches on the SPB Board
Settings
DIP Switch
setting the
S3-S6 matching receive
impedance of
each E1 channel.
Used for setting Short haul ON ON ON ON

the working
S1 long-haul and
Long haul OFF OFF OFF OFF
short-haul status
of each E1 chip.
setting the
S2 matching receive
impedance of
each E1 chip.
5-128

Chapter 5 Board
1. S3-S6 are used for setting the matching receive impedance of each E1 channel. OFF
indicates that the matching impedance is 120 Ω and ON indicates that the matching
impedance is 75 Ω.
l Channels 1 thru 4 of S3 represent E1 channels 1 thru 4 of the SPB board.
2. S1 and S2 are used for setting the long-haul and short-haul status of the E1 chip and
its matching receive impedance. The CPU reads the status and initializes the E1 chip
in accordance with the status.
Channels 1 thru 4 of S1 and S2 represent parts 1 thru 4 of the E1 chip, that is, E1
channels 1 thru 4, 5 thru 8, 9 thru 12, and 13 thru 16.
l S1: OFF indicates the long haul and ON indicates the short haul.
l S2: OFF indicates that the matching impedance is 120 Ω and ON indicates that
the matching impedance is 75 Ω.
5.3.31 SPB2 Board

5.3.31.1 SPB2 Board Functions
The SPB2 board is classified into three function boards:
l LAPD processing board LAPD2
Processes LAPD signaling.
l Signaling processing board SPB2
Processes MTP2 and X.25 packets and extracts 8K synchronization clock from lines.
l Gb interface processing board GIPB2
Processes FR, NS, and BSSGP packets of the GPRS and supports Gb interfaces.
5.3.31.2 SPB2 Board Principle

For the SPB2 board principle, see Figure 5-55.
Figure 5-55 SPB2 Board Principle
The function modules of the SPB2 board are described as follows:

l Interface unit
5-129

Connects to the circuit switch unit and provides an E1 interface.

Switches the circuits of the interface unit and backplane.
l CPU unit
Implements signaling processing, board management, and internal connection
control.
l Control plane switching unit
Exchanges control plane data and provides a control plane FE interface.
l User plane switching unit
Exchanges user plane data and provides a user plane FE interface.
5.3.31.3 SPB2 Board Panel

For the SPB2 board panel, see Figure 5-56.
5-130

Chapter 5 Board
Figure 5-56 SPB2 Board Panel
5.3.31.4 External Interfaces on the SPB2 Board

The SPB2 board has no external interface.
5.3.31.5 Buttons on the SPB2 Board

For a description of the buttons on the SPB2 board, refer to Table 5-81.
Table 5-81 Buttons on the SPB2 Board
Button Description
RST Reset switch
5-131

5.3.31.6 Indicators on the SPB2 Board

For a description of the indicators on the SPB2 board, refer to Table 5-82.
Table 5-82 Indicators on the SPB2 Board
Refer to Appendix A
Refer to Appendix A

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
and an alarm is
Board removal
indicator
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.

board operates in
ACT Green
standby state.
5-132

Chapter 5 Board
Not lit: indicates

that the E1/T1 link
is not configured in the
database.
in the database but the
link is not reachable.
16-channel E1 link Flashing at 1 Hz:
L1-L16 Green
indicator indicates that the E1/T1
link is configured in the
database and the link
is reachable.
Flashing at 5 Hz:
indicates that the
E1/T1 link is already
configured in the
database.
5.3.32 UIMC Board

5.3.32.1 UIMC Board Functions
The UIMC board provides the following functions:
l Implement L2 Ethernet changeover in the control shelf and switch shelf, and control
shelf management.
l Provides an inner GE interface, used for cascading the CHUB board in the control
shelf.
l Supports the clock driving function in the control shelf and switch shelf. After being
phase-locked and driven, the input 8K and 16M signals are distributed to each slot of
the control shelf and switch shelf. This provides clock reference for the shelves.
l Provides management interfaces inside the control shelf and switch shelf, and imple-
ments board resetting and resetting signal collection.
5.3.32.2 UIMC Board Principle

For the UIMC board principle, see Figure 5-57.
5-133

Figure 5-57 UIMC Board Principle
The function modules of the UIMC board are described as follows:

l CPU unit
management, and resource shelf/GB resource shelf management.
Provides debugging, active, and standby Ethernet interfaces.
l Logic unit
Implements control-plane Ethernet changeover in the control shelf or switch shelf.
5.3.32.3 UIMC Board Panel

For the UIMC board panel, see Figure 5-58.
5-134

Chapter 5 Board
Figure 5-58 UIMC Board Panel
5.3.32.4 External Interfaces on the UIMC Board

The UIMC board has no external interface.
5.3.32.5 Buttons on the UIMC Board

For a description of the buttons on the UIMC board, refer to Table 5-83.
Table 5-83 Buttons on the UIMC Board
Button Description
RST Reset switch
5-135

5.3.32.6 Indicators on the UIMC Board

For a description of the indicators on the UIMC board, refer to Table 5-84.
Table 5-84 Indicators on the UIMC Board
Refer to Appendix A

board operates in
ACT Green
standby state.
Refer to Appendix A

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
and an alarm is
Board removal
indicator
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.
5-136

Chapter 5 Board
Lit: indicates that

the control-plane
cascading 100M
Status indicators interfaces 1 to 10
for control-plane are connected.
LINK1-10 Green
cascading 100M
interfaces 1 to 10
are not connected.
5.3.33 UIMU Board

5.3.33.1 UIMU Board Functions
The UIMU board provides the following functions:
l Supports L2 Ethernet changeover in the resource shelf, circuit domain timeslot
multiplexing and changeover, resource shelf management, and provides external
interfaces.
l Supports the clock driving function in the resource shelf. After being phase-locked
and driven, the input 8K and 16M signals are distributed to each slot of the resource
shelf. This provides clock reference for the resource shelf.
l Supports resource shelf management, provides RS485 management interfaces inside
the resource shelf, and implements board resetting and resetting signal collection.
5.3.33.2 UIMU Board Principle

For the UIMU board principle, see Figure 5-59.
5-137

Figure 5-59 UIMU Board Principle
The function modules of the UIMU board are described as follows:

l CPU unit
management, and resource shelf management.
Provides debugging, active, and standby Ethernet interfaces.
l Logic unit
l Timeslot switching unit
Implement 16K circuit changeover and provides an inner circuit switch network for the
resource shelf.
Implements user plane and control plane Ethernet changeover in the resource shelf.
5.3.33.3 UIMU Board Panel

For the UIMU board panel, see Figure 5-60.
5-138

Chapter 5 Board
Figure 5-60 UIMU Board Panel
5.3.33.4 External Interfaces on the UIMU Board

For a description of the external interfaces on the UIMU board, refer to Table 5-85.
Table 5-85 External Interfaces on the UIMU Board

RX1/TX1 Bidirectional interface, used for connecting to
the GLI/GLI4 board

RX2/TX2 Bidirectional interface, used for connecting to
the GLI/GLI4 board
5-139

5.3.33.5 Buttons on the UIMU Board

For a description of the buttons on the UIMU board, refer to Table 5-86.
Table 5-86 Buttons on the UIMU Board
Button Description
RST Reset switch
5.3.33.6 Indicators on the UIMU Board

For a description of the indicators on the UIMU board, refer to Table 5-87.
Table 5-87 Indicators on the UIMU Board
Refer to Appendix A

board operates in
ACT Green
standby state.
Refer to Appendix A

fully seated and no
Flashing at 5 Hz:
indicates that a
Board removal micro switch alarm
ENUM Yellow
indicator is reported. The micro
switch is turned on
and an alarm is
reported.
Flashing at 1 Hz:
can be removed. If
5-140

Chapter 5 Board
the micro switch is

can be removed.
normal state.

group domain operates
in active state.
ACT-P Green Group domain indicator Not lit: indicates that
the group domain
operates in standby
state.

circuit domain operates
in active state.
ACT-T Green Circuit domain indicator Not lit: indicates that
the circuit domain
operates in standby
state.
Lit: indicates that

the control-plane
cascading 100M
LINK1-LINK4 Green
cascading 100M
connected.

is activated.
Status indicator for GE
ACT1 Green Not lit: indicates that
interface 1
the active optical
interface is not
activated.
5-141


is activated.
Status indicator for GE
ACT2 Green Not lit: indicates that
interface 2
the active optical
interface is not
activated.

optical signals.
SD1 Green Not lit: indicates that
for GE interface 1
the optical module
signals.

optical signals.
SD2 Green Not lit: indicates that
for GE interface 2
the optical module
signals.
5.3.34 UPPB Board

5.3.34.1 UPPB Board Functions
The UPPB board processes the data of user-plane protocols in A/Gb or Iu mode. The
protocols include BSSGP, PDCP, GTP_U, and Iu_UP.
5.3.34.2 UPPB Board Principle

For the UPPB board principle, see Figure 5-61.
5-142

Chapter 5 Board
Figure 5-61 UPPB Board Principle
The function modules of the UPPB board are described as follows:
l CPU unit
Manages the board, processes Gb signaling, and provides an external control-plane
FE interface.
l Logic unit
l DSP unit
Provides multiple DSP chips, processing user-plane core protocols.
Connects multiple DSP chips over Ethernet and provides an external user plane FE
interface.
l Clock unit
5.3.34.3 UPPB Board Panel

For the UPPB board panel, see Figure 5-62.
5-143

Figure 5-62 UPPB Board Panel
5.3.34.4 External Interfaces on the UPPB Board

The UPPB board has no external interface.
5.3.34.5 Buttons on the UPPB Board

For a description of the buttons on the UPPB board, refer to Table 5-88.
Table 5-88 Buttons on the UPPB Board
Button Description
RST Reset switch
5-144

Chapter 5 Board
5.3.34.6 Indicators on the UPPB Board

For a description of the indicators on the UPPB board, refer to Table 5-89.
Table 5-89 Indicators on the UPPB Board
Refer to Appendix A
Refer to Appendix A

fully seated and no
Flashing at 5 Hz:
indicates that a
micro switch alarm
switch is turned on
and an alarm is
Board removal
indicator
Flashing at 1 Hz:
can be removed. If
the micro switch is
can be removed.
normal state.

board operates in
ACT Green
standby state.
5-145

5.4 Rear Board

5.4.1 RCHB1 Board
5.4.1.1 RCHB1 Board Functions
The RCHB1 board provides external interfaces for the CHUB board.
5.4.1.2 RCHB1 Board Panel

The RCHB1 board has two versions: V040501 and V040502.
For the RCHB1 V040501 board panel, see Figure 5-63.
Figure 5-63 RCHB1 V040501 Board Panel
5-146

Chapter 5 Board
5.4.1.3 External Interfaces on the RCHB1 Board

For a description of the external interfaces on the RCHB1 V040501 board, refer to Table
5-90.
Table 5-90 External Interfaces on the RCHB1 V040501 Board
FE1-8 Bidirectional It is a control-plane interface

for connecting the UIMC board,
UIMU board, and GUIM board.


DEBUG-FE/232 Bidirectional It is a debugging network

interface or serial interface.
5-147

5-91.
Odd FE1-15 Bidirectional It is a control-plane interface



Odd FE43 and Odd FE45 are
reserved for Trunk.

5.4.2 RCHB2 Board

5.4.2.1 RCHB2 Board Functions
The RCHB2 board provides external interfaces for the CHUB board.
5.4.2.2 RCHB2 Board Panel

The RCHB2 board has two versions: V040501 and V040502.
5-148

Chapter 5 Board
5-149

5.4.2.3 External Interfaces on the RCHB2 Board

5-92.



FE43, FE44, FE45, and FE46
are reserved for Trunk.

5-150

Chapter 5 Board
5-93.
Even FE2-16 Bidirectional It is a control-plane interface



Even FE44 and Even FE46 are
reserved for Trunk.

5.4.3 RCKG1 Board

5.4.3.1 RCKG1 Board Functions
The RCKG1 board provides external interfaces for the CLKG (CLKG) board, CLKG (ICM)
board, and ICM board.
5.4.3.2 RCKG1 Board Panel

The RCKG1 board has two versions: V040503 and V071200.
For the RCKG1 V040503 board panel, see Figure 5-67.
5-151

Figure 5-67 RCKG1 V040503 Board Panel
5-152

Chapter 5 Board
5.4.3.3 External Interfaces on the RCKG1 Board

For a description of the external interfaces on the RCKG1 V040503 board, refer to Table
5-94.
Table 5-94 External Interfaces on the RCKG1 V040503 Board
CLKOUT Output Two CLKOUT interfaces,

providing six channels as clock
CLKOUT Output
output and providing clock
reference for six shelves
8 KIN1 Input 8K clock reference input

interface

interface
2 Mbps/2 MHz Input 2 Mbit/s or 2 MHz clock

reference input interface
5-95.
5-153


CLKOUT Output

interface
RS232 Bidirectional Debugging serial interface
BITS REF Input 2 Mbit/s or 2 MHz clock

5.4.4 RCKG2 Board

5.4.4.1 RCKG2 Board Functions
The RCKG2 board provides external interfaces for the CLKG (CLKG) board, CLKG (ICM)
board, and ICM board.
5.4.4.2 RCKG2 Board Panel

The RCKG2 board has two versions: V040502 and V071200.
5-154

Chapter 5 Board
5-155

5.4.4.3 External Interfaces on the RCKG2 Board

5-96.
CLKOUT Output Three CLKOUT interfaces,

providing nine channels as
CLKOUT Output
clock output and providing clock
CLKOUT Output
reference for nine shelves
PP2S/16CHIP Input GPS clock reference input,

connecting the external GPS
clock reference source
5-97.
5-156

Chapter 5 Board

CLKOUT Output

interface
RS232 Bidirectional Debugging serial interface
BITS REF Input 2 Mbit/s or 2 MHz clock

5.4.5 RDTB Board

5.4.5.1 RDTB Board Functions
The RDTB board provides external interfaces for the DTB board.
5.4.5.2 RDTB Board Panel

For the RDTB board panel, see Figure 5-71.
5-157

Figure 5-71 RDTB Board Panel
5.4.5.3 External Interfaces on the RDTB Board

For a description of the external interfaces on the RDTB board, refer to Table 5-98.
Table 5-98 External Interfaces on the RDTB Board
T1/E1 1-16 Bidirectional T1/E1 interface
8KOUT/DEBUG- 232 Output/Bidirectional 8K clock output

interface/debugging serial
interface
5.4.5.4 Jumpers on the RDTB Board

By default, the E1 lines of the RDTB board are configured to work in 75 Ω non-balanced
coaxial transmission mode. If the E1 lines are configured to work in 120 Ω PCM balanced
transmission mode, the short-circuit blocks on jumpers X9 thru X16 need to be removed.
5-158

Chapter 5 Board
5.4.6 RGER Board

5.4.6.1 RGER Board Functions
The RGER board provides external interfaces for the GIPI board and GIPI4 board.
5.4.6.2 RGER Board Panel

For the RGER board panel, see Figure 5-72.
Figure 5-72 RGER Board Panel
5.4.6.3 External Interfaces on the RGER Board

For a description of the external interfaces on the RGER board, refer to Table 5-99.
Table 5-99 External Interfaces on the RGER Board
GE1 Bidirectional GB Ethernet electrical interface,

MSC/MGW

reserved
5-159

DEBUG1-232 Bidirectional Debugging interface, reserved
DEBUG2-232 Bidirectional Debugging interface, reserved
5.4.7 RGER2 Board

5.4.7.1 RGER2 Board Functions
The RGER2 board provides external interfaces for the GIPI4 board.
5.4.7.2 RGER2 Board Panel

For the RGER2 board panel, see Figure 5-73.
Figure 5-73 RGER2 Board Panel
5.4.7.3 External Interfaces on the RGER2 Board

For a description of the external interfaces on the RGER2 board, refer to Table 5-100.
5-160

Chapter 5 Board
Table 5-100 External Interfaces on the RGER2 Board

MSC/MGW

reserved
DBG1-232 Bidirectional Debugging interface
8KOUT/DBG2-232 Output/Bidirectional Synchronous Ethernet 8K clock

output interface/debugging
serial interface
5.4.8 RGIM1 Board

5.4.8.1 RGIM1 Board Functions
The RGIM1 board provides 8K clock reference output interfaces for the SDTB board and
SDTB2 board.
5.4.8.2 RGIM1 Board Panel

For the RGIM1 board panel, see Figure 5-74.
5-161

Figure 5-74 RGIM1 Board Panel
5.4.8.3 External Interfaces on the RGIM1 Board

For a description of the external interfaces on the RGIM1 board, refer to Table 5-101.
Table 5-101 External Interfaces on the RGIM1 Board
8KOUT/DEBUG-232 Output/Bidirectional 8 K clock reference output

interface
5.4.9 RGUM1 Board

5.4.9.1 RGUM1 Board Functions
The RGUM1 board provides external interfaces for the GUIM board and GUIM2 board.
5.4.9.2 RGUM1 Board Panel

For the RGUM1 board panel, see Figure 5-75.
5-162

Chapter 5 Board
Figure 5-75 RGUM1 Board Panel
5.4.9.3 External Interfaces on the RGUM1 Board

For a description of the external interfaces on the RGUM1 board, refer to Table 5-102.
Table 5-102 External Interfaces on the RGUM1 Board
FE1 Bidirectional Used as a control-plane

cascading network interface
together with FE2 interface of
the RGUM2 board, connecting
to the CHUB board of the control
shelf
FE3 Bidirectional Independent external network

interface or debugging network
interface

interface
CLKIN Input Clock reference input interface,

used for connecting to the clock
board
5-163

DEBUG-232 Bidirectional Debugging serial interface
5.4.10 RGUM2 Board

5.4.10.1 RGUM2 Board Functions
The RGUM2 board provides external interfaces for the GUIM board and GUIM2 board.
5.4.10.2 RGUM2 Board Panel

For the RGUM2 board panel, see Figure 5-76.
Figure 5-76 RGUM2 Board Panel
5.4.10.3 External Interfaces on the RGUM2 Board

For a description of the external interfaces on the RGUM2 board, refer to Table 5-103.
5-164

Chapter 5 Board
Table 5-103 External Interfaces on the RGUM2 Board
FE2 Bidirectional Used as a control-plane

cascading network interface
together with FE1 interface
of the RGUMI board or as a
debugging network interface,
connecting to the CHUB board
of the control shelf

interface

interface

board
5.4.11 RMNIC Board

5.4.11.1 RMNIC Board Functions
The RMNIC board provides FE interfaces for the BIPI board, BIPI4 board, and GIPI board.
5.4.11.2 RMNIC Board Panel

For the RMNIC board panel, see Figure 5-77.
5-165

Figure 5-77 RMNIC Board Panel
5.4.11.3 External Interfaces on the RMNIC Board

For a description of the external interfaces on the RMNIC board, refer to Table 5-104.
Table 5-104 External Interfaces on the RMNIC Board
FE1 Bidirectional 100baseT electrical interface for

connecting to external NEs such
as BTS, SGSN, and MSC/MGW



DEBUG-FE Bidirectional Reserved
PrPMC232 Bidirectional Reserved
5-166

Chapter 5 Board
8KOUT/ARM232 Output/Bidirectional Debugging interface
5.4.12 RMPB Board

5.4.12.1 RMPB Board Functions
The RMPB board provides external interfaces for the OMP board and OMP2 board.
5.4.12.2 RMPB Board Panel

For the RMPB board panel, see Figure 5-78.
Figure 5-78 RMPB Board Panel
5.4.12.3 External Interfaces on the RMPB Board

For a description of the external interfaces on the RMPB board, refer to Table 5-105.
Table 5-105 External Interfaces on the RMPB Board
OMC1 Bidirectional Ethernet interface, reserved
5-167

OMC2 Bidirectional Ethernet interface, used for

connecting to the OMM
GPS485 Bidirectional GPS module interface, reserved
PD485 Bidirectional Monitoring interface, used

for connecting to the power
distribution subrack
RS232 Bidirectional Outband management serial

interface
DEBUG1-232 Bidirectional Debugging serial interface
DEBUG2-232 Bidirectional Debugging serial interface
5.4.13 RSPB Board

5.4.13.1 RSPB Board Functions
The RSPB board provides external interfaces for the SPB board and SPB2 board.
5.4.13.2 RSPB Board Panel

For the RSPB board panel, see Figure 5-79.
5-168

Chapter 5 Board
Figure 5-79 RSPB Board Panel
5.4.13.3 External Interfaces on the RSPB Board

For a description of the external interfaces on the RSPB board, refer to Table 5-106.
Table 5-106 External Interfaces on the RSPB Board
8KOUT/CPU1- RS232 Output/Bidirectional 8 K clock reference output

interface
CPU2-RS232 Bidirectional Debugging serial interface
5.4.13.4 Jumpers on the RSPB Board

By default, the E1 lines of the RSPB board are configured to work in 75 Ω non-balanced
coaxial transmission mode. If the E1 lines are configured to work in 120 Ω PCM balanced
transmission mode, the short-circuit blocks on jumpers X11 thru X14 need to be removed.
5-169

5.4.14 RSVB Board

5.4.14.1 RSVB Board Functions
The RSVB board provides external interfaces for the SBCX board and SBCX2 board.
5.4.14.2 RSVB Board Panel

The RSVB board has two versions: V060200 and V090300.
For the RSVB V060200 board panel, see Figure 5-80.
Figure 5-80 RSVB V060200 Board Panel
For the RSVB V090300 board panel, see Figure 5-81.
5-170

Chapter 5 Board
Figure 5-81 RSVB V090300 Board Panel
5.4.14.3 External Interfaces on the RSVB Board

For a description of the external interfaces on the RSVB V060200 board, refer to Table
5-107.
Table 5-107 External Interfaces on the RSVB V060200 Board
OMC1 Bidirectional GB Ethernet interface
OMP1 Bidirectional 100M Ethernet interface
HEART1 Bidirectional 100M Ethernet interface
HEART2 Bidirectional 100M Ethernet interface
RS232 Bidirectional Serial interface, reserved
For a description of the external interfaces on the RSVB V090300 board, refer to Table
5-108.
5-171

Table 5-108 External Interfaces on the RSVB V090300 Board
5.4.15 RUIM1 Board

5.4.15.1 RUIM1 Board Functions
The RUIM1 board provides external interfaces for the UIMU board.
5.4.15.2 RUIM1 Board Panel

For the RUIM1 board panel, see Figure 5-82.
Figure 5-82 RUIM1 Board Panel
5-172

Chapter 5 Board
5.4.15.3 External Interfaces on the RUIM1 Board

For a description of the external interfaces on the RUIM1 board, refer to Table 5-109.
Table 5-109 External Interfaces on the RUIM1 Board
FE C1/2 Bidirectional Control-plane cascading

network interface, used for
in the control shelf
FE C3/4 Bidirectional Control-plane cascading

FE-U Bidirectional Independent external network

interface

board
DEBUG-FE Bidirectional Debugging network interface
5.4.16 RUIM2 Board

The RUIM2 board provides external interfaces for the UIMC board.

5-173


FE1 Bidirectional Control-plane cascading



FE7 Bidirectional Used for trunk, reserved
5-174

Chapter 5 Board

board
5.4.17 RUIM3 Board

The RUIM3 board provides external interfaces for the UIMC board.


5-175





board
5.5 Backplane
5.5.1 BCTC Backplane
5.5.1.1 BCTC Backplane Structure
The BCTC is a control shelf backplane. Its has two versions: V040203 and V060201.
For the BCTC V040203 backplane structure, see Figure 5-85.
5-176

Chapter 5 Board
Figure 5-85 BCTC V040203 Backplane Structure
For the BCTC V060201 backplane structure, see Figure 5-86.
5-177

Figure 5-86 BCTC V060201 Backplane Structure
5.5.1.2 DIP Switches on the BCTC Backplane

For the BCTC V040203 backplane, configure DIP switches on the BCTC backplane. For
the BCTC V060201 backplane, configure DIP switches on the RBID board.
For the RBID board structure, see Figure 5-87.
5-178

Chapter 5 Board
Figure 5-87 RBID Board Structure
For DIP switch configuration of the BCTC board, refer to Table 5-112.
Table 5-112 DIP Switch Configuration of BCTC Board
DIP Switch Name Usage Settings
S1/X2 Used for configuring an office The office number is the value
number of three bits on the left of S1 or
at the bottom of X2.
S2/X3 Used for configuring a rack The rack number is the value of
number all four bits on S2 or X3 plus the
value 1.
S3/X4 Used for configuring a shelf The shelf number is the value
number of two bits on the left of S3 or at
the bottom of X4 plus the value
1.
5.5.2 BPSN Backplane

5.5.2.1 BPSN Backplane Structure
The BPSN is a packet switch shelf backplane. Its has two versions: V040203 and
V070200.
For the BPSN V040203 backplane structure, see Figure 5-88.
5-179

Figure 5-88 BPSN V040203 Backplane Structure
For the BPSN V070200 backplane structure, see Figure 5-89.
5-180

Chapter 5 Board
Figure 5-89 BPSN V070200 Backplane Structure
5.5.2.2 DIP Switches on the BPSN Backplane

The DIP switch configuration of the BPSN backplane is the same as that of the BCTC
backplane. For details, see "DIP Switches on the BCTC Backplane".
5.5.3 BUSN Backplane

5.5.3.1 BUSN Backplane Structure
The BUSN is a resource shelf backplane. Its has two versions: V040202 and V040203.
For the BUSN V040202 backplane structure, see Figure 5-90.
5-181

Figure 5-90 BUSN V040202 Backplane Structure
For the BUSN V040203 backplane structure, see Figure 5-91.
5-182

Chapter 5 Board
Figure 5-91 BUSN V040203 Backplane Structure
5.5.3.2 DIP Switches on the BUSN Backplane

The DIP switch configuration of the BUSN backplane is the same as that of the BCTC
5.5.4 BGSN Backplane

5.5.4.1 BGSN Backplane Structure
The BGSN is a GB resource shelf backplane. For its structure, see Figure 5-92.
5-183

Figure 5-92 BGSN Backplane Structure
5.5.4.2 DIP Switches on the BGSN Backplane

The DIP switch configuration of the BGSN backplane is the same as that of the BCTC
5-184

Chapter 6
Auxiliary Equipment
Table of Contents
Alarm Box (ALB) ........................................................................................................6-1
Relevant GPS Devices ...............................................................................................6-9
6.1 Alarm Box (ALB)

6.1.1 ALB Functions
ALB can timely, accurately, visibly show the faults of communication equipment, easy for
maintenance staff and troubleshooting.
In general, the ALB is located in equipment room, connected with the equipment
at background. The background will send the alarm information collected from the
foreground to the alarm box to give alarm indication.
Functions of Alarm Box (ALB) are as follows:
1. SMS
NetNumen U31 sends the alarm message to ALB after the alarm message is
generated. The alarm message is sent to BTS by radio modem and received by the
final user.
2. LCD screen
The ALB receives the alarm message from background server and indicates it on the
ALB (by alarm indicator). ALB panel indicators display the detailed alarm messages
and you can scroll it by page down/up.
3. File transfer
Transfer the data by dialing in the ALB. The file size shall be lower than 200 K.
4. Voice alarm
The ALB can prompt the current alarm by voice hint.
5. GPRS message delivery
Receive the data from background and deliver it to emergency center timely by GPRS.
The ALB is designed in modular theory. It can implement the audible and visible function
based on alarm severity. Depending on the configuration, it can finish some enhanced
functions to meet the different product requirements.
The functions that can be expanded are described as follows.
6-1

l Alarm display function

ALB can show the information about current alarms, including the location, time, and
alarm contents.
l Alarm message delivery function
ALB can transfer the current alarm information by cable or radio mode to inform the
maintenance staff.
l Alarm information query function
ALB can receive the remote query command, send current alarm information to
remote side, or send the primary parameters to show the current operation state.
l Multi-offices in one
The different equipment in an office can use a common ALB to indicate the alarm
information from different devices.
l Operation & Maintenance Function
There is HMI on ALB. You can set the parameters and do self-diagnosis or query.
l Remote Function
ALB can be placed in the on-duty room with a distance of several hundred meters
from the equipment room.
l GPS timing function
By using the timing function of GPS receiver, the ALB can provide the accurate
absolute time or stable clock reference for synchronization.
6.1.2 ALB Principle

Figure 6-1 shows the working principle of ALB board.
Figure 6-1 ALB Principle
6-2

Chapter 6 Auxiliary Equipment
Alarm box hardware includes five units.

1. Master unit
It is the core of alarm box, used to save OS, startup code and voice data. The space
for voice/word data is 8 MB and data storage space is 16 MB.
2. Interface Unit
The external interfaces of alarm box are as follows:
a. Ethernet interface
b. RS232 serial port
c. RS485 interface
d. Radio modem interface
e. Cable modem interface
f. GPS Interface
3. Man-machine Unit
It provides audible and visible alarm information and also provides the operation and
maintenance interface.
a. Alarm indicator
There are four alarm indicators, colored red, blue, yellow and green in order of
severity. When alarm occurs, the corresponding indicator will flash or be ON for a
long time.
There is no individual alarm indicator for environment alarm, but it is handled as
a certain level alarm.
b. Voice Alarm
The main control unit works in transparent HDLC mode, it sends the PCM voice
saved in FLASH to the PCM coder/decoder chip (CODEC) for coding, and the data
is converted to linear signal. Then the power amplifier drives the speaker, and the
audible alarm is realized.
The voice management at background realizes the voice recording, edit and
pre-play, and downloads the voice file into the FLASH of the alarm box.
c. LCD screen
LCM is used to display the alarm.

LCD is hung on the parallel bus of the master unit. LCM size is proper and it is
all-dots graphic display. Characters font size is controlled by software to display
different type of information.
LED has back facet power, which is generally OFF resulting in increased life of the
LED. When pressing the function button or displaying information, the back facet
power turns ON to display.
6-3

There are some function buttons on the alarm box, which realize the operation
and maintenance functions together with LCM.
4. Logic unit
Use EPLD to implement the required combinational and sequential logic.
5. Power supply unit
The input voltage of the alarm box is -48 V DC from the equipment room, and is
converted to +5 V, +3.3 V and other voltages for each unit by DC-DC power converter.
When the alarm box is in the duty room outside the equipment room, there may not be -48
V DC power, in this case, a external AC/DC power adapter is required to convert 110/220
V AC to 48 V DC, providing -48 V DC power to the alarm box. AC/DC power adaptor is an
optional accessory of the alarm box.
6.1.3 ALB Panel

Figure 6-2 shows the panel of alarm box.
Figure 6-2 ALB panel
The left top of the panel is the indicator in arc shape and the LCD screen is located in the
center of the panel.
6.1.4 ALB Interfaces

Figure 6-3 shows the interfaces of alarm box.
6-4

Figure 6-3 ALB Interfaces (on the Back)
1. Cable modem interface 5. MS antenna location 7. Power supply switch

2. Ethernet interface (connected with built-in
3. RS485 interface wireless modem)
4. RS232 serial port 6. Power supply interface
ZXG10 iBSC uses 2 to connect Hub and background EMS, 4 to download alarm box
versions, 6 to connect DC power supply, and 7 for power supply.
1. The alarm box comprises cover components, body components, PCB board,
apparatus, and assembly fasteners.
a. Cover components include LCD screen, buttons, indicators, and lamp plate.
b. Body components are the sheet-metal parts to mount the motherboard and
speakers.
c. PCB comprises motherboard, lamp plate, keyboard, and modem board.
d. Apparatus contains LCD screen, indicators, buttons, switches, RJ11, RJ45, DB9,
earphone hole, mobile antenna, GPS interface, 48V socket, and speakers.
e. Alarm box is locked.
f. The outline dimensions of an alarm box is: 220 mm x 310 mm x 58 mm (H x W x
D)
2. Interface Description
The relevant interfaces on the alarm box board are described in Table 6-1
Table 6-1 Relevant interfaces on ALB board
Location Interface Description
This interface connects the Ethernet receiver in 10 Mbps, com-

municates with foreground and background via TCP/IP, and re-
ceives the alarm information while the master unit is working in
Ethernet interface Ethernet mode.
This interface provides the standard EIA/TIA232-C interface,

communicates with foreground and background, and receives
the system alarm information while the master unit is working in
RS232 serial port UART mode.
This interface provides the external RS485 busbar,

communicates with foreground and background, and receives
the system alarm information while the master unit is working
RS485 interface
Box back in UART mode.
6-5

Location Interface Description
Another function of RS485 interface is to cascade the alarm

boxes, implements remote function, and transfers the alarm
information received in local alarm box to the next alarm box
via RS485 interface (currently, ZXG10 iBSC does not use this
interface).
This interface communicates with radio modem module via

RS232 serial port and implements the radio transmission of
alarm information while the master unit is working in UART
mode.
The working mode of radio MODEM module is GSM or CDMA.
Its transmission performance shall be compliant with the
Radio modem in- specification requirements (currently, ZXG10 iBSC does not
terface use this interface).
The parallel bus of the master unit attaches cable MODEM chip,
to provide the external cable modem interface and to implement
Cable modem in- the cable transmission of alarm information (currently, ZXG10
terface iBSC does not use this interface).
This interface communicates with GPS receiver via RS233 se-

rial port, receives the GPS signal, and provides the accurate ab-
GPS interface solute time and stable clock reference for synchronization while
(RS232 serial the master unit is working in UART mode (currently, ZXG10
port) iBSC does not use this interface).
6.1.5 ALB Buttons

Table 6-2 shows the buttons on ALB panel.
Table 6-2 ALB Panel Buttons
Name Description
M To select the menu
→ To move the cursor left when inputting the number.
← To move the cursor right when inputting the number.
↑ To select the menu, page up, or add 1 for the number
↓ To select the menu, page up, or reduce 1 for the number
C To return to the menu or to clear the input
OK To confirm the operation
RST To reset the ALB system
MUTE To mute/de-mute ALB
6-6

6.1.6 ALB Indicators

Table 6-3 explains the ALB indicators.
Table 6-3 Description of ALB Indicators
Name Color Meaning Description
ON: indicates that the

EMERGENCY Red Level-1 alarm indicator level-1 alarm exists.

IMPORTANT Blue Level-2 alarm indicator level-2 alarm exists.

COMMON Yellow Level-3 alarm indicator level-3 alarm exists.

NOTIFICATION Green Level 4 alarm indicator level-4 alarm exists.
Bell on/off state indica- ON: indicates that the

MUTE Green tor trumpet is turned off.

network is connected.
Flashing: indicates
Network connection in- that the Ethernet link is
LINK Green dicator normal.
Flashing in 1 Hz: in-

Program running indi- dicates that the ALB is
RUN Green cator running normally.
6.1.7 Connection Mode

ALB includes the following connection modes: basic connection mode and expansion
connection mode.
1. Basic connection mode
Figure 6-4 shows the ALB basic connection mode.
6-7

Figure 6-4 Basic connection mode of ALB
2. Expansion connection mode

If the server’s IP address and ALB’s IP address are in the same network segment, the
server is called near-end server. If the server’s IP address and ALB’s IP address are
in different network segments, the server is called remote server.
ALB can be connected with the near-end server as well as the remote server. When
ALB is connected with the remote server, relevant route must be added in ALB, and
on-site alarms are received through the data network. This connection mode is called
expansion connection mode.
Figure 6-5 shows the expansion connection mode of ALB when NetNumen U31 server
is located at iBSC.
Figure 6-5 Expansion connection mode of ALB
ALB expansion function enables ALB to be installed in remote areas and connected
to the remote server, and receives on-site alarms through the data network. One ALB
can simultaneously connect five background servers at most.
6-8

6.2 Relevant GPS Devices

Global Position System (GPS) provides the clock and frequency reference for ZXG10 iBSC
system. It also provides GPS satellite signal for the system to realize the Assisted Global
Position System (AGPS).
The GPS antenna feeder system can be realized by the following two solutions:
l Direct Feeder Cable
l Indoor Forwarding Scheme
6.2.1 GPS Active Antenna and Lightning Protector/Frequency

Divider
In feeder cable direct-connection solution and indoor forwarding solution, both the GPS
active antenna and the lightning protector/frequency divider are used.
In feeder cable direct-connection solution, the GPS active antenna is used as outdoor
receiving antenna; while in indoor forwarding solution, the GPS active antenna is used as
indoor receiving antenna.
Function Description
The GPS antenna receives GPS satellite navigation and positioning signals, and
demodulates the frequency, clock signal, and AGPS information through GPS signal
receiver. The clock signal is sent to relevant units in ZXG10 iBSC system while the AGPS
information is sent to the processing unit.
The GPS antenna lightning protector/frequency divider uses dual-frequency-dividing
coaxial cable protector, which is installed at the connector between communication
equipment and coaxial cable, or at lightning protection devices between two
communication equipments. It effectively prevents damages due to temporary
over-voltage caused by lightning induction.
The GPS antenna lightning protector/frequency divider adopts the high-frequency filter
principle and performs three-level protection for the DC feed channel. The RF insertion
loss is small, the discharge current is large, and the measured limiting voltage is low. It is
an ideal protection device for various public antenna communication equipments.
Device Description
1. Figure 6-6 shows the active GPS antenna.
6-9

Figure 6-6 Active GPS Antenna
1. GPS antenna 4. Feeder Cable 7. Binding tape

2. Installation fixing board 5. Pole
3. Installation tube 6. Fixing component
2. Figure 6-7 shows the GPS antenna lightning protector/frequency divider.
Figure 6-7 GPS Antenna Lightning Protector/Frequency Divider
Wiring Description
Figure 6-8 shows connections between ICM, GPS active antenna, and GPS antenna
lightning protector/frequency divider (fixed on the cabinet top).
6-10

Figure 6-8 Connection of ICM, Active GPS Antenna, and Lightning Protector/Frequency
Divider
1. GPS antenna
2. GPS Antenna Lightning
Protector/Frequency
Divider
Technical Parameters
1. Table 6-4 shows the technical parameters of active GPS antenna.
Table 6-4 Technical Parameters of Active GPS antenna
Parameter Specification
Frequency range 1575±5 MHz
Gain 38±2 dBi
DC voltage 4.5 ~ 6 V
DC current <35 mA
Antenna interface N (F) type
2. Table 6-5 shows the technical parameters of GPS antenna lightning

protector/frequency divider.
Table 6-5 Technical parameters of GPS antenna lightning protector/frequency

divider
Frequency range 1500~1600 MHz
Characteristic impedance 50 ohms
Insertion loss ≤ 4 dB
Standing wave ratio (VSWR) ≤ 1.2
Rated current 10 KA (8/20 μs)
Water-proof grade IP65
The input is N-F while the two outputs are

Interface Type SMA-F
Installation Mode Installing through the hole
6-11

The cross-sectional area of the grounding cable

Grounding cable must be larger than 6 mm2.
6.2.2 GPS L1 Signal Transponder and GPS Antenna Feeder

Lightning Protector
In indoor forwarding solution, the GPS L1 signal transponder and the GPS antenna feeder
lightning protector are used.
GPS L1 Signal Transponder

The GPS L1 signal transponder consists of three parts: GPS L1 outdoor receiving antenna,
GPS L1 indoor transmitting antenna, and GPS L1 signal controller.
1. Table 6-6 describes technical parameters of the GPS L1 outdoor receiving antenna.
Table 6-6 Technical parameters of GPS L1 outdoor receiving antenna
Frequency range 1575.42 MHz ± 10 MHz
Standing wave ratio (VSWR) less than 1.5
Gain 45 dB ± 2 dB
Polarization mode Clockwise circular polarization
Working temperature -45℃ ~ +65℃
Storage temperature -55℃ ~ +85℃
Connectors TNC
Cable length 100 m ± 0.2 m
2. Table 6-7 describes technical parameters of the GPS L1 indoor transmitting antenna.
Table 6-7 Technical parameters of GPS L1 outdoor transmitting antenna
Frequency range 1575 MHz±10 MHz
Gain 26 dB ± 2 dB
6-12

Connectors TNC
Cable length 10 m
Signal coverage range ≥ 200 m2
3. Table 6-8 describes technical parameters of the GPS L1 signal controller.
Table 6-8 Technical parameters of GPS L1 signal controller
Frequency range 1575 MHz ± 10 MHz
Noise Coefficient ≤ 1.5 dB
Gain 2 dB ± 2 dB, 16 dB ± 2 dB, 26 dB ± 2 dB
Voltage 220 VAC
Current 80 mA
Connectors TNC
GPS Antenna Feeder Lightning Protector

Table 6-9 shows the technical parameters of GPS antenna feeder lightning protector.
Table 6-9 Technical parameters of GPS antenna feeder lightning protector
Frequency range 1500~1600 MHz
Insertion loss ≤ 0.2 dB
Max transmission power ≤ 50 W
DC voltage 5.5 V
Rated current 10 KA (8/20 μs)
Remained voltage 20 V
Water-proof grade IP65
Interface Type The input is N-F.
Installation Mode Installing through the wall; installing by the copper lug
6-13

The cross-sectional area of the grounding cable must be

Grounding cable larger than 6 mm2.
6-14

Appendix A
Description of Combined
Indicator Status
The board in the iBSC system indicates the different states through combination of RUN
and ALM indicators. For specific meaning about combination of RUN and ALM indicators,
refers to Table A-1.
Table A-1 Combination Meanings of RUN and ALM Indicators
State name RUN status Alarm status Meaning
Periodically flashing
Running normally at 1 Hz Always OFF Normal running
at 5 Hz Always OFF Version being downloaded
Version download fails: the

Periodically flashing Periodically flashing board version is inconsistent with
at 1 Hz at 5 Hz the configuration.
RELEASE version indicates that

VERSION Down- the version download succeeds
loading Always ON Always OFF and the version is being started.
Always OFF at 5 Hz Board self-test failure.
Periodically flashing Operation support system

Self-test fails Always OFF at 2 Hz startup failure.
Periodically flashing Periodically flashing

at 5 Hz at 5 Hz Logical address obtaining failure.
Periodically flashing Periodically flashing Basic process power-on failure

at 5 Hz at 2 Hz or timeout.

at 5 Hz at 1 Hz Core data area initialization.
Periodically flashing Periodically flashing Version and hardware are incon-

at 5 Hz at 0.5 Hz sistent with the configuration.
Alarm on running Periodically flashing Periodically flashing Media plane communication is

faults at 2 Hz at 5 Hz disconnected.
A-1

State name RUN status Alarm status Meaning

at 2 Hz at 2 Hz HW is disconnected.

at 1 Hz at 2 Hz Link break with OMP.
Periodically flashing Periodically flashing Active/standby changeover is be-

at 1 Hz at 1 Hz ing performed.
at 1 Hz Always ON Hardware clock is lost.
A-2

Figures
Figure 2-1 Cabinet Appearance ................................................................................ 2-1
Figure 2-2 Cabinet Structure..................................................................................... 2-2
Figure 2-3 Cabinet Top Appearance.......................................................................... 2-3
Figure 2-4 Cabinet Top Structure .............................................................................. 2-4
Figure 2-5 Top Shelf Component Structure ............................................................... 2-5
Figure 2-6 Wire Out Module Structure....................................................................... 2-6
Figure 2-7 Top Fan Structure .................................................................................... 2-7
Figure 2-8 Top Filter Structure .................................................................................. 2-8
Figure 2-9 Wire Reel Structure.................................................................................. 2-9
Figure 2-10 Label Location ....................................................................................... 2-9
Figure 2-11 Rack Structure ..................................................................................... 2-10
Figure 2-12 Busbar Structure.................................................................................. 2-11
Figure 2-13 Cabinet Configuration .......................................................................... 2-13
Figure 2-14 Cabinet Cabling (Left View).................................................................. 2-14
Figure 2-15 Dissipation Air Duct of the ZXG10 iBSC............................................... 2-16
Figure 3-1 Power Distribution Subrack Structure....................................................... 3-1
Figure 3-2 Front Panel of Power Distribution Subrack ............................................... 3-2
Figure 3-3 Rear Panel of Power Distribution Subrack ............................................... 3-2
Figure 3-4 General PWRD Structure......................................................................... 3-5
Figure 3-5 PWRD Board Panel ................................................................................. 3-6
Figure 3-6 Jumpers on PWRD Board........................................................................ 3-7
Figure 3-7 Fan Subrack Structure ............................................................................. 3-7
Figure 3-8 Front Panel of Fan Subrack ..................................................................... 3-8
Figure 3-9 Rear Panel of Fan Subrack...................................................................... 3-8
Figure 4-1 Shelf Location (GB Resource Shelf)......................................................... 4-2
Figure 4-2 Shelf Location (Resource Shelf)............................................................... 4-2
Figure 4-3 Typical Board Configuration of Control Shelf ............................................ 4-3
Figure 4-4 Typical Board Configuration of Packet Switching Shelf............................. 4-4
Figure 4-5 Board Configuration of Resource Shelf .................................................... 4-5
Figure 4-6 Typical Board Configuration of Control Shelf ............................................ 4-6
Figure 4-7 Typical Board Configuration of Packet Switching Shelf............................. 4-7
Figure 4-8 Board Configuration of GB Resource Shelf .............................................. 4-8
I

Cabinet, Resource Shelf) ........................................................................ 4-9
Figure 4-10 Schematic Drawing of Control-Plane Ethernet Interconnection (Single
Cabinet, Resource Shelf) ...................................................................... 4-10
Resource Shelf) .................................................................................... 4-11
Figure 4-13 Schematic Drawing of Clock Extraction and Distribution (Dual Cabinet,
Resource Shelf) .................................................................................... 4-13
Figure 4-14 Schematic Drawing of Control-Plane Ethernet Interconnection (Dual
Resource Shelf) .................................................................................... 4-14
Cabinet, GB Resource Shelf) ................................................................ 4-16
Figure 4-18 Schematic Drawing of Control-Plane Ethernet Interconnection (Single
GB Resource Shelf) .............................................................................. 4-18
Figure 4-21 Schematic Drawing of Clock Extraction and Distribution (Dual Cabinet,
GB Resource Shelf) .............................................................................. 4-20
Figure 4-22 Schematic Drawing of Control-Plane Ethernet Interconnection (Dual
Figure 4-23 Schematic Drawing of User-Plane Interconnection (Dual Cabinet, GB
Resource Shelf) .................................................................................... 4-21
Figure 5-1 Board Installation Relationship................................................................. 5-1
Figure 5-2 BIPI Board Principle................................................................................. 5-2
Figure 5-3 BIPI Board Panel ..................................................................................... 5-3
Figure 5-4 BIPI4 Board Panel ................................................................................... 5-6
Figure 5-5 CHUB Board Principle ............................................................................. 5-8
Figure 5-6 CHUB Board Panel .................................................................................. 5-9
Figure 5-7 CLKG (CLKG) Board Principle ............................................................... 5-12
II
Figures
Figure 5-8 CLKG (CLKG) Board Panel ................................................................... 5-13

Figure 5-9 CLKG (ICM) Board Principle .................................................................. 5-18
Figure 5-10 CLKG (ICM) Board Panel..................................................................... 5-19
Figure 5-11 CMP Board Principle ............................................................................ 5-24
Figure 5-12 CMP Board Panel ................................................................................ 5-25
Figure 5-13 CMP2 Board Panel .............................................................................. 5-29
Figure 5-14 DTB Board Principle ............................................................................ 5-32
Figure 5-15 DTB Board Panel ................................................................................. 5-33
Figure 5-16 DTEC Board Principle .......................................................................... 5-37
Figure 5-17 DTEC Board Panel .............................................................................. 5-38
Figure 5-18 EIPI Board Principle............................................................................. 5-41
Figure 5-19 EIPI Board Panel ................................................................................. 5-42
Figure 5-20 EIPI4 Board Panel ............................................................................... 5-45
Figure 5-21 ESDT Board Principle .......................................................................... 5-47
Figure 5-22 ESDT Board Panel............................................................................... 5-48
Figure 5-23 ESDT2 Board Principle ........................................................................ 5-51
Figure 5-24 ESDT2 Board Panel............................................................................. 5-52
Figure 5-25 GLI Board Principle.............................................................................. 5-55
Figure 5-26 GLI Board Panel .................................................................................. 5-56
Figure 5-27 GLI4 Board Panel ................................................................................ 5-60
Figure 5-28 GIPI Board Principle ............................................................................ 5-63
Figure 5-29 GIPI Board Panel ................................................................................. 5-64
Figure 5-30 GIPI4 Board Principle .......................................................................... 5-67
Figure 5-31 GIPI4 Board Panel ............................................................................... 5-68
Figure 5-32 GUIM Board Principle .......................................................................... 5-72
Figure 5-33 GUIM Board Panel............................................................................... 5-73
Figure 5-34 GUIM2 Board Panel............................................................................. 5-77
Figure 5-35 GUP Board Principle............................................................................ 5-81
Figure 5-36 GUP Board Panel ................................................................................ 5-83
Figure 5-37 GUP2 Board Principle .......................................................................... 5-86
Figure 5-38 GUP2 Board Panel .............................................................................. 5-87
Figure 5-39 ICM Board Principle ............................................................................. 5-89
Figure 5-40 ICM Board Panel ................................................................................. 5-91
Figure 5-41 OMP Board Principle ........................................................................... 5-97
Figure 5-42 OMP Board Panel ................................................................................ 5-99
III
Figure 5-43 OMP2 Board Panel ............................................................................ 5-103

Figure 5-44 PSN Board Principle .......................................................................... 5-107
Figure 5-45 PSN Board Panel............................................................................... 5-108
Figure 5-46 SBCX Board Principle ........................................................................ 5-110
Figure 5-47 SBCX Board Panel .............................................................................5-111
Figure 5-48 SBCX2 Board Panel .......................................................................... 5-114
Figure 5-49 SDTB Board Principle ........................................................................ 5-117
Figure 5-50 SDTB Board Panel............................................................................. 5-118
Figure 5-51 SDTB2 Board Principle ...................................................................... 5-121
Figure 5-52 SDTB2 Board Panel........................................................................... 5-122
Figure 5-53 SPB Board Principle .......................................................................... 5-125
Figure 5-54 SPB Board Panel ............................................................................... 5-126
Figure 5-55 SPB2 Board Principle ........................................................................ 5-129
Figure 5-56 SPB2 Board Panel ............................................................................. 5-131
Figure 5-57 UIMC Board Principle ........................................................................ 5-134
Figure 5-58 UIMC Board Panel ............................................................................. 5-135
Figure 5-59 UIMU Board Principle ........................................................................ 5-138
Figure 5-60 UIMU Board Panel ............................................................................. 5-139
Figure 5-61 UPPB Board Principle ........................................................................ 5-143
Figure 5-62 UPPB Board Panel ............................................................................ 5-144
Figure 5-63 RCHB1 V040501 Board Panel ........................................................... 5-146
Figure 5-67 RCKG1 V040503 Board Panel........................................................... 5-152
Figure 5-71 RDTB Board Panel ............................................................................ 5-158
Figure 5-72 RGER Board Panel............................................................................ 5-159
Figure 5-73 RGER2 Board Panel.......................................................................... 5-160
Figure 5-74 RGIM1 Board Panel........................................................................... 5-162
Figure 5-75 RGUM1 Board Panel ......................................................................... 5-163
Figure 5-76 RGUM2 Board Panel ......................................................................... 5-164
Figure 5-77 RMNIC Board Panel .......................................................................... 5-166
IV
Figures
Figure 5-78 RMPB Board Panel............................................................................ 5-167

Figure 5-79 RSPB Board Panel ............................................................................ 5-169
Figure 5-80 RSVB V060200 Board Panel ............................................................. 5-170
Figure 5-81 RSVB V090300 Board Panel ............................................................. 5-171
Figure 5-82 RUIM1 Board Panel ........................................................................... 5-172
Figure 5-85 BCTC V040203 Backplane Structure ................................................. 5-177
Figure 5-86 BCTC V060201 Backplane Structure ................................................. 5-178
Figure 5-87 RBID Board Structure ........................................................................ 5-179
Figure 5-88 BPSN V040203 Backplane Structure ................................................. 5-180
Figure 5-89 BPSN V070200 Backplane Structure ................................................. 5-181
Figure 5-90 BUSN V040202 Backplane Structure ................................................. 5-182
Figure 5-91 BUSN V040203 Backplane Structure ................................................. 5-183
Figure 5-92 BGSN Backplane Structure................................................................ 5-184
Figure 6-1 ALB Principle ........................................................................................... 6-2
Figure 6-2 ALB panel ................................................................................................ 6-4
Figure 6-3 ALB Interfaces (on the Back) ................................................................... 6-5
Figure 6-4 Basic connection mode of ALB ................................................................ 6-8
Figure 6-5 Expansion connection mode of ALB......................................................... 6-8
Figure 6-6 Active GPS Antenna .............................................................................. 6-10
Figure 6-7 GPS Antenna Lightning Protector/Frequency Divider ............................. 6-10
Figure 6-8 Connection of ICM, Active GPS Antenna, and Lightning
Protector/Frequency Divider ................................................................. 6-11
V
Figures

Tables
Table 3-1 Indicators on the Power Distribution Subrack............................................. 3-2
Table 3-2 Switches on the Power Distribution Subrack.............................................. 3-3
Table 3-3 External Interfaces on the Power Distribution Subrack............................... 3-4
Table 3-4 DIP Switches on the PWRD Board ............................................................ 3-6
Table 3-5 Indicators on the Fan Subrack ................................................................... 3-8
Table 3-6 External Interfaces on the Fan Subrack ..................................................... 3-9
Table 4-1 Shelf Classification .................................................................................... 4-1
Table 4-2 Board Configuration of Control Shelf ......................................................... 4-3
Table 4-3 Board Configuration of Packet Switching Shelf .......................................... 4-3
Table 4-4 Board Configuration of Resource Shelf...................................................... 4-4
Table 4-5 Board Configuration of Control Shelf ......................................................... 4-6
Table 4-6 Board Configuration of Packet Switching Shelf .......................................... 4-7
Table 4-7 Board Configuration of GB Resource Shelf................................................ 4-7
Table 5-1 Buttons on the BIPI Board ......................................................................... 5-3
Table 5-2 Indicators on the BIPI Board...................................................................... 5-4
Table 5-3 Buttons on the BIPI4 Board ....................................................................... 5-6
Table 5-4 Indicators on the BIPI4 Board .................................................................... 5-7
Table 5-5 Buttons on the CHUB Board.................................................................... 5-10
Table 5-6 Indicators on the CHUB Board................................................................. 5-10
Table 5-7 Buttons on the CLKG (CLKG) Board ....................................................... 5-13
Table 5-8 Indicators on the CLKG (CLKG) Board .................................................... 5-14
Table 5-9 DIP Switches on the CLKG (CLKG) Board .............................................. 5-17
Table 5-10 Buttons on the CLKG (ICM) Board......................................................... 5-20
Table 5-11 Indicators on the CLKG (ICM) Board...................................................... 5-20
Table 5-12 DIP Switches on the CLKG (ICM) Board................................................ 5-23
Table 5-13 Buttons on the CMP Board .................................................................... 5-26
Table 5-14 Indicators on the CMP Board................................................................. 5-26
Table 5-15 Buttons on the CMP2 Board .................................................................. 5-29
Table 5-16 Indicators on the CMP2 Board............................................................... 5-30
Table 5-17 Buttons on the DTB Board..................................................................... 5-34
Table 5-18 Indicators on the DTB Board ................................................................. 5-34
Table 5-19 DIP Switches on the DTB Board ............................................................ 5-36
VII
Table 5-20 Buttons on the DTEC Board .................................................................. 5-39

Table 5-21 Indicators on the DTEC Board ............................................................... 5-39
Table 5-22 DIP Switches on the DTEC Board ......................................................... 5-40
Table 5-23 Buttons on the EIPI Board ..................................................................... 5-43
Table 5-24 Indicators on the EIPI Board .................................................................. 5-43
Table 5-25 Buttons on the EIPI4 Board ................................................................... 5-45
Table 5-26 Indicators on the EIPI4 Board ................................................................ 5-46
Table 5-27 External Interfaces on the ESDT Board ................................................. 5-49
Table 5-28 Buttons on the ESDT Board .................................................................. 5-49
Table 5-29 Indicators on the ESDT Board ............................................................... 5-49
Table 5-30 External Interfaces on the ESDT2 Board ............................................... 5-53
Table 5-31 Buttons on the ESDT2 Board................................................................. 5-53
Table 5-32 Indicators on the ESDT2 Board ............................................................. 5-53
Table 5-33 External Interfaces on the GLI Board..................................................... 5-57
Table 5-34 Buttons on the GLI Board ...................................................................... 5-57
Table 5-35 Indicators on the GLI Board ................................................................... 5-57
Table 5-36 External Interfaces on the GLI4 Board ................................................... 5-60
Table 5-37 Buttons on the GLI4 Board .................................................................... 5-61
Table 5-38 Indicators on the GLI4 Board ................................................................. 5-61
Table 5-39 External Interfaces on the GIPI Board ................................................... 5-64
Table 5-40 Buttons on the GIPI Board..................................................................... 5-65
Table 5-41 Indicators on the GIPI Board ................................................................. 5-65
Table 5-42 External Interfaces on the GIPI4 Board.................................................. 5-68
Table 5-43 Buttons on the GIPI4 Board................................................................... 5-69
Table 5-44 Indicators on the GIPI4 Board................................................................ 5-69
Table 5-45 External Interfaces on the GUIM Board ................................................. 5-73
Table 5-46 Buttons on the GUIM Board................................................................... 5-74
Table 5-47 Indicators on the GUIM Board ............................................................... 5-74
Table 5-48 External Interfaces on the GUIM2 Board ............................................... 5-78
Table 5-49 Buttons on the GUIM2 Board................................................................. 5-78
Table 5-50 Indicators on the GUIM2 Board ............................................................. 5-78
Table 5-51 Buttons on the GUP Board .................................................................... 5-83
Table 5-52 Indicators on the GUP Board ................................................................. 5-84
Table 5-53 Buttons on the GUP2 Board .................................................................. 5-87
Table 5-54 Indicators on the GUP2 Board ............................................................... 5-88
VIII
Tables
Table 5-55 External Interfaces on the ICM Board .................................................... 5-91

Table 5-56 Buttons on the ICM Board ..................................................................... 5-92
Table 5-57 Indicators on the ICM Board .................................................................. 5-92
Table 5-58 DIP Switches on the ICM Board ............................................................ 5-96
Table 5-59 External Interfaces on the OMP Board................................................... 5-99
Table 5-60 Buttons on the OMP Board.................................................................. 5-100
Table 5-61 Indicators on the OMP Board............................................................... 5-100
Table 5-62 Buttons on the OMP2 Board ................................................................ 5-103
Table 5-63 Indicators on the OMP2 Board............................................................. 5-104
Table 5-64 Buttons on the PSN Board................................................................... 5-108
Table 5-65 Indicators on the PSN Board ............................................................... 5-109
Table 5-66 External Interfaces on the SBCX Board ................................................5-111
Table 5-67 Buttons on the SBCX Board ................................................................ 5-112
Table 5-68 Indicators on the SBCX Board ............................................................. 5-112
Table 5-69 External Interfaces on the SBCX2 Board ............................................. 5-115
Table 5-70 Buttons on the SBCX2 Board .............................................................. 5-115
Table 5-71 Indicators on the SBCX2 Board ........................................................... 5-115
Table 5-72 External Interfaces on the SDTB Board ............................................... 5-118
Table 5-73 Buttons on the SDTB Board ................................................................ 5-119
Table 5-74 Indicators on the SDTB Board ............................................................. 5-119
Table 5-75 External Interfaces on the SDTB2 Board ............................................. 5-122
Table 5-76 Buttons on the SDTB2 Board............................................................... 5-123
Table 5-77 Indicators on the SDTB2 Board ........................................................... 5-123
Table 5-78 Buttons on the SPB Board................................................................... 5-126
Table 5-79 Indicators on the SPB Board ............................................................... 5-127
Table 5-80 DIP Switches on the SPB Board .......................................................... 5-128
Table 5-81 Buttons on the SPB2 Board................................................................. 5-131
Table 5-82 Indicators on the SPB2 Board.............................................................. 5-132
Table 5-83 Buttons on the UIMC Board ................................................................. 5-135
Table 5-84 Indicators on the UIMC Board.............................................................. 5-136
Table 5-85 External Interfaces on the UIMU Board................................................ 5-139
Table 5-86 Buttons on the UIMU Board ................................................................. 5-140
Table 5-87 Indicators on the UIMU Board.............................................................. 5-140
Table 5-88 Buttons on the UPPB Board ................................................................ 5-144
Table 5-89 Indicators on the UPPB Board ............................................................. 5-145
IX
Table 5-90 External Interfaces on the RCHB1 V040501 Board.............................. 5-147

Table 5-94 External Interfaces on the RCKG1 V040503 Board ............................. 5-153
Table 5-98 External Interfaces on the RDTB Board ............................................... 5-158
Table 5-99 External Interfaces on the RGER Board .............................................. 5-159
Table 5-100 External Interfaces on the RGER2 Board .......................................... 5-161
Table 5-101 External Interfaces on the RGIM1 Board ........................................... 5-162
Table 5-102 External Interfaces on the RGUM1 Board .......................................... 5-163
Table 5-103 External Interfaces on the RGUM2 Board .......................................... 5-165
Table 5-104 External Interfaces on the RMNIC Board ........................................... 5-166
Table 5-105 External Interfaces on the RMPB Board ............................................ 5-167
Table 5-106 External Interfaces on the RSPB Board ............................................. 5-169
Table 5-107 External Interfaces on the RSVB V060200 Board .............................. 5-171
Table 5-108 External Interfaces on the RSVB V090300 Board .............................. 5-172
Table 5-109 External Interfaces on the RUIM1 Board............................................ 5-173
Table 5-110 External Interfaces on the RUIM2 Board ............................................ 5-174
Table 5-111 External Interfaces on the RUIM3 Board ............................................ 5-176
Table 5-112 DIP Switch Configuration of BCTC Board .......................................... 5-179
Table 6-1 Relevant interfaces on ALB board ............................................................. 6-5
Table 6-2 ALB Panel Buttons .................................................................................... 6-6
Table 6-3 Description of ALB Indicators .................................................................... 6-7
Table 6-4 Technical Parameters of Active GPS antenna.......................................... 6-11
Table 6-5 Technical parameters of GPS antenna lightning protector/frequency
divider .................................................................................................... 6-11
Table 6-6 Technical parameters of GPS L1 outdoor receiving antenna.................... 6-12
Table 6-7 Technical parameters of GPS L1 outdoor transmitting antenna................ 6-12
Table 6-8 Technical parameters of GPS L1 signal controller.................................... 6-13
Table 6-9 Technical parameters of GPS antenna feeder lightning protector............. 6-13
Table A-1 Combination Meanings of RUN and ALM Indicators..................................A-1
X
Glossary
APS
- Automatic Protection Switching
BCTC
- Backplane of Control Center
BGSN
- Backplane of Giga universal Service Network
BPSN
- Backplane of Packet Switch Network
BSSAP
- Base Station Subsystem Application Part
BSSGP
- Base Station Subsystem GPRS Protocol
BUSN
- Backplane Of Universal Service Network
CAS
- Channel Associated Signaling
CCS
- Common Channel Signaling
CS
- Circuit Switched
GPRS
- General Packet Radio Service
GPS
- Global Positioning System
PS
- Packet Switched
PWRD
- Power Distributor
PWRDB
- POWER Distributor Backplane
XI

SJ-20110531095035-003-ZXG10 iBSC (V6.20.71) Hardware Description

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ZXG10 iBSC

Base Station Controller

Revision No. Revision Date Revision Reason

R3.0 2012-05-08 Third edition(V6.20.712)

R2.0 2011-10-31 Second edition(V6.20.711)

R1.0 2011-07-14 First edition(V6.20.710)

Serial Number: SJ-20110531095035-003

Publishing Date: 2012-5-8 (R3.0)

Chapter 2 Cabinet....................................................................................... 2-1

Chapter 3 Subrack...................................................................................... 3-1

Chapter 4 Shelf ........................................................................................... 4-1

Chapter 5 Board.......................................................................................... 5-1

Chapter 6 Auxiliary Equipment ................................................................. 6-1

Appendix A Description of Combined Indicator Status......................... A-1

What Is in This Manual

Chapter 1, Overview Describes the hardware of the ZXG10 iBSC.

Chapter 2, Cabinet Describes the appearance, structure, configuration, cabling, and

1.1 Product Description

The NetNumen U31 is a unified NE management system. It implements networkwide

1.2 Hardware Composition

SJ-20110531095035-003|2012-5-8 (R3.0) ZTE Proprietary and Confidential

This page intentionally left blank.

SJ-20110531095035-003|2012-5-8 (R3.0) ZTE Proprietary and Confidential

2.1 Cabinet Appearance

Figure 2-1 Cabinet Appearance

SJ-20110531095035-003|2012-5-8 (R3.0) ZTE Proprietary and Confidential

2.2 Cabinet Structure

Figure 2-2 Cabinet Structure

1. Cover 5. Service subrack 9. Side door

2.2.1 Cabinet Top

SJ-20110531095035-003|2012-5-8 (R3.0) ZTE Proprietary and Confidential

Figure 2-3 Cabinet Top Appearance

For the cabinet top structure, see Figure 2-4.

SJ-20110531095035-003|2012-5-8 (R3.0) ZTE Proprietary and Confidential

Figure 2-4 Cabinet Top Structure

1. Wire reel 4. Filter cover 7. Top shelf components

Top Shelf Components

SJ-20110531095035-003|2012-5-8 (R3.0) ZTE Proprietary and Confidential

Figure 2-5 Top Shelf Component Structure

Wire Out Module

SJ-20110531095035-003|2012-5-8 (R3.0) ZTE Proprietary and Confidential

Figure 2-6 Wire Out Module Structure

1. Wire out shelf 2. Wire out bars

SJ-20110531095035-003|2012-5-8 (R3.0) ZTE Proprietary and Confidential

Figure 2-7 Top Fan Structure

1. Monitoring circuit plate 2. Fan 3. Bottom installation plate

SJ-20110531095035-003|2012-5-8 (R3.0) ZTE Proprietary and Confidential

Figure 2-8 Top Filter Structure

1. Power input 2. Power output

SJ-20110531095035-003|2012-5-8 (R3.0) ZTE Proprietary and Confidential

Figure 2-9 Wire Reel Structure

1. Cover 2. Wire post 3. Bottom plate

2.2.2 Front and Rear Doors

Figure 2-10 Label Location

1. Office information label 2. Ranking number label

SJ-20110531095035-003|2012-5-8 (R3.0) ZTE Proprietary and Confidential

Figure 2-11 Rack Structure

1. Top shelf 3. Adjustable rail 5. Bottom shelf

SJ-20110531095035-003|2012-5-8 (R3.0) ZTE Proprietary and Confidential

Figure 2-12 Busbar Structure

SJ-20110531095035-003|2012-5-8 (R3.0) ZTE Proprietary and Confidential

2.3 Cabinet Configuration

SJ-20110531095035-003|2012-5-8 (R3.0) ZTE Proprietary and Confidential

Figure 2-13 Cabinet Configuration