energies

Article
A New Combined Boost Converter with Improved
Voltage Gain as a Battery-Powered Front-End
Interface for Automotive Audio Amplifiers
Ching-Ming Lai 1 ID
, Yu-Huei Cheng 2, * ID
, Jiashen Teh 3 ID
and Yuan-Chih Lin 4
1 Department of Vehicle Engineering, National Taipei University of Technology, 1, Sec. 3,
Chung-Hsiao E. Road, Taipei 106, Taiwan; pecmlai@gmail.com
2 Department of Information and Communication Engineering, Chaoyang University of Technology,
Taichung 41349, Taiwan
3 School of Electrical and Electronic Engineering, Universiti Sains Malaysia, USM Engineering Campus,
Nibong Tebal, Seberang Perai Selatan 14300, Penang, Malaysia; jiashenteh@usm.my
4 Department of Electrical Engineering, National Taiwan University, No. 1, Sec. 4, Roosevelt Rd., Taipei 106,
Taiwan; gero.lin1980@gmail.com
* Correspondence: yuhuei.cheng@gmail.com; Tel.: +886-4-2332-3000 (ext. 7712)

Received: 18 April 2017; Accepted: 28 July 2017; Published: 1 August 2017

Abstract: High boost DC/DC voltage conversion is always indispensable in a power electronic
interface of certain battery-powered electrical equipment. However, a conventional boost converter
works for a wide duty cycle for such high voltage gain, which increases power consumption and
has low reliability problems. In order to solve this issue, a new battery-powered combined boost
converter with an interleaved structure consisting of two phases used in automotive audio amplifier
is presented. The first phase uses a conventional boost converter; the second phase employs the
inverted type. With this architecture, a higher boost voltage gain is able to be achieved. A derivation
of the operating principles of the converter, analyses of its topology, as well as a closed-loop control
designs are performed in this study. Furthermore, simulations and experiments are also performed
using input voltage of 12 V for a 120 W circuit. A reasonable duty cycle is selected to reach output
voltage of 60 V, which corresponds to static voltage gain of five. The converter achieves a maximum
measured conversion efficiency of 98.7% and the full load efficiency of 89.1%.

Keywords: automotive audio amplifier; battery-powered; combined boost converter; voltage gain

1. Introduction
High boost DC/DC (direct current to direct current) voltage conversions are indispensable
in a power electronic interface of certain low-voltage DC-powered electrical devices, including
audio amplifiers [1–7], high intensity discharge (HID) lamps [8–14], uninterruptible power supplies
(UPS) [15–19], and electric vehicle systems [20–32]. For such high voltage gain application,
the conventional boost converter have to works for extremely wide duty cycle which increases power
consumption and has low reliability problems [32,33]. In order to overcome these problems, several
high boost converter DC/DC topologies have been presented. Franceschini et al. presented a DC/DC
boost converter topology that is a full-bridge architecture using a three-phase transformer and is well
suitable for high-power applications with battery supplies [5]. Zhao and Lee proposed a series of
high efficiency, high boost DC/DC converters that apply diodes and coupling windings instead of
active switches to achieve similar functions to active clamps [9,10]. In [11], Yang et al. presented
a transformerless DC/DC converter that consists of a boost converter paralleled with an inverting
boost and a floating diode-capacitor output rectifier. Though the voltage gain of the converter is

Energies 2017, 10, 1128; doi:10.3390/en10081128 www.mdpi.com/journal/energies

Energies 2017, 10, 1128 2 of 20

improved with the relative low-cost components, the input current ripple is large owing to the fact that
Energies
the active 2017, 10, 1128
switches are controlled simultaneously by using one control signal. Divakar et al. introduced 2 of 20

a circuit that can eliminate one auxiliary winding and can reduce the voltage on the primary side
improved with the relative low-cost components, the input current ripple is large owing to the fact
switch. Furthermore, with this circuit, the selection of switches with a lower rating is permitted [12].
that the active switches are controlled simultaneously by using one control signal. Divakar et al.
Shahin et al. proposed
introduced a cascade
a circuit that DC/DC
can eliminate oneconverter including
auxiliary winding andinterleaved
can reduce boost converters
the voltage on the with
two phases
primaryand sidethree level
switch. series boost
Furthermore, withconverters
this circuit,[23].
the The efficiency
selection and reliability
of switches with a lower of rating
this solution
is
are low. In [24], a cascaded boost converter regulated the reasonable
permitted [12]. Shahin et al. proposed a cascade DC/DC converter including interleaved boost voltage gain with a common
pulse-width
converters modulation
with two(PWM) phases control.
and three However, if a high
level series boostvoltage gain has
converters [23].to The
be offered,
efficiencymore andpower
reliability
switches of this solution
and capacitors are low.necessary.
are actually In [24], a cascaded
In addition, boost converterexceeding
although regulated duty the reasonable
cycles can be
voltagethe
prevented, gain withcurrent
input a common ripple pulse-width modulation
is large because of its(PWM) control. operation
single-phase However, if a highthe
makes voltage
converter
gain has to be offered, more power switches and capacitors are actually
not suitable for high current and low ripple applications. In order to further decrease the voltage necessary. In addition,
although exceeding duty cycles can be prevented, the input current ripple is large because of its
stress on active switches and electromagnetic interference (EMI), Lai presented a high boost converter
single-phase operation makes the converter not suitable for high current and low ripple
consisting of three-phase circuits by an auxiliary forward circuit [19]. However, the circuit structure
applications. In order to further decrease the voltage stress on active switches and electromagnetic
of this particular(EMI),
interference topology is costly aand
Lai presented highcomplex. Lai et consisting
boost converter al. also proposed a modular
of three-phase circuitsinterleaved
by an
boostauxiliary
converter that integrates a forward energy-delivering circuit with a voltage-doubler
forward circuit [19]. However, the circuit structure of this particular topology is costly to and
realize a
high complex.
voltage gain,Lai ettheal. reduced switch
also proposed voltage and
a modular high efficiency
interleaved for DC-microgrid
boost converter that integrates applications
a forward [31].
The characteristic
energy-delivering low circuit
ripplewith
of the interleaved boost
a voltage-doubler converter
to realize a highis responsible
voltage gain,for thethe attention
reduced switch placed
voltage and high
on investigations intoefficiency for DC-microgrid
this technology [28–31]. applications
Although many [31]. The characteristic
DC/DC converters low ripple of theboost
offer high
interleaved
voltage gain, theyboost haveconverter is responsible
the disadvantage for requiring
of either the attention placed circuit
a complex on investigations
structure orinto this
considerable
technology [28–31]. Although many DC/DC converters offer high boost
higher costs for the bill of material (BOM). It is therefore difficult to manufacture these circuits voltage gain, they have the in
disadvantage of either requiring a complex circuit structure or considerable higher costs for the bill
a batch manner [32,33].
of material (BOM). It is therefore difficult to manufacture these circuits in a batch manner [32,33].
To provide an appropriate solution, in this study, we introduce a combined boost converter
To provide an appropriate solution, in this study, we introduce a combined boost converter
topology. While
topology. Whilethe the
lowlowripple
ripple characteristics
characteristics that benefitfrom
that benefit frominterleaved
interleaved structures,
structures, this this simpler
simpler
and lower
and lowercostcost
topology
topology cancan
also
also give
giveananimproved voltagegain
improved voltage gainwhen
when comparing
comparing to ato a conventional
conventional
interleaved
interleavedboost converter
boost converter with
withtwo twophases.
phases. A A partial
partialstudy
studyand and analysis
analysis of aofbattery-powered
a battery-powered
combined boostboost
combined converter for automotive
converter for automotive audio amplifiers
audio amplifierswaswas presented
presented in [7], butbut
in [7], only a brief
only concept
a brief
concept was described therein. By contrast, this paper introduces a detailed analysis
was described therein. By contrast, this paper introduces a detailed analysis of the operation of this new of the operation
of thisand
topology newsimulated
topology and andsimulated
experimented and experimented
results for results for all its
all its modes ofmodes of operation.
operation. FigureFigure
1 shows 1 the
shows the studied audio amplifier architecture. In today's automotive framework, galvanic isolation
studied audio amplifier architecture. In today's automotive framework, galvanic isolation is no longer
is no longer required in automotive audio applications because the head unit of the amplifier’s
required in automotive audio applications because the head unit of the amplifier’s signal and the
signal and the power supply of the amplifier share a power ground [4]. As with the post-amplifier,
power supply of the amplifier share a power ground [4]. As with the post-amplifier, the pre-amplifier
the pre-amplifier is connected to a full-bridge class-D amplifier, which can output any voltage
is connected
waveformtotoa supplyfull-bridge class-D
the load. In theamplifier, which architecture
audio amplifier can outputstudied,
any voltage
the loadswaveform to supply
are primarily
the load. In the audio amplifier architecture studied, the loads are
speakers. The battery is connected to the combined boost converter, which is subsequentlyprimarily speakers. The battery is
connected to the combined boost converter, which is subsequently connected
connected to the full-bridge class-D amplifier. Finally, the full-bridge class-D amplifier is connected to the full-bridge class-D
to the Finally,
amplifier. load. the full-bridge class-D amplifier is connected to the load.

Figure Illustration
1. 1.
Figure Illustrationof
ofthe
the studied audioamplifier
studied audio amplifier architecture.
architecture.
Energies 2017,10,
Energies2017, 10,1128
1128 33of
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20

2. Converter Topology and Operation Principles

2. Converter Topology and Operation Principles
The proposed converter is used as an automotive battery-powered interface. The converter
The proposed
topology for the new converter
combinedis used
boostasconverter
an automotive
containsbattery-powered
two-phase circuits, interface.
as shown Theinconverter
Figure 2.
topology for the new combined boost converter contains two-phase circuits,
One is the boost circuit, which involves inductor L1, capacitor C1, active switch S1 and diode as shown in Figure
D1. The2.
One
otherisisthe
theboost circuit,
inverted which
boost involves
circuit, containsL1inductor
whichinductor , capacitorL2,Ccapacitor
1 , active switch
C2, active S1 and
switchdiode D1 .
S2, and
diode D2. The inductors L1 and L2 are amount to L, and the capacitors C1 and C2 are amount to C. CSo 2is,
The other is the inverted boost circuit, which contains inductor L 2 , capacitor C 2 , active switch
and diode D2 .output
the common The inductors L1 V
capacitor, and L2 are
i is the
amount
supply to L, and
voltage, Vo isthe
thecapacitors C1 andand
output voltage, C2 areRo amount to C.
is the output
Cload
o is the common output capacitor, Vi is the supply voltage, Vo is the output voltage, and Ro is the
resistance.
output load resistance.

Figure 2. Proposed
Figure 2. Proposed combined
combined boost
boost converter
converter topology.
topology.

The following
The following four
four assumptions
assumptions are are made
made in analyzing the proposed combined boost converter.
(1)For
(1) Forsimplicity,
simplicity,ititisisassumed
assumedthatthatall
allthe
thecomponents
componentsin inFigure
Figure22 are
are idealized;
idealized; (2)
(2) All
All voltages
voltages and
and
currents in the circuit are periodic in steady-state conditions; (3) For high boost conversion,
currents in the circuit are periodic in steady-state conditions; (3) For high boost conversion, the duty the duty
cycleof
cycle ofthe
the major
major switch
switch isis exceed
exceed 50%,
50%, which
which isis presented
presentedas as D,
D, and
and the
the switching
switching period
period is
is denoted
denoted
asTT
as s ;s ; (4)
(4) TheThe converter
converter works
works in in continuous
continuous conduction
conduction mode mode
(CCM). (CCM).
In the In the
combined combined
boost boost
converter,
converter,
all workingall working
modes and modes and their circuits
their equivalent equivalent circuits corresponding
corresponding to the ON/OFF to thestatus
ON/OFFof thestatus of
active
the active
switches switches
have have beeninillustrated
been illustrated in Figure
Figure 3. The 3. Thewaveforms
steady-state steady-state waveforms
of the combinedofboost
the combined
converter
boost
are converter are
demonstrated demonstrated
in Figure in Figure
4. The working modes 4. The working
can be describedmodes canasbe
clearly described clearly as
follows.
follows.
(1) Mode 1 [t0 –t1 ] and Mode 3 [t2 –t3 ]: In these two modes, the active switches S1 and S2 are switched
(1) Mode 1 [t0–t1] and Mode 3 [t2–t3]: In these two modes, the active switches S1 and S2 are switched
on while the diodes, D1 and D2 are reverse-bias. The current in the inductors, iL1 and iL2 , increase
on while the diodes, D1 and D2 are reverse-bias. The current in the inductors, iL1 and iL2, increase
to store energy in L1 and L2 , respectively. The output power for the back-end amplifier is provided
to store energy in L1 and L2, respectively. The output power for the back-end amplifier is
by capacitor Co . The total current iLt and inductor currents of L1 and L2 are expressed below.
provided by capacitor Co. The total current iLt and inductor currents of L1 and L2 are expressed
below. i Lt = i L1 + i L2 (1)
iLt =diiL1L1 + iLV2 (1)
i
= (2)
dt L1
diL1 Vi
di L2= Vi (2)
dt = L1 (3)
dt L2

(2) Mode 2 [t1 –t2 ]: The active switch S1 remains V

di L 2conducting and S2 is switched off. D1 is reverse-bias
= i
and D2 is forward-bias. While the current dt iL1 increase
L2 to store energy in L1 , the energy stored(3)
in
inductor L2 is now released through D2 , C2 , C1 , and Co to the output. The total current iLt and
(2) inductor 1–t2]: The active switch S1 remains conducting and S2 is switched off. D1 is reverse-bias
Mode 2 [tcurrents of L1 and L2 can be expressed as follows:
and D2 is forward-bias. While the current iL1 increase to store energy in L1, the energy stored in
inductor L2 is now released through D2, C2, C1, andi L2Co to the output. The total current iLt and
i Lt = i + (4)
inductor currents of L1 and L2 can be expressedL1as follows:
2
di i LV
2
i Lt = iL1
L1 +
= i (4)
(5)
dt 2L1
 Energies 2017, 10, 1128 4 of 20

di L1 Vi
= (5)
dt L1
Energies 2017, 10, 1128 4 of 20

di L 2 Vi − VC 2 VC 1 − Vo
= = (6)
di L2 dt Vi − V LC2 V −V
2 = C1 L2 o
= (6)
dt L2 L2
(3) Mode 4 [t3–t4]: S2 is switched on and S1 is switched off. D2 is reverse-bias and D1 is forward-bias.
(3) Mode [t3 –t4 ]: Sstored
The4 energy 2 is switched on and S1through
in L1 is released is switched D1 tooff. D2 iscapacitor
charge reverse-bias and C
C1 and Do1. The
is forward-bias.
total current iLt
Theand
energy stored in
inductor currents L 1 is released through D to charge
of L1 and L2 can be1expressed as follows: 1capacitor C and Co . The total current iLt
and inductor currents of L1 and L2 can be expressed as follows:
i
i Lt = i L 2 + L1 (7)
i L12
i Lt = i L2 + (7)
2
di L1 Vi − VC1 VC 2 − Vo
di L1 dt V = −V = V − Vo (8)
= i L1C1 = C2L1 (8)
dt L1 L1
di di
L2 L 2 VV
== i i (9) (9)
dtdt LL 22

(a)

(b)

(c)

Figure
Figure 3. Working
3. Working modesmodes
and and equivalent
equivalent circuits
circuits ofcombined
of the the combined
boostboost converter.
converter. (a) Mode
(a) Mode 1 and
1 and
Mode 3, (b)3,Mode
Mode 2, and
(b) Mode 2, (c)
andMode 4. 4.
(c) Mode
 Energies 2017, 10, 1128 5 of 20
Energies 2017, 10, 1128 5 of 20

Figure 4. Depicted
Figure steady-state
4. Depicted waveforms
steady-state of the
waveforms combined
of the boost
combined converter.
boost converter.

3. Analysis of of
3. Analysis Steady-State
Steady-State
In In
this section,
this section,the
thevoltage
voltagegain,
gain,voltage
voltagestress
stress on
on the
the switches, and inductor
switches, and inductorcurrent
currentripple
rippleofofthe
thecombined
combinedboost
boostconverter
converterworking
workingininthe
thesteady
steadystate
stateare
areanalyzed.
analyzed.

3.1.3.1.
Voltage Gain
Voltage Gain
Using Figures
Using 3 and
Figures Figure
3 and 4, the4,corresponding
the correspondingstatestate equation
equation for each
for each mode mode canobtained.
can be be obtained.
These
These illustrations enable the observation that the weighting factors in the four working
illustrations enable the observation that the weighting factors in the four working modes which are modes
which are (D−1/2),
(D−1/2), (1−D), (1−D), (D−1/2),
(D−1/2), and (1and (1−D).
−D). The Equations
The Equations (10)(11)
(10) and andare(11) are obtained
obtained using
using the the
inductor
inductor voltage-second
voltage-second balancebalance
principleprinciple on L12 and
on L1 and L2 as follows:
as follows:
V
VCV1C1= = i Vi (10)(10)
1 −1 D
−D
Energies 2017, 10, 1128 6 of 20
Energies 2017, 10, 1128 6 of 20

Vi
VC 2 = (11)
1 −ViD
VC2 = (11)
1−D
The C1 and C2 capacitors are connected in series with the supply voltage, and the equation of
The
output C1 andofCthe
voltage 2 capacitors
converterare connectedas:
is expressed in series with the supply voltage, and the equation of
output voltage of the converter is expressed as:
Vo = VC 1 + VC 2 − Vi (12)
Vo = VC1 + VC2 − Vi (12)
By combining (10)–(12), the static voltage gain can be derived by:
By combining (10)–(12), the static voltageVgain1can
+ D be derived by:
o
= (13)
VoVi 11 −+DD
= (13)
The static voltage gain of the conventional 1 −converter
Vi boost D is expressed as:
Voboost1converter is expressed as:
The static voltage gain of the conventional
= (14)
Vi 1 − D
Vo 1
= (14)
Figure 5 shows a comparison of the voltage
Vi 1 − D produced by the proposed combined boost
gains
converter, the interleaved boost converter with two-phase and the conventional boost converter.
Figure 5 shows a comparison of the voltage gains produced by the proposed combined boost
From Figure 5, we observe that the converter has a higher voltage gain than the two-phase
converter, the interleaved boost converter with two-phase and the conventional boost converter.
interleaved converter and the conventional boost converter.
From Figure 5, we observe that the converter has a higher voltage gain than the two-phase interleaved
converter and the conventional boost converter.

Figure 5. The comparison of the voltage gains produced by the proposed combined boost converter,
Figure
the 5. The comparison
conventional of the voltage
boost converter, and thegains produced
interleaved byconverter
boost the proposed
withcombined boost converter,
two-phases.
the conventional boost converter, and the interleaved boost converter with two-phases.
3.2. Voltage Stress of the Switches
3.2. Voltage Stress of the Switches
The open circuit voltage stress on switches S1 and S2 can be obtained by the aforementioned
The open circuit voltage stress on switches S1 and S2 can be obtained by the aforementioned
analyses of operations. The relevant expression is written as (15).
analyses of operations. The relevant expression is written as (15).
V
VS1, max==VVS2,max
VS1,max = Vi i (15)
S2, max = 1 − D (15)
1− D
3.3. Inductor Current Ripples
3.3. Inductor Current Ripples
Using Equations (1)–(9), the total current ripple in the proposed combined boost converter can be
Using Equations
represented by: (1)–(9), the total current ripple in the proposed combined boost converter can
be represented by: V Ts
∆i Lt = i (2D − 1) (16)
L
Energies 2017, 10, 1128 7 of 20

Vi Ts
Δi Lt = (2 D − 1) (16)
L
Energies
The2017, 10, 1128ripples
current of the inductors L1 and L2, in the proposed combined boost converter7 of
can20

thus be expressed as:

The current ripples of the inductors L1 and L2 , in the V Tproposed combined boost converter can
Δi L = Δi L1 = Δi L 2 = i s D (17)
thus be expressed as: L
V Ts
∆i L = ∆i L1 = ∆i L2 = i D (17)
The variation of the duty cycle of the total current ripple L to inductor current ripple as a function
of theThe
duty cycle isofdisplayed
variation the duty in Figure
cycle 6. total
of the The proposed converter
current ripple has the
to inductor same performance
current as the
ripple as a function
two-phase interleaved boost converter, and that is superior to the conventional boost converter.
of the duty cycle is displayed in Figure 6. The proposed converter has the same performance as the
two-phase interleaved boost converter, and that is superior to the conventional boost converter.

6. The
Figure 6.
Figure Theratio
ratiobetween
betweenthe
thetotal current
total ripple
current andand
ripple the the
inductor current
inductor ripple
current versus
ripple the duty
versus thecycle.
duty
cycle.
3.4. The Mode for Boundary Conduction
3.4. The
TheMode for Boundary
boundary Conduction
normalized inductor time constant τ is expressed as:
L,B
The boundary normalized inductor time constant τL,B is expressed as:
L f sw
τL,B = (18)
Lf
τ L, B = Rsw (18)
R
where fsw is the switching frequency.
where
The is the switching
fsw output frequency.
current during boundary conduction mode (BCM) is indicated by:
The output current during boundary conduction mode (BCM) is indicated by:
V Ts
iO = Vi iTs(1 + D ) (19)
iO = L (1 + D) (19)
L
Therefore, the boundary normalized time constant is represented by:
Therefore, the boundary normalized time constant is represented by:
= 1−D (20)
ττL,B
L, B = 1 − D (20)
Figure 77 shows
Figure shows aa plot
plot of
of the
the boundary
boundary normalized
normalized inductor
inductor timetime constant
constant curve.
curve. When is
When ττLL is
planned to be higher than the boundary curve
planned to be higher than the boundary curve of τ , the converter operates in continuous conduction
L,B of τL,B, the converter operates in continuous
mode (CCM). Conversely, the proposed converter
conduction mode (CCM). Conversely, the proposed works in discontinuous
converter conduction mode
works in discontinuous (DCM)
conduction
when τ Lb
mode (DCM)is chosen to be smaller than the boundary curve of
when τLb is chosen to be smaller than the boundary τ .
Lb,B curve of τLb,B.
Energies 2017,
Energies 2017, 10,
10, 1128
1128 8 of 20

Figure 7. Normalized
Figure 7. Normalized boundary
boundary inductance-time
inductance-time constant
constant curve.
curve.

3.5. Component Stress and Loss

The equations for analyzing the component stress of the the combined
combined boost converter
converter are
summarized in Table 1. In addition, equations for loss analysis are shown in Table
summarized Table 1. In addition, equations for loss analysis are shown in Table 2. 2.

Table 1. The results

Table 1. results for
for stress
stress analysis
analysis in
in steady-state.
steady-state.

Items State
Items State
RMS current stress on S1 (iS1) IS1(RMS) = I L2(RMS) D√
RMS current stress on S1 (iS1 ) IS1(RMS) = IL2(RMS) D
√
RMS RMS current
current stressstress
on S2 on
(iS2S)2 (iS2) ISIS2
2(RMS)
(RMSs
= I IL1(RMS)D D
) =L1(RMS)
∆i2L1 2
 
RMS current stress on L1 (iL1 ) IL1(RMS) = ( IL12 )2 +Δi L1 √ 
RMS current stress on L1 (iL1) I L1(RMS) = ( I L1 ) +  2 3
s  23  2
∆i L2
RMS current stress on L2 (iL2 ) IL2(RMS) = ( IL2 )2 + √2
2  Δ i 2 3
RMS current stress on L2 (iL2) I L 2(RMS) s = ( I L2 ) +  L2 2
 2 3  ∆i L2
RMS current stress on Lt (iLt ) ILt(RMS) = ( IL1 + IL2 )2 + √
√ 4 23
 Δ1i − 
RMS current on D1 on
stress stress
RMS current (iD1L)t (iLt) ID1(RMS
I Lt(RMS) = ()I L=1 +IL2 )2 +) √
I L(2RMS  L2 D 
RMS current stress of D2 (iD2 ) ID2(RMS) = IL1(RMS)  1 − D 4 3 
v
I D1(RMS)u = I r2 1 − D
RMS current stress on D1 (iD1)
t D +L 2(RMS) ∆I
u
RMS current stress of C1 (iC1 ) 12 , r = Io
RMS current stress of D2 (iD2) IC1(RMS) I=D 2I(RMS)
o = I 1(RMS) 1 − D, I f t =
1 −LD Ift 1−D
v
u r2 r
u 2
DD ++
RMS RMS
current of C2 of
stressstress (iC2
C)1 (iC1) 12 12 ΔI ∆I Io Io
t
current IC2I(RMS) ==
C1(RMS) = I o o
I
1 − D, r ,=r = ,II ft, =I f t = 1 − D
1− D rI ft f t 1 − D
D
RMS current stress of Co (iCo ) ICo(RMS) = Io
r2 1+D
D+
RMS current stress of C2 (iC2) 12 ΔI I
IC 2(RMS) == I o ,r= , I ft = o
1− D I ft 1− D

D
RMS current stress of Co (iCo) ICo(RMS) = I o
1+ D
Energies 2017, 10, 1128 9 of 20

Energies 2017, 10, 1128 9 of 20

Table 2. The equations of loss in steady-state.
Table 2. The equations of loss in steady-state.
Items
Items State
State
VSS1
V 1) ) I×
( DS1
1( DS 1) (D1
IS1
S1( D Tr)1 
×f sw ( DS 2) V
Tr1 ×VSf1sw ISS1 2) )T×
1((DDS2 f1  ( D2) × T f 1 × f sw
IS1f sw
 +  +
TotalTotal of Sof
loss loss 1 S1
2 2 2 2
 
h i2
RDS1(ON )  ISR1(RMS)  Q 2
×g1 IVGS1  f sw + Q g1 × VGS1 × f sw
DS1(ON ) S1(RMS)
VV
S2S2 1)  )I S×
( DS1
( DS )
I1S2
2( D Tr 2) ×f sw
( D1 Tr2 × ( DS 2) V
VSf2sw IS2
S2((D 2) ) T
DS2 ×f 2IS2f(sw
D2) × T f 2 × f sw
 +  +
TotalTotal of Sof
loss loss 2 S2 2 2 2 2
2
RDS 2(ON )  I S2(R RMSDS2) (
2
ON Q)g 2× V
IS2 ) + Q g2 × VGS2 × f sw
 f sw
GS(2RMS

 
h i2
Conduction loss of L1 r L1 ×
rL1  I L1( RMS) L1(RMS)
I
2
Conduction loss of L1
 
h i2
Conduction
Conduction of Lof2 L2
lossloss rL2  IrLL2 × ) I2L2(RMS)
2( RMS
TotalTotal of Dof1 D1
loss loss VF1VF1I o×
KIo×0.5K+ 1 T
VR0.5 ×RRV1R1
 f×
sw  I RR1 × f sw × IRR1
TRR1
Total loss of D2 VF2 × Io × K + 0.5 × VR2 × TRR2 × f sw × IRR2
Total loss of D2 VF2  I o  K  0.5  VR2  TRR h 2  fsw  IiRR22
Conduction loss of C1
Conduction loss of C1  
rC1 × 2IC1(RMS)
rC1  IC1(RMS)h i2
Conduction loss of C2
Conduction loss of C2 
rC 2  IrCC2
2( RMSh) 
× I2C2(RMS)

 
i2
Conduction
Conduction of Cofo Co
lossloss rCo  IrCoCo × 2ICo(RMS)
(RMS)

※Q Qgg represents the total charge on the gate of the metal-oxide-semiconductor field-effect transistor (MOSFET).
(MOSFET). Tr is
The rise timeThe thetime
rise timeTritistakes to complete
the time it takes charging
to completethe charging
gate of thetheMOSFET afterMOSFET
gate of the the threshold voltage VGS(th)
after the
has been reached. The fall time, Tf , is the time it takes to reach the threshold voltage following the MOSFET’s
threshold voltage VGS(th) has been reached. The fall time, Tf, is the time it takes to reach the threshold
switch-off delay time [34]. VF represents the forward voltage drop of the diode. K is the time of the conduction
voltage
period offollowing
the diode.the
VRMOSFET’s
represents theswitch-off
reverse delay
voltagetime [34].
of the VF represents
diode. the forward
IR is the reverse leakagevoltage drop
current of the diode [35].
of the diode. K is the time of the conduction period of the diode. VR represents the reverse voltage of
the diode. IR is the reverse leakage current of the diode [35].
4. Converter Control Strategy
4. Converter ControlinStrategy
As described the preceding paragraphs, the combined boost converter is dominated by the
specific duty ratioinofthe
As described switches
preceding S1 paragraphs,
and S2 . By appropriately
the combined boost adjusting
converterduty isratio, the output
dominated by thevoltage can
be flexible.
specific dutyTheratiocircuit modelSis
of switches established
1 and by PSIM© simulation
S2. By appropriately adjusting duty software (Powersim
ratio, the Inc., Rockville,
output voltage
can be
MD, USA)flexible.
underThe thecircuit model is established
later suppositions to deviseby thePSIM© simulation
closed-loop software
controller and(Powersim
reduce theInc.,mathematics
Rockville,
for MD, USA)
the converter. The under the later suppositions
suppositions includes (1)topower devise switches
the closed-loop controller
and diodes and reduce
are ideal; (2) equivalent
the mathematics
series resistancesfor(ESRs) the converter.
of all theThe suppositions
inductors includes (1) of
and capacitors power switches and
the converter are diodes
thought areto acquire
ideal; (2) equivalent series resistances (ESRs) of all the inductors and capacitors of the converter are
a comparatively precise dynamic model; (3) the converter works in under CCM. The taken circuit
thought to acquire a comparatively precise dynamic model; (3) the converter works in under CCM.
parameters are L1 = L2 = 250
The taken circuit parameters
µH, C = C2 =
are L1 = L12 = 250
10 µF, C = 1000 µF, output resistance R = 30 Ω, and ESRs
μH, C1 = C2o = 10 μF, Co = 1000 μF, output resistance R =
r30 = rand
L1 Ω, rC1 =
L2 =ESRs r C2 = 100 mΩ.
rL1 = rL2 = rC1 = rC2 = 100 mΩ.
Figure 88 illustrates
Figure illustrates the the block
block diagram
diagramofofthe the combined
combinedboost boostconverter
converterbybymeasuring
measuring thethe output
voltage feedback
output voltage signal into
feedback signal theinto
controller for control.
the controller Figure Figure
for control. 8 illustrates the developed
8 illustrates control system
the developed
for the combined
control system for the boost converter.
combined boostItconverter.
can be seen that
It can be the
seenoutput
that thevoltage (V o ) is sensed
output voltage and compared
(Vo) is sensed
and compared
with the reference with(V the reference (Vo, ref). The output voltage controller produces those two inductor
o,ref ). The output voltage controller produces those two inductor current reference
current reference (iL1,ref, iL2, ref) for the entire system, and the equal current sharing between the two
(iL1,ref , iL2,ref ) for the entire system, and the equal current sharing between the two interleaved phases
interleaved phases can be also acquired. Furthermore, during the system startup, using a soft start
can be also acquired. Furthermore, during the system startup, using a soft start system (Vconss ) is used
system (Vconss) is used to avoid the capacitor charge surge current causing damage to the converter
to avoid the capacitor charge surge current causing damage to the converter components.
components.
The Block diagram of the closed-loop control scheme is shown in Figure 9. In the inner current
The Block diagram of the closed-loop control scheme is shown in Figure 9. In the inner current
control loop,FMFM
control loop, is the
is the constant
constant gain gain
of theof PWMthe generator; Gi1d and GG
PWM generator; i2di1d
Gi2d isfunction
andtransfer
is the the transfer
from function
from
the dutythe duty ratio
ratio to theto two thedifferent
two differentinductor inductor Ci1 and CCi1
current;current; i2 and Ci2 indicates
indicates the transferthefunction
transferof function of
current controllers;and
current controllers; and Hi1Hand
i1 and
H i2 H
are
i2 are
the the
sensingsensing
gains gains
of the of the
current current
sensor. sensor.
In the In
outer the outer
voltage voltage
control loop,
control loop,GGvdvdis isthethe transfer
transfer function
functionfromfromthe duty ratio to
the duty the to
ratio output voltage;voltage;
the output Cv indicates the
Cv indicates the
transfer function of output voltage controller; and H indicates the sensing
transfer function of output voltage controller; and Hv indicates the sensing gain of the voltage sensor.
v gain of the voltage sensor.
Energies 2017,
Energies 10, 10,
2017, 11281128 10 of
1020
of 20
Energies 2017, 10, 1128 10 of 20

iL1 L1 D1
iL1 L1 S1 D1
Vi C1
Vi S1 C1
To supply a
CO VO R audio amplifier
To supply a
with a pure
CO VO R audio amplifier
resistive load
with a pure
resistive load
S2 C2
Hi1 C2
S2
Hi1
iL2 L2 D2 Hv
Hi 2 iL2 L2 D2 Hv
Hi 2

iL1, ref 1 vcon1

iL, ref iL1, ref KP1 1 vcon1
iL, ref KP1 S1
0
0
S1
KI1 K  vconss
vconss
I1 

iL2, ref i 1
1 vcon2
L2, ref
KP2 K vcon2
P2
0 0 S2S2
KI2 KI2  vconss
vconss

Current
CurrentControl
ControlLoop
Loop

Vo, ref Vo, ref iL, ref

KP3 KP3 iL, ref

KI3 KI3  
VoltageControl
Voltage ControlLoop
Loop

Figure 8. The developed control system for the combined boost converter.
Figure 8. The
Figure developed
8. The control
developed system
control for for
system thethe
combined boost
combined converter.
boost converter.

~
~ ~ iL 1
v~con1 ~ d1
iL 1
v~con1 d1 v~o
v~o

~ v~con 2 ~
d2
~
iL2
iL, ref ~ ~ ~
~ vcon 2 d2 iL2
iL, ref

Vo, ref
Vo, ref
Figure 9. Block diagram for the closed-loop control scheme.
Figure 9. Block diagram for the closed-loop control scheme.
From Figure 9, we can derive open the loop gain of the voltage and current loops of the
proposed
From converter by
Figure thederive
following equations.
From Figure9,9,we
we can
can derive open
open theloop
the loop gaingain
of theof voltage
the voltage and current
and current loops
loops of of the
the proposed
proposed converter by the following T
equations.
converter by the following equations. i1 ( s) = F H G
m i1 i 1d ( s) C i1 ( s)
(21)
( s ) =
Ti1(s)i 2= FmHmi1Gii12d (is2)dCi1(si)2 (s)
T F H G ( s) C
Ti1 (s) = Fm Hi1 Gi1d (s)Ci1 (s) (21)(21)
i 2 ( s()s=
TT ) =FmH F
Gi 2G
i 2H d ( s)C( i 2)(C
s
s) (s)
i2 m i2 i2d i2
Energies 2017, 10, 1128 11 of 20

Energies 2017, 10, 1128 Ti 1 ( s) 1 T ( s) 1 11 of 20

Tv ( s) = H vGvd ( s)C v ( s) ⋅ ( ⋅ + i2 ⋅ ) (22)
1 + Ti 1 ( s) H i 1 1 + Ti 2 ( s) H i 2

where, FM = 1/100, Hi1 = Hi2 = Hv = 1. Ti1 (s) 1 Ti2 (s) 1

T (s) = Hv Gvd (s)Cv (s) · ( · + · ) (22)
The small-signal vtransfer from the duty ratio
1 + to
Ti1those
(s) Hinductor
i1 1 +current
Ti2 (s) GHi1di2and Gi2d and the duty

ratio
where,to Foutput voltage
= 1/100, H G=vdHcan=beH shown
= 1. below.
M i1 i2 v
The small-signal transfer from the duty ratio to those inductor current Gi1d and Gi2d and the duty
ratio to output voltage Gvd can be shown below. 2 DRC1
s +1
2Vo 1+ D
Gi 1d (s) = Gi 2d (s) = (23)
(1 − D)2 R s2 s 22DRC L1C1 1
+
+ 11
2Vo D(11−+DD ) 2
Gi1d (s) = Gi2d (s) = (23)
(1 − D )2 R s2 2L1 C1 + 1
 D2 (1 − D )2
L1  1 − D  
"1 − s   ( sr#CoCo + 1)
(1 − D)R  2LR  11+−DD  2 (24)
Gvd ( s) = 1−s 1
(srCo Co + 1)
2 2R 1RC
+ D
(1 − D ) R s o
+1
Gvd (s) = 2
RC
(24)
2 o
s +1
2
A uncomplicated type-II controller that comprise one-zero, one-pole, and another one-pole at
A uncomplicated type-II controller that comprise
the origin is employed for the current loop compensation to offer one-zero, one-pole, and
sufficient another
DC one-pole at
gain, bandwidth,
the origin is
gain/phase employed
margins for system.
for the the current loop compensation
In addition, to offer sufficient
a proportional-integral DC gain,that
(PI) controller bandwidth,
contain
gain/phase margins for the system. In addition, a proportional-integral
one-zero and one-pole at origin is applied for the voltage loop compensation. (PI) controller that contain
one-zero and one-pole atcurrent/voltage
The corresponding origin is applied for the voltage
controllers of the loop compensation.
converter are selected as follows:
The corresponding current/voltage controllers of the converter are selected as follows:
 C i1 ( s) = C i 2 ( s) = 21 .29 s + 6280  

 Ci1 (s) = Ci2 (s) = 21.29
 s+ s 6280
(25)

s
C ( s) = 10 ss + 157 0 
+ 1570  (25)
 Cv (s) = 10 
v
s 


s
Figure 10a
Figure 10a shows
shows the
the frequency
frequency response
response of
of the
the loop
loop gain
gain for
for compensated
compensated current
current loop,
loop, under
under
the full-load conditions. This work leads to a phase margin of 55 degrees and the crossover
the full-load conditions. This work leads to a phase margin of 55 degrees and the crossover frequency
frequency is approximately
is approximately 8 kHz. 8 kHz.
Figure 10b shows the frequency response of
Figure 10b shows the frequency response of the
the loop
loop gain
gain for
for compensated
compensated voltage
voltage loop,
loop, under
under
the
the full-load conditions. This work leads to a phase margin of 45 degrees and the crossover crossover
full-load conditions. This work leads to a phase margin of 45 degrees and the frequency
frequency is approximately
is approximately 800 Hz. 800 Hz.

fC = 8kHz fC = 0.8kHz

0 dB

0 dB

-180º
PM=55 Deg. -180º
PM=45 Deg.

(a) (b)

Figure 10. Frequency

Figure 10. Frequencyresponses
responses of loop
of the the gain.
loop(a)gain. (a) compensated
compensated current
current loop and (b)loop and (b)
compensated
compensated
voltage loop. voltage loop.

5. Simulated and Experimented Results

Energies 2017, 10, 1128 12 of 20

Energies 2017, 10, 1128

Energies 2017, 10,and
1128 12of
12 of20
20
5. Simulated
Energies 2017, 10, 1128 Experimented Results 12 of 20

Inorder
In
In order
order to confirm
to to confirm
confirm the performance
performance
the performance
the of the
the combined
of the combined
of combined boost converter,
boost converter,
boost converter, simulations
simulations simulations
and experimentsand
and
In order to confirm the performance of the combined boost converter, simulations and
experiments were conducted based on the test setup shown in Figure 11. Figure 12 shows aa
experiments
were conductedwere conducted
based on the based
test setup on the
shown test
in setup
Figure 11.shown
Figure in
12 Figure
shows a 11. Figure
three-view 12 shows
photograph
experiments were conducted based on the test setup shown in Figure 11. Figure 12 shows a
three-view
of
three-view photograph
the realized of the
boost converter
photograph of the realized
realized boost
prototype.boost converter
Figure 13 shows
converter prototype. Figure
the realized
prototype. Figure 13
test13 showswhich
bench,
shows the realized
the realized test
consiststest
of
three-view photograph of the realized boost converter prototype. Figure 13 shows the realized test
bench,
an which
oscilloscope,consists
a powerof an oscilloscope,
source, an a power
electronics source,
load, a PWM an electronics
generator, load,
and a
the PWM generator,
proposed
bench, which consists of an oscilloscope, a power source, an electronics load, a PWM generator, and and
combined
bench, which consists of an oscilloscope, a power source, an electronics load, a PWM generator, and
theproposed
boost
the proposed
convertercombined
prototype.
combined boostconverter
boost converterprototype.
prototype.
the proposed combined boost converter prototype.

Figure11.
Figure 11.Block
Blockdiagram
diagramof
ofthe
theexperimental
experimentaltest
testsetup.
setup.
Figure 11. Block diagram of the experimental test setup.

(a)
(a) (b)
(b) (c)
(c)
(a) (b) (c)
Figure12.
Figure 12.Realized
Realized combinedboost
boostconverter
converterprototype.
prototype.(a)
(a)Top
Topview;
view;(b)
(b)Front
Frontview;
view;(c)
(c)Side
Sideview.
view.
Realized combined
Figure 12. Realized combined boost converter prototype. (a) Top view; (b) Front view; (c) Side view.
view.

Figure 13.
Figure 13. Realized
Realized test
test bench
bench system
system (the
(the oscilloscope,
oscilloscope, power
power source,
source, electronics
electronics load,
load, pulse-width
pulse-width
Figure 13. Realized
13. Realized test
test bench
bench system
system (the
(the oscilloscope,
oscilloscope, power
power source,
source, electronics
electronics load,
load, pulse-width
pulse-width
modulation (PWM) generator, and the proposed combined boost converter prototype
modulation (PWM) generator, and the proposed combined boost converter prototype are labeled). are labeled).
generator, and
modulation (PWM) generator, and the
the proposed
proposedcombined
combinedboost
boostconverter
converterprototype
prototypearearelabeled).
labeled).
The specifications
The specifications and
and parameters
parameters ofof the
the components
components taken
taken in
in the
the converter
converter prototype
prototype are
are
The specifications and parameters of the components taken in the converter prototype are
providedin
provided inTables
Tables33and
and4,4,respectively.
respectively.
provided in Tables 3 and 4, respectively.
Energies 2017, 10, 1128 13 of 20

The specifications and parameters of the components taken in the converter prototype are
provided in Tables 3 and 4, respectively.

Table 3. Specifications of Converter Prototype.

Specification Value
Input Voltage, Vi 12 V
Output Voltage, Vo 60 V
Duty Cycle, D 0.67
Switching Frequency, fsw 40 kHz
Output power, Po 120 W

Table 4. Parameters of Components.

Specification Value
MOSFET IPP080N06NG
Diode STPS8H100
Load Resistance, R 30 Ω
Inductors, L1 and L2 250 µH
Filter Capacitors, C1 and C2 10 µF
Output Capacitor, Co 1000 µF

For input voltage of 12V and duty cycle of 66.7%, output voltage of 60 V can be obtained using (13).
The voltages on the capacitors of C1 and C2 are calculated using (10) and (11). The values across both
C1 and C2 are calculated to be about 36 V (i.e., VC1 = VC2 = 36 V).
PSIM© simulation software (Powersim Inc., Rockville, MD, USA) is used to confirm the feasibility
of the combined boost converter. Figures 14 and 15 indicate the simulated and experimented
waveforms of the combined boost converter for gate driving signals VGS1 and VGS2 and two-phase
inductor currents iL1 and iL2 , respectively.
Figure 16 shows the simulated and experimented waveforms of the combined boost converter for
the cross voltages across S1 and S2 , respectively.
Figure 17 shows the simulated and experimented waveforms of the combined boost converter for
the cross voltages across D1 and D2 , respectively.
Figure 18 shows the simulated and experimented waveforms of the combined boost converter for
the voltages across the C1 and C2 capacitors. The results verify the feasibility of the converter.
Figure 19 shows the transient response because of a step load current change between 120 W and
60 W for the combined boost converter prototype. As can be seen from Figure 19, the output voltage
can be stably regulated to be 60 V under the load current variation between 1 A and 2 A.
Figure 20 shows the measured conversion efficiency of the combined boost converter,
the interleaved boost converter with a two-phases and the conventional converter. The conversion
efficiency is measured via precise digital power meter equipment, Yokogawa WT310 (Yokogawa
Electric Corporation, Tokyo, Japan). Using the proposed combined boost converter, we obtain the
maximum conversion efficiency is 98.7%, as well as the conversion efficiency with a full load is 89.2%.
The proposed combined boost converter owns higher efficiency under full load conditions because the
conduction loss can be cut down through applying the low-voltage-rated devices.
The calculated interleaved boost converter power loss distribution at the rated load condition,
obtained using the equations in Table 2, is listed in Table 5 to expound the measured conversion
efficiency. Furthermore, the resulting loss breakdown charts are depicted in Figure 21.
Energies 2017, 10, 1128 14 of 20
Energies 2017, 10, 1128 14 of 20
Energies 2017, 10, 1128 14 of 20

(a)
(a)

(b)
(b)

Figure 14. Waveforms of the combined boost converter for gate driving signals Vgs1 and Vgs2 and
Figure 14.
Figure Waveforms
14. inductor
two-phase Waveforms of the
the
current
of iL1.combined boost
(a) Simulated
combined converter
waveforms;
boost for
converter (b) gate
gate driving
driving signals
for Experimented VVgs1
waveforms.
signals and V gs2 and
gs1 and Vgs2
and
two-phase inductor current iL1 . (a) Simulated waveforms; (b) Experimented waveforms.
two-phase inductor current iL1. (a) Simulated waveforms; (b) Experimented waveforms.

(a)
(a)

(b)
(b)

Figure 15. Waveforms of the combined boost converter for gate driving signals V and VGS2 and
Figure 15. Waveforms of the combined boost converter for gate driving signals VGS1 GS1 and VGS2 and
two-phase inductor current iL2 . (a) Simulated waveforms; (b) Experimented waveforms.
two-phase
Figure 15. inductor
Waveformscurrent iL2.combined
of the (a) Simulated
boostwaveforms; (b) Experimented
converter for waveforms.
gate driving signals VGS1 and VGS2 and
two-phase inductor current iL2. (a) Simulated waveforms; (b) Experimented waveforms.
Energies 2017, 10, 1128 15 of 20
Energies 2017, 10, 1128 15 of 20
Energies 2017, 10, 1128 15 of 20

(a)
(a)

(b)
(b)

Figure 16. Waveforms of the combined boost converter for the cross voltages across S1 and S2. (a)
Figure 16. Waveforms of the combined boost converter for the cross voltages across S1 and S2 .
Figure 16.waveforms;
Simulated Waveforms(b)
of Experimented
the combined waveforms.
boost converter for the cross voltages across S1 and S2. (a)
(a) Simulated waveforms; (b) Experimented waveforms.
Simulated waveforms; (b) Experimented waveforms.

(a)
(a)

(b)
(b)

Figure 17. Waveforms of the proposed combined boost converter for the cross voltages across D and
Figure 17. Waveforms of the proposed combined boost converter for the cross voltages across D11 and
D 2 . (a) Simulated
Figure waveforms;
17. Waveforms (b) Experimented
of the proposed combined waveforms.
boost converter for the cross voltages across D1 and
D 2. (a) Simulated waveforms; (b) Experimented waveforms.
D2. (a) Simulated waveforms; (b) Experimented waveforms.
Energies 2017, 10, 1128 16 of 20
Energies 2017, 10, 1128 16 of 20
Energies 2017, 10, 1128 16 of 20

(a)
(a)

(b)
(b)

Figure 18.
Figure 18. Waveforms
Waveformsofofthe
thecombined
combinedboost
boostconverter forfor
converter thethe
cross voltages
cross across
voltages across andand
C1 C C2. C
(a).
1 2
Figure 18. waveforms;
Simulated Waveforms (b)
of the combined boost
Experimented converter for the cross voltages across C1 and C2. (a)
waveforms.
(a) Simulated waveforms; (b) Experimented waveforms.
Simulated waveforms; (b) Experimented waveforms.

(a)
(a)

(b)
(b)

Figure 19. Waveforms of transient response in the load period steps from 120 W to 60 W and then back
Figure
to 19.(a)
120 W. Waveforms
Simulated of transient response
waveforms; in the load
(b) Experimented period steps from 120 W to 60 W and then
waveforms.
Figure
back to19.
120Waveforms of transient
W. (a) Simulated response
waveforms; in the load period
(b) Experimented steps from 120 W to 60 W and then
waveforms.
back to 120 W. (a) Simulated waveforms; (b) Experimented waveforms.
Energies 2017,
Energies 10,10,
2017, 1128
1128 1717
of of
20 20
Energies 2017, 10, 1128 17 of 20

Figure20.20. The
Figure The measured conversion
conversion efficiency
efficiency for
for the
theproposed
proposedcombined
combinedboost converter,
boost the
converter,
Figure 20. The measured conversion efficiency for the proposed combined boost converter, the
theconventional
conventionalboost
boostconverter,
converter,and
andthe
theinterleaved
interleavedboost
boostconverter
converterwith
withtwo-phase.
two-phase.
conventional boost converter, and the interleaved boost converter with two-phase.

Table
Table 5. 5. Parameters
Parameters of of Components.
Components.
Table 5. Parameters of Components.
Results Results
Items Items Results
Results (50% Load) Results
Results (100% Load)
Items (50% Load) (100% Load)
Switching loss of S1 loss of S1 (50% Load)
0.049 0.049
W W (100% Load)
0.059
Switching 0.059 WW
Switching loss of S1 0.049 W 0.059 W
Switching
Switching loss of S loss of S2 0.049 0.049
W W 0.059 WW
0.059
Switching2 loss of S2 0.049 W 0.059 W
ConductionConduction loss
loss of L1 loss of L 1 and L2
L2L1 and L2
and of 0.64
0.640.64
W W W 3.2 W
3.2 W
Conduction 3.2 W
Conduction loss of D1 and D2 0.0384 W 0.23 W
Conduction
Conduction loss of D1loss
andofDD 1 and D2 0.0384
0.0384 W W 0.23 0.23
W W
Conduction loss of2 C1 and C2 0.196 W 1.02 W
Conduction
Conduction loss loss
of C1 and Cof C 1 and C2 0.196
0.196 0.035
W W W 1.02 W W
1.02
Conduction loss
2 of Co 0.075 W
Conduction loss of Co 0.035 W 0.075 W
Conduction lossTotal
of Colosses 0.0351.8828
W W 9.134 WW
0.075
Total losses 1.8828 W 9.134 W
Calculated
TotalCalculated
losses Efficiency 98.5%
1.882898.5%
W 92.4%
9.134 W
Efficiency 92.4%
Measured Efficiency 97.3% 89.1%
CalculatedMeasured
EfficiencyEfficiency 98.5%97.3% 89.1% 92.4%
Measured Efficiency 97.3% 89.1%

(a)
(a) (b)
(b)
Figure 21. The losses breakdown charts. (a) half load and (b) rated load conditions.
Figure21.
Figure 21. The
The losses
losses breakdown
breakdowncharts.
charts. (a)
(a) half
half load
loadand
and(b)
(b)rated
ratedload
loadconditions.
conditions.

For the sake of verifying the performance of the proposed combined boost converter, the other
For the sake of verifying the performance of the proposed combined boost converter, the other
three converters published in [11,19,24] are used for comparison here, as shown in Table 6. It can be
three converters published in [11,19,24] are used for comparison here, as shown in Table 6. It can be
Energies 2017, 10, 1128 18 of 20

For the sake of verifying the performance of the proposed combined boost converter, the other
three converters published in [11,19,24] are used for comparison here, as shown in Table 6. It can be
observed that the amounts of passive components in [19] exceed the requirement in the converter.
It will lead to an increase in manufacturing costs.
The voltage gain of the former converter [11] is equal to the proposed one presented in this work,
Although the former converter in [11] has the relatively low-cost components, the input current ripple
is large because of the active switches being controlled simultaneously by using one control signal.
The voltage gain of the previous converter in [24] is slightly larger than that of the proposed converter
in this study; however, the input current ripple is large owing to the single-phase operation makes this
converter not suitable for high current and low ripple applications.
From the point view of the cost–performance ratio, the proposed combined boost converter really
carries out the higher conversion efficiency and also lower input current ripple under 120 W power
rating than other existing works [11,19,24]. Based on its features, this converter can be as a suitable
candidate for 12 V battery-powered front-end stage for supplying an automotive audio amplifier.

Table 6. Performance comparisons among other existing converters.

Topology
Items
This Converter [11] [19] [24]
Switching control structure two-phase single-phase three-Phase single-phase
Input current ripple Low High Low Medium
Voltage gain (1 + D)/(1 − D) (1 + D)/(1 − D) (3+ nD − D2 )/(1 − D) 1/(1 − D)2
High-side voltage 60 V 60 V 200 V 62.5 V
Low-side voltage 12 V 12 V 24 V 10 V
Number of main power devices 4 3 8 4
Number of storage components 5 4 8 5
Maximum efficiency 98.7% 92.1% 92.3% 92.5%
Realized prototype power rating 120 W 40 W 100 W 100 W
BOM Cost Low Low High Medium
Remark-n represents the turns ratio for coupled inductor [19].

6. Conclusions
A modified interleaved boost converter with two-phase is presented as a battery-powered
front-end interface for automotive audio amplifiers. The combined boost converter is created based on
a two-phase structure by combining the conventional boost converter with its inverted type. As well
as the existing characteristics that benefit from interleaved converters, the converter provides the
more advantages in extending the duty cycle than the conventional boost and the interleaved boost
converters. Furthermore, it also prevents working with a wide duty cycle. The operating principles,
steady-state analyzes, as well as the closed-loop control designs of the converter are explored in
this study.
Simulations and experiments are also performed using input voltage of 12 V for a 120 W circuit.
A reasonable duty cycle of 0.67 is selected to reach output voltage of 60 V, which corresponds to static
voltage gain of five. The converter achieves a maximum measured conversion efficiency of 98.7%.
According to its characteristics, the combined boost converter is highly suitable for use as a front-end
converter in powering automotive audio amplifiers.

Acknowledgments: This work is partly supported by the Ministry of Science and Technology (MOST) in
Taiwan under grants MOST 105-2221-E-027-096, MOST 105-2221-E-324-02, MOST 105-2221-E-324-026, and MOST
106-2218-E-027-010. The authors would like to express their appreciation to the student Chao-Wei Ku (NTUT) for
the experimental bench setup.
Author Contributions: Ching-Ming Lai substantially contributed to examination and interpretation of the results,
development of the overall system, and review and proofreading of the manuscript. Yu-Huei Cheng substantially
contributed to control strategy design, production and analysis of the results, and preparation and revision
of the manuscript. Jiashen Teh substantially contributed to the review and proofreading of the manuscript.
Energies 2017, 10, 1128 19 of 20

Yuan-Chih Lin substantially contributed to literature search, control strategy design, and production and analysis
of the results.
Conflicts of Interest: The authors declare no conflict of interest.

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