Professional Documents
Culture Documents
Training objectives:
You are informed about
• the constructional design of power section
components of SINAMICS-cabinet-units
• Constructional design and wiring of the
power block
continued on page 3
U, f = constant U, f = variable
U Udc U
AC - DC DC - AC
U1 U2
V1 V2
W1 W2
Line Motor
DC-link
Pulse width modulation / Active Line Module Pulse width modulation / Motor Module
switching state
1 2 3 4 5 6 1
1 2 3
L1 - U.ZK
DC-link L2
L3
U.L2L3 + U.ZK
motor
switching state
4 5 6
1 2 3 4 5 6 1
- U.ZK
X X X
+ -
special
state Z0
X X X
+ + - -
Z1 Z1
Z2 Z6 Z2
Z3 Z5
Z4
t t t
Z2 Z2 Z2
t t t
resulting pointer position : 45 degrees resulting pointer position: 30 degrees resulting pointer position : 15 degrees
resulting voltage : i.e. 40% resulting voltage : i.e. 50% resulting voltage : i.e. 60%
0.5 ms 0.5 ms 0.5 ms 0.5 ms 0.5 ms 0.5 ms 0.5 ms 0.5 ms 0.5 ms 0.5 ms 0.5 ms
In rectifying operation the Active Line Module operates basically like the Motor Module in
regenerative operation. The line supply takes the position of the motor.
In rectifying operation current flow through the free wheeling diodes dominates.
VDC=1,5 Vn
Simplified principle of operation:
VU-V
1. At any moment the DC-link voltage is higher
than the line voltage.
2. By switching on two transistors the positive
and negative DC-link bus bar are connected
to a matching line phase.
3. Energy is fed back to the line.
In regenerating operation the Active Line Module operates basically like the Motor Module in
motor operation.
In regenerating operation current flow through the transistors dominates.
i.line u.line
Z i.line u.ALM u.line
u.ALM
u.line u.ALM u.line
u.ALM
Z i.line u.line
u.ALM u.line
u.ALM
u.line
i.reactive = +20% (inductive reactive load)
u.ALM
i.reactive ϕ ind.
u.line i.line
i.line
i.active
ϕ ind.
i.line
0,12%
Clean Power Technology
0,08%
0,04%
0,00%
5, 7 11, 13 17, 19 23, 25
Frame sizes C to F
voltage ON ON ON
%
time t [h]
Pre-charging
• B6-diode-precharging
• thyristor firing pulses
• basic interferance
RECT + 1 INV
RECT + 3 INV
suppression
2 INV
Rectifier
• B6-thyristor-bridge,
fully controlled
size F, G size H
DC-link
• capacitors
• braking chopper
RECT
INV
INV
INV
Inverter
• IGBT+ FW-diodes
• IGD: controls IGBTs
• heat sink
• balancing size J
• current transformers
High efficiency IGBTs / DC-link bus bar with low inductance / very compact design
components of
power modules
Features: IGD-board,
¾ state of art IGBT technology IGBT
¾ DC-link bus bar with low inductance current transformer
¾ very compact in design
heat sink
¾ thermal model for high reliability
Rectifier / Inverter:
¾IGBT+ FW-diodes
nt
¾heat sink
¾current transformers
DC-link:
DC-link
¾capacitors
bus bars
¾braking chopper (option)
capacitor battery
Power block serves as:
¾ Active Line Module (ALM) as AC/DC-power-block
¾ Motor Module (MM) as DC/AC-power-block
Both power blocks are identical in hardware; they differ in:
¾ MLFB, terminal assignments and data of the power-block.
The required difference in functionality is provided by software.
3a Power-
2 supply
3
3b
Extended functionality of the CIB-FW starting with V2.3 and CIB-MLFB ...-3 (starting with HW-version M):
edge triggered modulation / safe stop / parallel operation of power sections up to 4xLM and 4xMM per CU320
PSB
1 Mounting screws
2 Hight adjustment
B
Watch out for horizontal (A) respectively
vertical (B) position; make sure the
vertical supports cannot slip; carefully
tighten the screw handles!
(weight of power blocks up to 100 kg)
1 4
1.
1. Remove
Remove the the power
power block
block
following the guideline
following the guideline
2.
2. Pull
Pull itit out
out onto
onto the
the power
power
block support
block support
3.
3. Put
Put thethe power
power block
block onon
5 the ground (2 persons!)
the ground (2 persons!)
4.
4. Mount
Mount the the bottom
bottom ofof the
the
2 shipping
shipping device
device onon the
the
side
side of of the
the power
power block
block
5.
5. Tilt
Tilt the
the assembly
assembly to to the
the
side
side
6.
6. Put
Put thethe ESD
ESD cover
cover in
in
place
place and and close
close the
the cover
cover
(Pre-charging),
(Pre-charging), thyristor
thyristor
drive
drive board
board TDB,
TDB, thyristors
thyristors
Inverter:
Inverter: Current
Current
Testbox 6AG 1064 – 1AA04 – 0AA0 Cables 6AG 1065 – 1AA04 – 0AA0 IGD,
IGD, IGBT,
IGBT, UCE
UCE transformers
transformers
-A24 TDB
-X244: 1.. 6
+24V
-X9: 2 1 PSB
+24V
SITOP
-X9: 1 2
24V, 3A
X244
TDB
L1,
L1, L2,
L2, ...
...
L+
L+,
L+, L+,
L+, ...
... RVL
L1
L2
L3
RVL
L-
24VDC
T1 T2 T3
L+
US
T1 UCE
T2
T3
IGD
X291 LS
U1
L+ 1 L-
L+
L-
L-
U3
24VD 1
C
press the key
EXECUTE for a
maximum of 2
seconds only!
X23
CT
T1 T2 T3
L+ T1
T2
T3
M
IGD
X291 CT
U1
1 L-
L+
L+
U2
1
L-
L-
U3
24VDC 1
press the key
EXECUTE for a
maximum of 2
seconds only!
In
In the
the rectifier
rectifier of
of units
units of
of larger
larger
L1 U
L2
power
power ratings
ratings shorted
shorted thyristors
thyristors
V
are
are
L3 indicated by R = “0 Ohm“,
indicated by R = “0 Ohm“, W shorted
shorted
diodes
diodes by by RR == “R.pre-charge“.
“R.pre-charge“.
DC -
2999
DC +
L1 U
L2 V
L3 W
DC -
L1
L2
L3
U In
In V/Hz-operation
V/Hz-operation thethe output
output current
current is
is
limited
limited to
to aa maximum
maximum but
but not
not
monitored
monitored any any other
other way.
way.
Consequently
Consequently an an inverter
inverter can
can bebe
operated
operated without
without load
load respectively
respectively atat
very
very low
low load
load which
which allows
allows aa functional
functional
f test
test of
of the
the inverter.
inverter.
At
At low
low load
load the
the current
current peaks
peaks of
of the
the line
line
current are unsymmetrical.
current are unsymmetrical.
The
The measurement,
measurement, however,
however, shows
shows thatthat all
all
diodes
diodes become
become conductive.
conductive.
High
High frequency
frequency noise
noise andand ripple
ripple superposed
superposed
on
on the
the sinusoidal
sinusoidal output
output current
current are
are
consequences
consequences of of the
the pulse
pulse width
width modulated
modulated
output
output voltage.
voltage.
The
The output
output current
current has has toto be
be fairly
fairly
symmetrical
symmetrical for
for all
all three
three phases;
phases;
pre-condition:
pre-condition: ii >> 0.1
0.1 i.rated.
i.rated.
Missing
Missing half
half cycles
cycles indicate
indicate aa faulty
faulty inverter.
inverter.
A
A missing
missing output
output phase
phase oror aa phase
phase current
current
considerably
considerably smaller
smaller than
than the
the others
others indicates
indicates
unsymmetrical
unsymmetrical load
load or
or aa faulty
faulty inverter
inverter