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5 4 3 2 1

PCI DEVICE IDSEL# REQ# / GNT# Interrupts CLOCK

CB1410 AD17 REQ0# / GNT0# INTE# CK410/PCI3


ZU2 SYSTEM BLOCK DIAGRAM
TIAB23 AD25 REQ2# / GNT2# INTF# CK410/PCI8

DVI / 7307 CLOCK GENERATOR


Chrontel
Yonah/Celeron-M CPU
MR510 AD18 REQ1# / GNT1# INTG# CK410/PCI4

CK410-M
(only for ezDock) (479 FCPGA) Thermal Sensor
D D
Page 17
Page 2 Page 3
Page 3,4

S-VIDEO CONN HOST BUS


Page 16
533/667MHz
DDRII
+1.5V +2.5V +1.05V
SDVO Dual Channel DDR2
LCD CONN +1.8VSUS
SO-DIMM 0
TV 533/667 MHz RJ45
(12.1"WXGA) LVDS NB SO-DIMM 1 Page 14
Page 16 VGA CALISTOGA-GM/PM Page 9,10

1466FCBGA Transformer
CRT Port Page 5~8 Page 14
Page 15
DMI interface
Mini Card / Giga Lan
HDD (SATA) SATA
C +1.5V
WLAN (BCM 5787)
C

Page 22 +2.5V
+3V
SB Page 23 Page 14
PATA +3VSUS ICH7-M PCIE-1 PCIE-2
ODD (PATA) PCI-Express
+1.5VSUS
Page 22
USB 2.0 652BGA
+1.05V
Azalia
Page 11~13
PCI Bus
USB Port x 3
USB1,4,5 Page 23
LPC
Bluetooth PCMCIA Card Reader
USB2 Page 23 1394
Controller Controller Controller
Super I/O (CB 1410) (MR510)
Finger Printer uR PC8763L (TI 43AB23)
USB7 Page 29 NS PC87383
Page 24 Page 26 Page 18 Page 19 Page 21
B B
CCD
USB3 Page 16

SPI ROM Touch Pad K/B CONN FIR PCMCIA Card Reader 1394 CONN
Page 24 Page 25 Page 25 Page 26 Page 20 Page 20 Page 25

HP HP AMP
Page 28 Page 27
5V/3V (ISL6236) 1.25V 1.5V 2.5V
Audio Codec PCI-Express PCIE-3
(ALC268) ezDockII/II+ Page 30 Page 34
INT SPK SPK AMP DVI
Page 28 Page 28 Connector USB0
USB VCORE(ISL6262A) Discharge
PCIE , Lan ,1394
Ser & Par Port 1394*2 Page 31 Page 34
Line in & MIC
Page 28 Page 27 PS2 , VGA, DVI TV out / CRT Switch
SPDIF,SM BUS Page 15
A
VTT 1.05V (SC411) Charger (ISL6251) A
MediaBay
Express Card Audio Page 32 Page 35

MDC 1.5 10/100/1G Switch 1.8V (TPS51116)


Page 27 Page 29 Page 14 PROJECT : ZU2
Page 33 Quanta Computer Inc.
Size Document Number Rev
Block Diagram 1A
Date: Wednesday, March 21, 2007 Sheet 1 of 39
5 4 3 2 1
A B C D E

VDD_A
Close to IC <500mils
25 mils C262 27P/50V_4 CG_XIN
L54 Place these termination to close CK410M.

45

46
2
BK2125HS121-T_8 U15
VDD_SRC_CPU Y2 58 60 14M_REF R373 33_4

VDDA

GNDA
+3V X1 REF0 14M_ICH (13)
14.318MHZ
120 ohms@100Mhz C274 27P/50V_4 CG_XOUT 57 52 R_HCLK_CPU RP31 1 2 33_4P2R CLK_CPU_BCLK (3)

1
C275 C256 C279 C260 C520 X2 CPUCLKT0 R_HCLK_CPU# C518
CPUCLKC0 51 3 4 CLK_CPU_BCLK# (3)
L:300mA .1U_4 10U_8 +3V R381 *10K_4 CK-410M *10P_4
.1U_4 .1U_4 .1U_4 (13,31) VR_PWRGD_CK410# 10 49 R_HCLK_MCH RP32 1 2 33_4P2R
Vtt_PwrGd#/PD CPUCLKT1 CLK_MCH_BCLK (5)
(13) PM_STPCPU# 62 48 R_HCLK_MCH# 3 4
CPU_STOP# CPUCLKC1 CLK_MCH_BCLK# (5)
R374 2.2/F_6 VDD_A (13) PM_STPPCI# 63
PCI/PCIE_STOP#
44
4 C259 C519 CGCLK_SMB CPUCLKT2/PCIET8 4
54 SCLK CPUCLKC2/PCIEC8 43
.1U_4 10U_8 CGDAT_SMB 55
SDATA
41
CLK_BSEL0 R164 4.7K_4 R_48M REQ1#/PCIET7
12 FSA/USB_48MHz REQ2#/PCIEC7 40
CLK_BSEL1 16
CLK_BSEL2 R152 4.7K_4 R_14M_SIO 61 FSB/TEST_MODE R_CLK_PCIE_3GPLL RP33 1
REF1/FSLC/TEST_SEL PCIET6 39 2 33_4P2R CLK_PCIE_3GPLL (6)
38 R_CLK_PCIE_3GPLL# 3 4
PCIEC6 CLK_PCIE_3GPLL# (6)
VDD_REF 56
VDD_SRC_CPU VDD_REF R_CLK_PCIE_DOCK RP34 1
50 36 2 33_4P2R CLK_PCIE_DOCK (29)
VDDCPU PCIET5 R_CLK_PCIE_DOCK#
25 mils PCIEC5
35 3 4 CLK_PCIE_DOCK# (29)
VDD_PCI 1
L55 VDD_PCI VDD_PCI_1 R_CLK_PCIE_ICH RP40 3
+3V 7 VDD_PCI_2 PCIET4 30 4 33_4P2R CLK_PCIE_ICH (12)
BK2125HS121-T_8 31 R_CLK_PCIE_ICH# 1 2
PCIEC4 CLK_PCIE_ICH# (12)
L:300mA C277 C276 C283 VDD_SRC_CPU 21
VDD_PCIE R_CLK_PCIE_SATA RP39 3
28 26 4 33_4P2R CLK_PCIE_SATA (11)
.1U_4 .1U_4 10U_8 VDDPCIE SATA_CKT R_CLK_PCIE_SATA#
42 27 1 2 CLK_PCIE_SATA# (11)
VDD_PCIE SATA_CKC
VDD_48 11 24
VDD_48 PCIET3
PCIEC3 25
CLKGN_REQ3_PCIE 32
R156 475_4 CLKGN_REQ4_PCIE REQ3(PCIE) R_CLK_PCIE_MINI1 RP38 3
(29) PCIE_CLKREQ# 33 REQ4(PCIE) PCIET2 22 4 33_4P2R CLK_PCIE_MINI1 (23)
R162 2.2/F_6 VDD_48 23 R_CLK_PCIE_MINI1# 1 2
PCIEC2 CLK_PCIE_MINI1# (23)
R150 475/F_6 IREF 47
C278 C530 IREF R_CLK_PCIE_LAN RP37 3
Iref=5mA, Ioh=4*Iref
PCIET1 19 4 33_4P2R CLK_PCIE_LAN (14)
20 R_CLK_PCIE_LAN# 1 2
PCIEC1 CLK_PCIE_LAN# (14)
.1U_4 10U_8
RP35 1 2 33_4P2R R_DOT96 14 17 R_DREFSSCLK RP36 3 4 33_4P2R
(6) DREFCLK DOT96MHz 27Mfix/LCD_SSCGT/PCIE0T DREFSSCLK (6)
3 4 R_DOT96# 15 18 R_DREFSSCLK# 1 2
(6) DREFCLK# DOT96MHz# 27SS/LCD_SSCGC/PCIE0C DREFSSCLK# (6)
5 R_PCLK_SIO R385 33_4
selPCIEX0_LCD#/PCI5 PCI_CLK_SIO (26)
T58 34 4 R_PCI_CLK_510 R160 33_4

GND_PCI_1
GND_PCI_2
PWRSAVE# PCI4 PCI_CLK_510 (19)
R_PCLK_PCM R379 33_4

GND_SRC
PCI3 3 PCI_CLK_CB714 (18)

GND_48
R149 1_6 VDD_REF INTERNAL PULL HIGH 64 R_PCLK_1394 R151 33_4
PCICLK2/REQ_SEL PCLK_1394 (21)
9 R_PCLK_ICH R163 33_4

GND

GND

GND
3 PCIF1/selLCD_27# PCLK_ICH (12) 3
C255 C248 R165 33_4 R_48M 8 R_PCLK_591 R386 33_4
(13) CLKUSB_48 PCIF0/ITP_EN PCLK_591 (24)
.1U_4 10U_8 ICS954310BGLF

53
13
59
2
6
29
37
pin5,pin9,pin32,pin33,pin34 internal PU
R153 33_4 R_14M_SIO pin64 internal PD
(26) SIO_14M
"EA report, fail in PCI_CLK_SIO. It is too fast.
C251 BOM change. R385 change to 33 ohm and unstuff R384."
*10P_4

R_PCLK_SIO R384 *10_4


PCLK_DEBUG_SW (24)
R383 10_4
PCLK_DEBUG_HW (23)

SEL2 SEL1 SEL0


PCIE CLK enable/disable control Starpping Terminal Resistor
R_PCLK_SIO R380 10K_4
Frequence select FSC FSB FSA CPU SRC PCI
1 0 1 100 100 33 CLK_CPU_BCLK# RP29 3 4 49.9_4P2R
+3V CLK_CPU_BCLK 1 2
Latched Select. (Pin 17,18) 0 0 1 133 100 33
R159 *10K_4CLKGN_REQ3_PCIE "0" : LCD CLK CLK_MCH_BCLK# RP30 3 4 49.9_4P2R
"1" : PCIEX CLK 0 1 1 166 100 33 Default CLK_MCH_BCLK 1 2
REQ3 Latched Select
"0" : CLK Enable 0 1 0 200 100 33 CLK_PCIE_SATA RP41 3 4 49.9_4P2R
CLK_PCIE_SATA# 1 2
"1" : CLK Disable Control : PCIE 2,4
R_PCLK_591 R382 10K_4
0 0 0 266 100 33 CLK_PCIE_LAN RP49 3 4 49.9_4P2R
1 0 0 333 100 33 CLK_PCIE_LAN# 1 2
ITP/SRC8 SELECT
0: SRC8 1 1 0 400 100 33 CLK_PCIE_3GPLL RP47 1 2 49.9_4P2R
2 1: ITP CLK_PCIE_3GPLL# 3 4 2
1 1 1 200 100 33 CLK_PCIE_MINI1 RP50 3 4 49.9_4P2R
CLK_PCIE_MINI1# 1 2
BSEL strappings need to be set for 533MHz Moby Dick
R_PCLK_ICH R161 10K_4 (Intel?915GM - Calistoga Interposer) CLK_PCIE_ICH RP42 3 4 49.9_4P2R
+3V
+3V (if Calistoga is designed for 667MHz board). CLK_PCIE_ICH# 1 2
SELLCD_27# Select. (Pin 17,18)
R155 10K_4 CLKGN_REQ4_PCIE "0" : 27MHzSS/27MHzSS# pair DREFSSCLK# RP51 3 4 49.9_4P2R
"1" : LCD CLK pair DREFSSCLK 1 2
REQ2 Latched Select +1.05V R390 *1K_4
"0" : CLK Enable DREFCLK# RP52 3 4 49.9_4P2R
DREFCLK 1 2
"1" : CLK Disable Control : PCIE 3,5,7 R389 0_4 CLK_BSEL0 R396 1K_4
(3) CPU_BSEL0 MCH_BSEL0 (6)
CLK_PCIE_DOCK RP48 1 2 49.9_4P2R
R_PCLK_1394 R154 *10K_4 R391 *1K_4 CLK_PCIE_DOCK# 3 4
+3V
PCIE CLK/REQ select
"0" : PCIE CLK
"1" : REQ pin

R394 *1K_4
Reserve for EMI
+1.05V

SM BUS level shift PCI_CLK_SIO C533 *10P_4


R393 0_4 CLK_BSEL1 R392 1K_4 MCH_BSEL1 (6)
(3) CPU_BSEL1
PCI_CLK_510 C284 *10P_4
+3V R395 *0_4
PCI_CLK_CB714 C526 *10P_4

PCLK_DEBUG_SW C534 *10P_4

R375 R376 PCLK_ICH C285 *10P_4


Q29
2

1 RHU002N06 10K_4 10K_4 +1.05V R372 *1K_4 PCLK_591 C286 *10P_4 1

3 1 CGDAT_SMB PCLK_1394 C250 *10P_4


(13,29) PDAT_SMB CGDAT_SMB (9,23)
R369 0_4 CLK_BSEL2 R370 1K_4
(3) CPU_BSEL2 MCH_BSEL2 (6)
R371 *0_4

+3V
PROJECT : ZU2
Q30
2

RHU002N06 Power check Quanta Computer Inc.


3 1 CGCLK_SMB
(13,29) PCLK_SMB CGCLK_SMB (9,23) +3V (3,6,8,9,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,29,30,31,32,34)
Size Document Number Rev
+1.05V (3,4,5,8,11,13,31,32,34)
Clock Gen. 1B
PCLK_SMB/PDAT_SMB(SB&LAN&MINI CARD&EZ,+3V_S5) CGCLK_SMB/CGDAT_SMB(CLK GEN&DDR,+3V) Date: Thursday, March 22, 2007 Sheet 2 of 39
A B C D E
5 4 3 2 1

T36
U28A
(5) H_A#[31:3] (5) H_D#[63:0] H_D#[63:0] (5)
H_A#3 J4 H1
A[3]# ADS# H_ADS# (5)
H_A#4 L4 E2 U28B
A[4]# BNR# H_BNR# (5)
H_A#5 M3 G5 H_D#0 E22 AA23 H_D#32
A[5]# BPRI# H_BPRI# (5) D[0]# D[32]#
H_A#6 K5 H_D#1 F24 AB24 H_D#33
H_A#7 A[6]# H_D#2 E26 D[1]# D[33]# H_D#34
M1 A[7]# DEFER# H5 H_DEFER# (5) D[2]# D[34]# V24

ADDR GROUP 0
H_A#8 N2 F21 H_D#3 H22 V26 H_D#35
A[8]# DRDY# H_DRDY# (5) D[3]# D[35]#

DATA GRP 0
H_A#9 J1 E1 H_D#4 F23 W25 H_D#36

DATA GRP 2
A[9]# DBSY# H_DBSY# (5) D[4]# D[36]#
H_A#10 H_D#5 G25 H_D#37

CONTROL
N3 A[10]# D[5]# D[37]# U23
H_A#11 P5 F1 H_D#6 E25 U25 H_D#38
A[11]# BR0# H_BREQ#0 (5) D[6]# D[38]#
H_A#12 P2 H_D#7 E23 U22 H_D#39
H_A#13 A[12]# D[7]# D[39]#
L1 A[13]# IERR# D20 H_IERR# R347 56.2/F_4 +1.05V H_D#8 K24
D[8]# D[40]# AB25 H_D#40
H_A#14 P4 B3 H_D#9 G24 W22 H_D#41
A[14]# INIT# H_INIT# (11) D[9]# D[41]#
H_A#15 P1 T55 H_D#10 J24 Y23 H_D#42
D A[15]# D[10 D[42]# D
H_A#16 R1 H4 H_D#11 J23 AA26 H_D#43
A[16]# LOCK# H_LOCK# (5) D[11]# D[43]#
L2 H_D#12 H26 Y26 H_D#44
(5) H_ADSTB0# ADSTB[0]# H_CPURST# (5) D[12]# D[44]#
B1 H_RS#[2:0] (5) H_D#13 F26 Y22 H_D#45
(5) H_REQ#[4:0] RESET# D[13]# D[45]#
H_REQ#0 K3 F3 H_RS#0 H_D#14 K22 AC26 H_D#46
H_REQ#1 REQ[0]# RS[0]# H_RS#1 H_D#15 H25 D[14]# D[46]# H_D#47
H2 REQ[1]# RS[1]# F4 D[15]# D[47]# AA24
H_REQ#2 K2 G3 H_RS#2 H23 W24
REQ[2]# RS[2]# (5) H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 (5)
H_REQ#3 J3 G2 G22 Y25
REQ[3]# TRDY# H_TRDY# (5) (5) H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 (5)
H_REQ#4 L5 T37 J26 V23
REQ[4]# (5) H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 (5)
(5) H_A#[31:3] HIT# G6 H_HIT# (5) (5) H_D#[63:0] H_D#[63:0] (5)
H_A#17 Y2 E4
A[17]# HITM# H_HITM# (5)
H_A#18 U5 H_D#16 N22 AC22 H_D#48
H_A#19 A[18]# BPM#0 T50 H_D#17 K25 D[16]# D[48]# H_D#49
R3 A[19]# BPM[0]# AD4 D[17]# D[49]# AC23
H_A#20 W6 AD3 BPM#1 T54 H_D#18 P26 AB22 H_D#50
H_A#21 A[20]# BPM[1]# BPM#2 T51 H_D#19 R23 D[18]# D[50]# H_D#51

XDP/ITP SIGNALS
U4 A[21]# BPM[2]# AD1 D[19]# D[51]# AA21

DATA GRP 1
H_A#22 Y5 AC4 BPM#3 T48 H_D#20 L25 AB21 H_D#52

DATA GRP 3
H_A#23 A[22]# BPM[3]# BPM#4 T46 H_D#21 L22 D[20]# D[52]# H_D#53
U2 A[23]# PRDY# AC2 D[21]# D[53]# AC25
H_A#24 R4 AC1 XDP_BPM#5 H_D#22 L23 AD20 H_D#54
H_A#25 A[24]# PREQ# XDP_TCK H_D#23M23 D[22]# D[54]# H_D#55
T5 A[25]# TCK AC5 D[23]# D[55]# AE22
H_A#26 T3 AA6 XDP_TDI H_D#24 P25 AF23 H_D#56
H_A#27 A[26]# TDI XDP_TDO T43 H_D#25 P22 D[24]# D[56]# H_D#57
W3 A[27]# TDO AB3 D[25]# D[57]# AD24
H_A#28 W5 AB5 XDP_TMS H_D#26 P23 AE21 H_D#58
H_A#29 A[28]# TMS XDP_TRST# +1.05V H_D#27 T24 D[26]# D[58]# H_D#59
Y4 A[29]# TRST# AB6 D[27]# D[59]# AD21
H_A#30 W2 C20 XDP_DBRESET# R349 0_4 H_D#28 R24 AE25 H_D#60
A[30]# DBR# SYS_RST# (13) D[28]# D[60]#
H_A#31 Y1 H_D#29 L26 AF25 H_D#61
A[31]# D[29]# D[61]#
(5) H_ADSTB1# V4 ADSTB[1]# PROCHOT D21 H_PROCHOT_R# R345 68_4 +1.05V H_D#30 T25
D[30]# D[62]# AF22 H_D#62
THERMDA A24 THERMDA H_D#31 N24
D[31]# D[63]# AF26 H_D#63
THERM

(11) H_A20M# A6 A20M# THERMDC A25 THERMDC R330


(5) H_DSTBN#1 M24 DSTBN[1]# DSTBN[3]# AD23 H_DSTBN#3 (5)
A5 1K/F_4 N25 AE24
(11) H_FERR# FERR# (5) H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 (5)
C4 C7 THERMTRIP#_PW R R126 *0_4 M26 AC20
(11) H_IGNNE# IGNNE# THERMTRIP# PM_THRMTRIP# (6,11) (5) H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 (5) +1.05V
R143 0_4 H_STPCLK_R# D5 H_GTLREF AD26 R26 COMP0 27.4/F_6 R327 COMP[0,2]=18mils
C (11) H_STPCLK# STPCLK# GTLREF COMP[0] C
C6 MISC U26 COMP1 54.9/F_4 R331
H CLK

(11) H_INTR LINT0 COMP[1]


(11) H_NMI B4 A22 U1 COMP2 27.4/F_6 R142
LINT1 BCLK[0] CLK_CPU_BCLK (2) R328 *1K/F_4 COMP[2]
(11) H_SMI# A3 A21 C26 V1 COMP3 54.9/F_4 R136 R144
SMI# BCLK[1] CLK_CPU_BCLK# (2) TEST1 COMP[3] T49 T4 *200/F_6
T35 TP_A32# AA1 R329 51_4 D25 E5
RSVD[01]# TEST2 DPRSTP# ICH_DPRSTP# (11,31)
T44 TP_A33# AA4 T22 TP_EXTBREF T10 R326 B5
RSVD[02]# RSVD[12]# DPSLP# H_DPSLP# (11)
T40 TP_A34# AB2 2K/F_6 D24
RSVD[03]# DPWR# H_DPW R# (5)
T42 TP_A35# AA3 B22 D6
RESERVED

RSVD[04]# (2) CPU_BSEL0 BSEL[0] PWRGOOD H_PW RGD (11)


T30 TP_A36# M4 D2 TP_SPARE0 T38 B23 D7
RSVD[05]# RSVD[13]# (2) CPU_BSEL1 BSEL[1] SLP# H_CPUSLP# (5,11)
T29 TP_A37# N5 F6 TP_SPARE1 T31 C21 AE6 H_PWRGD is CMOS driving by ICH
RSVD[06]# RSVD[14]# (2) CPU_BSEL2 BSEL[2] PSI# PSI# (31)
T39 TP_A38# T2 D3 TP_SPARE2 T47
T41 TP_A39# RSVD[07]# RSVD[15]# TP_SPARE3 T45 PZ47903-2741-01
V3 RSVD[08]# RSVD[16]# C1
T34 TP_APM0# B2 AF1 TP_SPARE4 T53
T32 TP_APM1# RSVD[09]# RSVD[17]# TP_SPARE5 T3
C3 RSVD[10]# RSVD[18]# D22
C23 TP_SPARE6 T88
T85 TP_HFPLL RSVD[19]# TP_SPARE7 T84
B25 RSVD[11]# RSVD[20]# C24

PZ47903-2741-01

XDP/ITP Thermal protect +1.05V

+1.05V CPU Thermal monitor


3

+3V

XDP_TMS R139 54.9/F_4 2 Q16 R357 D35


(6,13,31) DELAY_VR_PW RGOOD
FDV301N *10K_4 *BAS316
B B
XDP_TDI R141 54.9/F_4
1

C175 *1U_6
+1.05V
+3V R333 R332 R325
XDP_BPM#5 R140 54.9/F_4
Q28 10K_4 10K_4 200_6

2
RHU002N06 LM86VCC
R129
XDP_TCK R368 54.9/F_4 56_4 (24) 2ND_MBCLK 3 1 C451

.1U_4
+3V
XDP_TRST# R367 54.9/F_4 U26
2

Q27 THERMDA

2
R127 RHU002N06 8 1
THERMTRIP#_PW R SCLK VCC
1 3 SYS_SHDN# (30)
(24) 2ND_MBDATA 3 1 7 2 C448
330_4 Q17 MMBT3904 SDA DXP
6 3 2200P_4
ALERT# DXN

+3V R322 *10K_4 4 5 THERMDC


OVERT# GND
ZU2 change C437 from 10U_8 to 2.2U_6(1/26) +3V R323 *0_4 THERM_ALERT#_R
CPU FAN Add one 2.2uF in U46 G955's VIN.GMT request to add it.
(13) THERM_ALERT#
+5V R321 10K_4
MAX6657
ADDRESS: 98H
+5V R324 CPUFAN#_ON <check list>
+5V Layout Note:Routing 10:10 mils and away
10K_4
from noise source with ground gard
A A
R317 C437 (24) FANSIG
*10K_4 2.2U_8
U25 CN26
2 3 TH_FAN_POW ER
VIN VO 1 4
GND 5 2
CPUFAN#_ON 1 /FON GND
GND
6
7 C440 C445 3 5 PROJECT : ZU2
4 8 C444 PTI_CW Y030-B0G1Z
(24) CPUFAN# VSET GND .01U_4 *.01U_4
G995
2.2U_8
Quanta Computer Inc.
Size Document Number Rev
FANPWR = 1.6*VSET
YOHNA (HOST) 1A
G995/Pin1- internal pull high (+5V)
Date: Thursday, March 22, 2007 Sheet 3 of 39
5 4 3 2 1
5 4 3 2 1

U28D VCC_CORE VCC_CORE


A4 P6
A8
A11
VSS[001]
VSS[002]
VSS[082]
VSS[083] P21
P24 A7
U28C
AB20
36A (T2700) VCC_CORE CAP.
VSS[003] VSS[084] VCC[001] VCC[68]
A14 VSS[004] VSS[085] R2 A9 VCC[002] VCC[69] AB7
A16 R5 A10 AC7 VCC_CORE
VSS[005] VSS[086] VCC[003] VCC[70]
A19 VSS[006] VSS[087] R22 A12 VCC[004] VCC[71] AC9
A23 VSS[007] VSS[088] R25 A13 VCC[005] VCC[72] AC12
A26 VSS[008] VSS[089] T1 A15 VCC[006] VCC[73] AC13

1
B6 T4 A17 AC15 C173 C174
VSS[009] VSS[090] VCC[007] VCC[74] + +
B8 VSS[010] VSS[091] T23 A18 VCC[008] VCC[75] AC17
D D
B11 VSS[011] VSS[092] T26 A20 VCC[009] VCC[76] AC18
B13 U3 B7 AD7 *330u_2V_7343 330U_7343

2
VSS[012] VSS[093] VCC[010] VCC[77] VCC_CORE
B16 VSS[013] VSS[094] U6 B9 VCC[011] VCC[78] AD9
B19 VSS[014] VSS[095] U21 B10 VCC[012] VCC[79] AD10
B21 VSS[015] VSS[096] U24 B12 VCC[013] VCC[80] AD12
B24 VSS[016] VSS[097] V2 B14 VCC[014] VCC[81] AD14
C5 VSS[017] VSS[098] V5 B15 VCC[015] VCC[82] AD15
C8 V22 B17 AD17 C188 C471 C210 C499
VSS[018] VSS[099] VCC[016] VCC[83] *10U_8 *10U_8 *10U_8 *10U_8
C11 VSS[019] VSS[100] V25 B18 VCC[017] VCC[84] AD18
C14 VSS[020] VSS[101] W1 B20 VCC[018] VCC[85] AE9
C16 VSS[021] VSS[102] W4 C9 VCC[019] VCC[86] AE10
C19 VSS[022] VSS[103] W23 C10 VCC[020] VCC[87] AE12
C2 VSS[023] VSS[104] W26 C12 VCC[021] VCC[88] AE13 reserve cap
C22 VSS[024] VSS[105] Y3 C13 VCC[022] VCC[89] AE15
C25 VSS[025] VSS[106] Y6 C15 VCC[023] VCC[90] AE17
D1 Y21 C17 AE18 VCC_CORE
VSS[026] VSS[107] VCC[024] VCC[91]
D4 VSS[027] VSS[108] Y24 C18 VCC[025] VCC[92] AE20
D8 VSS[028] VSS[109] AA2 D9 VCC[026] VCC[93] AF9
D11 VSS[029] VSS[110] AA5 D10 VCC[027] VCC[94] AF10
D13 VSS[030] VSS[111] AA8 D12 VCC[028] VCC[95] AF12
D16 AA11 D14 AF14 C487 C485 C472 C160
VSS[031] VSS[112] VCC[029] VCC[96] 10U_8 10U_8 10U_8 10U_8
D19 VSS[032] VSS[113] AA14 D15 VCC[030] VCC[97] AF15
D23 VSS[033] VSS[114] AA16 D17 VCC[031] VCC[98] AF17
C D26 VSS[034] VSS[115] AA19 D18 VCC[032] VCC[99] AF18 C
E3 AA22 E7 AF20 +1.05V +1.05V
VSS[035] VSS[116] VCC[033] VCC[100]
E6 VSS[036] VSS[117] AA25 E9 VCC[034]
3A
E8 AB1 E10 V6 C209 C207 C497 C498
VSS[037] VSS[118] VCC[035] VCCP[01] 10U_8 10U_8 10U_8 10U_8
E11 VSS[038] VSS[119] AB4 E12 VCC[036] VCCP[02] G21
E14 VSS[039] VSS[120] AB8 E13 VCC[037] VCCP[03] J6
E16 AB11 E15 K6 + C452
VSS[040] VSS[121] VCC[038] VCCP[04] C460 C219 C218 C503 C461 C459
E19 VSS[041] VSS[122] AB13 E17 VCC[039] VCCP[05] M6
E21 AB16 E18 J21 330U_7343 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4
VSS[042] VSS[123] VCC[040] VCCP[06] C486 C484 C208 C206
E24 VSS[043] VSS[124] AB19 E20 VCC[041] VCCP[07] K21
F5 AB23 F7 M21 10U_8 10U_8 10U_8 10U_8
VSS[044] VSS[125] VCC[042] VCCP[08]
F8 VSS[045] VSS[126] AB26 F9 VCC[043] VCCP[09] N21
F11 AC3 F10 N6 +1.5V
VSS[046] VSS[127] VCC[044] VCCP[10]
F13 VSS[047] VSS[128] AC6 F12 VCC[045] VCCP[11] R21
F16 VSS[048] VSS[129] AC8 F14 VCC[046] VCCP[12] R6
F19 AC11 F15 T21 C158 C159 C500 C200
VSS[049] VSS[130] VCC[047] VCCP[13] 10U_8 10U_8 10U_8 10U_8
F2 VSS[050] VSS[131] AC14 F17 VCC[048] VCCP[14] T6
F22 AC16 F18 V21 +1.5V
VSS[051] VSS[132] VCC[049] VCCP[15] C455 C453
F25 VSS[052] VSS[133] AC19 F20 VCC[050] VCCP[16] W21
G4 VSS[053] VSS[134] AC21 AA7 VCC[051]
120mA
G1 AC24 AA9 B26 .01U_4 10U/X5R_8
VSS[054] VSS[135] VCC[052] VCCA C201 C199 C187 C189
G23 VSS[055] VSS[136] AD2 AA10 VCC[053]
G26 AD5 AA12 10U_8 10U_8 10U_8 10U_8
VSS[056] VSS[137] VCC[054]
H3 VSS[057] VSS[138] AD8 AA13 VCC[055] VID[0] AD6 H_VID0 (31)
B H6 VSS[058] VSS[139] AD11 AA15 VCC[056] VID[1] AF5 H_VID1 (31) B
H21 VSS[059] VSS[140] AD13 AA17 VCC[057] VID[2] AE5 H_VID2 (31)
H24 VSS[060] VSS[141] AD16 AA18 VCC[058] VID[3] AF4 H_VID3 (31)
J2 AD19 AA20 AE3 VCC_CORE C474 C473 C186 C494
VSS[061] VSS[142] VCC[059] VID[4] H_VID4 (31)
J5 AD22 AB9 AF2 10U_8 10U_8 10U_8 10U_8
VSS[062] VSS[143] VCC[060] VID[5] H_VID5 (31)
J22 VSS[063] VSS[144] AD25 AC10 VCC[061] VID[6] AE2 H_VID6 (31)
J25 AE1 AB10 R365
VSS[064] VSS[145] VCC[062]
K1 VSS[065] VSS[146] AE4 AB12 VCC[063] 100/F_4
K4 VSS[066] VSS[147] AE8 AB14 VCC[064]
K23 AE11 AB15 AF7 C492 C481 C467 C465
VSS[067] VSS[148] VCC[065] VCCSENSE VCCSENSE (31)
K26 AE14 AB17 10U_8 10U_8 10U_8 10U_8
VSS[068] VSS[149] VCC[066]
L3 VSS[069] VSS[150] AE16 AB18 VCC[067] VSSSENSE AE7 VSSSENSE (31)
L6 VSS[070] VSS[151] AE19
L21 AE23 PZ47903-2741-01 R366
VSS[071] VSS[152]
L24 VSS[072] VSS[153] AE26 100/F_4
M2 AF3 C493 C482 C480 C466
VSS[073] VSS[154] 10U_8 10U_8 10U_8 10U_8
M5 VSS[074] VSS[155] AF6
M22 VSS[075] VSS[156] AF8
M25 VSS[076] VSS[157] AF11 Add 100_F PU on VCCSENSE.
N1 VSS[077] VSS[158] AF13 Add 100_F PD on VSSSENSE.
N4 VSS[078] VSS[159] AF16
N23 VSS[079] VSS[160] AF19 Check intel circuit by Alan(1/26)
N26 VSS[080] VSS[161] AF21
P3 VSS[081] VSS[162] AF24
A A
PZ47903-2741-01

+1.05V +1.05V (2,3,5,8,11,13,31,32,34)


PROJECT : ZU2
VCC_CORE VCC_CORE (31)
+1.5V +1.5V (8,12,13,23,27,34)
Quanta Computer Inc.
Size Document Number Rev
Yonah/Merom CPU(POWER/GND)-2 1A

Date: Thursday, March 22, 2007 Sheet 4 of 39


5 4 3 2 1
5 4 3 2 1

U27I U27J
AC41 AK34 AT23 J11
VSS_0 VSS_97 VSS_180 VSS_273
(3) H_D#[63:0] H_A#[31:3] (3) AA41 AG34 AN23 D11
U27A VSS_1 VSS_98 VSS_181 VSS_274
W41 AF34 AM23 B11
H_D#0 H_A#3 VSS_2 VSS_99 VSS_182 VSS_275
F1 H9 T41 AE34 AH23 AV10
H_D#1 H_D#_0 H_A#_3 H_A#4 VSS_3 VSS_100 VSS_183 VSS_276
J1 C9 P41 AC34 AC23 AP10
H_D#2 H_D#_1 H_A#_4 H_A#5 VSS_4 VSS_101 VSS_184 VSS_277
H1 E11 M41 C34 W23 AL10
H_D#3 H_D#_2 H_A#_5 H_A#6 VSS_5 VSS_102 VSS_185 VSS_278
J6 G11 J41 AW33 K23 AJ10
H_D#4 H_D#_3 H_A#_6 H_A#7 VSS_6 VSS_103 VSS_186 VSS_279
H3 F11 F41 AV33 J23 AG10
H_D#5 H_D#_4 H_A#_7 H_A#8 VSS_7 VSS_104 VSS_187 VSS_280
K2 G12 AV40 AR33 F23 AC10
H_D#6 H_D#_5 H_A#_8 H_A#9 VSS_8 VSS_105 VSS_188 VSS_281
G1 F9 AP40 AE33 C23 W10
H_D#7 H_D#_6 H_A#_9 H_A#10 VSS_9 VSS_106 VSS_189 VSS_282
G2 H11 AN40 AB33 AA22 U10
H_D#8 H_D#_7 H_A#_10 H_A#11 VSS_10 VSS_107 VSS_190 VSS_283
K9 J12 AK40 Y33 K22 BA9
D
H_D#9 H_D#_8 H_A#_11 H_A#12 VSS_11 VSS_108 VSS_191 VSS_284 D
K1 G14 AJ40 V33 G22 AW9
H_D#10 H_D#_9 H_A#_12 H_A#13 VSS_12 VSS_109 VSS_192 VSS_285
K7 D9 AH40 T33 F22 AR9
H_D#11 H_D#_10 H_A#_13 H_A#14 VSS_13 VSS_110 VSS_193 VSS_286
J8 J14 AG40 R33 E22 AH9
H_D#12 H_D#_11 H_A#_14 H_A#15 VSS_14 VSS_111 VSS_194 VSS_287
H4 H13 AF40 M33 D22 AB9
H_D#13 H_D#_12 H_A#_15 H_A#16 VSS_15 VSS_112 VSS_195 VSS_288
J3 J15 AE40 H33 A22 Y9
H_D#14 H_D#_13 H_A#_16 H_A#17 VSS_16 VSS_113 VSS_196 VSS_289
K11 F14 B40 G33 BA21 R9
H_D#15 H_D#_14 H_A#_17 H_A#18 VSS_17 VSS_114 VSS_197 VSS_290
G4 D12 AY39 F33 AV21 G9
H_D#16 H_D#_15 H_A#_18 H_A#19 VSS_18 VSS_115 VSS_198 VSS_291
T10 A11 AW39 D33 AR21 E9
H_D#17 H_D#_16 H_A#_19 H_A#20 VSS_19 VSS_116 VSS_199 VSS_292
W11 C11 AV39 B33 AN21 A9
H_D#18 H_D#_17 H_A#_20 H_A#21 VSS_20 VSS_117 VSS_200 VSS_293
T3 A12 AR39 AH32 AL21 AG8
H_D#19 H_D#_18 H_A#_21 H_A#22 VSS_21 VSS_118 VSS_201 VSS_294
U7 A13 AN39 AG32 AB21 AD8
H_D#20 H_D#_19 H_A#_22 H_A#23 VSS_22 VSS_119 VSS_202 VSS_295
U9 E13 AJ39 AF32 Y21 AA8
H_D#21 H_D#_20 H_A#_23 H_A#24 VSS_23 VSS_120 VSS_203 VSS_296
U11 G13 AC39 AE32 P21 U8
H_D#22 H_D#_21 H_A#_24 H_A#25 VSS_24 VSS_121 VSS_204 VSS_297
T11 F12 AB39 AC32 K21 K8
H_D#23 H_D#_22 H_A#_25 H_A#26 VSS_25 VSS_122 VSS_205 VSS_298
W9 B12 AA39 AB32 J21 C8
H_D#24 H_D#_23 H_A#_26 H_A#27 VSS_26 VSS_123 VSS_206 VSS_299
T1 B14 Y39 G32 H21 BA7
H_D#25 H_D#_24 H_A#_27 H_A#28 VSS_27 VSS_124 VSS_207 VSS_300
T8 C12 W39 B32 C21 AV7
H_D#26 H_D#_25 H_A#_28 H_A#29 VSS_28 VSS_125 VSS_208 VSS_301
T4 A14 V39 AY31 AW20 AP7
H_D#27 H_D#_26 H_A#_29 H_A#30 VSS_29 VSS_126 VSS_209 VSS_302
W7 C14 T39 AV31 AR20 AL7
H_D#28
H_D#29
U5
T9
H_D#_27
H_D#_28
H_D#_29
H_A#_30
H_A#_31
D14 H_A#31 H_VREF :10 mils/20 mils space R39
P39
VSS_30
VSS_31
VSS_32
VSS_127
VSS_128
VSS_129
AN31
AJ31
AM20
AA20
VSS_210
VSS_211
VSS_212
VSS VSS_303
VSS_304
VSS_305
AJ7
AH7
H_D#30 W6 E8 N39 AG31 K20 AF7
H_D#31
H_D#32
T5
AB7
H_D#_30
H_D#_31
H_D#_32
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
B9
C13
H_ADS# (3)
H_ADSTB0# (3)
H_ADSTB1# (3)
+1.05V
M39
L39
VSS_33
VSS_34
VSS_35
VSS VSS_130
VSS_131
VSS_132
AB31
Y31
B20
A20
VSS_213
VSS_214
VSS_215
VSS_306
VSS_307
VSS_308
AC7
R7
H_D#33 AA9 J13 J39 AB30 AN19 G7
H_D#34 H_D#_33 H_VREF_0 VSS_36 VSS_133 VSS_216 VSS_309
W4 C6 H_BNR# (3) H39 E30 AC19 D7
H_D#35 H_D#_34 H_BNR# VSS_37 VSS_134 VSS_217 VSS_310
W3 F6 G39 AT29 W19 AG6

HOST
H_D#_35 H_BPRI# H_BPRI# (3) VSS_38 VSS_135 VSS_218 VSS_311
H_D#36 Y3 C7 C140 F39 AN29 K19 AD6
H_D#_36 H_BREQ#0 H_BREQ#0 (3) VSS_39 VSS_136 VSS_219 VSS_312
H_D#37 Y7 B7 R334 0_4 .1U_4 D39 AB29 G19 AB6
H_D#_37 H_CPURST# H_CPURST# (3) VSS_40 VSS_137 VSS_220 VSS_313
C H_D#38 W5 A7 AT38 T29 C19 Y6 C
H_D#_38 H_DBSY# H_DBSY# (3) VSS_41 VSS_138 VSS_221 VSS_314
H_D#39 Y10 C3 R106 AM38 N29 AH18 U6
H_D#_39 H_DEFER# H_DEFER# (3) VSS_42 VSS_139 VSS_222 VSS_315
H_D#40 AB8 J9 100/F_4 AH38 K29 P18 N6
H_D#_40 H_DPWR# H_DPWR# (3) VSS_43 VSS_140 VSS_223 VSS_316
H_D#41 W2 H8 AG38 G29 H18 K6
H_D#_41 H_DRDY# H_DRDY# (3) VSS_44 VSS_141 VSS_224 VSS_317
H_D#42 AA4 K13 H_VREF AF38 E29 D18 H6
H_D#43 H_D#_42 H_VREF_1 VSS_45 VSS_142 VSS_225 VSS_318
AA7 H_DINV#[3:0] (3) AE38 C29 A18 B6
H_D#44 H_D#_43 H_DINV#0 VSS_46 VSS_143 VSS_226 VSS_319
AA2 J7 C38 B29 AY17 AV5
H_D#45 H_D#_44 H_DINV#_0 H_DINV#1 VSS_47 VSS_144 VSS_227 VSS_320
AA6 W8 AK37 A29 AR17 AF5
H_D#46 H_D#_45 H_DINV#_1 H_DINV#2 C143 R107 VSS_48 VSS_145 VSS_228 VSS_321
AA10 U3 AH37 BA28 AP17 AD5
H_D#47 H_D#_46 H_DINV#_2 H_DINV#3 .1U_4 200/F_4 VSS_49 VSS_146 VSS_229 VSS_322
Y8 AB10 AB37 AW28 AM17 AY4
H_D#48 H_D#_47 H_DINV#_3 VSS_50 VSS_147 VSS_230 VSS_323
AA1 H_DSTBN#[3:0] (3) AA37 AU28 AK17 AR4
H_D#49 H_D#_48 H_DSTBN#0 VSS_51 VSS_148 VSS_231 VSS_324
AB4 K4 Y37 AP28 AV16 AP4
H_D#50 H_D#_49 H_DSTBN#_0 H_DSTBN#1 VSS_52 VSS_149 VSS_232 VSS_325
AC9 T7 W37 AM28 AN16 AL4
H_D#51 H_D#_50 H_DSTBN#_1 H_DSTBN#2 VSS_53 VSS_150 VSS_233 VSS_326
AB11 Y5 V37 AD28 AL16 AJ4
H_D#52 H_D#_51 H_DSTBN#_2 H_DSTBN#3 VSS_54 VSS_151 VSS_234 VSS_327
AC11 AC4 T37 AC28 J16 Y4
H_D#53 H_D#_52 H_DSTBN#_3 VSS_55 VSS_152 VSS_235 VSS_328
AB3 H_DSTBP#[3:0] (3) R37 W28 F16 U4
H_D#54 H_D#_53 H_DSTBP#0 VSS_56 VSS_153 VSS_236 VSS_329
AC2 K3 P37 J28 C16 R4
H_D#55 H_D#_54 H_DSTBP#_0 H_DSTBP#1 VSS_57 VSS_154 VSS_237 VSS_330
AD1 T6 N37 E28 AN15 J4
H_D#56 H_D#_55 H_DSTBP#_1 H_DSTBP#2 VSS_58 VSS_155 VSS_238 VSS_331
AD9 AA5 M37 AP27 AM15 F4
H_D#57 H_D#_56 H_DSTBP#_2 H_DSTBP#3 VSS_59 VSS_156 VSS_239 VSS_332
AC1 AC5 L37 AM27 AK15 C4
H_D#58 H_D#_57 H_DSTBP#_3 VSS_60 VSS_157 VSS_240 VSS_333
AD7 J37 AK27 N15 AY3
H_D#59 H_D#_58 VSS_61 VSS_158 VSS_241 VSS_334
AC6 H37 J27 M15 AW3
H_D#60 H_D#_59 VSS_62 VSS_159 VSS_242 VSS_335
AB5 D3 H_HIT# (3) G37 G27 L15 AV3
H_D#61 H_D#_60 H_HIT# VSS_63 VSS_160 VSS_243 VSS_336
AD10 D4 H_HITM# (3) F37 F27 B15 AL3
H_D#62 H_D#_61 H_HITM# VSS_64 VSS_161 VSS_244 VSS_337
AD4 B3 H_LOCK# (3) D37 C27 A15 AH3
H_D#63 H_D#_62 H_LOCK# VSS_65 VSS_162 VSS_245 VSS_338
AC8 AY36 B27 BA14 AG3
H_D#_63 VSS_66 VSS_163 VSS_246 VSS_339
AW36 AN26 AT14 AF3
H_XRCOMP VSS_67 VSS_164 VSS_247 VSS_340
E1 H_REQ#[4:0] (3) AN36 M26 AK14 AD3
H_XSCOMP H_XRCOMP H_REQ#0 VSS_68 VSS_165 VSS_248 VSS_341
E2 D8 AH36 K26 AD14 AC3
H_XSWING H_XSCOMP H_REQ#_0 H_REQ#1 VSS_69 VSS_166 VSS_249 VSS_342
E4 G8 AG36 F26 AA14 AA3
B H_XSWING H_REQ#_1 H_REQ#2 VSS_70 VSS_167 VSS_250 VSS_343 B
B8 AF36 D26 U14 G3
H_YRCOMP H_REQ#_2 H_REQ#3 VSS_71 VSS_168 VSS_251 VSS_344
Y1 F8 AE36 AK25 K14 AT2
H_YSCOMP H_YRCOMP H_REQ#_3 H_REQ#4 VSS_72 VSS_169 VSS_252 VSS_345
U1 A8 AC36 P25 H14 AR2
H_YSWING H_YSCOMP H_REQ#_4 VSS_73 VSS_170 VSS_253 VSS_346
W1 H_RS#[2:0] (3) C36 K25 E14 AP2
H_YSWING H_RS#0 VSS_74 VSS_171 VSS_254 VSS_347
B4 B36 H25 AV13 AK2
H_RS#_0 H_RS#1 VSS_75 VSS_172 VSS_255 VSS_348
(2) CLK_MCH_BCLK AG2 E6 BA35 E25 AR13 AJ2
H_CLKIN H_RS#_1 H_RS#2 VSS_76 VSS_173 VSS_256 VSS_349
(2) CLK_MCH_BCLK# AG1 D6 AV35 D25 AN13 AD2
H_CLKIN# H_RS#_2 VSS_77 VSS_174 VSS_257 VSS_350
AR35 A25 AM13 AB2
VSS_78 VSS_175 VSS_258 VSS_351
E3 H_CPUSLP# (3,11) AH35 BA24 AL13 Y2
H_SLPCPU# VSS_79 VSS_176 VSS_259 VSS_352
E7 H_TRDY# (3) AB35 AU24 AG13 U2
H_TRDY# VSS_80 VSS_177 VSS_260 VSS_353
Short Stub < 100mils AA35
VSS_81 VSS_178
AL24 P13
VSS_261 VSS_354
T2
Calistoga Y35 AW23 F13 N2
extract from same point VSS_82 VSS_179 VSS_262 VSS_355
W35 D13 J2
VSS_83 VSS_263 VSS_356
V35 B13 H2
VSS_84 VSS_264 VSS_357
T35 AY12 F2
VSS_85 VSS_265 VSS_358
R35 AC12 C2
VSS_86 VSS_266 VSS_359
P35 K12 AL1
VSS_87 VSS_267 VSS_360
N35 H12
VSS_88 VSS_268
M35 E12
Slew/IO Buffer COMP. +1.05V +1.05V
+1.05V +1.05V (2,3,4,8,11,13,31,32,34) L35
VSS_89
VSS_90
AD11
VSS_269
VSS_270
J35 AA11
+1.05V VSS_91 VSS_271
H35 Y11
H_XRCOMP VSS_92 VSS_272
G35
VSS_93
15 mils/10mils F35
VSS_94 Calistoga
D35
R91 R92 R87 R84 VSS_95
AN34
24.9/F_4 54.9/F_4 221/F_4 221/F_4 VSS_96

H_XSCOMP H_XSWING H_YSWING Calistoga


A A

H_YRCOMP +1.05V R86 C130 R80 C121


15 mils/10mils 100/F_4 100/F_4
.1U_4 .1U_4 COMPONENTS P/N
R88 PROJECT : ZU2
24.9/F_4 R89
54.9/F_4
945GM AJSL8Z20T25 Quanta Computer Inc.
H_YSCOMP
Size Document Number Rev
ICH7-M AJSL8YB0T21 GMCH (HOST/GND) 1A

Date: Thursday, March 22, 2007 Sheet 5 of 39


5 4 3 2 1
5 4 3 2 1

20mils/20mils space
U27B
T28 CLK_MCH_OE# H32 RSVD_0 +V1.5_PCIE
T27 MCH_RSVD_1 T32 RSVD_1 AY35
SM_CK_0 CLK_SDRAM0 (9)
T26 MCH_RSVD_2 R32 RSVD_2 AR1 U27C
SM_CK_1 CLK_SDRAM1 (9)
T5 MCH_RSVD_3 F3 RSVD_3 AW7 D32 D40 EXP_A_COMPX R132 24.9/F_4
SM_CK_2 CLK_SDRAM3 (9) (16) LVDS_PWM L_BKLTCTL EXP_A_COMPI
T6 MCH_RSVD_4 F7 RSVD_4 AW40 J30 D38
SM_CK_3 CLK_SDRAM4 (9) (16) LVDS_BLON L_BKLTEN EXP_A_COMPO

RSVD
T9 MCH_RSVD_5 AG11 RSVD_5 +3V R363 10K/F_4 L_CLKCTLA H30
T8 MCH_RSVD_6 R362 10K/F_4 L_CLKCTLB L_CLKCTLA
AF11 AW35 CLK_SDRAM0# (9) H29 F34
T7 MCH_RSVD_7 RSVD_6 SM_CK#_0 L_CLKCTLB EXP_A_RXN_0
H7 RSVD_7 AT1 CLK_SDRAM1# (9) (16) I_EDIDCLK G26 G38 GMCHEXP_RXN1 (17)
T19 MCH_RSVD_8 SM_CK#_1 L_DDC_CLK EXP_A_RXN_1
J19 AY7 CLK_SDRAM3# (9) (16) I_EDIDDATA G25 H34
T25 TV_DCONSEL0 RSVD_8 SM_CK#_2 L_IBG L_DDC_DATA EXP_A_RXN_2
K30 RSVD_9 AY40 CLK_SDRAM4# (9) B38 J38
T24 TV_DCONSEL1 SM_CK#_3 T33 L_VBG L_IBG EXP_A_RXN_3
J29 RSVD_10 C35 L34
T101 MCH_RSVD_11 L_VBG EXP_A_RXN_4
A41 RSVD_11 AU20 CKE0 (9,10) (16) LCD_PWRON F32 M38
T95 MCH_RSVD_12 SM_CKE_0 L_VREFH L_VDDEN EXP_A_RXN_5
D A35 AT20 CKE1 (9,10) C33 N34 D
T94 MCH_RSVD_13 RSVD_12 SM_CKE_1 L_VREFL L_VREFH EXP_A_RXN_6
A34 BA29 CKE2 (9,10) C32 P38
T23 MCH_RSVD_14 RSVD_13 SM_CKE_2 R131 L_VREFL EXP_A_RXN_7
D28 AY29 CKE3 (9,10) R34
T92 MCH_RSVD_15 RSVD_14 SM_CKE_3 EXP_A_RXN_8
D27 (16) TXLCLKOUT- A33 T38
RSVD_15 1.5K/F_4 LA_CLK# EXP_A_RXN_9
SM_CS#_0 AW13 SM_CS0# (9,10) (16) TXLCLKOUT+ A32 LA_CLK EXP_A_RXN_10 V34
SM_CS#_1 AW12 SM_CS1# (9,10) E27 LB_CLK# EXP_A_RXN_11 W38
K16 AY21 E26 Y34

MUXING
(2) MCH_BSEL0 CFG_0 SM_CS#_2 SM_CS2# (9,10) LB_CLK EXP_A_RXN_12
(2) MCH_BSEL1 K18 AW21 SM_CS3# (9,10) AA38
CFG_1 SM_CS#_3 EXP_A_RXN_13

LVDS
(2) MCH_BSEL2 J18
CFG_2
15mils/15mils (16) TXLOUT0- C37
LA_DATA#_0 EXP_A_RXN_14
AB34
MCH_CFG_3 F18 AL20 M_OCDCOMP_0 B35 AC38
CFG_3 SM_OCDCOMP_0 (16) TXLOUT1- LA_DATA#_1 EXP_A_RXN_15
T13 MCH_CFG_4 E15 AF10 M_OCDCOMP_1 A37
CFG_4 SM_OCDCOMP_1 (16) TXLOUT2- LA_DATA#_2
T12 MCH_CFG_5 F15 D34
MCH_CFG_6 CFG_5 EXP_A_RXP_0
E18 CFG_6 SM_ODT_0 BA13 M_ODT0 (9,10) EXP_A_RXP_1 F38 GMCHEXP_RXP1 (17)

GRAPHICS
MCH_CFG_7 D19 BA12 R104 R115 G34
CFG_7 SM_ODT_1 M_ODT1 (9,10) EXP_A_RXP_2
MCH_CFG_8 D16 AY20 B37 H38
CFG_8 SM_ODT_2 M_ODT2 (9,10) (16) TXLOUT0+ LA_DATA_0 EXP_A_RXP_3

CFG
T11 MCH_CFG_9 G16 AU21 *40.2/F_4 *40.2/F_4 B34 J34
CFG_9 SM_ODT_3 M_ODT3 (9,10) (16) TXLOUT1+ LA_DATA_1 EXP_A_RXP_4
MCH_CFG_10 E16 A36 L38

DDR
CFG_10 (16) TXLOUT2+ LA_DATA_2 EXP_A_RXP_5
MCH_CFG_11 D15 AV9 M_RCOMP# M34
MCH_CFG_12 CFG_11 SM_RCOMP# M_RCOMP Layout as short as passable EXP_A_RXP_6
G15 CFG_12 SM_RCOMP AT9 EXP_A_RXP_7 N38
MCH_CFG_13 K15 NC from WW45 G30 P34
MCH_CFG_14 CFG_13 LB_DATA#_0 EXP_A_RXP_8
C15 CFG_14 SM_VREF_0 AK1 SMDDR_VREF_MCH R83 0_6 SMDDR_VREF 20 mil D30 LB_DATA#_1 EXP_A_RXP_9 R38
T90 MCH_CFG_15 H16 AK41 F29 T34
T17 MCH_CFG_16 CFG_15 SM_VREF_1 R85 *10K_6 +1.8VSUS LB_DATA#_2 EXP_A_RXP_10
G18 CFG_16 EXP_A_RXP_11 V38
MCH_CFG_17 H15 R82 *10K_6 +1.8VSUS W34
T14 MCH_CFG_18 CFG_17 EXP_A_RXP_12
J25 AF33 CLK_PCIE_3GPLL# (2) Y38
MCH_CFG_19 CFG_18 G_CLKIN# EXP_A_RXP_13
K27 AG33 CLK_PCIE_3GPLL (2) F30 AA34
MCH_CFG_20 CFG_19 G_CLKIN LB_DATA_0 EXP_A_RXP_14
J26 A27 DREFCLK# (2) D29 AB38

CLK
CFG_20 D_REFCLKIN# LB_DATA_1 EXP_A_RXP_15

PCI-EXPRESS
A26 DREFCLK (2) F28
D_REFCLKIN R102 LB_DATA_2 CGMCHEXP_TXN0 C245 0.1U_4
(13) PM_BMBUSY# G28 C40 DREFSSCLK# (2) F36 SDVOB_R- (17)
PM_EXTTS#0 PM_BMBUSY# D_REFSSCLKIN# 80.6/F_4 EXP_A_TXN_0 CGMCHEXP_TXN1 C510 0.1U_4
(9) PM_EXTTS#0 F25 D41 DREFSSCLK (2) G40 SDVOB_G- (17)
PM_EXTTS#_0 D_REFSSCLKIN EXP_A_TXN_1
C
(13,31) PM_DPRSLPVR
(3,11) PM_THRMTRIP#
R358 0_4 PM_EXTTS#1 H26
G6
PM_EXTTS#_1
PM_THRMTRIP#
PM DMI_TXN[3:0] (12)
M_RCOMP# EXP_A_TXN_2
EXP_A_TXN_3
H36
J40
CGMCHEXP_TXN2
CGMCHEXP_TXN3
C247
C512
0.1U_4
0.1U_4
SDVOB_B- (17)
SDVOB_CLK- (17)
C
AH33 AE35 DMI_TXN0 TV_COMP A16 L36
(3,13,31) DELAY_VR_PWRGOOD PWROK DMI_RXN_0 (16) TV_COMP TV_DACA_OUT EXP_A_TXN_4
R128 100/F_4RST IN# MCH AH34 AF39 DMI_TXN1 15mils/10mils TV_Y/G C18 M40
(12) PLT_RST-R# RSTIN# DMI_RXN_1 (16) TV_Y/G TV_DACB_OUT EXP_A_TXN_5
AG35 DMI_TXN2 TV_C/R A19 N36
DMI_RXN_2 (16) TV_C/R TV_DACC_OUT EXP_A_TXN_6

TV
AH39 DMI_TXN3 M_RCOMP P40
DMI_RXN_3 EXP_A_TXN_7
MISC

H28 R113 150/F_4 R116 TVIREF J20 R36


(17) SDVO_CTRLCLK SDVO_CTRLCLK TV_IREF EXP_A_TXN_8
H27 R114 150/F_4 B16 T40
(17) SDVO_CTRLDATA SDVO_CTRLDATA TV_IRTNA EXP_A_TXN_9
K28 AC35 DMI_TXP0 R108 150/F_4 4.99K/F_6 B18 V36
(12) MCH_ICH_SYNC LT_RESET# DMI_RXP_0 TV_IRTNB EXP_A_TXN_10
AE39 DMI_TXP1 R101 B19 W40
DMI_RXP_1 DMI_TXP2 80.6/F_4 TV_IRTNC EXP_A_TXN_11
AF35 Y36
TP_MCH_NC0 DMI_RXP_2 DMI_TXP3 EXP_A_TXN_12
T81 D1 AG39 DMI_TXP[3:0] (12) AA40
TP_MCH_NC1 NC0 DMI_RXP_3 EXP_A_TXN_13
T103 C41 DMI_RXN[3:0] (12) AB36
TP_MCH_NC2 NC1 EXP_A_TXN_14
T80 C1 NC2 < 0.1" . 15mils/15mils space EXP_A_TXN_15 AC40
T97 TP_MCH_NC3 BA41 AE37 DMI_RXN0
TP_MCH_NC4 BA40 NC3 DMI_TXN_0
T96
NC4 DMI_TXN_1 AF41 DMI_RXN1 (15) CRT_BLU
CRT_BLU E23 CRT_BLUE EXP_A_TXP_0 D36 CGMCHEXP_TXP0 C244 0.1U_4 SDVOB_R+ (17)
NC

T93 TP_MCH_NC5 BA39 AG37 DMI_RXN2 D23 F40 CGMCHEXP_TXP1 C509 0.1U_4 SDVOB_G+ (17)
TP_MCH_NC6 NC5 DMI_TXN_2 CRT_BLUE# EXP_A_TXP_1
T91 BA3 NC6 DMI_TXN_3 AH41 DMI_RXN3 (15) CRT_GRN
CRT_GRN C22 CRT_GREEN EXP_A_TXP_2 G36 CGMCHEXP_TXP2 C246 0.1U_4 SDVOB_B+ (17)

VGA
T89 TP_MCH_NC7 BA2 B22 H40 CGMCHEXP_TXP3 C511 0.1U_4
DMI

NC7 CRT_GREEN# EXP_A_TXP_3 SDVOB_CLK+ (17)


T87 TP_MCH_NC8 BA1 CRT_RED A21 J36
NC8 (15) CRT_RED CRT_RED EXP_A_TXP_4
T98 TP_MCH_NC9 B41 AC37 DMI_RXP0 R119 150/F_4 B21 L40
TP_MCH_NC10 NC9 DMI_TXP_0 DMI_RXP1 R117 150/F_4 CRT_RED# EXP_A_TXP_5
T79 B2 AE41 M36
TP_MCH_NC11 AY41 NC10 DMI_TXP_1 DMI_RXP2 R118 150/F_4 EXP_A_TXP_6
T102 AF37 N40
TP_MCH_NC12 AY1 NC11 DMI_TXP_2 DMI_RXP3 EXP_A_TXP_7
T82 AG41 (15) CRT_DDCCLK C26 P36
TP_MCH_NC13 AW41 NC12 DMI_TXP_3 CRT_DDC_CLK EXP_A_TXP_8
T99 (15) CRT_DDCDAT C25 R40
TP_MCH_NC14 AW1 NC13 R354 39_4 HSYNC_R CRT_DDC_DATA EXP_A_TXP_9
T83 (15) HSYNC G23 T36
TP_MCH_NC15 A40 NC14 R120 255/F_6CRTIREF CRT_HSYNC EXP_A_TXP_10
T104 J22 V40
TP_MCH_NC16 NC15 R355 39_4 VSYNC_R CRT_IREF EXP_A_TXP_11
T86 A4 DMI_RXP[3:0] (12) (15) VSYNC H23 W36
TP_MCH_NC17 A39 NC16 CRT_VSYNC EXP_A_TXP_12
T100 Y40
TP_MCH_NC18 NC17 EXP_A_TXP_13
T78 A3 AA36
+3V NC18 EXP_A_TXP_14
AB40
EXP_A_TXP_15
B Calistoga B
Calistoga
R356 10K/F_4 PM_EXTTS#0

R359 *10K/F_4 PM_EXTTS#1 < 0.1" . 15mils/15mils space


use 1% R

MCH_CFG_10 R346 *2.2K_4


GMCH Strap pin CFG[3..17] has internal PU CFG[18..20] has internal PD
+V1.5_PCIE +V1.5_PCIE (8)
MCH_CFG_10 Host PLL VCC Select +3V +3V (2,3,8,9,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,29,30,31,32,34)
Low=Reserved SMDDR_VREF SMDDR_VREF (9,33,34)
MCH_CFG_5 R341 *2.2K_4 High=Mobility MCH_CFG_18 R360 *1K/F_4 +3V +1.8VSUS +1.8VSUS (8,9,33,34)
MCH_CFG_5 DMI speed mode
Low = DMI X2 MCH_CFG_18 VCC Select
High=DMIX4 MCH_CFG_11 R343 *2.2K_4 LOW=1.05V
High=1.5V
MCH_CFG_11 PSB 4x CLK ENABLE
MCH_CFG_6 R348 *2.2K_4 Low=Reserved
High=Calistoga
MCH_CFG_6 DDR
Low =Moby Dick
High= Calistoga (Default) MCH_CFG_19 R361 *1K/F_4 +3V
MCH_CFG_12 R336 *2.2K_4
MCH_CFG_19 DMI LANE Reversal
MCH_CFG_7 R112 *2.2K_4 Low=Normal
MCH_CFG_13 R109 *2.2K_4 High=LANES Reversed
MCH_CFG_7 CPU Strap
A
Low=RSVD A
High=Mobile CPU MCH_CFG_12,13 XOR/ALLZ
0,0=Partial clock gating disable MCH_CFG_20 R364 *1K/F_4 +3V
0,1=All-Z mode enable
MCH_CFG_9 R111 *2.2K_4 1,0=XOR mode enable MCH_CFG_20 PCIE Backward interpoerability mode
1,1=Normal Low= only SDVO or PCIE x1 is
MCH_CFG_9 PCI Exp Graphics Lane operational (defaults)
Low =Reserved
High=Normal MCH_CFG_16 R344 *2.2K_4 High=SDVO and PCIE x1 are operation PROJECT : ZU2
simultaneously via the PEG port
MCH_CFG_16 FSB Dynmic ODT
Low=Dynamic ODT Disabled Quanta Computer Inc.
High=Dynamic ODT Enabled. Size Document Number Rev
GMCH (DMI&PCIE&VGA ) 1A

Date: Thursday, March 22, 2007 Sheet 6 of 39


5 4 3 2 1
5 4 3 2 1

(9) R_A_MD[63:0]
U27D
R_A_MD0 AJ35 AU12
SA_DQ0 SA_BS_0 R_A_BS0# (9,10) (9) R_B_MD[63:0]
R_A_MD1 AJ34 AV14 U27E
SA_DQ1 SA_BS_1 R_A_BS1# (9,10)
R_A_MD2 AM31 BA20 R_B_MD0 AK39
SA_DQ2 SA_BS_2 R_A_BS2# (9,10) SB_DQ0
R_A_MD3 AM33 R_B_MD1 AJ37 AT24
SA_DQ3 R_A_SCASA# (9,10) SB_DQ1 SB_BS_0 R_B_BS0# (9,10)
R_A_MD4 AJ36 AY13 R_B_MD2 AP39 AV23
SA_DQ4 SA_CAS# R_A_DM[7:0] (9) SB_DQ2 SB_BS_1 R_B_BS1# (9,10)
R_A_MD5 AK35 AJ33 R_A_DM0 R_B_MD3 AR41 AY28
D SA_DQ5 SA_DM_0 SB_DQ3 SB_BS_2 R_B_BS2# (9,10) D
R_A_MD6 AJ32 AM35 R_A_DM1 R_B_MD4 AJ38
SA_DQ6 SA_DM_1 SB_DQ4 R_B_SCASA# (9,10)
R_A_MD7 AH31 AL26 R_A_DM2 R_B_MD5 AK38 AR24
SA_DQ7 SA_DM_2 SB_DQ5 SB_CAS# R_B_DM[7:0] (9)
R_A_MD8 AN35 AN22 R_A_DM3 R_B_MD6 AN41 AK36 R_B_DM0
R_A_MD9 SA_DQ8 SA_DM_3 R_A_DM4 R_B_MD7 SB_DQ6 SB_DM_0 R_B_DM1
AP33 SA_DQ9 SA_DM_4 AM14 AP41 SB_DQ7 SB_DM_1 AR38
R_A_MD10 AR31 AL9 R_A_DM5 R_B_MD8 AT40 AT36 R_B_DM2
R_A_MD11 SA_DQ10 SA_DM_5 R_A_DM6 R_B_MD9 SB_DQ8 SB_DM_2 R_B_DM3
AP31 SA_DQ11 SA_DM_6 AR3 AV41 SB_DQ9 SB_DM_3 BA31
R_A_MD12 AN38 AH4 R_A_DM7 R_B_MD10 AU38 AL17 R_B_DM4
R_A_MD13 SA_DQ12 SA_DM_7 R_B_MD11 SB_DQ10 SB_DM_4 R_B_DM5
AM36 SA_DQ13 R_A_DQS[7:0] (9) AV38 SB_DQ11 SB_DM_5 AH8
R_A_MD14 AM34 AK33 R_A_DQS0 R_B_MD12 AP38 BA5 R_B_DM6

A
R_A_MD15 SA_DQ14 SA_DQS_0 R_A_DQS1 R_B_MD13 SB_DQ12 SB_DM_6 R_B_DM7
AN33 SA_DQ15 SA_DQS_1 AT33 AR40 SB_DQ13 SB_DM_7 AN4
R_A_MD16 AK26 AN28 R_A_DQS2 R_B_MD14 AW38
SA_DQ16 SA_DQS_2 SB_DQ14 R_B_DQS[7:0] (9)
R_A_MD17 AL27 AM22 R_A_DQS3 R_B_MD15 AY38 AM39 R_B_DQS0

B
R_A_MD18 SA_DQ17 SA_DQS_3 R_A_DQS4 R_B_MD16 SB_DQ15 SB_DQS_0 R_B_DQS1
AM26 SA_DQ18 SA_DQS_4 AN12 BA38 SB_DQ16 SB_DQS_1 AT39
R_A_MD19 AN24 AN8 R_A_DQS5 R_B_MD17 AV36 AU35 R_B_DQS2

MEMORY
R_A_MD20 SA_DQ19 SA_DQS_5 R_A_DQS6 R_B_MD18 SB_DQ17 SB_DQS_2 R_B_DQS3
AK28 SA_DQ20 SA_DQS_6 AP3 AR36 SB_DQ18 SB_DQS_3 AR29
R_A_MD21 AL28 AG5 R_A_DQS7 R_B_MD19 AP36 AR16 R_B_DQS4
SA_DQ21 SA_DQS_7 R_A_DQS#[7:0] (9) SB_DQ19 SB_DQS_4
R_A_MD22 AM24 AK32 R_A_DQS#0 R_B_MD20 BA36 AR10 R_B_DQS5

MEMORY
R_A_MD23 SA_DQ22 SA_DQS#_0 R_A_DQS#1 R_B_MD21 SB_DQ20 SB_DQS_5 R_B_DQS6
AP26 SA_DQ23 SA_DQS#_1 AU33 AU36 SB_DQ21 SB_DQS_6 AR7
R_A_MD24 AP23 AN27 R_A_DQS#2 R_B_MD22 AP35 AN5 R_B_DQS7
SA_DQ24 SA_DQS#_2 SB_DQ22 SB_DQS_7 R_B_DQS#[7:0] (9)
R_A_MD25 AL22 AM21 R_A_DQS#3 R_B_MD23 AP34 AM40 R_B_DQS#0
R_A_MD26 SA_DQ25 SA_DQS#_3 R_A_DQS#4 R_B_MD24 SB_DQ23 SB_DQS#_0 R_B_DQS#1
AP21 SA_DQ26 SA_DQS#_4 AM12 AY33 SB_DQ24 SB_DQS#_1 AU39
R_A_MD27 AN20 AL8 R_A_DQS#5 R_B_MD25 BA33 AT35 R_B_DQS#2
R_A_MD28 SA_DQ27 SA_DQS#_5 R_A_DQS#6 R_B_MD26 SB_DQ25 SB_DQS#_2 R_B_DQS#3
AL23 SA_DQ28 SA_DQS#_6 AN3 AT31 SB_DQ26 SB_DQS#_3 AP29
R_A_MD29 AP24 AH5 R_A_DQS#7 R_B_MD27 AU29 AP16 R_B_DQS#4
C SA_DQ29 SA_DQS#_7 SB_DQ27 SB_DQS#_4 C
R_A_MD30 AP20 R_B_MD28 AU31 AT10 R_B_DQS#5
SA_DQ30 R_A_MA[13:0] (9,10) SB_DQ28 SB_DQS#_5
R_A_MD31 AT21 AY16 R_A_MA0 R_B_MD29 AW31 AT7 R_B_DQS#6
R_A_MD32 SA_DQ31 SA_MA_0 R_A_MA1 R_B_MD30 SB_DQ29 SB_DQS#_6 R_B_DQS#7
R_A_MD33
AR12
AR14
SA_DQ32
SA_DQ33
SYSTEM SA_MA_1
SA_MA_2
AU14
AW16 R_A_MA2 R_B_MD31
AV29
AW29
SB_DQ30
SB_DQ31
SB_DQS#_7 AP5
R_B_MA[13:0] (9,10)
R_A_MD34 AP13 BA16 R_A_MA3 R_B_MD32 AM19 AY23 R_B_MA0
R_A_MD35 SA_DQ34 SA_MA_3 R_A_MA4 R_B_MD33 SB_DQ32 SB_MA_0 R_B_MA1

SYSTEM
AP12 SA_DQ35 SA_MA_4 BA17 AL19 SB_DQ33 SB_MA_1 AW24
R_A_MD36 AT13 AU16 R_A_MA5 R_B_MD34 AP14 AY24 R_B_MA2
R_A_MD37 SA_DQ36 SA_MA_5 R_A_MA6 R_B_MD35 SB_DQ34 SB_MA_2 R_B_MA3
AT12 SA_DQ37 SA_MA_6 AV17 AN14 SB_DQ35 SB_MA_3 AR28
R_A_MD38 AL14 AU17 R_A_MA7 R_B_MD36 AN17 AT27 R_B_MA4
R_A_MD39 SA_DQ38 SA_MA_7 R_A_MA8 R_B_MD37 SB_DQ36 SB_MA_4 R_B_MA5
AL12 SA_DQ39 SA_MA_8 AW17 AM16 SB_DQ37 SB_MA_5 AT28
R_A_MD40 AK9 AT16 R_A_MA9 R_B_MD38 AP15 AU27 R_B_MA6
R_A_MD41 SA_DQ40 SA_MA_9 R_A_MA10 R_B_MD39 SB_DQ38 SB_MA_6 R_B_MA7
AN7 SA_DQ41 SA_MA_10 AU13 AL15 SB_DQ39 SB_MA_7 AV28
R_A_MD42 AK8 AT17 R_A_MA11 R_B_MD40 AJ11 AV27 R_B_MA8
R_A_MD43 SA_DQ42 SA_MA_11 R_A_MA12 R_B_MD41 SB_DQ40 SB_MA_8 R_B_MA9
AK7 SA_DQ43 SA_MA_12 AV20 AH10 SB_DQ41 SB_MA_9 AW27
R_A_MD44 AP9 AV12 R_A_MA13 R_B_MD42 AJ9 AV24 R_B_MA10
SA_DQ44 SA_MA_13 SB_DQ42 SB_MA_10
DDR

R_A_MD45 AN9 R_B_MD43 AN10 BA27 R_B_MA11


R_A_MD46 SA_DQ45 R_B_MD44 SB_DQ43 SB_MA_11 R_B_MA12
AT5 SA_DQ46 SA_RAS# AW14 R_A_SRASA# (9,10) AK13 SB_DQ44 SB_MA_12 AY27
R_A_MD47 AL5 AK23 TP_MA_RCVENIN# R_B_MD45 AH11 AR23 R_B_MA13
SA_DQ47 SA_RCVENIN# T20 SB_DQ45 SB_MA_13

DDR
R_A_MD48 AY2 AK24 TP_MA_RCVENOUT# R_B_MD46 AK10
SA_DQ48 SA_RCVENOUT# T21 SB_DQ46
R_A_MD49 AW2 AY14 R_B_MD47 AJ8 AU23
SA_DQ49 SA_WE# R_A_BMWEA# (9,10) SB_DQ47 SB_RAS# R_B_SRASA# (9,10)
R_A_MD50 AP1 R_B_MD48 BA10 AK16 TP_MB_RCVENIN#
R_A_MD51 SA_DQ50 R_B_MD49 SB_DQ48 SB_RCVENIN# TP_MB_RCVENOUT# T16
AN2 SA_DQ51 AW10 SB_DQ49 SB_RCVENOUT# AK18 T18
R_A_MD52 AV2 R_B_MD50 BA4 AR27
SA_DQ52 SB_DQ50 SB_WE# R_B_BMWEA# (9,10)
B R_A_MD53 AT3 R_B_MD51 AW4 B
R_A_MD54 SA_DQ53 R_B_MD52 SB_DQ51
AN1 SA_DQ54 AY10 SB_DQ52
R_A_MD55 AL2 R_B_MD53 AY9
R_A_MD56 SA_DQ55 R_B_MD54 SB_DQ53
AG7 SA_DQ56 AW5 SB_DQ54
R_A_MD57 AF9 R_B_MD55 AY5
R_A_MD58 SA_DQ57 R_B_MD56 SB_DQ55
AG4 SA_DQ58 AV4 SB_DQ56
R_A_MD59 AF6 R_B_MD57 AR5
R_A_MD60 SA_DQ59 R_B_MD58 SB_DQ57
AG9 SA_DQ60 AK4 SB_DQ58
R_A_MD61 AH6 R_B_MD59 AK3
R_A_MD62 SA_DQ61 R_B_MD60 SB_DQ59
AF4 SA_DQ62 AT4 SB_DQ60
R_A_MD63 AF8 R_B_MD61 AK5
SA_DQ63 R_B_MD62 SB_DQ61
AJ5 SB_DQ62
Calistoga R_B_MD63 AJ3 SB_DQ63
Calistoga

A A

PROJECT : ZU2
Quanta Computer Inc.
Size Document Number Rev
GMCH (DDR2) 1A

Date: Thursday, March 22, 2007 Sheet 7 of 39


5 4 3 2 1
5 4 3 2 1

3500mA U27G +2.5V


+1.05V AA33
VCC_0 +1.8VSUS +1.05V
W33
VCC_1
20mils 40 mil
C443 P33 3200mA +V1.5_TVDAC +1.5V
VCC_2 +1.05V

+
N33 C213 C507
VCC_3 L50
L33 AU41 C514 .47U_6 U27F U27H
220U_3528 VCC_4 VCC_SM_0 .1U_4 10U/X5R_8
J33 AT41 VCC_SM1 AD27 H22
VCC_5 VCC_SM_1 VCC_NCTF0 VCCSYNC
AA32 AM41 VCC_SM2 C513 .47U_6 AC27 AE27 AC14
VCC_6 VCC_SM_2 VCC_NCTF1 VSS_NCTF0 VTT_0 BK1608LL121_6
Y32 AU40 25mils AB27 AE26 +2.5V S:60mA C30 AB14
VCC_7 VCC_SM_3 VCC_NCTF2 VSS_NCTF1 VCC_TXLVDS0 VTT_1 C176 C476
W32
VCC_8 VCC_SM_4
BA34 AA27
VCC_NCTF3 VSS_NCTF2
AE25 B30
VCC_TXLVDS1 VTT_2
W14 L:150mA
V32 AY34 Y27 AE24 A30 V14
VCC_9 VCC_SM_5 VCC_NCTF4 VSS_NCTF3 VCC_TXLVDS2 VTT_3 .022U_4 .1U_4
P32 AW34 W27 AE23 T14
VCC_10 VCC_SM_6 VCC_NCTF5 VSS_NCTF4 +V1.5_3GPLL +2.5V VTT_4
N32
VCC_11 VCC_SM_7
AV34 V27
VCC_NCTF6 VSS_NCTF5
AE22 +V1.5_PCIE 80mils AJ41
VCC3G0 VTT_5
R14
M32
VCC_12 VCC_SM_8
AU34 U27
VCC_NCTF7 VSS_NCTF6
AE21 60mils AB41
VCC3G1 VTT_6
P14 40 mil
L32 AT34 T27 AE20 Y41 N14 +V1.5_QTVDAC
VCC_13 VCC_SM_9 VCC_NCTF8 VSS_NCTF7 C179 VCC3G2 VTT_7
D J32 AR34 R27 AE19 V41 M14 L48 D
VCC_14 VCC_SM_10 VCC_NCTF9 VSS_NCTF8 C228 C243 .1U_4 VCC3G3 VTT_8
AA31 BA30 AD26 AE18 R41 L14
VCC_15 VCC_SM_11 VCC_NCTF10 VSS_NCTF9 VCC3G4 VTT_9
W31 AY30 AC26 AC17 N41 AD13
VCC_16 VCC_SM_12 VCC_NCTF11 VSS_NCTF10 .1U_4 10U/X5R_8 VCC3G5 VTT_10
V31 AW30 AB26 Y17 L41 AC13
VCC_17 VCC_SM_13 VCC_NCTF12 VSS_NCTF11 VCC3G6 VTT_11 BK1608LL121_6
T31 AV30 AA26 U17 AC33 AB13
VCC_18 VCC_SM_14 VCC_NCTF13 VSS_NCTF12 VCCA_3GPLL VTT_12 C162 C470
R31
VCC_19 VCC_SM_15
AU30 Y26
VCC_NCTF14
S:2mA G41
VCCA_3GBG VTT_13
AA13 L:150mA
P31
VCC_20 VCC_SM_16
AT30 W26
VCC_NCTF15 100mils or shape +V2.5_CRTDAC
H41
VSSA_3GBG VTT_14
Y13
N31 AR30 V26 W13 .1U_4 .022U_4
VCC_21 VCC_SM_17 VCC_NCTF16 +1.5V_AUX VTT_15
M31 AP30 U26 S:70mA F21 V13
VCC_22 VCC_SM_18 VCC_NCTF17 VCCA_CRTDAC0 VTT_16
AA30 AN30 T26 E21 U13
VCC_23 VCC_SM_19 VCC_NCTF18 VCCA_CRTDAC1 VTT_17
Y30 AM30 R26 AG27 G21 T13
VCC_24 VCC_SM_20 VCC_NCTF19 VCCAUX_NCTF0 C184 C185 C191 VSSA_CRTDAC VTT_18
W30 AM29 AD25 AF27 R13
VCC_25 VCC_SM_21 VCC_NCTF20 VCCAUX_NCTF1 VTT_19
V30
VCC_26 VCC_SM_22
AL29 AC25
VCC_NCTF21 VCCAUX_NCTF2
AG26 +V1.5_DPLLA S:50mA B26
VCCA_DPLLA VTT_20
N13
U30 AK29 AB25 AF26 .1U_4 .022U_4 100U_3528 +V1.5_DPLLB S:50mA C39 M13
VCC_27 VCC_SM_23 VCC_NCTF22 VCCAUX_NCTF3 VCCA_DPLLB VTT_21
T30 AJ29 AA25 AG25 AF1 L13
VCC_28 VCC_SM_24 VCC_NCTF23 VCCAUX_NCTF4 VCCA_HPLL VTT_22 +2.5V R351 D36 +1.05V
R30
VCC_29 VCC_SM_25
AH29 Y25
VCC_NCTF24 VCCAUX_NCTF5
AF25 +V1.5_HPLL S:45mA VTT_23
AB12
P30 AJ28 W25 AG24 +2.5V S:10mA A38 AA12 10_4 PDZ5.6B
VCC_30 VCC_SM_26 VCC_NCTF25 VCCAUX_NCTF6 VCCA_LVDS VTT_24
N30 AH28 V25 AF24 B39 Y12 1 2
VCC_31 VCC_SM_27 VCC_NCTF26 VCCAUX_NCTF7 C214 C241 VSSA_LVDS VTT_25
M30 AJ27 U25 AG23 W12
VCC_32 VCC_SM_28 VCC_NCTF27 VCCAUX_NCTF8 VTT_26 +V2.5_CRTDAC
L30
VCC_33 VCC_SM_29
AH27 T25
VCC_NCTF28 VCCAUX_NCTF9
AF23 +V1.5_MPLL S:45mA AF2
VCCA_MPLL VTT_27
V12
AA29 BA26 R25 AG22 .01U_4 .1U_4 U12 20mils
VCC_34 VCC_SM_30 VCC_NCTF29 VCCAUX_NCTF10 VTT_28 L49 BK1608LL121_6
Y29 AY26 AD24 AF22 H20 T12
VCC_35 VCC_SM_31 VCC_NCTF30 VCCAUX_NCTF11 VCCA_TVBG VTT_29
W29
VCC_36 VCC_SM_32
AW26 AC24
VCC_NCTF31 VCCAUX_NCTF12
AG21 G20
VSSA_TVBG VTT_30
R12 L:150mA
V29
VCC_37 VCC_SM_33
AV26 AB24
VCC_NCTF32 VCCAUX_NCTF13
AF21
VTT_31
P12 S:70mA
U29 AU26 AA24 AG20 +V3.3_ATVBG S:120mA +V3.3_ATVBG N12
VCC_38 VCC_SM_34 VCC_NCTF33 VCCAUX_NCTF14 VTT_32
R29 AT26 Y24 AF20 M12
VCC_39 VCC_SM_35 VCC_NCTF34 VCCAUX_NCTF15 C463 C456 VTT_33
P29 AR26 W24 AG19 E19 L12
VCC_40 VCC_SM_36 VCC_NCTF35 VCCAUX_NCTF16 VCCA_TVDACA0 VTT_34 +V1.5_PCIE +1.5V
M29 AJ26 V24 AF19 F19 R11
VCC_41 VCC_SM_37 VCC_NCTF36 VCCAUX_NCTF17 .1U_4 .022U_4 VCCA_TVDACA1 VTT_35 L53
L29 AH26 U24 R19 C20 P11
VCC_42 VCC_SM_38 VCC_NCTF37 VCCAUX_NCTF18 VCCA_TVDACB0 VTT_36 91nH
AB28
VCC_43 VCC_SM_39
AJ25 T24
VCC_NCTF38 VCCAUX_NCTF19
AG18 D20
VCCA_TVDACB1 VTT_37
N11 80mils
AA28 AH25 R24 AF18 E20 M11
Y28
VCC_44
VCC_45
VCC_SM_40
VCC_SM_41
AJ24 AD23
VCC_NCTF39
VCC_NCTF40
VCCAUX_NCTF20
VCCAUX_NCTF21
R18 +1.5V F20
VCCA_TVDACC0
VCCA_TVDACC1 POWER VTT_38
VTT_39
R10 L:1500mA

+
V28 AH24 V23 AG17 near VCCD_HMPLL# P10 C515 S:1500mA
VCC_46 VCC_SM_42 VCC_NCTF41 VCCAUX_NCTF22 VTT_40 C517 C516
U28 BA23 U23 AF17 S:150mAAH1 N10
C VCC_47 VCC_SM_43 VCC_NCTF42 VCCAUX_NCTF23 VCCD_HMPLL0 VTT_41 10U/X5R_8 220U_3528 C
T28 AJ23 T23 AE17 AH2 M10
VCC_48 VCC_SM_44 VCC_NCTF43 VCCAUX_NCTF24 C215 C491 VCCD_HMPLL1 VTT_42 10U/X5R_8
R28 BA22 R23 AD17 P9
VCC_49 VCC_SM_45 C190 C198 VCC_NCTF44 VCCAUX_NCTF25 VTT_43
P28 AY22 AD22 AB17 S:20mA A28 N9
VCC_50 VCC_SM_46 .47U_6 .47U_6 VCC_NCTF45 VCCAUX_NCTF26 .1U_4 10U/X5R_8 VCCD_LVDS0 VTT_44
N28 AW22 V22 AA17 B28 M9
VCC_51 VCC_SM_47 VCC_NCTF46 VCCAUX_NCTF27 VCCD_LVDS1 VTT_45
M28 AV22 U22 W17 C28 R8
VCC_52 VCC_SM_48 VCC_NCTF47 VCCAUX_NCTF28 VCCD_LVDS2 VTT_46
L28 AU22 T22 V17 P8
VCC_53 VCC_SM_49 VCC_NCTF48 VCCAUX_NCTF29 VTT_47 +V1.5_3GPLL +1.5V
P27
VCC_54 VCC_SM_50
AT22 R22
VCC_NCTF49 VCCAUX_NCTF30
T17 +V1.5_TVDAC 40 mil D21
VCCD_TVDAC VTT_48
N8
N27 AR22 AD21 R17 M8 R134 L22
M27
L27
VCC_55
VCC_56
VCC_57
VCC_SM_51
VCC_SM_52
VCC_SM_53
AP22
AK22
V21
U21
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
NCTF VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
AG16
AF16
+3V
near VCC_HV#
A23
B23
VCC_HV0
VCC_HV1
VTT_49
VTT_50
VTT_51
P7
N7
60mils 0.5/F_6
3GPLL_FB_R
1uH_6

P26 AJ22 T21 AE16 B25 M7 L:25mA


VCC_58 VCC_SM_54 VCC_NCTF53 VCCAUX_NCTF34 VCC_HV2 VTT_52
N26 AK21 R21 AD16 R6
VCC_59 VCC_SM_55 VCC_NCTF54 VCCAUX_NCTF35 C483 C370 VTT_53
L26 AK20 AD20 AC16 +V1.5_QTVDAC 40 mil H19 P6
VCC_60 VCC_SM_56 VCC_NCTF55 VCCAUX_NCTF36 VCCD_QTVDAC VTT_54
N25 BA19 V20 AB16 M6
VCC_61 VCC_SM_57 VCC_NCTF56 VCCAUX_NCTF37 10U/X5R_8 .1U_4 VTT_55 +1.5V_AUX +1.5V
M25 AY19 U20 AA16 +1.5V_AUX AK31 A6
VCC_62 VCC_SM_58 VCC_NCTF57 VCCAUX_NCTF38 VCCAUX0 VTT_56
L25
VCC_63 VCC_SM_59
AW19 T20
VCC_NCTF58 VCCAUX_NCTF39
Y16 AF31
VCCAUX1 VTT_57
R5 100mil or shape
P24 AV19 R20 W16 40mils or shape AE31 P5 R135 0_8
VCC_64 VCC_SM_60 VCC_NCTF59 VCCAUX_NCTF40 VCCAUX2 VTT_58
N24 AU19 AD19 V16 AC31 N5 S:1900mA
VCC_65 VCC_SM_61 VCC_NCTF60 VCCAUX_NCTF41 VCCAUX3 VTT_59 C221
M24 AT19 V19 U16 AL30 M5
VCC_66 VCC_SM_62 VCC_NCTF61 VCCAUX_NCTF42 +2.5V VCCAUX4 VTT_60 .1U_4
AB23 AR19 U19 T16 AK30 P4
VCC_67 VCC_SM_63 VCC_NCTF62 VCCAUX_NCTF43 VCCAUX5 VTT_61
AA23 AP19 T19 R16 AJ30 N4
Y23
P23
VCC_68
VCC_69
VCC_70
VCC VCC_SM_64
VCC_SM_65
VCC_SM_66
AK19
AJ19
AD18
AC18
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
AG15
AF15
AH30
AG30
VCCAUX6
VCCAUX7
VCCAUX8
VTT_62
VTT_63
VTT_64
M4
R3
N23 AJ18 AB18 AE15 C505 C504 AF30 P3
VCC_71 VCC_SM_67 VCC_NCTF66 VCCAUX_NCTF47 VCCAUX9 VTT_65
M23 AJ17 AA18 AD15 AE30 N3
VCC_72 VCC_SM_68 VCC_NCTF67 VCCAUX_NCTF48 .1U_4 VCCAUX10 VTT_66
L23 AH17 Y18 AC15 AD30 M3
VCC_73 VCC_SM_69 VCC_NCTF68 VCCAUX_NCTF49 4.7U_8 VCCAUX11 VTT_67
AC22 AJ16 W18 AB15 AC30 R2
VCC_74 VCC_SM_70 VCC_NCTF69 VCCAUX_NCTF50 VCCAUX12 VTT_68
AB22 AH16 V18 AA15 AG29 P2
VCC_75 VCC_SM_71 VCC_NCTF70 VCCAUX_NCTF51 VCCAUX13 VTT_69
Y22 BA15 U18 Y15 AF29 M2
VCC_76 VCC_SM_72 VCC_NCTF71 VCCAUX_NCTF52 VCCAUX14 VTT_70
W22 AY15 T18 W15 AE29 D2
VCC_77 VCC_SM_73 C145 VCC_NCTF72 VCCAUX_NCTF53 VCCAUX15 VTT_71
P22 AW15 V15 AD29 AB1 1/29:By Alan:Add three decoupling
VCC_78 VCC_SM_74 .47U_6 VCCAUX_NCTF54 +1.5V +V1.5_DPLLA VCCAUX16 VTT_72
N22
VCC_79 VCC_SM_75
AV15
VCCAUX_NCTF55
U15 S:50mA AC29
VCCAUX17 VTT_73
R1 capacitors C2325,C2326,C2327.
M22 AU15 T15 L51 L:155mA 20 mil AG28 P1
B VCC_80 VCC_SM_76 VCCAUX_NCTF56 10uH_8 VCCAUX18 VTT_74 Put close to U29 B
L22 AT15 R15 AF28 N1
VCC_81 VCC_SM_77 VCCAUX_NCTF57 VCCAUX19 VTT_75
AC21 AR15 AE28 M1
VCC_82 VCC_SM_78 VCCAUX20 VTT_76
AA21 AJ15 Calistoga AH22
VCC_83 VCC_SM_79 + C506 C197 VCCAUX21 C192 C157 C141
W21 AJ14 AJ21
VCC_84 VCC_SM_80 .1U_4 VCCAUX22
N21 AJ13 AH21
VCC_85 VCC_SM_81 330U_7343 VCCAUX23
M21 AH13 AJ20
VCC_86 VCC_SM_82 +1.8VSUS VCCAUX24 .47U_6 .47U_6 .22U_4
L21 AK12 AH20
VCC_87 VCC_SM_83 +V1.5_DPLLB VCCAUX25
AC20
VCC_88 VCC_SM_84
AJ12 120mils/near VCC_SM# S:50mA AH19
VCCAUX26
AB20 AH12 L52 L:155mA 20 mil P19
VCC_89 VCC_SM_85 10uH_8 VCCAUX27 +1.5V
Y20 AG12 P16
VCC_90 VCC_SM_86 VCCAUX28 D34 PDZ5.6B
W20
VCC_91 VCC_SM_87
AK11 + AH15
VCCAUX29
30mils
P20 BA8 C126 C149 C181 C135 C138 C240 C234 P15
VCC_92 VCC_SM_88 10U/X5R_8 .47U_6 .1U_4 .1U_4 .1U_4 + C508 C239 VCCAUX30 V1_5SFOLLOW
N20 AY8 AH14 1 2
VCC_93 VCC_SM_89 150U_3528 10U/X5R_8 .1U_4 VCCAUX31
M20 AW8 AG14
VCC_94 VCC_SM_90 330U_7343 VCCAUX32
L20 AV8 AF14
VCC_95 VCC_SM_91 VCCAUX33 R340
AB19 AT8 AE14
VCC_96 VCC_SM_92 +V1.5_HPLL VCCAUX34 +V3.3_TVDAC
AA19 AR8 S:45mA Y14
VCC_97 VCC_SM_93 L45 VCCAUX35 10_4 +3V
Y19
VCC_98 VCC_SM_94
AP8 L:150mA 20 mil AF13
VCCAUX36
N19 BA6 BK1608LL121_6 AE13 80mils
VCC_99 VCC_SM_95 +1.05V VCCAUX37 R335 0_8
M19 AY6 AF12
VCC_100 VCC_SM_96 C447 C122 VCCAUX38
L19 AW6 AE12
VCC_101 VCC_SM_97 .1U_4 VCCAUX39
N18
VCC_102 VCC_SM_98
AV6 near VCC_NCTF# AD12
VCCAUX40
M18 AT6 10U/X5R_8
VCC_103 VCC_SM_99 C441
L18 AR6
VCC_104 VCC_SM_100 +V1.5_MPLL
+

P17 AP6 S:45mA Calistoga


VCC_105 VCC_SM_101 C180 C164 C134 C202 C142 C229 L44 +V3.3_TVDAC
N17
VCC_106 VCC_SM_102
AN6 L:150mA 20 mil 80mils +V3.3_ATVBG
M17 AL6 25mils 220U_3528 10U/X5R_8 1U_6 .1U_4 BK1608LL121_6
VCC_107 VCC_SM_103 10U/X5R_8 .1U_4 .1U_4 L46
N16 AK6
VCC_108 VCC_SM_104 C446 C125 10uH_8 +V3.3_ATVBG
M16 AJ6
VCC_109 VCC_SM_105 VCC_SM106 C123 .47U_6
L16 AV1 L:155mA
VCC_110 VCC_SM_106 10U/X5R_8 .1U_4 C462 C457 C464 C171 C165 C172 C169
VCC_SM_107
AJ1 VCC_SM107 S:120mA
C124 .47U_6
Calistoga 22U_8 .1U_4 .1U_4 .1U_4 .022U_4 .022U_4 .022U_4
A 25mils +1.05V +1.05V A
120mils/near VTT_# S:800mA

+
C127 C156 C144 C137 C442 C196 C211 C136 C177

.22U_4 .22U_4 .47U_6 .47U_6 2.2U_6


220U_3528 4.7U_8 .1U_4 10U/X5R_8
PROJECT : ZU2
Quanta Computer Inc.
Size Document Number Rev
GMCH (POWER) 1A

Date: Wednesday, March 21, 2007 Sheet 8 of 39


5 4 3 2 1
1 2 3 4 5 6 7 8

+1.8VSUS +1.8VSUS +1.8VSUS +1.8VSUS


R_A_DM[7:0] (7)
R_A_MD[63:0] (7) R_B_DM[7:0] (7)
R_A_DQS[7:0] (7) R_B_MD[63:0] (7)
SMDDR_VREF R_A_DQS#[7:0] (7) SMDDR_VREF R_B_DQS[7:0] (7)
R_A_MA[13:0] (7,10) R_B_DQS#[7:0] (7)
CN27 CN28
R_B_MA[13:0] (7,10)
1 VREF VSS46 2 1 VREF VSS46 2
3 4 R_A_MD4 3 4 R_B_MD0
R_A_MD1 VSS47 DQ4 R_A_MD0 R_B_MD1 VSS47 DQ4 R_B_MD4
5 DQ0 DQ5 6 5 DQ0 DQ5 6
R_A_MD5 7 8 R_B_MD5 7 8
DQ1 VSS15 R_A_DM0 DQ1 VSS15 R_B_DM0 +1.8VSUS
9 VSS37 DM0 10 9 VSS37 DM0 10 Close to JDIMM1
R_A_DQS#0 11 12 R_B_DQS#0 11 12
R_A_DQS0 DQS#0 VSS5 R_A_MD7 R_B_DQS0 DQS#0 VSS5 R_B_MD7
A
13 DQS0 DQ6 14 13 DQS0 DQ6 14 A
15 16 R_A_MD6 15 16 R_B_MD6
R_A_MD2 VSS48 DQ7 R_B_MD2 VSS48 DQ7
17 DQ2 VSS16 18 17 DQ2 VSS16 18
R_A_MD3 19 20 R_A_MD13 R_B_MD3 19 20 R_B_MD12 C152 C502 C167 C225 C182
DQ3 DQ12 R_A_MD12 DQ3 DQ12 R_B_MD13
21 VSS38 DQ13 22 21 VSS38 DQ13 22
R_A_MD14 23 24 R_B_MD9 23 24 2.2U_6 2.2U_6 2.2U_6 2.2U_6 2.2U_6
R_A_MD8 DQ8 VSS17 R_A_DM1 R_B_MD8 DQ8 VSS17 R_B_DM1
25 DQ9 DM1 26 25 DQ9 DM1 26
27 VSS49 VSS53 28 27 VSS49 VSS53 28
R_A_DQS#1 29 30 R_B_DQS#1 29 30 +1.8VSUS
DQS#1 CK0 CLK_SDRAM0 (6) DQS#1 CK0 CLK_SDRAM4 (6) +3V
R_A_DQS1 31 32 R_B_DQS1 31 32
DQS1 CK0# CLK_SDRAM0# (6) DQS1 CK0# CLK_SDRAM4# (6)
33 VSS39 VSS41 34 33 VSS39 VSS41 34
R_A_MD9 35 36 R_A_MD10 R_B_MD11 35 36 R_B_MD15
R_A_MD15 DQ10 DQ14 R_A_MD11 R_B_MD10 DQ10 DQ14 R_B_MD14
37 DQ11 DQ15 38 37 DQ11 DQ15 38
39 40 39 40 C488 C490 C478 C496 C112 C110
VSS50 VSS54 VSS50 VSS54
41 42 41 42 .1U_4 .1U_4 .1U_4 .1U_4 2.2U_6 .1U_4
R_A_MD17 VSS18 VSS20 R_A_MD20 R_B_MD17 VSS18 VSS20 R_B_MD16
43 DQ16 DQ20 44 43 DQ16 DQ20 44
R_A_MD21 45 46 R_A_MD16 R_B_MD20 45 46 R_B_MD21
DQ17 DQ21 DQ17 DQ21
47 VSS1 VSS6 48 47 VSS1 VSS6 48
R_A_DQS#2 49 50 R_B_DQS#2 49 50
DQS#2 NC3 PM_EXTTS#0 (6) DQS#2 NC3 PM_EXTTS#0 (6)
R_A_DQS2 51 52 R_A_DM2 R_B_DQS2 51 52 R_B_DM2
DQS2 DM2 DQS2 DM2
53 VSS19 VSS21 54 53 VSS19 VSS21 54
R_A_MD23 55 56 R_A_MD18 R_B_MD19 55 56 R_B_MD18
R_A_MD19 DQ18 DQ22 R_A_MD22 R_B_MD23 DQ18 DQ22 R_B_MD22
57 DQ19 DQ23 58 57 DQ19 DQ23 58
59 VSS22 VSS24 60 59 VSS22 VSS24 60
R_A_MD29 61 62 R_A_MD25 R_B_MD29 61 62 R_B_MD24 +1.8VSUS Close to JDIMM2
R_A_MD28 DQ24 DQ28 R_A_MD24 R_B_MD28 DQ24 DQ28 R_B_MD25
63 DQ25 DQ29 64 63 DQ25 DQ29 64
65 VSS23 VSS25 66 65 VSS23 VSS25 66
R_A_DM3 67 68 R_A_DQS#3 R_B_DM3 67 68 R_B_DQS#3
DM3 DQS#3 R_A_DQS3 DM3 DQS#3 R_B_DQS3
69 NC4 DQS3 70 69 NC4 DQS3 70
B 71 72 71 72 C489 C469 C205 C475 C193 B
R_A_MD26 VSS9 VSS10 R_A_MD30 R_B_MD30 VSS9 VSS10 R_B_MD26
73 DQ26 DQ30 74 73 DQ26 DQ30 74
R_A_MD27 75 76 R_A_MD31 R_B_MD31 75 76 R_B_MD27 2.2U_6 2.2U_6 2.2U_6 2.2U_6 2.2U_6
PC4800 DDR2 SDRAM

PC4800 DDR2 SDRAM


DQ27 DQ31 DQ27 DQ31
77 VSS4 VSS8 78 77 VSS4 VSS8 78
(6,10) CKE0 79 CKE0 CKE1 80 CKE1 (6,10) (6,10) CKE2 79 CKE0 CKE1 80 CKE3 (6,10)
81 82 81 82 +1.8VSUS
VDD7 VDD8 VDD7 VDD8 +3V
83 NC1 A15 84 83 NC1 A15 84
(7,10) R_A_BS2# 85 A16_BA2 A14 86 (7,10) R_B_BS2# 85 A16_BA2 A14 86
87 88 87 88
SO-DIMM (200P)

SO-DIMM (200P)
R_A_MA12 VDD9 VDD11 R_A_MA11 R_B_MA12 VDD9 VDD11 R_B_MA11
89 A12 A11 90 89 A12 A11 90
R_A_MA9 91 92 R_A_MA7 R_B_MA9 91 92 R_B_MA7 C479 C501 C477 C495 C100 C96
R_A_MA8 A9 A7 R_A_MA6 R_B_MA8 A9 A7 R_B_MA6
93 A8 A6 94 93 A8 A6 94
95 96 95 96 .1U_4 .1U_4 .1U_4 .1U_4 2.2U_6 .1U_4
R_A_MA5 VDD5 VDD4 R_A_MA4 R_B_MA5 VDD5 VDD4 R_B_MA4
97 A5 A4 98 97 A5 A4 98
R_A_MA3 99 100 R_A_MA2 R_B_MA3 99 100 R_B_MA2
R_A_MA1 A3 A2 R_A_MA0 R_B_MA1 A3 A2 R_B_MA0
101 A1 A0 102 101 A1 A0 102
103 VDD10 VDD12 104 103 VDD10 VDD12 104
R_A_MA10 105 106 R_B_MA10 105 106
A10/AP BA1 R_A_BS1# (7,10) A10/AP BA1 R_B_BS1# (7,10)
(7,10) R_A_BS0# 107 BA0 RAS# 108 R_A_SRASA# (7,10) (7,10) R_B_BS0# 107 BA0 RAS# 108 R_B_SRASA# (7,10)
(7,10) R_A_BMWEA# 109 W E# S0# 110 SM_CS0# (6,10) (7,10) R_B_BMWEA# 109 W E# S0# 110 SM_CS2# (6,10)
111 VDD2 VDD1 112 111 VDD2 VDD1 112
(7,10) R_A_SCASA# 113 CAS# ODT0 114 M_ODT0 (6,10) (7,10) R_B_SCASA# 113 CAS# ODT0 114 M_ODT2 (6,10)
115 116 R_A_MA13 115 116 R_B_MA13
(6,10) SM_CS1# S1# A13 (6,10) SM_CS3# S1# A13
117 VDD3 VDD6 118 117 VDD3 VDD6 118
119 120 119 120 SMDDR_VREF
(6,10) M_ODT1 ODT1 NC2 (6,10) M_ODT3 ODT1 NC2
121 VSS11 VSS12 122 121 VSS11 VSS12 122
R_A_MD36 123 124 R_A_MD37 R_B_MD32 123 124 R_B_MD37
R_A_MD32 DQ32 DQ36 R_A_MD35 R_B_MD36 DQ32 DQ36 R_B_MD33
125 DQ33 DQ37 126 125 DQ33 DQ37 126
127 VSS26 VSS28 128 127 VSS26 VSS28 128
R_A_DQS#4 129 130 R_A_DM4 R_B_DQS#4 129 130 R_B_DM4 C270 C271
C
R_A_DQS4 DQS#4 DM4 R_B_DQS4 DQS#4 DM4 C
131 DQS4 VSS42 132 131 DQS4 VSS42 132
133 134 R_A_MD34 133 134 R_B_MD34 .1U_4 2.2U_6
R_A_MD33 VSS2 DQ38 R_A_MD39 R_B_MD39 VSS2 DQ38 R_B_MD38
135 DQ34 DQ39 136 135 DQ34 DQ39 136
R_A_MD38 137 138 R_B_MD35 137 138
DQ35 VSS55 R_A_MD45 DQ35 VSS55 R_B_MD45
139 VSS27 DQ44 140 139 VSS27 DQ44 140
R_A_MD40 141 142 R_A_MD44 R_B_MD40 141 142 R_B_MD44
DQ40 DQ45 DQ40 DQ45
R_A_MD41 143 DQ41 VSS43 144 R_B_MD41 143 DQ41 VSS43 144 Place Close to JDIMM1
145 146 R_A_DQS#5 145 146 R_B_DQS#5
R_A_DM5 VSS29 DQS#5 R_A_DQS5 R_B_DM5 VSS29 DQS#5 R_B_DQS5
147 DM5 DQS5 148 147 DM5 DQS5 148
149 VSS51 VSS56 150 149 VSS51 VSS56 150
R_A_MD47 151 152 R_A_MD43 R_B_MD46 151 152 R_B_MD47
R_A_MD46 DQ42 DQ46 R_A_MD42 R_B_MD43 DQ42 DQ46 R_B_MD42
153 DQ43 DQ47 154 153 DQ43 DQ47 154
155 VSS40 VSS44 156 155 VSS40 VSS44 156
R_A_MD49 157 158 R_A_MD52 R_B_MD53 157 158 R_B_MD52
R_A_MD48 DQ48 DQ52 R_A_MD53 R_B_MD49 DQ48 DQ52 R_B_MD48
159 DQ49 DQ53 160 159 DQ49 DQ53 160
161 162 161 162 SMDDR_VREF
VSS52 VSS57 VSS52 VSS57
163 NCTEST CK1 164 CLK_SDRAM1 (6) 163 NCTEST CK1 164 CLK_SDRAM3 (6)
165 VSS30 CK1# 166 CLK_SDRAM1# (6) 165 VSS30 CK1# 166 CLK_SDRAM3# (6)
R_A_DQS#6 167 168 R_B_DQS#6 167 168
R_A_DQS6 DQS#6 VSS45 R_A_DM6 R_B_DQS6 DQS#6 VSS45 R_B_DM6
169 DQS6 DM6 170 169 DQS6 DM6 170
171 172 171 172 C268 C273
R_A_MD55 VSS31 VSS32 R_A_MD50 R_B_MD51 VSS31 VSS32 R_B_MD55
173 DQ50 DQ54 174 173 DQ50 DQ54 174
R_A_MD51 175 176 R_A_MD54 R_B_MD54 175 176 R_B_MD50 .1U_4 2.2U_6
DQ51 DQ55 DQ51 DQ55
177 VSS33 VSS35 178 177 VSS33 VSS35 178
R_A_MD56 179 180 R_A_MD57 R_B_MD61 179 180 R_B_MD56
R_A_MD60 DQ56 DQ60 R_A_MD61 R_B_MD57 DQ56 DQ60 R_B_MD60
181 DQ57 DQ61 182 181 DQ57 DQ61 182
183 VSS3 VSS7 184 183 VSS3 VSS7 184
R_A_DM7 185 DM7 DQS#7 186 R_A_DQS#7 R_B_DM7 185 DM7 DQS#7 186 R_B_DQS#7 Place Close to JDIMM2
187 188 R_A_DQS7 187 188 R_B_DQS7
R_A_MD58 VSS34 DQS7 R_B_MD59 VSS34 DQS7
D 189 DQ58 VSS36 190 189 DQ58 VSS36 190 D
R_A_MD62 191 192 R_A_MD63 R_B_MD62 191 192 R_B_MD63
DQ59 DQ62 R_A_MD59 DQ59 DQ62 R_B_MD58
193 VSS14 DQ63 194 193 VSS14 DQ63 194
CGDAT_SMB 195 196 CGDAT_SMB 195 196
SDA VSS13 (2,23) CGDAT_SMB SDA VSS13
CGCLK_SMB 197 198 CGCLK_SMB 197 198
SCL SA0 (2,23) CGCLK_SMB SCL SA0
+3V 199 VDD(SPD) SA1 200 +3V 199 VDD(SPD) SA1 200
PROJECT : ZU2
PC4800_DDR2_5.2MM_RVS R72 R74 SMbus address A1 PC4800_DDR2_9.2MM_RVS R66 R69
SMbus address A0 10K 10K 10K 10K
CLOCK 0,1,2 CLOCK 3,4,5 Quanta Computer Inc.
Size Document Number Rev
CKE 0,1 CKE 2,3 +3V
DDR2 SO-DIMM (200P) 1A

Date: Thursday, March 22, 2007 Sheet 9 of 39


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

SMDDR_VTERM

C223 C183 C220 C150 C222 C231 C217 C195 C235 C146 C170 C230 C163

.1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4

A A

Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM

SMDDR_VTERM

C233 C236 C153 C178 C151 C194 C147 C168 C155 C227 C154 C148 C226
R_A_MA[0..13] (7,9)
.1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4

R_B_MA[0..13] (7,9) Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM

B B

R_B_MA4 2 1 R_A_MA9 2 1
R_B_MA2 RP16 4 3 56_4P2R CKE0 RP25 4 3 56_4P2R
(6,9) CKE0
R_A_MA12 2 1 SM_CS3# 2 1
(6,9) SM_CS3#
R_A_BS2# RP27 4 3 56_4P2R M_ODT3 RP3 4 3 56_4P2R
(7,9) R_A_BS2# (6,9) M_ODT3
R_A_MA4 2 1 R_B_SCASA# 2 1
(7,9) R_B_SCASA#
R_A_MA2 RP17 4 3 56_4P2R SMDDR_VTERM R_B_BMWEA# RP7 4 3 56_4P2R SMDDR_VTERM
(7,9) R_B_BMWEA#

(7,9) R_B_SRASA# R_B_SRASA# 2 1 CKE3 2 1


(6,9) CKE3
SM_CS2# RP8 4 3 56_4P2R R_B_MA11 RP22 4 3 56_4P2R
(6,9) SM_CS2#
SM_CS1# 4 3 R_B_MA9 2 1
(6,9) SM_CS1#
M_ODT1 RP2 2 1 56_4P2R R_B_MA12 RP24 4 3 56_4P2R
(6,9) M_ODT1
R_A_MA10 4 3 R_A_MA5 2 1
R_A_BS0# RP9 2 1 56_4P2R R_A_MA8 RP21 4 3 56_4P2R
(7,9) R_A_BS0#
M_ODT2 2 1 R_A_MA7 2 1
C (6,9) M_ODT2 C
R_B_MA13 RP5 4 3 56_4P2R R_A_MA6 RP20 4 3 56_4P2R SMDDR_VTERM
CKE1 2 1
(6,9) CKE1
R_A_MA11 RP26 4 3 56_4P2R
R_B_MA7 2 1
R_B_MA6 RP18 4 3 56_4P2R SMDDR_VTERM

R_B_BS2# 2 1 R_A_SCASA# 4 3
(7,9) R_B_BS2# (7,9) R_A_SCASA#
CKE2 RP28 4 3 56_4P2R R_A_BMWEA# RP4 2 1 56_4P2R
(6,9) CKE2 (7,9) R_A_BMWEA#
R_B_MA0 2 1 R_B_MA1 2 1
R_B_BS1# RP11 4 3 56_4P2R R_B_MA3 RP14 4 3 56_4P2R
(7,9) R_B_BS1#
R_B_MA5 2 1 R_B_MA10 2 1
R_B_MA8 RP19 4 3 56_4P2R SMDDR_VTERM R_B_BS0# RP10 4 3 56_4P2R SMDDR_VTERM
(7,9) R_B_BS0#

R_A_MA1 4 3
R_A_MA3 RP15 2 1 56_4P2R
(7,9) R_A_SRASA# R_A_SRASA# 4 3
SM_CS0# RP6 2 1 56_4P2R
D (6,9) SM_CS0# D
R_A_MA13 2 1
M_ODT0 RP1 4 56_4P2R
(6,9) M_ODT0
R_A_MA0 2
3
1 PROJECT : ZU2
R_A_BS1# RP13 4 3 56_4P2R SMDDR_VTERM
(7,9) R_A_BS1#
Quanta Computer Inc.
Size Document Number Rev
DDR2 RES. ARRAY 1A
Date: Friday, March 23, 2007 Sheet 10 of 39
1 2 3 4 5 6 7 8
5 4 3 2 1

U30A Pull-UP +1.05V +3V


C586 CLK_32KX1 AB1 AA6
RTXC1 LAD0 LAD0 (23,24,26)
18P/50V_4 CLK_32KX2 AB2 AB5
RTCX2 LAD1 LAD1 (23,24,26)
LAD2 AC4 LAD2 (23,24,26)

LPC
RTC
RTCRST# AA3 Y6
RTCRST# LAD3 LAD3 (23,24,26)
Y6 R468
32.768KHZ 10M_6 SM_INTRUDER# Y5 AC3 LDRQ#0 R178 R405 R244 R245 R411 R182
INTRUDER# LDRQ0# LDRQ#0 (26)
ICH_INTVRMEN W4 AA5 LDRQ#1
2
INTVRMEN LDRQ1#/GPIO23
C608 W1 AB3 10K_4 10K_4 10K_4 10K_4
EE_CS LFRAME# LFRAME# (23,24,26)
D 18P/50V_4 Y1 *56.2/F_4 *56.2/F_4 D
EE_SHCLK GATEA20 +1.05V LDRQ#0
Y2 EE_DOUT A20GATE AE22 GATEA20 (24)
W3 AH28 LDRQ#1
EE_DIN A20M# H_A20M# (3)
ICH_DPRSTP# RCIN#
V3 AG27 TP_H_CPUSLP# R398 *0_4 H_DPSLP# GATEA20
LAN_CLK CPUSLP# H_CPUSLP# (3,5)
U3 AF24 H_DPRSTP#_R R177 0_4 R404
LAN_RSTSYNC TP1/DPRSTP# ICH_DPRSTP# (3,31)

LAN
CPU
AH25 H_DPSLP#_R R407 0_4 56.2/F_4
TP2/DPSLP# H_DPSLP# (3)
U5 LAN_RXD0
V4 LAN_RXD1 FERR# AG26 H_FERR# (3)
T5 LAN_RXD2
AG24 R409 0_4
U7
V6
LAN_TXD0
GPIO49/CPUPWRGD H_PWRGD (3)
RTC VCCRTC
LAN_TXD1
V7 LAN_TXD2 IGNNE# AG22 H_IGNNE# (3)
AG21 D26 C381
INIT3_3V# T108
ACZ_BCLK U1 AF22 +3VPCU
ACZ_BIT_CLK INIT# H_INIT# (3)
ACZ_SYNC R6 AF25 CH500H-40

AC-97/AZALIA
ACZ_SYNC INTR H_INTR (3) +1.05V 1U_6
ACZ_RST# R5 AG23 RCIN#
ACZ_RST# RCIN# RCIN# (24)
D27 R255
SDIN0:MODEM ACZ_SDIN0 T2 AH24 VCCRTC_3 RTCRST#
SDIN1:CODEC (27) ACZ_SDIN0 ACZ_SDIN1 T3
ACZ_SDIN0 NMI
AF23 H_SMI#_R R181 0_4
H_NMI (3)
R173 20K_6
(27) ACZ_SDIN1 ACZ_SDIN1 SMI# H_SMI# (3)
ACZ_SDIN2 T1 56.2/F_4 CH500H-40
ACZ_SDIN2

1
T120 AH22 R275 R256 C373
STPCLK# H_STPCLK# (3)
ACZ_SDOUT T4 1K_4 G1
ACZ_SDOUT H_THERMTRIP_R R174 24.9/F_4 *SHORT_PAD
THERMTRIP# AF26 PM_THRMTRIP# (3,6)
C AF18 Should be 2" close ICH7 1U_6 C
(25) SATA_LED#

2
SATALED# 1M/F_6
PDD[15:0] (22)
C374 3900P_4 SATA_RXN0_C AF3 AB15 PDD0
(22) SATA_RXN0 SATA0RXN DD0
C377 3900P_4 SATA_RXP0_C AE3 AE14 PDD1 CN15
(22) SATA_RXP0 SATA0RXP DD1
C369 3900P_4 SATA_TXN0_C AG2 AG13 PDD2 1 1
(22) SATA_TXN0 SATA0TXN DD2
C367 3900P_4 SATA_TXP0_C AH2 AF13 PDD3 2 2
(22) SATA_TXP0 SATA0TXP DD3
AD14 PDD4 SM_INTRUDER#
DD4 PDD5 ACS_85204-0200L
AF7 SATA2RXN DD5 AC13
AE7 AD12 PDD6 VCCRTC_4
SATA2RXP DD6 PDD7
AG6 SATA2TXN DD7 AC12
PDD8 +5VPCU
AH6 SATA2TXP DD8 AE12
AF12 PDD9 20MIL 20MIL
DD9 PDD10 Q19
(2) CLK_PCIE_SATA# AF1 SATA_CLKN DD10 AB13
SATA

AE1 AC14 PDD11 R248 VCCRTC_1 R247 VCCRTC_2 3 1


(2) CLK_PCIE_SATA SATA_CLKP DD11
AF14 PDD12 1.2K_4 1K_4
DD12 PDD13 MMBT3904
AH10 SATARBIASN DD13 AH13
R422 24.9/F_4 SATA_BIAS AG10 AH14 PDD14 R260

2
Place within 500 SATARBIASP DD14 PDD15
DD15 AC15
mils of ICH7 25mils/15mils 4.7K_4
PDA[2:0] (22)
PDA0
(22) PDIOR# AF15
AH15
DIOR# IDE DA0 AH17
AE17 PDA1
(22) PDIOW# DIOW# DA1
AF16 AF17 PDA2
(22) PDDACK# DDACK# DA2
(22) IRQ14 AH16 IDEIRQ
AG16 AE16 R264
(22) PIORDY IORDY DCS1# PDCS1# (22)
(22) PDDREQ AE15 DDREQ DCS3# AD16 PDCS3# (22)
15K_6
ICH7-M
B B

HDA interface ICH7 internal VR


VCCRTC
enable strap
INTVRMEN
R252 39_4 R250 39_4
ACZ_SDOUT_MDC (27) BIT_CLK_MDC (27)
Enable R230
1 332K/F_4
ACZ_SDOUT R251 39_4 ACZ_BCLK R249 39_4 (default)
ACZ_SDOUT_AUDIO (27) BIT_CLK_AUDIO (27)
ICH_INTVRMEN
Disable 0
C386 C385
*10P_4 *10P_4
R233
*0_4

R254 39_4 COMPONENTS P/N


ACZ_SYNC_MDC (27)
R268 39_4
ACZ_RST#_MDC (27)
A A
ACZ_SYNC R253 39_4
ACZ_SYNC_AUDIO (27)
ACZ_RST# R267 39_4 945GM AJSL8Z20T25
ACZ_RST#_AUDIO (27,28)
C387
*10P_4 ICH7-M AJSL8YB0T21 PROJECT : ZU2
Quanta Computer Inc.
Size Document Number Rev
ICH7-M (CPU, SATA, IDE,LPC) 1A

Date: Thursday, March 22, 2007 Sheet 11 of 39


5 4 3 2 1
5 4 3 2 1

U30D U30E
Pull-UP resistor
(23) PCIE_RXN2 F26 V26 DMI_RXN0 (6) A4 P28
PERn1 DMI0RXN VSS[1] VSS[98]
MINI CARD F25 V25 A23 R1

Direct Media Interface


(23) PCIE_RXP2 PERp1 DMI0RXP DMI_RXP0 (6) VSS[2] VSS[99]
C303 .1U_4 PCIE_TXN2_C E28 U28 B1 R11
(23) PCIE_TXN2 PETn1 DMI0TXN DMI_TXN0 (6) VSS[3] VSS[100]
C302 .1U_4 PCIE_TXP2_C E27 U27 B8 R12
(23) PCIE_TXP2 PETp1 DMI0TXP DMI_TXP0 (6) VSS[4] VSS[101]
B11 R13 +3V
VSS[5] VSS[102]
(14) PCIE_RXN1 H26 PERn2 DMI1RXN Y26 DMI_RXN1 (6) B14 VSS[6] VSS[103] R14 RP43
(14) PCIE_RXP1 H25 PERp2 DMI1RXP Y25 DMI_RXP1 (6) B17 VSS[7] VSS[104] R15
Giga LAN C301 0.1U_4 PCIE_TXN1_C G28 W28 B20 R16 TRDY# 6 5
(14) PCIE_TXN1 PETn2 DMI1TXN DMI_TXN1 (6) VSS[8] VSS[105]
C300 0.1U_4 PCIE_TXP1_C G27 W27 B26 R17 DEVSEL# 7 4 STOP#
(14) PCIE_TXP1 PETp2 DMI1TXP DMI_TXP1 (6) VSS[9] VSS[106]
B28 R18 REQ4# 8 3 FRAME#

PCI-Express
D VSS[10] VSS[107] REQ3# REQ1# D
(29) PCIE_RXN4 K26 AB26 DMI_RXN2 (6) C2 T6 9 2
PERn3 DMI2RXN VSS[11] VSS[108] REQ2#
(29) PCIE_RXP4 K25 AB25 DMI_RXP2 (6) C6 T12 +3V 10 1
C299 .1U_4 PCIE_TXN4_C PERp3 DMI2RXP VSS[12] VSS[109]
Docking (29) PCIE_TXN4 J28
PETn3 DMI2TXN
AA28 DMI_TXN2 (6) C27
VSS[13] VSS[110]
T13
C298 .1U_4 PCIE_TXP4_C J27 AA27 Place within 500 D10 T14 8.2K_10P8R
(29) PCIE_TXP4 PETp3 DMI2TXP DMI_TXP2 (6) VSS[14] VSS[111]
mils of ICH7 D13 T15
VSS[15] VSS[112]
M26 PERn4 DMI3RXN AD25 DMI_RXN3 (6) D18 VSS[16] VSS[113] T16
M25 AD24 +1.5V D21 T17 +3V
PERp4 DMI3RXP DMI_RXP3 (6) VSS[17] VSS[114]
L28 AC28 DMI_TXN3 (6) D24 U4 RP44
PETn4 DMI3TXN VSS[18] VSS[115]
L27 PETp4 DMI3TXP AC27 DMI_TXP3 (6) E1 VSS[19] VSS[116] U12
E2 U13 6 5
+3V VSS[20] VSS[117] PERR# INTE#
P26 PERn5 DMI_CLKN AE28 CLK_PCIE_ICH# (2) E4 VSS[21] VSS[118] U14 7 4
P25 AE27 R175 E8 U15 INTG# 8 3 INTH#
PERp5 DMI_CLKP CLK_PCIE_ICH (2) VSS[22] VSS[119]
N28 24.9/F_4 E15 U16 SERR# 9 2
PETn5 VSS[23] VSS[120] PLOCK#
N27 PETp5 DMI_ZCOMP C25 F3 VSS[24] VSS[121] U17 +3V 10 1
D25 DRI_IRCOMP_R F4 U24
DMI_IRCOMP VSS[25] VSS[122] 8.2K_10P8R
T25
PERn6 15/15mils F5
VSS[26] VSS[123]
U25
R226 R227 R242 T24 F1 F12 U26
PERp6 USBP0N USBP0- (29) VSS[27] VSS[124]
10K_4 10K_4 10K_4 R28 F2 Docking F27 V2
PETn6 USBP0P USBP0+ (29) VSS[28] VSS[125]
R27 G4 F28 V13 +3V
PETp6 USBP1N USBP1- (23) VSS[29] VSS[126]
USBP1P G3 USBP1+ (23) System G1 VSS[30] VSS[127] V15 RP45
T115 SPI_SCLK R2 H1 G2 V24
SPI_CLK USBP2N USBP2- (23) VSS[31] VSS[128]
T70 SPI_CE# SPI_CE# P6 H2 Blue tooth G5 V27 INTD# 6 5
SPI_CS# USBP2P USBP2+ (23) VSS[32] VSS[129]
T116 SPI_ARB P1 J4 G6 V28 IRDY# 7 4 INTC#

SPI
SPI_ARB USBP3N USBP3- (16) VSS[33] VSS[130]
J3 CCD G9 W6 INTB# 8 3 INTF#
USBP3P USBP3+ (16) VSS[34] VSS[131]
T72 SPI_SI SPI_SI P5 K1 G14 W24 INTA# 9 2 REQ0#
SPI_MOSI USBP4N USBP4- (23) VSS[35] VSS[132]
T74 SPI_SO SPI_SO P2 K2 System G18 W25 10 1 REQ5#

USB
SPI_MISO USBP4P USBP4+ (23) VSS[36] VSS[133] +3V
L4 USBP5- (23) G21 W26
OC0# USBP5N VSS[37] VSS[134] 8.2K_10P8R
D3
OC0# USBP5P
L5 USBP5+ (23) System G24
VSS[38] VSS[135]
Y3
OC1# C4 M1 T118 G25 Y24
(23) OC1# OC1# USBP6N VSS[39] VSS[136]
OC2# D5 M2 T117 G26 Y27
C OC3# OC2# USBP6P VSS[40] VSS[137] +3V_S5 C
D4 OC3# USBP7N N4 USBP7- (25) H3 VSS[41] VSS[138] Y28
OC4# E5 N3 Finger Printer H4 AA1
OC4# USBP7P USBP7+ (25) VSS[42] VSS[139] RP46
OC5# C3 H5 AA24
OC6# OC5#/GPIO29 VSS[43] VSS[140] OC2#
A2 OC6#/GPIO30 USBRBIAS# D2 H24 VSS[44] VSS[141] AA25 6 5
OC7# B3 D1 USB_RBIAS_PN 25mils/15mils H27 AA26 OC1# 7 4 OC7#
OC7#/GPIO31 USBRBIAS VSS[45] VSS[142] OC4# OC6#
H28 VSS[46] VSS[143] AB4 8 3
ICH7-M Place within 500 J1 AB6 OC3# 9 2 OC0#
mils of ICH7 VSS[47] VSS[144] OC5#
J2 AB11 +3V_S5 10 1
R257 VSS[48] VSS[145]
J5 AB14
22.6/F_6 VSS[49] VSS[146] 8.2K_10P8R
J24 AB16
VSS[50] VSS[147]
J25 AB19
VSS[51] VSS[148]
J26
VSS[52] VSS[149]
AB21 CKL use 10Kohm
K24 AB24
VSS[53] VSS[150]
K27 VSS[54] VSS[151] AB27
K28 VSS[55] VSS[152] AB28
L13 AC2
VSS[56] VSS[153]
ICH7 Boot BIOS select L15
VSS[57] VSS[154]
AC5
L24 AC9

U30B
L25
VSS[58]
VSS[59]
VSS[155]
VSS[156]
AC11 Platform Reset
(18,19,21) AD[0..31] STRAP GNT5# GNT4# L26 VSS[60] VSS[157] AD1
AD0 E18 D7 REQ0# M3 AD3
AD1 AD0 REQ0# GNT0#
REQ0# (18) R1 R2 VSS[61] VSS[158]
AD2
C18
A16
AD1 PCI GNT0#
E7
C16 REQ1#
GNT0# (18) M4
M5
VSS[62] VSS[159]
AD4
AD7
AD2 REQ1# REQ1# (19) VSS[63] VSS[160]
AD3 F18 D16 GNT1# LPC M12 AD8
AD3 GNT1# GNT1# (19) VSS[64] VSS[161]
AD4 E16 C17 REQ2# 11 UNSTUFF UNSTUFF M13 AD11
AD5 A18
AD4 REQ2#
D17 GNT2#
REQ2# (21) (default) M14
VSS[65] VSS[162]
AD15
AD5 GNT2# GNT2# (21) VSS[66] VSS[163]
AD6 E17 E13 REQ3# M15 AD19
AD7 AD6 REQ3# VSS[67] VSS[164]
A17 F13 M16 AD23
AD8 AD7 GNT3# REQ4# T64 01: SPI VSS[68] VSS[165]
A15
AD8 REQ4#/GPIO22
A13
10: PCI
PCI 10 UNSTUFF STUFF M17
VSS[69] VSS[166]
AE2
AD9 C14 A14 M24 AE4
B AD10 AD9 GNT4#/GPIO48 REQ5# T66 11: LPC (Default) VSS[70] VSS[167] +3V B
E14 C8 M27 AE8
AD11 AD10 GPIO1/REQ5# VSS[71] VSS[168]
D14 D8 M28 AE11
AD12 AD11 GPIO17/GNT5# VSS[72] VSS[169]
B12
AD12 SPI 01 STUFF UNSTUFF N1
VSS[73] VSS[170]
AE13
AD13 C13 B15 N2 AE18
AD13 C/BE0# CBE0# (18,19,21) VSS[74] VSS[171]
AD14 G15 C12 N5 AE21
AD14 C/BE1# CBE1# (18,19,21) VSS[75] VSS[172]
AD15 G13 D12 N6 AE24 C296
AD15 C/BE2# CBE2# (18,19,21) VSS[76] VSS[173]
AD16 E12 C15 N11 AE25 .1U_4
AD16 C/BE3# CBE3# (18,19,21) VSS[77] VSS[174]
AD17 C11 N12 AF2 U18
AD17 VSS[78] VSS[175]

5
AD18 D11 A7 IRDY# N13 AF4
AD18 IRDY# IRDY# (18,19,21) VSS[79] VSS[176]
AD19 A11 E10 N14 AF8 PLT_RST-R# 2
AD19 PAR PAR (18,19,21) VSS[80] VSS[177]
AD20 A10 B18 N15 AF11 4
AD20 PCIRST# PCIRST# (18,19,23) VSS[81] VSS[178] PLTRST# (13,14,17,21,22,23,24,26,29)
AD21 F11 A12 DEVSEL# N16 AF27 1
AD21 DEVSEL# DEVSEL# (18,19,21) VSS[82] VSS[179]
AD22 F10 C9 PERR# N17 AF28
AD22 PERR# PERR# (18,19,21) VSS[83] VSS[180]
AD23 E9 E11 PLOCK# N18 AG1 TC7SH08FU R167
PLOCK#

3
AD24 AD23 PLOCK# SERR# VSS[84] VSS[181]
D9 B10 SERR# (18,19,21) N24 AG3
AD25 AD24 SERR# STOP# VSS[85] VSS[182] 100K_4
B9 AD25 STOP# F15 STOP# (18,19,21) N25 VSS[86] VSS[183] AG7
AD26 A8 F14 TRDY# N26 AG11
AD26 TRDY# TRDY# (18,19,21) VSS[87] VSS[184]
AD27 A6 F16 FRAME# P3 AG14
AD27 FRAME# FRAME# (18,19,21) VSS[88] VSS[185]
AD28 C7 P4 AG17
AD29 AD28 PLT_RST-R# VSS[89] VSS[186]
B6 C26 PLT_RST-R# (6) P12 AG20
AD30 AD29 PLTRST# PCLK_ICH PCLK_ICH VSS[90] VSS[187]
E6 AD30 PCICLK A9 PCLK_ICH (2) P13 VSS[91] VSS[188] AG25
AD31 D6 B19 P14 AH1
AD31 PME# PCI_PME# (18,19,21) VSS[92] VSS[189]
P15 AH3
R423 VSS[93] VSS[190]
INTA# A3
Interrupt I/F G8 INTE# *22_4
P16
P17
VSS[94] VSS[191]
AH7
AH12
PIRQA# GPIO2/PIRQE# INTE# (18) VSS[95] VSS[192]
INTB# B4 F7 INTF# P24 AH23
(19) INTB# PIRQB# GPIO3/PIRQF# INTF# (21) VSS[96] VSS[193]
INTC# C5 F8 INTG# P27 AH27
PIRQC# GPIO4/PIRQG# INTG# (19) VSS[97] VSS[194]
INTD# B5 G7 INTH#
PIRQD# GPIO5/PIRQH# C540 ICH7-M
*10P_4
A *PADT73
*PADT73 TP_ICH_RSVD1 AE5
MISC AE9 TP_ICH_RSVD6 T68 *PAD A
*PADT69
*PADT69 TP_ICH_RSVD2 RSVD[1] RSVD[6] TP_ICH_RSVD7 T111 *PAD
AD5 AG8
*PADT112
*PADT112 TP_ICH_RSVD3 RSVD[2] RSVD[7] TP_ICH_RSVD8 T110 *PAD
AG4 AH8
*PADT113
*PADT113 TP_ICH_RSVD4 RSVD[3] RSVD[8] RSVD9
AH4 F21
*PADT65
*PADT65 TP_ICH_RSVD5 RSVD[4] RSVD[9]
AD9 AH20 MCH_ICH_SYNC (6)
RSVD[5] MCH_SYNC#
ICH7-M
R189 PROJECT : ZU2
*1K/F_4

Quanta Computer Inc.


Size Document Number Rev
ICH6-M (USB & DMI & PCIE & PCI) 1A

Date: Thursday, March 22, 2007 Sheet 12 of 39


5 4 3 2 1
5 4 3 2 1

+1.05V
1/31: ASF issue, to support slave mode U30F
14M_ICH V5REF S:6mA G10 L11 S:940mA
PCLK_SMB_LANR179 0_4 V5REF[1] Vcc1_05[1]
(14) PCLK_SMB_LAN L12
PDAT_SMB_LANR184 0_4 Vcc1_05[2] + C539
(14) PDAT_SMB_LAN AD17 L14
+3V +3V R246 V5REF[2] Vcc1_05[3]
L16
U30C *33_4 V5REF_SUS S:10mA Vcc1_05[4] C335 C340 330U_7343
F6 L17
PCLK_SMB R418 *8.2K_4 V5REF_Sus Vcc1_05[5] .1U_4 .1U_4
(2,29) PCLK_SMB C22 AF19 L18
PDAT_SMB SMBCLK GPIO21/SATA0GP S:770mA Vcc1_05[6]
B22 AH18 +1.5V_PCIE_ICH AA22 M11

SMB
(2,29) PDAT_SMB SMBDATA GPIO19/SATA1GP Vcc1_5_B[1] Vcc1_05[7]

SATA
CL_CLK1 A26 AH19 AA23 M18

GPIO
R420 PCLK_SMB_LAN R172 *0_4 SMLINK0 B25 LINKALERT# GPIO36/SATA2GP R417 33_4 C382 Vcc1_5_B[2] Vcc1_05[8]
AE19 AB22 P11

CORE
*1K/F_4 PDAT_SMB_LAN R176 *0_4 SMLINK1 A25 SMLINK0 GPIO37/SATA3GP *10P_4 Vcc1_5_B[3] Vcc1_05[9]
AB23 P18
SMLINK1 14M_ICH Vcc1_5_B[4] Vcc1_05[10]
AC1 14M_ICH (2) AC23 T11
CLK14 Vcc1_5_B[5] Vcc1_05[11]

Clocks
RI# A28 B2 CLKUSB_48 AC24 T18 C341 C342 C333 C330
(27) ACZ_SPKR RI# CLK48 CLKUSB_48 (2) Vcc1_5_B[6] Vcc1_05[12]
AC25 U11 .1U_4 .1U_4 .1U_4 .1U_4
D +3V CLKUSB_48 Vcc1_5_B[7] Vcc1_05[13] D
A19 C20 *PAD AC26 U18
LPC_PD# SPKR SUSCLK T61 Vcc1_5_B[8] Vcc1_05[14]
(26) LPC_PD# A27 AD26 V11
SYS_RST# SUS_STAT# R403 100/F_4 Vcc1_5_B[9] Vcc1_05[15]
(3) SYS_RST# A22 B24 SUSB# (24) AD27 V12
R412 *10K_4 SYS_RST# SLP_S3# R180 100/F_4 R437 Vcc1_5_B[10] Vcc1_05[16]
+3V D23 SUSC# (24) AD28 V14
R201 0_4 SLP_S4# *10_4 Vcc1_5_B[11] Vcc1_05[17] C332 C329 C324 C322 C323
(6) PM_BMBUSY# AB18 F22 *PAD D26 V16
R187 R190 GPIO0/BM_BUSY# SLP_S5# T59 Vcc1_5_B[12] Vcc1_05[18] .1U_4 .1U_4 .1U_4 .1U_4 .1U_4
D27 V17
*10K/F_4 *10K/F_4 SMB_ALERT# ICH_PWROK Vcc1_5_B[13] Vcc1_05[19] +3V
B23 AA4 D28 V18
GPIO11/SMBALERT# PWROK Vcc1_5_B[14] VCC PAUX Vcc1_05[20]
E24

Power MGT
R191 0_4 PM_STPPCI_ICH# PM_DPRSLPVR C561 Vcc1_5_B[15]
(2) PM_STPPCI# AC20 AC22 PM_DPRSLPVR (6,31) E25 V5
R188 0_4 PM_STPCPU_ICH# GPIO18/STPPCI# GPIO16/DPRSLPVR *10P/50V_4 Vcc1_5_B[16] VccSus3_3/VccLAN3_3[1] S:40mA +3V
(2) PM_STPCPU# AF21 E26 V1

GPIO
GPIO20/STPCPU# PM_BATLOW#_R Vcc1_5_B[17] VccSus3_3/VccLAN3_3[2]
C21 F23 W2

SYS
*PAD T109 TP0/BATLOW# Vcc1_5_B[18] VccSus3_3/VccLAN3_3[3] S:56mA C357
A21 F24 W7
GPIO26 DNBSWON# Vcc1_5_B[19] VccSus3_3/VccLAN3_3[4] .1U_4
C23 DNBSWON# (24) G22
*PAD T62 PWRBTN# Vcc1_5_B[20]
Note: Connect to EC; Reserve PH/3V B21
GPIO27
G23
Vcc1_5_B[21] Vcc3_3/VccHDA
U6
E23 R194 *100K_4 H22 S:10mA +3V_S5 C358
*PAD T60 GPIO28 R195 0_4 Vcc1_5_B[22] .1U_4
C19 PLTRST# (12,14,17,21,22,23,24,26,29) H23 R7
+3V CLKRUN# LAN_RST# Vcc1_5_B[23] VccSus3_3/VccSusHDA C352
(24,26) CLKRUN# AG18 J22
GPIO32/CLKRUN# PM_RSMRST# R237 100/F_4 RSMRST# Vcc1_5_B[24] .1U_4 +1.05V
Y4 RSMRST# (24) J23 AE23
RSMRST# Vcc1_5_B[25] V_CPU_IO[1]
AC19 K22 AE26
*PAD GPIO33/AZ_DOCK_EN# Vcc1_5_B[26] V_CPU_IO[2] S:14mA
U2 E20 K23 AH26

VCCA3GP
T119 GPIO34/AZ_DOCK_RST# GPIO9 EMAIL_LED# (25) Vcc1_5_B[27] V_CPU_IO[3]
R197 A20 L22
10K/F_4 PCIE_WAKE# GPIO10 RBAYID0 Vcc1_5_B[28] +3V
(14,23) PCIE_WAKE# F20 F19 L23 AA7
SERIRQ WAKE# GPIO12 RBAYID1 Vcc1_5_B[29] Vcc3_3[3] C321 C319 C311
(18,19,24,26) SERIRQ AH21 E19 M22 AB12
SERIRQ GPIO13 Vcc1_5_B[30] Vcc3_3[4] .1U_4 .1U_4 4.7U_1206
(3) THERM_ALERT# AF20 R4 LID591_ICH# (16) M23 AB20
THRM# GPIO14 R510 0_4 Vcc1_5_B[31] Vcc3_3[5]
E22 DOCKIN# (14,29) N22 AC16
VR_PWRGD_CK410 AD22 GPIO15 MB_ID1 Vcc1_5_B[32] Vcc3_3[6]
R3 N23 AD13
VRMPWRGD GPIO24 Vcc1_5_B[33] Vcc3_3[7]

IDE
D20 MB_ID0 P22 AD18 C339
GPIO25 Vcc1_5_B[34] Vcc3_3[8] .1U_4
(22) RST_HDD# AC21 AD21 P23 AG12
SCI# GPIO6 GPIO35 MB_ID2 Vcc1_5_B[35] Vcc3_3[9] +3V
(24) SCI#
KBSMI#
AC18
E21
GPIO7 GPIO GPIO38
AD20
AE20
R22
R23
Vcc1_5_B[36] Vcc3_3[10]
AG15
AG19
(24) KBSMI# GPIO8 GPIO39 Vcc1_5_B[37] Vcc3_3[11]
R24
ICH7-M GPIO25 /Suspend rail is a HW strap , don't pull down . Vcc1_5_B[38]
R25 A5
C Vcc1_5_B[39] Vcc3_3[12] C
R26 B13
Vcc1_5_B[40] Vcc3_3[13]
T22 B16
Vcc1_5_B[41] Vcc3_3[14] C327 C345 C336 C346
T23 B7
Vcc1_5_B[42] Vcc3_3[15] .1U_4 .1U_4 .1U_4 .1U_4
T26 C10
Vcc1_5_B[43] Vcc3_3[16]

PCI
T27 D15
ICH PWROK VR PWRGD T28
Vcc1_5_B[44]
Vcc1_5_B[45]
Vcc3_3[17]
Vcc3_3[18]
F9
U22 G11
+3V_S5 +3V Vcc1_5_B[46] Vcc3_3[19]
U23 G12
Vcc1_5_B[47] Vcc3_3[20] VCCRTC
C538 V22 G16
+3VSUS Vcc1_5_B[48] Vcc3_3[21]
V23
PCLK_SMB R416 2.2K_4 Vcc1_5_B[49] S:6uA
W22 W5
PDAT_SMB R408 2.2K_4 Vcc1_5_B[50] VccRTC
W23
PCIE_WAKE# R196 1K_4 C363 .022U_4 Vcc1_5_B[51] +3V_S5
.1U_4 Y22 P7
+3V Vcc1_5_B[52] VccSus3_3[1] C348 C349
Y23
RI# R399 10K_4 S:270mA Vcc1_5_B[53] .1U_4 .1U_4
A24
CL_CLK1 R400 10K_4 R415 VccSus3_3[2]
B27 C24
Vcc3_3[1] VccSus3_3[3]
5

SMLINK0 R401 10K_4 U20 D19


SMLINK1 R402 10K_4 100K_4 U29 GPLL_R_L S:50mA VccSus3_3[4] C314 C318
(3,6,31) DELAY_VR_PWRGOOD 2 AG28 D22
KBSMI# R200 10K_4 ICH_PWROK C307 C306 VccDMIPLL VccSus3_3[5] .1U_4 .1U_4
4 5 1 G19
.1U_4 .1U_4 VccSus3_3[6]
(24) PWROK_EC 1 2 VR_PWRGD_CK410# (2,31) AB7
SMB_ALERT# R406 10K_4 VR_PWRGD_CK410 Vcc1_5_A[1]
4 3 AC6 K3
TC7SH08FU R232 S:640mA Vcc1_5_A[2] VccSus3_3[7]
+1.5V AC7 K4
3

DNBSWON# R410 10K_4 SN74LVC1G04DCKR Vcc1_5_A[3] VccSus3_3[8]


10K_4 AD6 K5
Vcc1_5_A[4] VccSus3_3[9] +3V_S5

ARX
SYS_RST# R414 10K_4 AE6 K6
C353 Vcc1_5_A[5] VccSus3_3[10] S:45mA
PM_BATLOW#_RR421 10K_4
Note: External pull-up 3V 1U_6
AF5
AF6
Vcc1_5_A[6] VccSus3_3[11]
L1
L2
Vcc1_5_A[7] VccSus3_3[12]

USB
AG5 L3
+1.5V Vcc1_5_A[8] VccSus3_3[13]
AH5 L6
S:50mA Vcc1_5_A[9] VccSus3_3[14] C354 C368
L7
VccSus3_3[15] .1U_4 .1U_4
AD2 M6
+3V VccSATAPLL VccSus3_3[16]
M7
+3V VccSus3_3[17] +1.5V
AH11 N7
B CLKRUN# R419 8.2K_4 C372 Vcc3_3[2] VccSus3_3[18] B
.1U_4 +1.5V AB10 AB17
SERIRQ R413 8.2K_4 C338 Vcc1_5_A[10] Vcc1_5_A[19]
AB9 AC17
.1U_4 Vcc1_5_A[11] Vcc1_5_A[20]
SCI# R199 10K_4
M/B ID Select +3V
AC10
Vcc1_5_A[12] C350 C326 C351 C320
MB_ID2 MB_ID1 MB_ID0 MB TYPE AD10
Vcc1_5_A[13] Vcc1_5_A[21]
T7
AE10 F17 .1U_4 .1U_4 .1U_4 .1U_4
Vcc1_5_A[14] Vcc1_5_A[22]

ATX
C344 AF10 G17
RBAYID0 R205 *10K_4 1U_6 Vcc1_5_A[15] Vcc1_5_A[23]
AF9
R185 R265 R202 Vcc1_5_A[16]
AG9 AB8
RBAYID1 R204 *10K_4 Vcc1_5_A[17] Vcc1_5_A[24]
AH9 AC8
*100K_4 *100K_4 100K_4 Vcc1_5_A[18] Vcc1_5_A[25]
+1.5V 3VS5_ICH_SUS3 E3 K7 TP_ICHVCCSUS1 T71
MB_ID0 S:10mA VccSus3_3[19] VccSus1_05[1]
RSMRST# R243 10K_4 MB_ID1 C1 C28 TP_ICHVCCSUS2 T107
MB_ID2 VccUSBPLL VccSus1_05[2] TP_ICHVCCSUS3 T63
G20
T114 TPVCCSUSLAN1 AA2 VccSus1_05[3]
R186 R266 R203 C375 T67 TPVCCSUSLAN2 Y7 VccSus1_05/VccLAN1_05[1]
A1
.1U_4 VccSus1_05/VccLAN1_05[2]Vcc1_5_A[26] +1.5V
H6
*1K *1K *1K Vcc1_5_A[27]
H7

USB CORE
Vcc1_5_A[28]
J6
Vcc1_5_A[29]
J7
Vcc1_5_A[30]
ICH7-M C355
.1U_4

A +5V +3V +5V_S5 +3V_S5 A


S:50mA
+1.5V +3V R231 *0_4 +1.5V
2

+1.5V_PCIE_ICH 80mils L57 30mils


L56
D21 R234 D24 R397 1uH_6
R206 PDZ5.6B 15/15mils 10/F_6 PDZ5.6B 15/15mils +1.5V_PCIE_ICH S:770mA +3V_S5 R238 0_4 3VS5_ICH_SUS3 1_6 GPLL_R GPLL_R_L
100/F_4 30mils L:25mA
V5REF V5REF_SUS BLM18PG181SN1D PROJECT : ZU2
1

L:1500mA + C536 C365 C537 C535


C317 C316 C315 .1U_4 .01U_4
C331 C328 C371 C366 220U_7343 .1U_4 .1U_4 .1U_4 10U_8 Quanta Computer Inc.
1U_6 .1U_4 1U_6 .1U_4
Size Document Number Rev
ICH7-M (POWER & GND) 1B

Date: Thursday, March 22, 2007 Sheet 13 of 39


5 4 3 2 1
5 4 3 2 1

Giga LAN BCN5787M LAN Switch


+3V_S5

10
18
27
38
50
56
4

1
6
9
C61 C48 to Docking
.1U_4

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7

GND11
GND12
GND13
D13 BAS316 10U_8 TX0P 2 48 TX0P_PR
LINKLED# 1 LAN_MB_LINKLED# A0 0B1 TX0N_PR TX0P_PR (29)
2 47 TX0N_PR (29)
D12 BAS316 TX0N 1B1
3
100# 1 A1 TX1P_PR
2 43 TX1P_PR (29)
VAUX_12 D11 BAS316 A1A:(9/28) EMI suggest C61 from 0.1u to 10uF 2B1 TX1N_PR
42 TX1N_PR (29)
D
+3V_S5 1000# 1 3B1 D
2
TX1P 7 37 TX2P_PR
A2 4B1 TX2N_PR TX2P_PR (29)
36 TX2N_PR (29)
TX1N 5B1
8
C117 C63 C118 C83 C93 A3 TX3P_PR
32 TX3P_PR (29)
C449 C435 C434 C450 6B1 TX3N_PR
.1U_4 .1U_4 .1U_4 .1U_4 .1U_4 VAUX_25
PI3L500 7B1
31 TX3N_PR (29)
4.7U_8 .1U_4 .1U_4 .1U_4 TX2P 11 22
A4 0LED1 LAN_ACTLED# (29)
23 LAN_LILED# (29)
TX2N 1LED1
12 52
VAUX_12 VDDP+AVDD) A5 2LED1
TX0P_SYS
U9 C439 C438 46
.1U_4 .1U_4 VAUX_25 0B2 TX0N_SYS
BCM5787MKMLG TX3P 1B2
45
L12 BLM11A601S_6 14
VAUX_12 BIASVDD A6 TX1P_SYS
41
C71 C68 C116 C80 C90 TX3N 2B2 TX1N_SYS

15
19
56
61

17
68
15 40
A7 3B2

6
+3V_S5
4.7U_8 .1U_4 .1U_4 .1U_4 .1U_4 5 C67 35 TX2P_SYS

VDDIO
VDDIO
VDDIO
VDDIO
VDDIO

VDDP
VDDP
VDDC .1U_4 4B2 TX2N_SYS
13 36 34
VDDC BIASVDD LAN_MB_ACTLED# 5B2
20 19
VDDC L43 BLM11A601S_6 R49 LED0 TX3P_SYS
34 30
VDDC XTALVDD LAN_MB_LINKLED# 20 6B2 TX3N_SYS
55 23 29
VDDC XTALVDD LED1 7B2
60
L11 BLM11A601S_6 VDDC C436 10K_4 SYS_ACTLED#
54 25
AVDDL LED2 0LED2 SYS_LINKLED#
39 38 .1U_4 26
AVDDL AVDD L15 BLM11A601S_6 D6 BAS316 LAN_DOCKIN# 17 1LED2
44 51
C60 C62 46
51
AVDDL
AVDDL
BCM5787M
10mm X 10mm AVDD
45 AVDD_F14 (13,29) DOCKIN# SEL 2LED2

GND00
GND01
GND02
GND03
GND04
GND05
GND06
GND07
GND08
GND09
GND10
4.7U_8 .1U_4 AVDDL 68-Pin QFN
AVDD
52 0: A to B1 5
NC
L13 BLM11A601S_6 C433 C64 1: A to B2 U5
GPHY_PLLVDD 35 .1U_4 .1U_4 PI3L500 _(LAN SW)
VAUX_12 GPHY_PLLVDD
C59 C69

13
16
21
24
28
33
39
44
49
53
55
49 TX3N
4.7U_8 .1U_4 TRD3- TX3P
50
L14 BLM11A601S_6 TRD3+
+3V_S5 PCIE_PLLVDD 30 48 TX2N
C73 C81 PCIE_PLLVDD TRD2- TX2P
47
C
TRD2+ C
4.7U_8 .1U_4 42 TX1N
Q15 L10 BLM11A601S_6 27
PCIE_VDD
TRD1-
TRD1+
43 TX1P LAN Transformer
2

DTC144EUA R79 PCIE_SDS_VDD 33


4.7K_4 C65 C74 PCIE_VDD TX0N
41
TRD0- TX0P
40
4.7U_8 .1U_4 TRD0+
24
PCIE_WAKE_R# PCIE_GND LINKLED# VAUX_25
(13,23) PCIE_WAKE# 3 1 2
LINKLED# 100# +3V_S5 BLM11A601S_6 U2
1
SPD100LED# 1000# L9 +2.5V_LAN
67 1 24
C86 .1U_4 TXDP_C SPD1000LED# LAN_MB_ACTLED# TX0P_SYS TCT1 MCT1 X-TX0P
(12) PCIE_RXP1 26 66 2 23
C89 .1U_4 TXDN_C PCIE_TXDP TRAFFICLED# C44 C40 TX0N_SYS TD1+ MX1+ X-TX0N
(12) PCIE_RXN1 25 3 22
PCIE_TXDN R45 R35 R67 R318 TD1- MX1-
31 8 T75
(12) PCIE_TXP1 PCIE_RXDP GPIO2 .1U_4 .1U_4 +2.5V_LAN
32 4 21
(12) PCIE_TXN1 PCIE_WAKE_R# PCIE_RXDN 4.7K_4 TX1P_SYS TCT2 MCT2 X-TX1P
12 5 20
R78 0_4 -LAN_RST WAKE# *4.7K_4 TX1N_SYS TD2+ MX2+ X-TX1N
10 9 T76 6 19
(12,13,17,21,22,23,24,26,29) PLTRST# PERST# UART_MODE BCM_WP 4.7K_4 TD2- MX2-
29 7 T2
(2) CLK_PCIE_LAN REFCLK+ GPIO1_SERIALDI 4.7K_4 +2.5V_LAN
28 4 T1 7 18
(2) CLK_PCIE_LAN# REFCLK- GPIO0_SERIALDO TX2P_SYS TCT3 MCT3 X-TX2P
8 17
BCM_RESET# TX2N_SYS TD3+ MX3+ X-TX2N
9 16
AUX_PRES TD3- MX3-
CableSence need to reserve R121 and take out R77 +3V_S5 R313 1K_4 54
VAUXPRSNT
C47 C37
R314 1K_4 VMA_PRES 53 +2.5V_LAN 10 15
+3V VMAINPRSNT TCT4 MCT4
3 65 BCM_SCL .1U_4 .1U_4 TX3P_SYS 11 14 X-TX3P
(24) LOW_PWR LOW_PWR SCLK SI TX3N_SYS TD4+ MX4+ X-TX3N
63 12 13
SI BCM_SDA TD4- MX4-
(13) PCLK_SMB_LAN 58 64
R77 SMB_CLK SO CS# NS892402P R31 R30 R29 R28
(13) PDAT_SMB_LAN 57 62
SMB_DATA CS#
*4.7K_4
C95 33p_4 XTALO_R R62 200_4 XTALO 22 59
XTALI XTALO NC/(ENERGY_DET) ENERGY_DET (24)
21 75_4 75_4 75_4 75_4
XTALI C30
+3V_S5 MGND
Y1 RDAC 37
RDAC

3
25Mhz 18 LAN REGCTL25 C56 C45 1500P/2KV_1808
R50 REGCTL25 Q11
1.18K_6 1 MMJT9435 .1U_4 4.7U_8
C108 33p_4
14 LAN REGCTL12
REGCTL12

2
4
ZU1 base on BCM IEEE
B VAUX_25 B
test result, change R42 value from 11

Change C95, C108 from 27p to 33p


1.24k to 1.18k
T77 NC(CLK_REQ#)
REG_GND
16 C55 C53
ZU1: (9/1 BCM recommend)
RJ45
for TXC report (3/16) .1U_4 47U_1210 Change capacitance value from 47-uF to 10-uF. CN22
GND

Package Body +3V_S5


R304 220_4 11
YELLOW__P
SYS_ACTLED# 12
69

ZU1: (9/1 BCM recommend) YELLOW_N


stuff R36,no stuff R55(in order to pull up C91,C87 and Q14/pin 3 to
3V_LAN rail)
X-TX3N 1
LAN_REG1_2V R36 1.5_1206 RX2-
+3V_S5
X-TX3P 2
RX2+

3
C91 C87 R55 *1_1206 X-TX1N 3
VAUX_25 RX1-
Q14
1 MMJT9435 .1U_4 10U_8 X-TX2N 4 13
TX2- GND1
X-TX2P 5 14 C422 .1U_4
TX2+ GND2
2
4 VAUX_12
X-TX1P 6
RX1+
C13 .01U_4

C94 C103 X-TX0N 7 C35 1500P/2KV_1808


TX1-
.1U_4 10U_8 X-TX0P 8
TX1+

R303 220_4 9 MGND


+3V_S5 GREEN_P
SYS_LINKLED# 10
GREEN_N
Flash ROM/EEPROM C416 C417
AOP_C100D8-108A4-L
*.1U_4 *.1U_4
EEPROM Strapping
A CS# SI BCM_SCL A
+3V_S5
U4
SO SI CS# SCLK
BCM_SDA 1 8 SI EMI request: reserve .1U (C416 and C417)for EMI Solution
BCM_SCL SI SO R63 R315 R316 R70
2 7
BCM_RESET# SCK GND
3
RESET# VCC
6 +3V_S5 24c64 1 1 0 1 4.7K_4 *4.7K_4 4.7K_4 *4.7K_4
CS# 4 5 BCM_WP
CS# WP# C54
.1U_4 AT45DB011B 1 0 1 1 CS#
AT45DB011B-SC
PROJECT : ZU2
Quanta Computer Inc.
Size Document Number Rev
GigaLAN (BCM5787M) / RJ45 1B

Date: Thursday, March 22, 2007 Sheet 14 of 39


5 4 3 2 1
1 2 3 4 5 6 7 8

C8 .1U_4
CRT CONNECTOR AND ESD
D1 SSM14 CRTVDD5
+5V

C9
0213: add C9 for EMI solution .1U_4
CN21

16
A SUY_070546FR015S200ZR A

6
SYS_VGA_RED L5 BLM18BA220SN1_6 CRT_R1 1 11
7
SYS_VGA_GRN L4 BLM18BA220SN1_6 CRT_G1 2 12
8
SYS_VGA_BLU L6 BLM18BA220SN1_6 CRT_B1 3 13
9
4 14
R4 R5 R6 C17 C18 C19 C6 C5 C4 10
150_4 150_4 150_4 10P_4 10P_4 10P_4 10P_4 10P_4 10P_4 5 15

17
R300 10K_6 +3V

R301 0_6 CRT_SENSE#_L


(24,29) CRT_SENSE#
R302 *0_6 2/1:By Alan: modify for
Acer design rule for
B B
auto detect CRT insert
CORRECT
ADD BYPASS CAP
DOCK_VSYNC (29)
+5V DOCK_HSYNC (29)
+5V
U1
1 16 CRTVSYNC1 R14 0_4 L38 BLM18BA220SN1_6 CRTVSYNC
C26 VCC_SYNC SYNC_OUT2 CRTHSYNC1 R12 0_4 L39 BLM18BA220SN1_6 CRTHSYNC
SYNC_OUT1 14
.1U_4 7
C25 .22U_6 VCC_DDC +5V C413 C414
8 BYP +3V
SYNC_IN2 15 VSYNC (6)
2 13 R19 R20 *47P_4 *47P_4
+3V VCC_VIDEO SYNC_IN1 HSYNC (6)
2.2K_4 2.2K_4
C23 CRT_R1 3 10 CRT_DDCCLK R305 R306
VIDEO_1 DDC_IN1 CRT_DDCCLK (6)
.1U_4 CRT_G1 4 11 CRT_DDCDAT 2.7K_4 2.7K_4
VIDEO_2 DDC_IN2 CRT_DDCDAT (6)
CRT_B1 5 VIDEO_3 DOCK_DDCK
DDC_OUT1 9 DOCK_DDCK (29)
6 12 DOCK_DDDA
GND DDC_OUT2 DOCK_DDDA (29)
IP4772
C7 C415 to Docking
C C
*47P_4 *47P_4

CRT Select +5V


U3

VCC 16
CRT_RED 4 2 SYS_VGA_RED
(6) CRT_RED C_A A0
A1 3 DOCK_R (29)
CRT_GRN 7 5 SYS_VGA_GRN C39
(6) CRT_GRN C_B B0
6 .1U_4
B1 DOCK_G (29)
CRT_BLU 9 11 SYS_VGA_BLU
(6) CRT_BLU C_C C0
C1 10 DOCK_B (29)
12 C_D D0 14
D1 13
PR_INSERT_5V 1
(16,29) PR_INSERT_5V SE
D 15 8 D
EN# GND
SN74CBTLV3257PWR
SEL FUNCTION PROJECT : ZU2
LOW IN_0
Quanta Computer Inc.
HIGH IN_1
Size Document Number Rev
CRT 1A

Date: Thursday, March 22, 2007 Sheet 15 of 39


1 2 3 4 5 6 7 8
5 4 3 2 1

LVDS CAMERA MODULE

32
CN36
VIN R8 0_8 INVCC0 30 29 R23 0_8

32
+3V 30 29
28 27
28 27 +3V
26 25 I_EDIDCLK +3V 1 3 CCD_POWER
R11 26 25
LCDVCC C29 10U_8

+
24 23
2.2K_4 24 23 Q6 R24

2
R307 0_4 DMIC-12_R 22 21 *AO3413 C421 1000P_4 *4.7K_4
(27) DMIC-12 22 21 TXLCLKOUT+ (6)
I_EDIDDATA
(6) I_EDIDDATA
R308 0_4 DMIC-CLK_1 20 19 BECAUSE UR'S SUGGESTION,
(27) DMIC-CLK 20 19 TXLCLKOUT- (6)
ACTICE CHANGE FROM LOW TO HIGH.

3
D D
18 17
C420 18 17
+3V *10P_4 CCD_POWER 16 15 TXLOUT0+ (6) 2
16 15 CCD_POWERON (24)

+3V 14 13 TXLOUT0- (6)


14 13 Q5

1
R13 R18 *0_4 CONTRAST_R 12 11 *DTC144EU
(6) LVDS_PWM 12 11
R16 0_4
(24) CONTRAST
2.2K_4 DISPON 10 9 TXLOUT1+ (6)
10 9
I_EDIDCLK C27 I_EDIDDATA 8 7 TXLOUT1- (6)
(6) I_EDIDCLK 8 7
*.1U_4
6 5
6 5 VIN
(12) USBP3+
R21 0_4 USBP3+_CN 4
4 3
3 TXLOUT2+ (6) LCD Power L8
R22 0_4 USBP3-_CN 2 1 TI201209G121_8 +3V

31
(12) USBP3- 2 1 TXLOUT2- (6)
R10 3VLCD 2 1

31

3
ACS_88242-3001 330K_6 Vgs=20V
Q2 Rds@10V=28m ohm
+3V VIN AO3404
+5V_S5 LCDONG 2 @4.5V=42m ohm
Ids@25C=5.8A
1

C14 L7 CHB2012U121_8
C16 + C15 R9 C24 LCDVCC1 1 2 LCDVCC

1
3
1000P_4 10U/25V_1210 1000P_4 100K_6 .01u/16V_4
2

R17 C20 C21 C28


2
22_8 .1u/16V_4 .01u/16V_4 10U_6
Q3 Q1

3
PDTC143TT 2N7002 LCDDISCHG

3
(6) LCD_PWRON 2

C ZU1:(12/28) EMI request: reserve L-C footprint for debug use (R52,C650) C
LCDON# 2

1
R15
(3/19)Change MB LCD connector pin define(CN3) and LCD cable pin define to cover production line issue 100K_4 Q4
(Inverter short with signal to burn system)->ZR1 issue 2N7002
(1)pin 27,29->NC

1
(2)pin 8->INT_LVDS_EDIDDATA

1/29:By Alan: AAT4280 fail on power ON rising time and


falling time. EA.Additionally, some LCD panels will have
garbage. follow ZR1 circuit.

TV Out (SVHS) MiniDIN 7-pin MR Sensor

TV-CHROMA

3
3/19 backlight on issue that same as ZU1
+3V

B B

2
D32
U7
16 +5V *DA204U R511 R26
VCC SYS_TV_Y/G
(6) TV_Y/G 4 2 +3V 10K_4 1K_4
C_A A0
3 DOCK_TV_Y/G (29)
A1 SYS_TV_C/R R34 0_4
(6) TV_C/R 7 5 MR_LID# (25)
C_B B0 C79
6 DOCK_TV_C/R (29)
B1 SYS_TV_COMP
(6) TV_COMP 9 11 .1U_4
C_C C0 DISPON D3 BAS316 R33 0_4
10 DOCK_TV_COMP (29) LID591# (24)
C1

3
12 14
C_D D0
13
D1 R32 10K
(15,29) PR_INSERT_5V 1 +3V_S5
SE TV-LUMA BL#
15 8 2
EN# GND
SN74CBTLV3257PWR Q34 D4

3
SEL FUNCTION 2N7002
LID591_ICH# (13)
3

1
LOW IN_0
2 1SS355

3
HIGH IN_1 (6) LVDS_BLON
Q35
2N7002 2 EC_FPBACK# (24)
1

D33 R512

1
CN20 *DA204U 100K_4 Q7

1
BLM18PG181SN1D_6
+3V
5

L3 L1 BLM18PG181SN1D_6 DTC144EU
SYS_TV_C/R TV-CHROMA 6 4 TV-LUMA SYS_TV_Y/G
5

6 4

9 8
R7 C12 C3 9 8 C1 C10 R2

150_4 6P_4 6P_4 6P_4 6P_4 150_4 TV-COMP

A 3 A
3 1
7

3
7

SUY_030107FR007S112FR
L2 BLM18PG181SN1D_6
TV-COMP SYS_TV_COMP
1

D31

*DA204U PROJECT : ZU2


R3 +3V
C2 C11
Quanta Computer Inc.
6P_4 6P_4 150_4
Size Document Number Rev
LVDS/MR senseor/SVIDEO 1B
Date: Thursday, March 22, 2007 Sheet 16 of 39
5 4 3 2 1
5 4 3 2 1

SDVO-DVI

(6) SDVOB_R+
(6) SDVOB_R- SDVO_CTRLCLK
+2.5V R60 4.7K_4
(6) SDVOB_G+
(6) SDVOB_G-
DVI_AVDD +2.5V R58 4.7K_4 SDVO_CTRLDATA
(6) SDVOB_B+
(6) SDVOB_B- NB internal PD for SDVO is not implement
Nedd external PU for SDVO exist
(6) SDVOB_CLK+
D (6) SDVOB_CLK- D

INT- C105 .1U_4


GMCHEXP_RXN1 (6)
DVI_AVDD
INT+ C97 .1U_4
GMCHEXP_RXP1 (6)
AS->Address Select (Internal pull-up)
This pin determines the serial port address of the device (0,1,1,1,0,0,AS*,0).
When AS is low the address is 72h, when high the address is 70h.

48
47
46
45
44
43
42
41
40
39
38
37
U10

SDVOB_CLK-

SDVOB_B-

SDVOB_G-

SDVOB_R-
AVDD3

SDVOB_CLK+
AGND3

SDVOB_B+
AVDD2

SDVOB_G+
AGND2

SDVOB_R+
+2.5V R64 10K_4 R65 *100K_4

L41 BLM11A601S_6 DVI_AVDD_PLL 1 36 DVI_AVDD L17 BLM11A601S_6


+3V AVDD_PLL AVDD1 +2.5V
(12,13,14,21,22,23,24,26,29) PLTRST# 2 35
C106 C109 AS RESET* RSV C120 C107 C119 C111
3 AS BSCAN 34
4 33 INT-
10U_8 (6) SDVO_CTRLCLK SPC SDVOB_INT- 10U_8
.1U_4 5 32 INT+ .1U_4 .1U_4 .1U_4
(6) SDVO_CTRLDATA SPD SDVOB_INT+
6 31
AGND_PLL AGND1
7 DGND1 DGND2 30
8 29 TMDS_HPD
SD_PROM HPDET DVI_DVDD
9 28
SC_PROM DVDD2 PROM2
(29) DOCK_DDC_DT 10 SD_DDC PROM2 27
11 26 PROM1
DVI_DVDD (29) DOCK_DDC_CK SC_DDC PROM1
+2.5V L42 BLM11A601S_6 12 25
DVDD1 VSWING

TGND1

TGND2
TVDD1

TVDD2
TDC0*

TDC1*

TDC2*
TDC0

TDC1

TDC2
C88 C92 C82 R57

TLC*
TLC
.1U_4 .1U_4 10U_8 1.2K_4
C C

13
14
15
16
17
18
19
20
21
22
23
24
CH7307C-DEF

to Docking DVI_TVDD L40 BLM11A601S_6 +3V

C77 C76 C72

.1U_4 .1U_4 10U_8


(29) DVI_CLK-
(29) DVI_CLK+

(29) DVI_D0-
(29) DVI_D0+

(29) DVI_D1-
(29) DVI_D1+

(29) DVI_D2-
(29) DVI_D2+

+3V +3V

R320 R319
FOR CH7312 HDCP USE
10K_4 100K_4

7312 TMDS_HPD

3
B +2.5V PN +2.5V B

Q26 Q25
2 2 DVI_DET
DVI_DET (29)
2N7002 2N7002
U11
4 R68 *0_4
GND
8 7 1 2

1
VCC E#
3 A2
2 5 PROM1 C98
A1 D PROM2
1 6 *.1U_4
A0 C Intel suggest:Add hotplug circuit to DVI_DET (follow ZC1)

*CH9901

R73 *10K_4
+2.5V 2 1 PROM1

R71 *10K_4
2 1 PROM2

A A

PROJECT : ZU2
Quanta Computer Inc.
Size Document Number Rev
DVI (CH7307) 1A
Date: Thursday, March 22, 2007 Sheet 17 of 39
5 4 3 2 1
5 4 3 2 1

+3V
PCI_CLK_CB714 R158 *22_4 PCLK_PCM_R C267 *10P_4

C524 C522 C521 C529 R146 *0_6 PCIRST#


R145 100K_6
+3V
.1U_4 .1U_4 .1U_4 .1U_4
CB_RSMRST#

B1C:(11/29) reserve R572 for Debug use


VCCD1#
delay 10ms at least VCCD0#

C254 VPPD1
C527 C528 C263 C269 .22U_6 VPPD0
D .1U_4 .1U_4 .1U_4 .1U_4 INTE# D
(12) INTE#
SERIRQ A_CRSVD/D2
(13,19,24,26) SERIRQ A_CRSVD/D2 (20)
PCI_PME# R387 0_4 PCM_PME# A_CRSVD/D14
(12,19,21) PCI_PME# A_CRSVD/D14 (20)
PCMSPK A_CRSVD/A18
ZU1: (27) PCMSPK A_CRSVD/A18 (20)
CB_RSMRST# A_CCD1#
FAE suggest R189's value under 47 ohm. REQ0# +3V A_CCD1# A_CCD2#
(12) REQ0# A_CCD1# (20)
C253 C252 GNT0# A_CCD2#
(12) GNT0# A_CCD2# (20)
AD17 R157 47_4PCM_IDSEL C532 C525
.1U_4 .1U_4 PCIRST# R378 A_CVS1#
(12,19,23) PCIRST# A_CVS1# (20)
PCI_CLK_CB714 A_CVS2#
(2) PCI_CLK_CB714 A_CVS2# (20)
R148 R147 10P_4 10P_4
FRAME# 43K_4
(12,19,21) FRAME#
IRDY#
(12,19,21) IRDY#

PCM_SUS#
TRDY# 0_4 0_4
(12,19,21) TRDY#
DEVSEL# T106 T105 T52
(12,19,21) DEVSEL# T56 T57
STOP#
(12,19,21) STOP#
PERR#
(12,19,21) PERR#
SERR#
(12,19,21) SERR#

M10

M11

M13

M12
N11

N10

N13

N12

E10
L11

L10

L12
J13
M1

M9
G4
H1

N9

C6
D9
K3
K1

B1
A1

K9

K8

A2

A4
F4
U16

L3
L2
L1

L8
J4
AD[31..0] A_CAD[31..0]

SERR#
PERR#
STOP#
DEVSEL#
TRDY#
IRDY#
FRAME#

PCICLK
PCIRST#

IDSEL

PCIGNT#
PCIREQ#

G_RST#

SUSPEND#
SPKROUT
RI_OUT#/PME#

MFUNC6
MFUNC5
MFUNC4
MFUNC3
MFUNC2
MFUNC1
MFUNC0

VCCD1#
VCCD0#

VPPD1
VPPD0

RSVD/D2
RSVD/D14
RSVD/A18

CCD1#/CD1#
CCD2#/CD2#

CVS1/VS1
CVS2/VS2
(12,19,21) AD[31..0] A_CAD[31..0] (20)
AD0 N8 B2 A_CAD31
AD1 AD0 CAD31/D10 A_CAD30
K7 C3
AD2 AD1 CAD30/D9 A_CAD29
L7 B3
AD3 AD2 CAD29/D1 A_CAD28
N7 A3
AD4 AD3 CAD28/D8 A_CAD27
M7 C4
AD5 AD4 CAD27/D0 A_CAD26
C N6 A6 C
AD6 AD5 CAD26/A0 A_CAD25
M6 AD6 CAD25/A1 D7
AD7 K6 C7 A_CAD24
AD8 AD7 CAD24/A2 A_CAD23
M5 AD8 CAD23/A3 A8
AD9 L5 D8 A_CAD22
AD10 AD9 CAD22/A4 A_CAD21
K5 AD10 CAD21/A5 A9
AD11 M4 C9 A_CAD20
AD12 AD11 CAD20/A6 A_CAD19
K4 A10
AD13 AD12 CAD19/A25 A_CAD18
N3 B10
AD14 AD13 CAD18/A7 A_CAD17
M3 D10
AD15 AD14 CAD17/A24 A_CAD16
N2 E12
AD16 AD15 CAD16/A17 A_CAD15
J2 F10
AD17 AD16 CAD15/IOWR# A_CAD14
J1 E13
ENE1410 AJ014100T41 AD18 H4
AD17 CAD14/A9
F13 A_CAD13
AD19 AD18 CAD13/IORD# A_CAD12
H3 AD19 CAD12/A11 F11
AD20 G3 G10 A_CAD11
AD21 AD20 CAD11/OE# A_CAD10
G2 G11
AD22 AD21 CAD10/CE2# A_CAD9
F1 G12
AD23 AD22 CAD9/A10 A_CAD8
ID Select : AD17 AD24
F2
AD23 CAD8/D15
H12
A_CAD7
E2 H10
AD25 AD24 CAD7/D7 A_CAD6
Interrupt Pin : INTE# AD26
E3 AD25 CAD6/D13 J11
A_CAD5
E4 AD26 CAD5/D6 J12
Request Indicate : REQ0# AD27 D1 K13 A_CAD4
AD28 AD27 CAD4/D12 A_CAD3
D2 J10
AD29 AD28 CAD3/D5 A_CAD2
Grant Indicate : GNT0# AD30
D4 AD29 CAD2/D11 K10
A_CAD1
C1 AD30 CAD1/D4 K12
AD31 C2 L13 A_CAD0
AD31 CAD0/D3

CSTSCHG/BVD1/STSCHG#

CCLKRUN#/WP/IOIS16#
CBE0#

CAUDIO/BVD2/SPKR#
B N5 B

CINT#/READY/IREQ#
(12,19,21) CBE0# CBE0#
CBE1# N1
(12,19,21) CBE1# CBE1#
CBE2# J3 H13 A_CC/BE0#

CREQ#/INPACK#
(12,19,21) CBE2# CBE2# CCBE0#/CE1# A_CC/BE0# (20)

CSERR#/WAIT#

CDEVSEL#/A21
CBE3# E1 E11 A_CC/BE1#

CRST#/RESET
CFRAME#/A23
CBLOCK#/A19
(12,19,21) CBE3# CBE3# CCBE1#/A8 A_CC/BE1# (20)

CPERR#/A14

CSTOP#/A20

CTRDY#/A22
PAR A_CC/BE2#

CGNT#/WE#
M2 A11

CIRDY#/A15
(12,19,21) PAR PAR CCBE2#/A12 A_CC/BE2# (20)
A_CC/BE3#

CCLK/A16
CCBE3#/REG# B7 A_CC/BE3# (20)
D13 A_CPAR
VCCA1
VCCA2

VCC10

CPAR/A13 A_CPAR (20)


GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7

VCC8
VCC9

CB1410
D3
H2
L4
M8
K11
F12
C10
B6

F3
G1
K2
N4
L6
L9
H11

G13
A7
D12
C8
B4

B5
C5
D6
D11

C11
B8

A5
C13

C12
B13
A13
A12
B11

D5
B9
B12
+3V AVCC +3V
U17

VCCD0# 1 16 +3V
VCCD1# VCCD0# SHDN# VPPD0
2 VCCD1# VPPD0 15
+3V 3 14 VPPD1
3.3V VPPD1 R_A_CCLK R388 10_4 A_CCLK
4 13 A_CCLK (20)
3.3V AVCC A_CRST#
+5V 5 12 A_CRST# (20)
5V AVCC A_CCLKRUN#
6 11 AVCC A_CCLKRUN# (20)
5V AVCC
7 10 AVPP
GND AVPP
8 OC# 12V 9
A_CFRAME#
A_CFRAME# (20)
A A_CIRDY# A
A_CIRDY# (20)
A_CTRDY#
ENE CP-2211 A_CDEVSEL#
A_CTRDY# (20)
A_CDEVSEL# (20)
A_CSTOP#
+5V +3V AVCC AVPP A_CSTOP# (20)
AVCC A_CPERR#
A_CPERR# (20)
A_CSERR#
A_CREQ#
A_CSERR# (20) PROJECT : ZU2
A_CREQ# (20)
A_CGNT#
C281 C282 C280 C264 C523 C266 C257 C258 C265 C531 A_CBLOCK#
A_CGNT# (20)
A_CBLOCK# (20)
Quanta Computer Inc.
A_CINT#
A_CINT# (20)
4.7U_6 .1U_4 4.7U_6 .1U_4 4.7U_6 .1U_4 4.7U_6 .1U_4 .1U_4 .1U_4 A_CSTSCHG
A_CSTSCHG (20)
A_CAUDIO Size Document Number Rev
A_CAUDIO (20)
PCMCIA (ENE CB1410) 1A

Date: Thursday, March 22, 2007 Sheet 18 of 39


5 4 3 2 1
5 4 3 2 1

Decoupling CAP.
ID Select : AD18 +3V
Interrupt Pin : INTG# 510_INT# R520 *0_4
INTG# (12)

Request Indicate : REQ1# R521 0_4


INTB# (12)
C591 C598 C629 C634 C637
Grant Indicate : GNT1# .1U_4 .1U_4 .1U_4 .1U_4 .1U_4
(20) XDRE#/MSCLK
xDDATA3/MSDATA3
xDDATA3/MSDATA3 (20)
D xDDATA5/MSDATA2 D
(20) SDWP xDDATA5/MSDATA2 (20)
xDDATA2/MSDATA0
(20) SDCD# xDDATA2/MSDATA0 (20)
XDDATA6/MSDATA1
XDDATA6/MSDATA1 (20)
XDWP# C569 C636 C638 C639 C557
+3V_CRVCC XDWP# (20)
XDBSY# +3V
+3V +3V XDBSY# (20)
ZU1:no stuff R496,R522 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4
SERIRQ (13,18,24,26)

PRST#
+3V_CRVCC

SUSPEND#
GND_SD

SERIRQ
R494
R463 *0_4 XDCE# R491
XDCE# (20)

SDCD#
+3V_CRVCC

SDWP
T123T125 T127
GRST# should R439 *0_4 T124 T121 T126 T122 43K_4
connect to Power +3V SUSPEND#
On reset if 0_4 C606 C574 C610
support S3

128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
U36

99
98
97
.1U_4 .1U_4 .1U_4

NC
XPMPWR_ENIZ
XPMPWR_O
XPMPWR_VCC
NC
NC
XSDCDIZ
XSDWPISMWPDIZ
VCC
VSS
XMSCLKOSMREOZ
XMSDAT3BSMDAT3B
XMSDAT2BSMDAT5B
XMSDAT0BSMDAT2B
XMSDAT1BSMDAT6B
VCC_SD
XMDAT5BSMWPOZ
XMDAT6BSMBSYIZ
XMFUNC7B
GND_SD
XSUSPENDIZ
XMFUNC6B
XMFUNC5B
XMFUNC4B
XGRSTIZ
XMFUNC3B
XMFUNC2B
VCC
XMFUNC1B
XMDAT4B
XMDAT7BSMCEOZ
VSS
(12,18,21) AD[31..0]
AD0
AD1
MSBSOSMDAT1 96 XDDATA1/MSBS
XDDATA1/MSBS (20)
48MHz CLK
AD2 1 95
(20) SDPWREN33# XSDPWR33OZ MS_SMPWROZ XDPWREN#MSPWREN# (20)
C AD3 2 94 510_INT# C
AD4 GND_SD NC MFUNC0 510_PME# R508 0_4
3 93 PCI_PME# (12,18,21)
AD5 xDCLE/SDDAT2 4 GND_SD RIOUTZ_PMEOZ R507 43K_4
(20) XDCLE/SDDAT2 92 +3V
AD6 xDDATA4/SDDAT35 SDDAT2SMCLE VSS AD0 +3V
(20) xDDATA4/SDDAT3 91
AD7 xDALE/SDCMD SDDAT3SMDAT4 PCIAD0 MSINX# Y5
(20) xDALE/SDCMD 6 90 MSINX# (20)
AD8 XDWE#/SDCLK 7 SDCMDSMALE MSINSIZ XDCD# SDCLKI
(20) XDWE#/SDCLK 89 XDCD# (20) 3 4
AD9 xDDATA7/SDDAT08 SDCLKSMWEOZ SMCDIZ AD1 OUT VDD
(20) xDDATA7/SDDAT0 SDDAT0SMDAT7 PCIAD1 88
AD10 xDDATA0/SDDAT19 87 AD2 2 1
(20) xDDATA0/SDDAT1 SDDAT1SMDAT0 PCIAD2 GND OE
AD11 10 86 AD3 R477
+3V_CRVCC VCC_SD PCIAD3
AD12 11 85 AD4 *TXC-48MHz-30PPM-15Pf C568
AD13 NC PCIAD4 AD5 *0_4
12 NC PCIAD5 84
AD14 13 83 AD6 *.01U_4
AD15 NC PCIAD6 AD7
14 82
AD16 NC PCIAD7
15 81 +3V
AD17 NC VCC
(12) REQ1# 16 80
AD18 PCIREQOZ VSS
(12) GNT1# 17 79
AD19 AD31 PCIGNTIZ NC
18 78
AD20 AD30 PCIAD31 NC
19 77
AD21 AD29 PCIAD30 NC
AD22
20
21
PCIAD29
VSS
NC
NC
76
75 PU/PD
AD23 AD28 22 74 C/BE0#
PCIAD28 PCICBE0Z CBE0# (12,18,21)
AD24 AD27 23 73 AD8
AD25 AD26 PCIAD27 PCIAD8 AD9 XDDATA1/MSBS R506 *43K_4
24 72
AD26 AD25 PCIAD26 PCIAD9 AD10 xDDATA3/MSDATA3 R470 *43K_4
25 71
AD27 AD24 PCIAD25 PCIAD10 AD11 xDDATA5/MSDATA2 R476 *43K_4
26 70
AD28 C/BE3# PCIAD24 PCIAD11 xDDATA2/MSDATA0 R481 *43K_4
(12,18,21) CBE3# 27 PCICBE3Z VCC 69 +3V
AD29 AD18 R446 47_4 510_IDSEL 28 68 AD12 XDDATA6/MSDATA1 R482 *43K_4
B PCIIDSELI PCIAD12 B
AD30 29 67 AD13
+3V VCC PCIAD13
AD31 30 66 AD14
NC PCIAD14

PCIDEVSELZ
AD15

PCISERROZ
31 65

PCIFRAMEZ
NC PCIAD15

PCIPERRZ
PCITRDYZ

PCISTOPZ
PCICBE2Z

PCICBE1Z
ZU1:FAE suggest R value under 47 ohm. 32

PCIIRDYZ
PCIRSTIZ

NC
PCIAD23
PCIAD22
PCIAD21
PCIAD20

PCIAD19
PCIAD18

PCIAD17
PCIAD16
+3V
PCICLKI

PCIPAR
SDCLKI
VCC

VCC
VSS

VSS
NC XDCD# R504 *10K_4
NC

NC
NC

NC
NC
NC
SDCD# R509 *43K_4
MR510 SDWP R505 *43K_4
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
PCI_CLK_510_L

+3V_CRVCC

XDWP#
FRAME#

R483 *43K_4
C/BE2#

C/BE1#
DEVSEL#

PERR#
SERR#
TRDY#

STOP#
PRST#

PCI_CLK_510_L XDCE#
IRDY#
R502 43K_4
AD23
AD22
AD21
AD20

AD19
AD18

AD17
AD16
SDCLKI

PAR
XDWE#/SDCLK R442 43K_4
R465 XDBSY# R490 8.2K_4
XDRE#/MSCLK R471 43K_4
*0_4 XDALE/SDCMD R441 *43K_4
XDCLE/SDDAT2 R440 *43K_4

1
+3V +3V C590 XDDATA0/SDDAT1 R443 *43K_4
(12,18,23) PCIRST#
XDDATA4/SDDAT3 R496 *43K_4
(2) PCI_CLK_510 *10P_4
R472 22_4 XDDATA7/SDDAT0 R499 *43K_4

2
(12,18,21) CBE2#
(12,18,21) FRAME#
(12,18,21) IRDY# 0213: follow ZU1 for cost down issue with FAE
A (12,18,21) TRDY# A
(12,18,21) DEVSEL#
(12,18,21) STOP#
(12,18,21) PERR#
(12,18,21) SERR# PROJECT : ZU2
(12,18,21) PAR
(12,18,21) CBE1# Quanta Computer Inc.
Size Document Number Rev
1B
Card Reader (MR510)
Date: Wednesday, March 28, 2007 Sheet 19 of 39
5 4 3 2 1
5 4 3 2 1

AVCC
CardReader PCMCIA
R377 43K_4 A_CAD11

CN16 FOX_WZ21131-G2-8F

1 GND
A_CAD0 2
(18) A_CAD0 D3 - CAD0
XDWE#/SDCLK_R A_CAD1 3 75
(19) XDWE#/SDCLK (18) A_CAD1 D4 - CAD1 GND
R436 22_4 A_CAD3 4 76
(18) A_CAD3 D5 - CAD3 GND
R434 A_CAD5 5 77
+3V_CRVCC (18) A_CAD5 D6 - CAD5 GND
D A_CAD7 6 78 D
(18) A_CAD7 D7 - CAD7 GND
*0_4 A_CC/BE0# 7 79
(18) A_CC/BE0# CE1- CCBE0 GND
A_CAD9 8 80
(18) A_CAD9 A10- CAD9 GND

1
C553 CN18 A_CAD11 9 81
(18) A_CAD11 OE - CAD11 GND
XDBSY# 1 A_CAD12 10 82
*10P_4 (19) XDBSY# xD-R/B (18) A_CAD12 A11- CAD12 GND
XDRE#/MSCLK_R 2 A_CAD14 11 83
(18) A_CAD14

2
XDCE# xD-RE A_CC/BE1# A9 - CAD14 GND
(19) XDCE# 3 xD-CE (18) A_CC/BE1# 12 A8 - CCBE1 GND 84
XDCLE/SDDAT2 4 A_CPAR 13
(19) XDCLE/SDDAT2 xD-CLE (18) A_CPAR A13- CPAR
XDALE/SDCMD 5 A_CPERR# 14
(19) XDALE/SDCMD xD-ALE (18) A_CPERR# A14- CPERR
XDWE#/SDCLK_R 6 A_CGNT# 15
xD-WE (18) A_CGNT# WE/PGM - CGNT
XDWP# 7 A_CINT# 16
(19) XDWP# xD-WP (18) A_CINT# RDY/BSY,IRQ*INT
XDDATA0/SDDAT1 8 17
(19) XDDATA0/SDDAT1 xD-D0 AVCC VCC
XDCD# XDDATA1/MSBS 9
(19) XDDATA1/MSBS xD-D1
XDCLE/SDDAT2 10 18
SD-DAT2 AVPP VPP1
1
C635 XDDATA4/SDDAT3 11 A_CCLK 19
SD-DAT3 (18) A_CCLK A16- CCLK
XDALE/SDCMD 12 A_CIRDY# 20
*10P_4 SD-CMD (18) A_CIRDY# A15- CIRDY
13 A_CC/BE2# 21
(18) A_CC/BE2#
2
4in1-GND A_CAD18 A12- CCBE2
14 MS-VCC (18) A_CAD18 22 A7 - CAD18
XDRE#/MSCLK_R 15 A_CAD20 23
MS-SCLK (18) A_CAD20 A6 - CAD20
XDDATA3/MSDATA3 16 A_CAD21 24
MS-DATA3 (18) A_CAD21 A5 - CAD21
MSINX# 17 A_CAD22 25
(19) MSINX# MS-INS (18) A_CAD22 A4 - CAD22
XDRE#/MSCLK_R XDDATA5/MSDATA2 18 A_CAD23 26
(19) XDRE#/MSCLK MS-DATA2 (18) A_CAD23 A3 - CAD23
R456 22_4 XDDATA2/MSDATA0 19 A_CAD24 27
MS-DATA0 (18) A_CAD24 A2 - CAD24
R455 XDDATA6/MSDATA1 20 A_CAD25 28
MS-DATA1 (18) A_CAD25 A1 - CAD25
XDDATA1/MSBS 21 A_CAD26 29
MS-BS (18) A_CAD26 A0 - CAD26
*0_4 22 A_CAD27 30
4in1-GND (18) A_CAD27 D0 - CAD27
C 23 A_CAD29 31 C
SD-VCC (18) A_CAD29 D1 - CAD29
1

C573 XDWE#/SDCLK_R 24 A_CRSVD/D2 32


SD-CLK (18) A_CRSVD/D2 D2 - RFU
XDDATA7/SDDAT0 25 A_CCLKRUN# 33
*10P_4 SD-DAT0 (18) A_CCLKRUN# WP,IOIS16-CKRUN
XDDATA2/MSDATA0 26 34
(19) XDDATA2/MSDATA0
2

XDDATA3/MSDATA3 xD-D2 GND


(19) XDDATA3/MSDATA3 27 xD-D3
XDDATA4/SDDAT3 28 35
(19) XDDATA4/SDDAT3 xD-D4 GND
XDDATA0/SDDAT1 29 A_CCD1# 36
SD-DAT1 (18) A_CCD1# CD1- CCD1
XDDATA5/MSDATA2 30 A_CAD2 37
+3V (19) XDDATA5/MSDATA2 xD-D5 (18) A_CAD2 D11- CAD2
XDDATA6/MSDATA1 31 A_CAD4 38
(19) XDDATA6/MSDATA1 xD-D6 (18) A_CAD4 D12- CAD4
XDDATA7/SDDAT0 32 A_CAD6 39
(19) XDDATA7/SDDAT0 xD-D7 (18) A_CAD6 D13- CAD6
33 A_CRSVD/D14 40
xD-VCC (18) A_CRSVD/D14 D14- RFU
MSINX# R466 43K_4 XDCD# 34 A_CAD8 41
(19) XDCD# xD-CD-SW (18) A_CAD8 D15- CAD8
SDWP 35 A_CAD10 42
(19) SDWP SD-WP-SW (18) A_CAD10 CE2- CAD10
1

C589 SDCD# 36 A_CVS1# 43


(19) SDCD# SD-CD-SW (18) A_CVS1# RFSH,VS*1-CVS1
37 A_CAD13 44
*10P_4 GND (18) A_CAD13 IORD-CAD13
38 A_CAD15 45
(18) A_CAD15
2

GND A_CAD16 IOWR-CAD15


(18) A_CAD16 46 A17- CAD16
A_CRSVD/A18 47
(18) A_CRSVD/A18 A18- RFU
TTN_R015-210-LM A_CBLOCK# 48
(18) A_CBLOCK# A19- CBLOCK
A_CSTOP# 49
(18) A_CSTOP# A20- CSTOP
A_CDEVSEL# 50
(18) A_CDEVSEL# A21- CDEVSEL
AVCC 51 VCC

AVPP 52 VPP2
A_CTRDY# 53
(18) A_CTRDY# A22- CTRDY
A_CFRAME# 54
(18) A_CFRAME# A23- CFRAME
A_CAD17 55
B (18) A_CAD17 A24- CAD17 B
A_CAD19 56
(18) A_CAD19 A25- CAD19
A_CVS2#
CardReader Power switch (18) A_CVS2#
(18) A_CRST#
A_CRST#
57
58
NC - CVS2
RESET-CRST
A_CSERR# 59
(18) A_CSERR# WAIT-CSERR
A_CREQ# 60
(18) A_CREQ# INPACK-CREQ
A_CC/BE3# 61
(18) A_CC/BE3# REG- CCBE3
A_CAUDIO 62
(18) A_CAUDIO BVD2,SP-CAUDIO
A_CSTSCHG 63
(18) A_CSTSCHG BVD1,STSCHG-C*
A_CAD28 64
+3V +3V +3V_CRVCC (18) A_CAD28 D8 - CAD28
A_CAD30 65
(18) A_CAD30 D9 - CAD30
A_CAD31 66
(18) A_CAD31 D10- CAD31
C609 .1U_4 A_CCD2# 67
(18) A_CCD2# CD2- CCD2
68 GND
Q31
R478 1 8 85
GND OUT HOLE1
2 7 86

N-PTH_Hole
N-PTH_Hole
IN OUT C577 C583 HOLE2
3 IN OUT 6 87 HOLE3
43K_4 .1U_4 88
R480 0_4 10U_8 HOLE4
4 5

GND
GND
GND
GND
(19) XDPWREN#MSPWREN# EN# OUTNC
R479 0_4
(19) SDPWREN33#
G545B2P8U

69
70
71
72
73
74
A A

PROJECT : ZU2
Quanta Computer Inc.
Size Document Number Rev
CARD Reader & PCMCIA SLOT 1A
Date: Thursday, March 22, 2007 Sheet 20 of 39
5 4 3 2 1
5 4 3 2 1

PLTRST#
ID Select : AD25
+3V R459 *0_4 GNT2#
Interrupt Pin : INTF#
C572 C571 Request Indicate : REQ2#
R457
22P/50V_4 22P/50V_4 Grant Indicate : GNT2#
Y4
22K_4

G_RST#
2 1
C578

.1U_4 24.576MHZ

D D
(12) INTF#
(2) PCLK_1394
C541
(12) GNT2#
R427 R426
(12) REQ2#
1U_6 CN35
(12,18,19) PCI_PME#
C564 R433 56.2_4 56.2_4 5
L1394_TPB2- 1
AD[0..31] .1U_4 R498 0_6 L1394_TPA2+ L1394_TPA2- 3 6
(12,18,19) AD[0..31]
R451 6.34K_4 R503 0_6 L1394_TPA2- L1394_TPA2+ 4
R497 0_6 L1394_TPB2+ L1394_TPB2+ 2
R493 0_6 L1394_TPB2-
4.7K_4
+3V +3V C600 PLLVDD AVDD

FILTER1
FILTER0
SUY_020115FR004S518ZL

AD24
AD25

AD26
AD27

AD28
AD29
AD30

AD31
.1U_4 R217 R216

R0
R1
56.2_4 56.2_4

XO
XI
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
U31 R207 C334

99
98
97
270P_4
PCI_AD24
PCI_AD25
REG18
PCI_AD26
PCI_AD27

PCI_AD28
PCI_AD29
PCI_AD30

PCI_AD31
PCI_PME#

PCI_REQ#
PCI_GNT#

G_RST#
PCI_INTA#
PCI_CLKRUN#
REG_EN#

FILTER1
FILTER0
R0
R1
DVDD

DGND

DGND

DVDD

XI
PLLGND
PLLVDD

AVDD
AGND
XO
VDDP

PCI_PCLK
5.1K_4
ZU1: change R271,R306,R307 value from 56.2 to 5.1k

1 96 TPBIAS2
DGND TPBIAS2 TPA2+
(12,18,19) CBE3# 2 95
PCI_C/BE3# TPA2+ TPA2-
3 94
AD25 R474 150_4 VDDP TPA2-
4 93
AD23 PCI_IDSEL AVDD TPB2+ C337
5 92
AD22 PCI_AD23 TPB2+ TPB2- R425 R424
6 91
PCI_AD22 TPB2- 1U_6
7 90
AD21 DVDD AVDD 56.2_4 56.2_4
8 89
AD20 PCI_AD21 AGND TPBIAS1
9 88
AD19 PCI_AD20 TPBIAS1 TPA1+ R215 0_6 1394TPAP1
10 87 1394TPAP1 (29)
AD18 PCI_AD19 TPA1+ TPA1- R214 0_6 1394TPAN1
C 11 86 1394TPAN1 (29)
C
PCI_AD18 TPA1- R213 0_6 1394TPBP1
12 85 1394TPBP1 (29)
AD17 DGND AVDD R212 0_6 1394TPBN1
13 84 1394TPBN1 (29)
AD16 PCI_AD17 AGND TPB1+
14 83
PCI_AD16 TPB1+ TPB1-
(12,18,19) CBE2# 15 82
PCI_C/BE2# TPB1-
16 81
VDDP AVDD R223 R222
(12,18,19) FRAME# 17 80
PCI_FRAME# AGND TPBIAS0
(12,18,19) IRDY# 18 79
PCI_IRDY# TPBIAS0 TPA0+ 56.2_4 56.2_4
19 78
DVDD TPA0+ TPA0-
(12,18,19) TRDY# 20 77
PCI_TRDY# TPA0-
(12,18,19) DEVSEL# 21 76
PCI_DEVSEL# AGND TPB0+
(12,18,19) STOP# 22 75
PCI_STOP# TPB0+ TPB0-
23 74
DGND TPB0- R228 C361
(12,18,19) PERR# 24 73
PCI_PERR# AGND AVDD
(12,18,19) SERR# 25 72
PCI_SERR# AVDD 270P_4
(12,18,19) PAR 26 71
PCI_PAR AGND 5.1K_4
27 70
DVDD AVDD R241 390K_4
(12,18,19) CBE1# 28 69
AD15 PCI_C/BE1# CPS
29 68
PCI_AD15 PHY_TEST_MA
30 67
AD14 VDDP CNA
31 66
GPIO3/TEST1
GPIO2/TEST0

PCI_AD14 DGND
32 65
PCI_C/BE0#

CYCLEOUT

DGND DVDD
PCI_RST#
PCI_AD13
PCI_AD12
PCI_AD11

PCI_AD10

CYCLEIN
PCI_AD9
PCI_AD8

PCI_AD7

PCI_AD6
PCI_AD5

PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1

PCI_AD0

REG18
DGND

DGND

DGND
DVDD

DVDD
VDDP

SDA
SCL

PC2
PC1
PC0

R239 R240 C362


R221 R220
1U_6
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64

TSB43AB23 4.7K_4 4.7K_4 56.2_4 56.2_4

R211 0_6 1394TPAP0


1394TPAP0 (29)
R210 0_6 1394TPAN0
1394TPAN0 (29)
R209 0_6 1394TPBP0
1394TPBP0 (29)
SDA R208 0_6 1394TPBN0
1394TPBN0 (29)
SCL
AD13
AD12
AD11

AD10
AD9
AD8

AD7

AD6
AD5

AD4
AD3
AD2
AD1

AD0

R219 R218
B B

56.2_4 56.2_4
R458 C563
(12,18,19) CBE0#
R453 R445 R438
(12,13,14,17,22,23,24,26,29) PLTRST#
.1U_4
4.7K_4 4.7K_4 220_4 220_4
R229 C356

+3V 270P_4
5.1K_4

C347

.1U_4

+3V
R225 R224
PLLVDD
2.7K_4 2.7K_4
U21 L58
1 8 BLM18PG181SN1D_6
A0 VCC C550
2 7
A1 NC C556 10U_8 C566
3 6
A3 SCL 1000p/50V_4 1000p/50V_4
4 5
GND SDA

24LC02BT AVDD

L59
BLM18PG181SN1D_6
C549 C545 C364 C552 C544 C547 C542 C543
C585 10U_8
A 1000p/50V_4 1000p/50V_4 .01U_4 .01U_4 .1U_4 .1U_4 .1U_4 A
1000p/50V_4

C548 C621 C596 C546 C570 C619 C616


C594 10U_8 C618 C588 C620 C617
.01U_4 .01U_4 .01U_4 .01U_4 .01U_4 .1U_4 .1U_4 .1U_4 .1U_4 270P_4 270P_4 PROJECT : ZU2
Quanta Computer Inc.
Size Document Number Rev
1394(TSB43AB23) 1A
Date: Thursday, March 22, 2007 Sheet 21 of 39
5 4 3 2 1
1 2 3 4

SATA HDD CN30

GND1 1
RXP 2 SATA_TXP0 (11)
RXN 3 SATA_TXN0 (11)
GND2 4
5 SATA_RXN0 (11)
TXN
6 SATA_RXP0 (11)
1 2
TXP
GND3 7 2 1

RST
GND
A A
+5V R198 0_8 HDD_VDD 8 +3.3VSATA R171 *0_8 +3V
3.3V
3.3V 9
3.3V 10
GND 11
C343 12
C325 + C359 C360 GND
GND 13 20
14 HDD_VDD
.1U_4 150U_7343 .1U_4 .1U_4 5V
5V 15
5V 16 SATA HDD DOESN'T USE 3V PWR
GND 17
RSVD 18
19

GND
GND
12V 20
+3.3VSATA

X
12V 21
12V 22
43 44 44 43
C312 C310 C313

*4.7U_8 *4.7U_8 *.1U_4


AOP_C16669-12204-L

PATA ODD
B +5V B

C290 C294 C295 C289


(11) PDD[0..15] PDD0 .1U_4 .1U_4 .1U_4 .1U_4
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6 +3V +5V
PDD7
PDD8
PDD9 Q18
ODD Connector

2
PDD10 DTC144EU R183
PDD11 10K_4 CN29
PDD12 R192 *0_4
PDD13 (13) RST_HDD# 1 2
PDD14 R193 33_4 -IDERST 3 4 PDD8
(12,13,14,17,21,23,24,26,29) PLTRST# 1 3 5 6
PDD15 PDD7 PDD9
PDIOR# PDD6 7 8 PDD10
(11) PDIOR# 9 10
PDIOW# PDD5 PDD11
(11) PDIOW# 11 12
PDDACK# PDD4 PDD12
(11) PDDACK# 13 14
IRQ14 PDD3 PDD13
(11) IRQ14 15 16
PIORDY PDD2 PDD14
(11) PIORDY 17 18
PDDREQ PDD1 PDD15
(11) PDDREQ 19 20
PDD0 PDDREQ
21 22 PDIOR#
C (11) PDA[2:0] 23 24 C
PDA0 PDIOW#
PDA1 PIORDY 25 26 PDDACK#
PDA2 IRQ14 27 28
PDA1 29 30 -PDIAG R168 *10K_4
31 32 +5V
PDCS1# PDA0 PDA2
(11) PDCS1# 33 34
PDCS3# PDCS1# PDCS3#
(11) PDCS3# 35 36
(25) IDELED# 37 38
39 40
+5V 41 42 +5V
43 44
R170 4.7K_4 PIORDY RCSEL 45 46
+3V 47 48
<check list & FAE> C305

51
52
R169 8.2K_4 IRQ14 49 50 C293 + C291
+3V Must be PU even when IDE device is not use
51
R166 52 .1U_4 150U_7343 .1U_4

470_4
NC FOR SLAVE
AOP_C124A9-150A1-L

D D

PROJECT : ZU2
Quanta Computer Inc.
Size Document Number Rev
SATA-HDD & PATA-ODD 1A

Date: Thursday, March 22, 2007 Sheet 22 of 39


1 2 3 4
1 2 3 4 5 6 7 8

MINI-Card BLUETOOTH MODULE CONNECTOR


+3V +1.5V
L23 CN7
+3V_WL_VDD BT_POWER
1
FBJ3216HS800_1206 Q12 2
(12) USBP2+ 3
C376 C389 C390 C393 + C380 C379 AO3413
(12) USBP2- 4
10U_8 .1U_4 .1U_4 .1U_4 BT_LED
(25) BT_LED 5
10U_8 .1U_4
+3VSUS 1 3 BT_POWER_R L16 BK2125HS330_8 BT_POWER ACS_88266-05001-06
A A

C104 10U_8

+
POWER DECOUPLING

2
C99 1000P_4
C101
.01U_4
BT_POWERON# (24)

+1.5V +3V_WL_VDD +3V_WL_VDD

0_4 R270 +1.5V_MINI-Card System USB


Reserved for debug only
+ C397 C398
R281 *0_4 CL_DATA1_CN
(12,18,19) PCIRST#
R282 0_4 CL_CLK1_CN 10U_8 .1U_4
(2) PCLK_DEBUG_HW
+5V_S5
U14
2 8 USBPWR1
CN31 IN1 OUT3
3 7
IN2 OUT2
51 52 6
Reserved +3.3V OUT1
B 49 50 (24) USBON# 4 B
CL_DATA1_CN Reserved GND EN#
47 48 1
CL_CLK1_CN Reserved +1.5V GND
45 46 9 5 OC1# (12)
R285 0_4 KEDRON_GND_43 Reserved LED_WPAN# 1/29:By Alan:Acer request: +5V_S5 GND-C OC#
43 44 WIRELESS_LED# (25)
R283 0_6 KEDRON_VCC Reserved LED_WLAN# USB power supply on SUSB. TPS2061DGNR
+3V_WL_VDD 41
39
Reserved LED_WWAN#
42
40
OC# pin on ZU1 NC(01/24)
R286 0_4KEDRON_GND_37 Reserved GND
37 38
Reserved USB_D+ C272
35 36
GND USB_D-
(12) PCIE_TXP2 33 34 .1U_4
PETp0 GND
(12) PCIE_TXN2 31 32 CGDAT_SMB (2,9)
PETn0 SMB_DATA
29 30 CGCLK_SMB (2,9)
GND SMB_CLK
27 28
GND +1.5V
(12) PCIE_RXP2 25 26
PERp0 GND
(12) PCIE_RXN2 23 24
PERn0 +3.3Vaux
21 22 PLTRST# (12,13,14,17,21,22,24,26,29)
GND PERST# RF_EN_RR R277 0_4
(24) uR_SOUT_CR 19 20 RF_EN (24)
Reserved Reserved
(24) uR_SWD 17 18
Reserved GND USBPWR1
15 16 0_4 R271
GND Reserved LFRAME# (11,24,26)
13 14 0_4 R278
+3VSUS (2) CLK_PCIE_MINI1 11
REFCLK+ Reserved
12 0_4 R276
LAD3 (11,24,26)
(2) CLK_PCIE_MINI1# REFCLK- Reserved LAD2 (11,24,26)
9 10 0_4 R272 C249 C261
GND Reserved LAD1 (11,24,26)
7 8 0_4 R273 1000P_4
CLKREQ# Reserved LAD0 (11,24,26)
5 6 100U_3528
Reserved +1.5V
3
Reserved GND
4 Reserved for debug only CN14
Q20 1 2
WAKE# +3.3V 1 5
2

R287
(12) USBP1- 2 6
*DTC144EU *4.7K_4 ACS_88911-5204
(12) USBP1+ 3 7
9.9mm (ME request) 4 8
C C
3 1 PCIE_WAKE#_MINI SUY_020133MB004S557ZL
(13,14) PCIE_WAKE#
U13
CM1293-04SO
1 6 +5V_S5
CH1 CH4
2 5
VN VP
3 4
CH2 CH3

CN24 +5V_S5
1 2 USBON#
1 2 +5V_S5 C46
(12) USBP4- 3 4
3 4
(12) USBP4+ 5 6
5 6
7 8
7 8
(12) USBP5- 9 10
9 10 .1U_4
(12) USBP5+ 11 12
11 12
ACS-88028-1210M

D D

PROJECT : ZU2
Quanta Computer Inc.
Size Document Number Rev
Mini card/USB/Bluetooth 1B

Date: Wednesday, March 28, 2007 Sheet 23 of 39


1 2 3 4 5 6 7 8
5 4 3 2 1

ZU1: Comfirm by vendor mail:


+3VPCU +A3VPCU +3V VDD must power up after VCC/AVCC SM BUS PU +3VPCU

MBCLK R96 4.7K_4


L47 BLM18AG601SN1_6 +A3VPCU MBDATA R97 4.7K_4
2ND_MBCLK R100 4.7K_4
C454 C204 C216 Comfirm by vendor mail: 2ND_MBDATA R98 4.7K_4
C132 C458 VBAT for keep PLL power let power up can quick.
.1U_4 .1U_4 10U_8 +3V
.1U_4 10U_8 If no VBAT will switch to VCCpower.
If PLL no power will cause boot time delay. EC_GPIO42 R122 4.7K_4
CRT_SENSE# R337 *4.7K_4
8769AGND 08/10 FAE:

115

102
C212 C131 C161 C468 C203 C133 1/29:confirmed Anda: take out R398

19
46
76
88

80
0.1UF
I/O ADDRESS SETTING

4
10U_8 .1U_4 .1U_4 .1U_4 .1U_4 .1U_4 U12 MTEMP C139 ICMNT_L C640
D .1U_4 .1U_4 D

VCC1
VCC2
VCC3
VCC4
VCC5

VBAT
AVCC

VDD
I/O Address
place the above capacitors as close to the pins as possible
Add it. Capacitors as close to EC as possible BADDR1-0 Index Data
LFRAME# 3 97
(11,23,26) LFRAME# LFRAME AD0/GPI90 MTEMP (35)
LAD0 126 98 00 XOR TREE TEST MODE
(11,23,26) LAD0 LAD1 LAD0 AD1/GPI91
(11,23,26) LAD1 127 99
LAD2 LAD1 AD2/GPI92 ICMNT_L R517 0_4
(11,23,26) LAD2 128 LAD2 A/D AD3/GPI93 100 ICMNT (35) 01 CORE DEFINED
LAD3 1 108
(11,23,26) LAD3 LAD3 AD4/GPIO05
PCLK_591 2 96 10 2Eh 2Fh
(2) PCLK_591 LCLK AD5/GPIO04
PCLK_591 8 11 164Eh 164Fh
(13,26) CLKRUN# CLKRUN/GPIO11/HGPIO02
DA0/GPI94 101 CC-SET (35)
(11) GATEA20 121
GA20 DA1/GPI95
105 CPUFAN# (3) SHBM=0: Enable shared memory with host BIOS
D/A DA2/GPI96
106
R125 122 107
(11) RCIN# KBRST DA3/GPI97 CCD_POWERON#
*22_4 BADDR0 R353 10K_4
D16 BAS316 SCI#_uR 29 LPC
(13) SCI# ECSCI
64 BADDR1 SOUT_CR_DEBUG R352 *10K_4
GPIO01 ACIN (35)
(25) CAPSLED# 6 95 NBSWON# (25,29)
LDRQ/GPIO24/HGPIO01 GPIO03 RF_EN
GPIO06/HGPIO06
93 LID591# (16) SHBM R338 10K_4
C224 124 94
LPCPD/GPIO10/HGPIO00 GPIO07/HGPIP07 SUSB# (13)
*10P_4 GPIO23 119 EC_FPBACK# (16)
PLTRST# 7 109 1/13 Comfirm by vendor mail :
(12,13,14,17,21,22,23,26,29) PLTRST# LREST GPIO30 SUSLED# (25)
120 PWRLED# (25) Disabled ('1') if using FWH device on LPC.
GPIO31
(25) NUMLED# 123 65 BATLED0# (25)
PWUREQ GPIO32
66 Enabled ('0') if using SPI flash for both system BIOS and EC firmware
SERIRQ GPIO33 BATLED1# (25)
(13,18,19,26) SERIRQ 125 15 VRON (31)
SERIRQ GPIO36
GPIO40 16 MAINON (32,33,34)
D15 BAS316 SMI#_uR 9 17 EC_GPIO42
(13) KBSMI# SMI GPIO42/TCK
GPIO GPIO43/TMS
20 AMP_MUTE# (28)
ACER ID
21 +3VPCU
C MX0 GPIO44/TDI PR_STS (29) U6 C
(25) MX0 54 KBSIN0 GPIO45 22 SUSON (33,34)
MX1 55 23 ENERGY_DET_R R121 0_4 2ND_MBCLK 6 1
(25) MX1 MX2 KBSIN1 GPIO46/TRST ENERGY_DET (14) 2ND_MBDATA SCL A0
(25) MX2 56 24 5 2
MX3 KBSIN2 GPO47/JEN0 SDA A1
(25) MX3 57 KBSIN3 GPIO50/TDO 25 D/C# (35) A2 3
MX4 58 26 1/30: Add CableSence circuit
(25) MX4 MX5 KBSIN4 GPIO51 S5_ON (30)
(25) MX5 59 27 LOW_PWR (14) 7 8
MX6 KBSIN5 GPIO52/RDY HWPG WP VCC
(25) MX6 60 KBSIN6 GPIO53 28 GND 4
61 91 DNBSWON#_uR D14 BAS316
(25) MX7 KBSIN7 GPIO81 DNBSWON# (13)
110 24LC08 C70
GPO82/HGPIO00/TRIS CCD_POWERON# BT_POWERON# (23)
(25) MY0 53 112 CCD_POWERON (16) .1U_4
KBSOUT0/JENK GPO84/HGPIO01/BADDR0
(25) MY1 52 KBSOUT1/TCK T15
51 CCD_POWERON ACITVE LO => HI
(25) MY2 KBSOUT2/TMS 08/10 FAE: ADD TP FOR DEBUG
(25) MY3 50 KBSOUT3/TDI TA1/GPIO56 31
(25) MY4 49
KBSOUT4 KB TA2/GPIO20
117 HIGH_LOAD (29)
48 63
(25) MY5
(25) MY6 47
KBSOUT5/TDO
KBSOUT6/RDY
TB1/GPIO14/HGPIO4 FANSIG (3)
SPI FLASH
(25) MY7 43
KBSOUT7 TIMER A_PWM0
32 CONTRAST (16)
SPI_SDI_uR R90
42 118 22_6 SPI_SDI_uR_R
(25) MY8 KBSOUT8 A_PWM1/GPIO21 USBON# (23)
(25) MY9 41 62 SYS_CHARGE (29)
KBSOUT9 B_PWM0/GPIO13
(25) MY10 40 KBSOUT10
39 +3VPCU
(25) MY11 KBSOUT11
38 84 CRT_SENSE# +3VPCU
(25) MY12 KBSOUT12/GPIO64 SPI_DI/GPIO77 RF_EN CRT_SENSE# (15,29)
37 SPI 83 U24
(25) MY13 KBSOUT13/GPIO63 SPI_DO/GPO76/SHBM RF_EN (23)
FOLLOW INTEL ME-EC INTERFACE SPECIFICATION, 36 82 SPI_SDI_uR_R 2 8
2ND_SMB IS DEDICATED FOR ICH8 CONTROLLER LINK BUS. (25) MY14 KBSOUT14/GPIO62 SPI_SCK/GPIO75 CELL-SET (35) SO VDD
35 R53
(25) MY15 MY16 KBSOUT15/GPIO61/XOR_OUT SPI_SDO_uR_R 5
(25) MY16 34 7
+5V KBSOUT16/GPIO60 RSMRST#_uR 0_6 R105 10K_4 SI HOLD C431
33 KBSOUT17/GPIO57/HGPIO03 IRRX1/GPIO72 75 RSMRST# (13)
73 SPI_SCK_uR_R 6 3 .1U_4
IRRX2_IRSL0/GPIO70 PWROK_EC_uR SUSC# (13) SCK WP
74 R103 0_4
MBCLK IRTX/GPIO71 PWROK_EC (13) SPI_CS0#_uR
(35) MBCLK 70
SCL1 IR SIN_CR/CIRRX/GPIO87
113 1
CE VSS
4
8
6
4
2

MBDATA 69 14
(35) MBDATA 2ND_MBCLK SDA1 GPIO34/CIRRX2
RP23 67 SMB 114 W25X80VSSIG
B (3) 2ND_MBCLK SCL2 CIRTX/GPIO16/HGPIO04 B
4.7K_8P4R 2ND_MBDATA 68 111 SOUT_CR_DEBUG R350 *0_4
(3) 2ND_MBDATA SDA2 SOUT_CR/GPO83/BADDR1 uR_SOUT_CR (23) 1/29:By Alan: Per Winbond's request,
Place the ,R596,R597,R598 as close as possible to the source.
7
5
3
1

72 86 SPI_SDI_uR
(25) TBCLK PSCLK1 F_SDI
71 87 SPI_SDO_uR R81 22_6 SPI_SDO_uR_R
(25) TBDATA PSDAT1 F_SDO SPI_CS0#_uR
(29) PR_KB_CLK 10
PSCLK2/GPIO26 FIU F_CS0
90 1/13 Comfirm by vendor mail :
11 PS/2 92 SPI_SCK_uR R94 22_6 SPI_SCK_uR_R
(29) PR_KB_DATA PSDAT2/GPIO27 F_SCK If the Southbridge enables 'Long Wait Abort' by default, the
(29) PR_MS_CLK 12
13
PSCLK3/GPIO25
81 SWD_DEBUG R339 *0_4 flash device should be 50MHz (or faster)
(29) PR_MS_DATA PSDAT3/GPIO12 SWD/GPIO66 uR_SWD (23)
8768_32KX1 77 30 uR_TP_CLKOUT T22
32KX1/32KCLKIN CLKOUT/GPIO55
85 VCC_POR# R95 4.7K_4 +3VPCU
VCC_POR
VCORF

BUTTON ON KEYBOARD MATRIX


AGND
GND1
GND2
GND3
GND4
GND5
GND6

R99 20M_6 8768_32KX2 79 104 VREF_uR R342 0_4 +A3VPCU


32KX2 VREF
0~AVCC power for DA pin
R93 WPC8763LDG MX0
power reference MX0 (25)
5
18
45
78
89
116

103

44

33K/F_6 MX1
MX2 MX1 (25)
MX2 (25)
1
2

VCORF_uR

ADD ONE GAD PAD UNDER X'TAL, 08/14 FAE: MX3


MX3 (25)
MX4
AND KEEP CLEANCE. Please connect VREF(uRider pin104) to MX5 WIRELESS_SW# (25)
Y3
+A3VPCU instead of +3VPCU. BLUETOOTH_SW# (25)
32.768KHZ
C128 C129 MY16
MY16 (25)
4
3

10P_4 10P_4 C166

+3V L18 1U_6


1/13 Comfirm by vendor mail : HZ0603B601R-00_6
DEBUG PORTS
Connect to AGND
INTERNAL KEYBOARD STRIP SET
8769AGND R123 Reserved for LPC debug card
A +3VPCU A
10K_4 EC Debug Port +3V CN8
8769AGND +3VPCU 10 MY0 R110 10K_4
LAD0 10
9
D20 BAS316 HWPG LAD1 9
(34) HWPG_CPUIO 1 1 8 8
SOUT_CR_DEBUG 2 LAD2 7
D18 *BAS316 SWD_DEBUG 2 LAD3 7
3 6
(30) HWPG_3/5VPCU
4
3
4 (2) PCLK_DEBUG_SW 5
6
5
PROJECT : ZU2
D19 BAS316 LFRAME# 4
(32) HWPG_1.05V PLTRST# 4
CN9 3
(33) HWPG_1.8V
D17 BAS316 *ACS_88231-04001 SERIRQ 2
3
2
Quanta Computer Inc.
1 1
12/25: Steven:D16 not necessary if 3V/5V fail, EC can't work. Size Document Number Rev
This monitor circuit is't necessary. BOT CONTACT *ACS_88502-1001 EC (PC8763LDG)/ FLASH 1B
Date: Thursday, March 22, 2007 Sheet 24 of 39
5 4 3 2 1
5 4 3 2 1

INT K/B CN10 TOUCH PAD CN11


MY15 +5V_TP
(24) MY15 1 +3VPCU 1
MY14 MY0 TP_DATA
(24) MY14 2 2
MY13 MY1 TP_CLK
(24) MY13 MY12 3 MY2 3 6
(24) MY12 MY11 4 MY3 4 5
(24) MY11 MY10 5 MY4
(24) MY10
MY9 6 MY5 10
RP12
1 MX4
uR REQUEST 20 MIL *SCY_BL123-04R-TAND
(24) MY9 7 MY DOES NOT NEED PU. L21
MY8 MY6 MX1 9 2 MX7
(24) MY8 MY7 8 MY7 MX2 MX6 MY CAN NOT USE EMI BYPASS CAP, DUE TO FLASH. +5V_TP
8 3 C242 .1U_4
(24) MY7 MY6 9 MY8 MX3 MX5 +5V
(24) MY6 10 7 4
MY5 MY9 MX0 6 5 BK2125HS330_8
(24) MY5 11
MY4 MY10
D (24) MY4 MY3 12 MY11 D
(24) MY3 10K_10P8R
MX7 13 MY12
(24) MX7 MX6 14 MY13 R133 R130
(24) MX6 15
MY2 MY14
(24) MY2 MX5 16 MY15 10K_4 10K_4
(24) MX5 17
MX4 MX0 CONNECT TO TP/B
(24) MX4 MX3 18 MX1
(24) MX3 MX2 19 MX2 CN12
(24) MX2 MY1 20 MX3
(24) MY1 21 1
MY0 MX4 L20 LZA10-2ACB104MT_6 TP_DATA BOT CONTACT
(24) MY0 MX1 22 MX5 (24) TBDATA TP_CLK 2
L19
(24) MX1 MX0 23 MX6 (24) TBCLK 3 6
LZA10-2ACB104MT_6
(24) MX0 24 MX7 4 5
25 C238 C237
ACS_88502-250N ACS_88502-0401
*.1U_4 *.1U_4

LED
+3V +3V +3V +3V
+3VPCU 1/31: Base on SMT-ME request, change LED type to 2 in 1
DEL LED4,LED5,LED6,LED7,R570,R571,Add LED2,LED3
Finger Printer
R297 330_4
PWRLED# (24)
R43 R44 R51 R54 CN13
R296 330_4 10K_4
SUSLED# (24) +3VSUS 4
LED2 10K_4 10K_4 330_4
LED_G/Y_LTST-C195KGJSKT IDE_LED R137 0_6 BUSBP7- 3 6
(12) USBP7- 2
R138 0_6 BUSBP7+
(12) USBP7+ 1 5

3
C C
D8 BAS316 *ACS_88266-04001-06
R299 330_4 (22) IDELED#
BATLED0# (24)
D7 BAS316
2
R298 330_4 (11) SATA_LED# Q13
BATLED1# (24)
LED3
LED_G/Y_LTST-C195KGJSKT 2N7002

1
+3V
+3V +3V LED Board +3VPCU
CN1 CN2

R48 MX3 1 SUSLED# 1


(24) MX3 2 2
R47 R1 MY16 IDE_LED
330_4 NBSWON# 3 CAPSLED 3
NUMLED 330_4 *330_4 PWRLED# 4 NUMLED 4
5 5
3

CAPSLED EMAIL_LED NUMLED PWRLED#


6 6
3

3
CAPSLED NBSWON#
IDE_LED 7 +3VPCU MY16 7
Q10 SUSLED# 8 MX3 8
2
(24) NUMLED# Q9 Q22 9 9
2 2
2N7002 (24) CAPSLED# (13) EMAIL_LED# 10 10
2N7002 *2N7002E 11 11
12 12
1

no support EMAIL LED


1

1
ACS_88502-1001 *SCY_BL123-10R-TAND

B B

G2
Function Board (24,29) NBSWON# NBSWON# 1 2

*SHORT_PAD

+3VPCU Keyboard Matrix Button


CN5 +3VPCU
CN6
MX0 1
(24) MX0
MX0/MY16 acer EAP Buttton +3VPCU
MX1 2 MX0 1
(24) MX1 MX2 3 (24) MX0 MX1 2
(24) MX2 4 (24) MX1 3
MX1/MY16 acer EMAIL Buttton
MY16 MX2 LED1
(24) MY16 5 (24) MX2 MY16 4
MX2/MY16 acer WWW Buttton R124 330_4 ECPWRLED 2 1 PWRLED#
(16) MR_LID# 6 (24) MY16 5
WIRELESS_SW#
(24) WIRELESS_SW# 7 (16) MR_LID# 6
BLUETOOTH_SW# WIRELESS_SW# MX3/MY16 acer EPM Buttton LED_G_LTST-C190KGKT
(24) BLUETOOTH_SW# WIRELESS_LED# 8 (24) WIRELESS_SW# BLUETOOTH_SW# 7
(23) WIRELESS_LED# BT_LED 9 (24) BLUETOOTH_SW# WIRELESS_LED# 8
(23) BT_LED (23) WIRELESS_LED#
MX4/MY16 WIRELESS Button
10 BT_LED 9
+3V 11 (23) BT_LED 10 Reserved LED for debug use
+3V MX5/MY16 BLUETOOTH Button
12 11
A 13 12 A
14 13
14
ACS_88502-1401
BOT CONTACT *SCY_BL123-14R-TAND

PROJECT : ZU2
Quanta Computer Inc.
Size Document Number Rev
SWITCH,LED,KB,Finger,TP 1B
Date: Tuesday, March 27, 2007 Sheet 25 of 39
5 4 3 2 1
5 4 3 2 1

HOLE1 HOLE2 HOLE4 NS SIO PC87383


1 1 1 U8
2 2 2 PCI_CLK_SIO PD0
(11,23,24) LAD0 42 52 PPT_PD0 (29)
3 3 3 LAD0 PD0 PD1
46 50
4
5
4
5
4
5
SIO_14M (11,23,24)
(11,23,24)
LAD1
LAD2 51
LAD1
LAD2
NS PC87383 PD1
PD2 43 PD2 PPT_PD1
PPT_PD2
(29)
(29)
53 6 PD3
6 6 6 (11,23,24) LAD3 LAD3 PD3 PD4 PPT_PD3 (29)
7 7 7 PD4 39 PPT_PD4 (29)
33 37 PD5
8 8 8 (2) PCI_CLK_SIO LCLK PD5 PPT_PD5 (29)
R46 R56 34 PD6
9 9 9 PD6 PD7 PPT_PD6 (29)
*22_4 *22_4 (11) LDRQ#0 22 30 PPT_PD7 (29)
*H-TC276BC354D118P2-8 *H-TC276BC354D118P2-8 *H-TC276BC354D118P2-8 LDRQ/XOR_OUT PD7/GPIO23
38 28 ACK#
HOLE5 HOLE6 HOLE8 (11,23,24) LFRAME# LFRAME ACK/GPIO24 PPT_ACK# (29)
D AFD# D
1 1 1 (12,13,14,17,21,22,23,24,29) PLTRST# 35 LRESET AFD_DSTRB 57 PPT_AFD# (29)
C57 C85
2 2 2 BUSY
3 3 3 *10P_4 *10P_4 (13,18,19,24) SERIRQ 36 SERIRQ BUSY_WAIT 26 PPT_BUSY (29)
4 4 4 SIO_PD# ERROR#
29 54 PPT_ERR# (29)
5 5 5 LPCPD/GPIO21 ERR
6 6 6 INIT#
(13,24) CLKRUN# 27 56 PPT_INIT# (29)
7 7 7 CLKRUN/GPIO22 INIT
8 8 8 PE
9 9 9 (2) SIO_14M 58 CLKIN PE 25 PPT_PE (29)
*H-TC276BC354D118P2-8 *H-TC276BC354D118P2-8 *H-TC276BC354D118P2-8 15 24 SLCT
GPIO00 SLCT PPT_SLCT (29)
16
HOLE9 HOLE10 HOLE16 GPIO01 SLIN#
19 GPIO02 SLIN_ASTRB 55 PPT_SLIN# (29)
20
1 1 1 +3V GPIO03 STRB#
21 14 PPT_STB# (29)
2 2 2 GPIO04 STB_WRITE
40
3 3 3 GPIO05
4 4 4 7 GPIO06
R52 41 8 IRRX R76 10K_4
5 5 5 GPIO07 IRRX1 +3V
10K_4 23
6 6 6 GPIO20
10 IRMODE
7 7 7 IRRX2_IRSL0/GPIO17
1
8 8 8 BAS316 D9 SIO_PD# NC IRTXOUT
(13) LPC_PD# 2 9
9 9 9 NC IRTX
17 NC
*H-TC276BC354D118P2-8 *H-TC276BC354D118P2-8 *H-TC276BC354D118P2-8 18 NC MCTS1#
47 3
HOLE30 HOLE32 HOLE33 ZU1(12/12)Intel suggest:All LPC devices support LPCPD# protocol,stuff D7. NC CTS1/GPIO11
48 NC
49 59 MDCD1#
1 1 1 +3V NC DCD1/GPIO16
64
2 2 2 NC MDSR1# MCTS1#
3 3 3 DSR1/GPIO15 60 PR_CTS (29)
MDCD1#
4 4 4 45 VDD MDTR1# R75 *10K_4
OPEN : 164Eh~164Fh MDSR1# PR_DCD# (29)
5 5 5 + C66 C113 C58 C78
32
VDD DTR1_BOUT1/BADDR
4 LOW : 2Eh~2Fh MDTR1# PR_DSR# (29)
11 PR_DTR# (29)
C 6 6 6 10U_8 VDD MRI1 MRI1 C
7 7 7 RI1/GPIO10 5 PR_RI (29)
.1U_4 .1U_4 .1U_4 MRTS1#
8 8 8 MRTS1# R59 *10K_4
OPEN : normal pin operation MRXD1 PR_RTS# (29)
9 9 9
44
VSS RTS1/GPIO13/TRIS
62 LOW : float device pin MTXD1
PR_SIN (29)
31 VSS PR_SOUT (29)
*H-TC276BC354D118P2-8 *H-TC276BC354D118P2-8 *H-TC276BC354D118P2-8 12 61 MRXD1
VSS SIN1/GPIO14
HOLE34 HOLE13 C114 .1U_4 MTXD1 R61 *10K_4
OPEN : normal Device operation
13 VCORF SOUT1/GPIO12/TEST 63 LOW : XOR pin tree
1 1 PC87383
2 2 <Part Number>
3 3 IC(64P) PC87383-VS NOPB(TQFP)
4 4 +3V
5
6
5
6 FIR U37
6
T = 20mil
7 7 IRTXOUT VCC
8 8
EMI suggest :Add the VIN power shape bypass cap 3
TXD MODE
7
0.1uF x 10pcs IRRX 4 C630 C632 C631
9
*H-TC276BC354D118P2-8
9
*H-TC276BC354D118P2-8
EMI Cap Add the +3VPCU power traces bypass cap 0.1uF x 3pcs IRMODE 5
8
RXD
SD LED_C
2
1 .1U_4 10U_8 10U_8
GND LED_A
HOLE3 HOLE7 HOLE40 VIN VIN VIN VIN VIN VISHAY_TFDU6102_8P
+3V +3V
1 1 1

+3V_FIR
2 2 2 +3V
3 3 3
4 4 4 T = 20mil
C297 C31 C34 C115 C84 C429 C432
5 5 5 0.1U/50V_6 R500 5.6_1206
6 6 6 0.1U/50V_6 0.1U/50V_6 0.1U/50V_6 0.1U/50V_6 .1U_4 .1U_4
7 7 7 R495 5.6_1206
8 8 8 C633
9 9 9
*H-TC276BC354D118P2-8 *H-TC276BC354D118P2-8 H-TC276BC354D118P2-8 10U_8
ZU1(12/22) EMI suggest to add .1u *2 to prevent noise (+3V)
B B
HOLE12 VIN VIN VIN VIN VIN +3VPCU +3VPCU +3VPCU
1 PAD25 PAD24 PAD23 PAD20 PAD21 PAD22
2 HOLE14
3 *h-o217x394d217x394n C419 C102 C32 EMIPAD *EMIPAD EMIPAD *EMIPAD *EMIPAD *EMIPAD
4 C308 C309 C38 C41 C424
5 .1U_4 .1U_4 .1U_4
6 0.1U/50V_6 0.1U/50V_6 0.1U/50V_6 0.1U/50V_6 0.1U/50V_6

1
7
8
1

9
*H-TC276BC354D118P2-8
HOLE41 HOLE42 EMIPAD157X79 EMIPAD157X79
h-c236d236 h-c236d236

HOLE31 C2A:(12/22) EMI suggest add three clip to contact with CPU cooler's fins
*h-o110x94d110x94n ESDPad (PAD23,24,25)
1

PAD18 PAD5 PAD17 PAD14 PAD16 PAD3 PAD19 PAD13 PAD2 PAD9 PAD1 PAD4 PAD10 PAD15 PAD7 PAD12 PAD8 PAD11 PAD6

*EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD *EMIPAD MEPAD MEPAD MEPAD
1

HOLE37 HOLE39 HOLE21 HOLE38 HOLE36 HOLE35


1

1
h-c217d122p2 h-c217d122p2 h-c217d122p2 h-c217d122p2 h-c217d122p2 h-c217d122p2

ADOGND EMIPAD142X91
HOLE
1

A A
C2A:(12/22) Add theree PAD per ME request (fix wire)

HOLE24 HOLE25 HOLE19 HOLE17 HOLE20 HOLE18 HOLE26 HOLE23 HOLE22 HOLE28 HOLE29 HOLE27 HOLE15 HOLE11
*h-c217d59p2 *h-c217d59p2 *h-c236d236 *h-c236d236 *h-c236d236 *h-c236d236 *h-c236d236 *h-c236d236 *h-c236d236 *h-c236d236 *h-c236d236 *h-c236d236 h-c236d138p2 h-c236d138p2

PROJECT : ZU2
Quanta Computer Inc.
1

Size Document Number Rev


SUPER-IO/FIR/HOLE 1A
Date: Thursday, March 22, 2007 Sheet 26 of 39
5 4 3 2 1
5 4 3 2 1

CODEC(ALC268) LINE OUT Amplifier FRONT-L_2 R284 10K_6

C399 47P_4

+5V +5V_ADO U35

L60 TI321611U480_1206 R475


FRONT-L C605 FRONT-L_1 10K_6 4 - 5 HPL
INL OUTL HPL (28)
C558 C554 C612 C595 C599 C615 4.7U_8 + 9
D
.1U_4 10U_8 .1U_4 .1U_4 .1U_4 10U_8 NC1 D
+3V_AVDD 3 SVDD NC2 11
MIC1-VREFO-R 15 12
MIC1-VREFO-R (28) PVDD NC3
+3V_AVDD R467 *100K_4 14
NC4
6 SVSS SGND 2
ADOGND R464 0_4 +NVDD 10 13
NVDD PGND
(28) MUTE# 1 2 TPAD 17
D37 *MTW355
+3V R428 0_6 MIC1-VREFO-L 1 2 1412MUTE# 1
MIC1-VREFO-L (28) (28) SECNTL SHDNR#
D38 *MTW355 16 ADOGND
R486 SHDNL#
+ 7
R429 *0_6 +AZA_VDD C614 *10U_8 FRONT-R C613 FRONT-R_1 10K_6 OUTR
+1.5V 8 INR -
FRONT-L ZU1:solve S3 resume POP sound issue
C611 2.2U_8 change C619 from 10U to 2.2U 4.7U_8
FRONT-R G1412

SENSEB
1 2
ZU1: no stuff R525,D41, add bypass R577 to solve pop sound issue
+5V_ADO
C551 C562
10U_8 .1U_4 ADOGND L61 C400 47P_4

36

35

34

33

32

31

30

29

28

27

26

25
+3V 1 2 +3V_AVDD
U32 BLM11A601S_6 FRONT-R_2 R288 10K_6 HPR
HPR (28)

VREF
Sense B
FRONT-R

NC

MIC1-VREFO-R
FRONT-L

GPIO1

MIC2-VREFO

LINE1-VREFO

MIC1-VREFO-L

AVSS1

AVDD1
C567 C592 C607
*10U_8 10U_8 .1U_4

37 24 LINE1-R
MONO-OUT LINE1-R LINE1-R (28)
ADOGND ADOGND
38 23 LINE1-L C395 4.7U_6
+5V_ADO AVDD2 LINE1-L LINE1-L (28) EMI suggest to change from AGND to GND
SURR-L 39 22 MIC1-R +NVDD
(28) SURR-L HP-OUT-L MIC1-R MIC1-R (28)
C +3V +NVDD U33 C
R462 20K_6 40 21 MIC1-L
ADOGND JDREF MIC1-L MIC1-L (28)
1 VOUT C+ 6
(28) SURR-R SURR-R 41 20 C593 .1U_4 C597
HP-OUT-R CD-R 1412MUTE#
4.7U_6 2 VIN /SHDN 5
ADOGND 42 19 C584 .1U_4
AVSS2 CD-GND ADOGND 3 4
43 NC
Acer ALC268 CD-L 18 C580 .1U_4
ADOGND
C- GND

44 17 G5930
NC MIC2-R ADOGND
45 NC MIC2-L 16

DMIC-CLK R454 100_4DMIC-CLK_R 46 15


DMIC-CLK NC
EAPD 47 14 R280 0_4 AU_JD_MIC
DMIC-1/2/GPIO0

DMIC-3/4/GPIO3

(28) EAPD EAPD NC


SPDIF_OUT SPDIF_OUT_268 SDATA-OUT SENSEA R448 20K_6
(29) AU_SPDIF 48 SPDIFO Sense A 13 MIC1_JD (28) SYS / EZ MIC
R447 0_4

SDATA-IN

PCBEEP
RESET#
BIT-CLK R444 10K_6 SYS Line-in
DVDD1

DVDD2
DVSS1

DVSS2
LINEIN_JD (28,29)

SYNC
AU_JD_LINEIN (28,29) EZ Line-in
1

10

11

12
R435 5.1K_6 SYS/EZ Line-out
LINEOUT_JD#_OD (28,29)
SENSEB R279 *20K_6 +3V R236 10K_4
+3V AU_JD_MIC (29) EZ MIC (reserve)
U19
+AZA_VDD

5
EMI suggest: 1 PCMSPK
DMIC-12

B Add Additional two more bridge resistor PCMSPK (18) B


PCBEEP C378 1U_6 BEEP_1 R235 10K_4 BEEP 4
between ADDGND and GND,stuff R330 for Int-SPK issue 2 PCSPK
ACZ_SPKR (13)

3
SN74LVC1G86DCKR
R259 0_6 C388 R263
R501 *0_6 100P/50V_6 1K_4
R473 *0_6
C555 C559 Wake on Ring
10U_8 .1U_4
ADOGND +3VSUS
+3VSUS
Tied at one point only MDC
BIT_CLK268

ACZ_SDIN268

R432
under the codec or CN17 0_6
ACZ_RST#_AUDIO (11,28)
near the codec 1 GND RSV 2 +3VSUS_MDC
C565
ACZ_SDOUT_MDC 3 4
(11) ACZ_SDOUT_MDC AC_SDO RSV
5 6 .1U_4
ACZ_SYNC_AUDIO (11) GND 3.3V
ACZ_SYNC_MDC 7 8
(11) ACZ_SYNC_MDC AC_SYNC GND
R450 33_4 MDC_SDIN0
Reserve Audio power R431 33_4
ACZ_SDIN1 (11)
(11) ACZ_SDIN0
(11) ACZ_RST#_MDC
9
11
AC_SDI
AC_RST#
GND
AC_BCLK
10
12 BIT_CLK_MDC (11)
R430 33_4 ACS_88018-124L
BIT_CLK_AUDIO (11)
+5V +5V_ADO
C560 22P/50V_4
U22 C575 R449
R258 *0_6 4 3 *10P_4 *22_4
VEN VOUT ACZ_SDOUT_AUDIO (11)
5 C394
GND

VIN
ADJ

C576
A R262 *10U-25V_1206 *10P_4 A
*36K_4
2

*G961-18ADJTEU(SOT89-5)
DMIC-CLK
DMIC-CLK (16)
ADOGND DMIC-12
DMIC-12 (16)
R261
Vo=1.2*(R371+R372)/R371= 4.8V *12K_4 PROJECT : ZU2
+1.5V
+1.5V (4,8,12,13,23,34)

Size
Quanta Computer Inc.
Document Number Rev
ADOGND AUDIO(ALC268)/AMP/MDC 1A

Date: Thursday, March 22, 2007 Sheet 27 of 39


5 4 3 2 1
5 4 3 2 1

SYSTEM LINE OUT


Speaker Amplifier +5V_ADO

+3V_AVDD
C627 1U_6

C581 C624 ADOGND


10U_8 .1U_4
SECNTL
SECNTL (27)

ADOGND 0209:change new PN followZU1

15

14

23
U34

6
8
C626 2.2U_8 SURR-L-1 R489 9.1K_6 SURR-L-2 1 20 CN34

VDD3

SECNTL
LVDD
RVDD

NC
CT
D (27) SURR-L LIN1 VOL D
1 7
C587 2.2U_8 SURR-R-1 R461 9.1K_6 18 HPL R293 75_4 HPL_1 L35 BK1608LL121_6 HPL_SYS 2
(27) SURR-R RIN1 (27) HPL
SURR-R-2 6
+5V_ADO INSPKL+ R488 10K_6 2 13 ADOGND HPR R292 75_4 HPR_1 L34 BK1608LL121_6 HPR_SYS 3
LIN2 IN1/IN2 (27) HPR
C625 330P_4 17 4
RIN2 (27,29) LINEOUT_JD#_OD
INSPKR+ R460 10K_6 19 INSPKR+ 8
C582 330P_4 ROUT+ INSPKR- R294 R295 C408 C407
12 5
ROUT- INSPKL+ *1K_4 *1K_4 470P/50V_4 470P/50V_4 FOX_JA6033L-L3T4-7F
24
R289 4.7U_6 C579 LOUT+ INSPKL-
ADOGND 16 7
100K_4 RBYPASS LOUT-
3
4.7U_6 C628 LBYPASS

THRMPAD
1441 MUTE ADOGND

GND/HS
GND/HS
GND/HS
GND/HS
1441 MUTE R487 0_4 5
SHDN
3

Q21 R469 0_4 11


SE/BTL +5V_ADO ADOGND
MUTE# 2 G1441

25
22
21
10
9
D28
ADOGND 1
2N7002 LINEOUT_JD#_OD
3
1

2
ADOGND
+3V_AVDD ADOGND *DA204U ADOGND

1 2 R274
(24) AMP_MUTE#
D22 MTW355 10K_4

1 2 MUTE#
(27) EAPD MUTE# (27)
D25 MTW355

(11,27) ACZ_RST#_AUDIO 1 2
D23 *MTW355

C C

SPEAKER
CN19 ACS_85204-0400L
INSPKL- L24 BK1608LL121_6 INSPKL-N
INSPKL+ L25 BK1608LL121_6 INSPKL+N 1 R492 *0_6
INSPKR- L26 BK1608LL121_6 INSPKR-N 25
36
R452 *0_6 Docking LINE OUT/SPDIF
INSPKR+ L27 BK1608LL121_6 INSPKR+N C391 .1U_4
4 C383 1000P/50V_4
C604 C603 C602 C601 C411 .1U_4
C406 .1U_4
47P/50V_4 47P/50V_4 47P/50V_4 47P/50V_4 C401 .1U_4 HPL_SYS R290 0_4 AU_LINEOUT_L
AU_LINEOUT_L (29)
C384 .1U_4 HPR_SYS R291 0_4 AU_LINEOUT_R
AU_LINEOUT_R (29)

ADOGND
ADOGND

SYSTEM LINE IN SYSTEM MIC 0209:change new PN followZU1

R484 2.2K_4 CN33


(27) MIC1-VREFO-L
1 7
C622 2.2U_6 MIC1_L1 L33 BK1608LL121_6 MIC1_L 2
0209:change new PN followZU1 (27) MIC1-L
6
R485 2.2K_4 MIC1_R1 L30 BK1608LL121_6 MIC1_R 3
(27) MIC1-VREFO-R
CN32 (27) MIC1_JD 4
1 7 C623 2.2U_6 8
(27) MIC1-R
C392 4.7U_8 LINE1-L_1 L28 BK1608LL121_6 LINEINL_SYS 2 5
(27) LINE1-L
6 FOX_JA6033L-P3T4-7F
C396 4.7U_8 LINE1-R_1 L29 BK1608LL121_6 LINEINR_SYS 3
B (27) LINE1-R B
4 C402 C405
(27,29) LINEIN_JD
8 470P/50V_4 470P/50V_4
C410 C409 5
MIC1_L L36 BK1608LL121_6 AU_MIC_IN_L
AU_MIC_IN_L (29)
470P/50V_4 470P/50V_4
FOX_JA6033L-U3T4-7F MIC1_R L37 BK1608LL121_6 AU_MIC_IN_R ADOGND
AU_MIC_IN_R (29)

ADOGND FAE: Docking MIC share from System MIC

+5V_ADO
D29
+5V_ADO
1
D30
LINEIN_JD
3
1
2 MIC1_JD
*DA204U 3
ADOGND
2
*DA204U
ADOGND

Docking LINE IN

LINEINL_SYS L31 BK1608LL121_6 AU_LINEIN_L


AU_LINEIN_L (29)
A LINEINR_SYS L32 BK1608LL121_6 AU_LINEIN_R A
AU_LINEIN_R (29)

C403 C404

*.1U_4 *.1U_4

ADOGND ADOGND PROJECT : ZU2

Size
Quanta Computer Inc.
Document Number Rev
Speaker AMP / Audio JACK 1A

Date: Thursday, March 22, 2007 Sheet 28 of 39


5 4 3 2 1
A B C D E

D5 3/16 Modify D5 Footprint from SBM1040-3P to SBM1040-3P-ZU1


R513 0_4 +3VSUS VA2 2
3 VA1 VA1
R514 *0_4 +3V 1 VA
Q32
RHU002N06 1/31:Acer DVR1012_Design Requirement Checklist:

2
PDS1040S The system side should have a diode
to block the AC adaptor power coming from ezDock. C22 C412 C33 C418
D10
3 1 EZ_DAT_SMB
(2,13) PDAT_SMB
DCIN 1 2 VA1 .1U/50V_6 .1U/50V_6 .1U/50V_6 .1U/50V_6
CN25

SW 1010C 155 P1 G1 157


156 P2 G2 158
4 R515 0_4 EMI suggest add 10u*1pc, 0.1u*5pcs 4
+3VSUS
1 78 DET_GND#
R516 *0_4 A1 B1
+3V (21) 1394TPAP0 2 A2 B2 79
Q33 3 80 VA2
(21) 1394TPAN0 A3 B3 1394TPAP1 (21)
RHU002N06 4 81
A4 B4 1394TPAN1 (21)
2
(21) 1394TPBP0 5 A5 B5 82
(21) 1394TPBN0 6 A6 B6 83 1394TPBP1 (21)
3 1 EZ_CLK_SMB 7 84 C43 C42
(2,13) PCLK_SMB A7 B7 1394TPBN1 (21)
(12) PCIE_TXP4 8 A8 B8 85
9 86 EZ_DAT_SMB .1U/50V_6 .1U/50V_6
(12) PCIE_TXN4 A9 B9
10 87 EZ_CLK_SMB
R519 0_4 PCIE_RXP4_R A10 B10 PCIE_RST# R269 0_6
(12) PCIE_RXP4 11 A11 B11 88 PLTRST# (12,13,14,17,21,22,23,24,26)
+2.5V R518 0_4 PCIE_RXN4_R 12 89
(12) PCIE_RXN4 A12 B12 PCIE_CLKREQ# (2)
13 A13 B13 90
(2) CLK_PCIE_DOCK 14 A14 B14 91 SYS_CHARGE (24)
(2) CLK_PCIE_DOCK# 15 A15 B15 92 HIGH_LOAD (24)
R312 16 93
2.2K_4 A16 B16
17 A17 B17 94 DVI_D2+ (17)
DVI_DDC_DT 18 95 VA1
A18 B18 DVI_D2- (17)
DVI_DDC_CK 19 96
A19 B19
(17) DVI_DET 20 A20 B20 97 DVI_CLK+ (17)
DVI_DDC_DT 21 98
(17) DOCK_DDC_DT A21 B21 DVI_CLK- (17)
(17) DVI_D0+ 22 A22 B22 99

1
R310 23 100
+2.5V (17) DVI_D0- A23 B23 LAN_ACTLED# (14)
100K_4 24 101 +
A24 B24 LAN_LILED# (14)
25 102 C428 C75
(17) DVI_D1+ A25 B25
(17) DVI_D1- 26 103 TX2P_PR (14)

2
ZU1: Add PL 100K for DVI_DET A26 B26 .1U/50V_6
27 A27 B27 104 TX2N_PR (14)
R311 28 105 10U/25V_1206
(14) TX0P_PR A28 B28
3 2.2K_4 29 106 3
(14) TX0N_PR A29 B29 TX3P_PR (14)
30 A30 B30 107 TX3N_PR (14)
(14) TX1P_PR 31 A31 B31 108 POWER DECOUPLING
DVI_DDC_CK 32 109
(17) DOCK_DDC_CK (14) TX1N_PR A32 B32
33 A33 B33 110 VAUX_25
A1A:(11/1) Change LAN pin define 34 111
A34 B34 PR_MS_DATA (24)
35 A35 B35 112 PR_MS_CLK (24)
(1)Remove Level-shift circuit (already in docking side) (24) PR_KB_DATA 36 A36 B36 113
(2)change Power from +3V to +2.5V (24) PR_KB_CLK 37 A37 B37 114 PR_RTS# (26)
(3)stuff 2.2k (R374,R375) (26) PR_SIN 38 A38 B38 115 PR_CTS (26)
(26) PR_SOUT 39 A39 B39 116 PR_DTR# (26)
(26) PR_DSR# 40 A40 B40 117 PR_RI (26)
(26) PPT_PE 41 A41 B41 118 PR_DCD# (26)
(26) PPT_BUSY 42 A42 B42 119 PPT_INIT# (26)
+3V_S5 43 120
(26) PPT_ACK# A43 B43 PPT_SLIN# (26)
(26) PPT_ERR# 44 A44 B44 121 PPT_PD0 (26)
(26) PPT_AFD# 45 A45 B45 122 PPT_PD1 (26)
(26) PPT_STB# 46 A46 B46 123 PPT_PD2 (26)
Q8 47 124
A47 B47 PPT_PD3 (26)
RHU002N06 (15) DOCK_R 48 125
A48 B48 PPT_PD4 (26)
2

49 A49 B49 126 PPT_PD5 (26)


(15) DOCK_G 50 A50 B50 127 PPT_PD6 (26)
(13,14) DOCKIN# 1 3 DOCKIN#_1 R37 0_4 DOCKIN#_R 51 A51 B51 128 PPT_PD7 (26)
(15) DOCK_B 52 A52 B52 129 PPT_SLCT (26)
53 130 CN4
DET_GND# A53 B53 RINGL
(15) DOCK_HSYNC 54 A54 B54 131 DOCK_TV_COMP (16) 4
add level shift circuit, already PU 5VA_PR in docking side. 55 132 TIPL
(15) DOCK_VSYNC A55 B55 3 6
add R566 0ohm for debug use 56 133 C36 470p/3KV_1808 RINGL
(15) DOCK_DDDA A56 B56 DOCK_TV_C/R (16) 2
57 134 C50 470p/3KV_1808 TIPL
2 (15) DOCK_DDCK A57 B57 1 5 2
+5V (15,24) CRT_SENSE# 58 135
A58 B58 DOCK_TV_Y/G (16)
59 A59 B59 136
(28) AU_LINEIN_L 60 A60 B60 137 AU_SPDIF (27)
(28) AU_LINEIN_R 61 A61 B61 138 LINEOUT_JD#_OD (27,28)
+3V_S5 R38 62 139
A62 B62 AU_JD_LINEIN (27,28)
(28) AU_LINEOUT_L 63 A63 B63 140
(28) AU_LINEOUT_R 64 A64 B64 141 USBP0+ (12)
10K_4 65 142
AUDIO_AGND A65 B65 USBP0- (12)
R40 (28) AU_MIC_IN_L 66 143
PR_INSERT_5V (15,16) A66 B66
(28) AU_MIC_IN_R 67 144 PW RBTN#
A67 B67
3

(27) AU_JD_MIC 68 A68 B68 145


100K_4 69 146
DOCKIN#_R A69 B69
70 A70 B70 147 +5V
DOCKIN# 2
+3VPCU
C49 Q23
2N7002 76 153
.1U_4 TIPL A76 B76 RINGL
77 154
1

A77 B77

5
1
ZU1:Add R and C between 159 163 4 NBSW ON# (24,25)
Refer to Acer DVR1019 G3 G7 PW RBTN# C423
AUDIO_AGND and GND 160 G4 G8 164 2
+3V_S5 161 165 U23

3
G5 G9 *TC7SH08FU .1U_4
162 G6 G10 166
R39 R41 0_6
R42 0_6
C51 *.1U_4 FOX_QL0177L-D26C02-8F
10K_4 C52 *1000P-50V_4 refer to Acer Design Guide: R309 0_4
PR_STS (24) this signal is asserted to power on the system.
1 1
3

A buffer used for PWRBTN# on the system side


AUDIO_AGND may be necessary to prevent the signal interfered
by the contact noise.
2 C430
EMI suggest to add .1u to prevent noise
Q24 .1U_4 PROJECT : ZU2
2N7002
Quanta Computer Inc.
1

Size Document Number Rev


Docking(ezDockII/II+) 1B

Date: Friday, March 23, 2007 Sheet 29 of 39


A B C D E
5 4 3 2 1

MAIND
MAIND (34)

SUSD
SUSD (34)

(3) SYS_SHDN# 1 2
PL7
HI0805R800R-00_8 ISL6236_3V
PR122
0_4 PL12
D VIN VIN D
PL9
HI0805R800R-00_8 VL HI0805R800R-00_8

VL

2
PC69
PR97 4.7U/X7R-10V_8

1
390K_4

1
3V_DL
PR123 PR103 PR107
39K_4 0_4 PC74 0_4 PC94 PC86
PC76 PC78 PC84 PC73 1U/10V_6 0.1U/X7R-50V_6 10U/X6S-25V_1206

1
0.1U/X7R-50V_6 2200P/X7R-50V_4 PC71 10U/X6S-25V_1206 0.1U/X7R-50V_6 PC87 PC83

2
2

D1

D1
S2

G2
10U/X6S-25V_1206 PC75 2200P/X7R-50V_4 10U/X6S-25V_1206
.01U/X7R-16V_4 PC72
0.1U/X7R-50V_6

1
3V5V_EN PQ24
2 1 FDS6900AS

2
8
7
6
5

S1/D2
2
PR95 PR104 3V_DH OCP : 6.25A

G1
*0_4 PR109

8
7
6
5
4
3
2
1
4 5V_DH 150K_4 *0_4 +3VPCU

8
PQ18 3V_DH PL14

LDOREFIN
LDO
VIN
RTC
ONLDO
VCC
TON
REF
2.5uH_7.5A

1
OCP: 10A FDS8884 +3VPCU
PR113 3V_LX
+5VPCU +5VPCU
9 32 287K_4
PL13 BYP REFIN2
10 31 1 2

1
2
3
1.5uH_10A OUT1 PU6 ILIM2
C 11 FB1 OUT2 30 C
+5VPCU 5V_LX 1 2 12 29
PR117 210K_4 DDPWRGD_R 13 ILIM1 ISL6236 SKIP# DDPWRGD_R PC103 PC141
PGOOD1 PGOOD2 28
2

8
7
6
5
PR115 3V5V_EN 14 27 3V5V_EN PR119 +
*0_4 EN1 EN2
15 DH1 DH2 26 0_6
16 25 0.1U/X7R-50V_6 330U/6.3V_6X5.7
+ 5V_DL LX1 LX2
4 37 PAD
PC92 36

SECFB
1

PAD

PGND
PC95 PC142

BST1

BST2
0.1U/X7R-50V_6

GND
VDD
PAD
PAD
PAD

DL1

DL2
10U/X6S-25V_1206 PC97 PC90
1

330U/6.3V_6X5.7 0.1U/X7R-50V_6 0.1U/X7R-50V_6 PR116


PR114 PQ17 PR124 *0_6

35
34
33

17
18
19
20
21
22
23
24
0_4 PR125 1_6
1
2
3

FDS6690AS 1_6 1 2
1 2 3V_DL
2

PD6 VL
PC82 PR126 0_6 DDPWRGD_R
2 HWPG_3/5VPCU (24)
0.1U/X7R-50V_6
PC99 PR120
3 1U/X5R-16V_6 0_6

3
1
OCP:10A CHN217 PC81
PD8 0.1U/X7R-50V_6 OCP:6.25A
L(ripple current) PC77
0.1U/X7R-50V_6 2
=(19-5)*5/(1.5u*0.4M*19) L(ripple current)

2
~6A 3 PD7 =(19-3.3)*3.3/(2.5u*0.5M*19)
B B
1
BAT54-7-F ~2.18A
Iocp=10-(6/2)=7A
CHN217 Iocp=6.25-(2.18/2)=5.16A
Vth=9A*15mOhm=105mV PR118 +3VPCU
R(Ilim)=(105mV*10)/5uA +15V_ALWP 1 2 Vth=5.16A*28mOhm=145mV
15V

1
~210K R(Ilim)=(145mV*10)/5uA
PR129 PR127
22_8 PC80 200K_4 39K_4 ~294K
0.1U/X7R-50V_6 PC96

1
2
5
6
VIN 15V +5VPCU 0.1U/X7R-50V_6

SUSD 3 PQ23
+5VPCU +3VPCU +3VPCU FDC653N_NL

PR121 PR128 PC108

4
5
6
7
8

1M_6 1M_6
0.1U/X7R-50V_6 +3VSUS
PC91 PC105 PC102
S5D 4
1
2
5
6

1
2
5
6

1
2
5
6
0.1U/X7R-50V_6 0.1U/X7R-50V_6 0.1U/X7R-50V_6 PC100
3

PQ16 0.1U/X7R-50V_6
MAIND 3 PQ22 MAIND 3 PQ29 S5D 3 PQ27
2 FDC653N_NL FDC653N_NL FDC653N_NL
(24) S5_ON
PR112 2 PQ26
1M_6
3
2
1

4
DTC144EU PQ19 FDS8884
1

2N7002E
+5V +3V +3V_S5
+5V_S5
1

A A
PC93 PC107 PC104
PC101 0.1U/X7R-50V_6 0.1U/X7R-50V_6 0.1U/X7R-50V_6
0.1U/X7R-50V_6

PROJECT : ZU1
C2A:(12/10) change S5_ON control circuit Quanta Computer Inc.
B1C:(11/29)Change PQ26 from FDS6690AS (BAM66900022) to FDS8884 (BAM88840006)
Size Document Number Rev
SYSTEM 5V/3V (ISL6236) 1D

Date: Friday, March 23, 2007 Sheet 30 of 38


5 4 3 2 1
5 4 3 2 1

PL6
HI0805R800R-00_8

VIN_6262
PL5
HI0805R800R-00_8
+1.05V
VIN

1
PR139 PR140 PR141 PR142 PR143 PR144 PR145 +
*0_6 *0_6 *0_6 *0_6 *0_6 *0_6 *0_6

2
DELAY_VR_PWRGOOD (3,6,13)
Merom: VCC_CORE/ 44A

5
PC46 PC131 PC45
H_VID6 H_VID5 H_VID4 H_VID3 H_VID2 H_VID1 H_VID0 10U/X6S-25V_1206 PC40 470U/25V 0.1U/X7R-50V_6
D
6262_UG1 4 10U/X6S-25V_1206 Yonah: VCC_CORE/ 36A D
PR24 4.99K_6 VCC_CORE

1
2
3
2 1 PGD_IN VIN_6262 +3V PQ37
PWR_MON
AOL1414
PL19 0.36uH
1

for ISL6262A 6262_PH1 1 2

1
PC15 PR61 A1A:(10/27) change from 10k to 1.91k

1
0.1U/X7R-50V_6 10_6 PR45 PC129
2

4
5
10_4 PR44 2200P/X7R-50V_4 + +
+5V_S5
A1A:(10/2) change from +5VSUS to +5V_S5 1.91K_4 A1A:(10/20) EMI suggest to add it A1A:(10/2) Remove PD10 for layout space issue

2
6262_LG1 4

1
(3) PSI# PSI#

1
PR60 PC37 PQ36 PC50 PC47

1
2
3
10_6 0.1U/X7R-50V_6 PC30 0.1U/X7R-50V_6 AOL1412 330u_2V_7343 330u_2V_7343

2
PR76 PR75

22

20

48
2

1
PR52 0_8 PU2
PC38 0_6 0_6

3V3
VCC

VIN

PGOOD
1U/X7R-25V_8
1

PR70 3.65K_6
ISL6262A VSUM
21 GND UGATE1 35
PR69 2.2_6 PR74 10K_6
Close to Phase 1 Inductor 49 GND_T BOOT1 36 1 2

1
Throttling temp. PR72 1_6
+3VSUS PC43
105 degree C 0.22U/X5R-25V_8

2
34 PR71 *0_6 VIN_6262
PSI# PR31 0_4 PSI#_1 PHASE1 ISEN2
2
PSI#
32
A1A:(10/20) no stuff PR75 PR34 VR_ON PR32 *0_4 PGD_IN LGATE1
3
already have PU R in CPU side PGD_IN
C 33 C
PR29 147K_6 PGND1
4
RBIAS

1
*10K_4 24 ISEN1
ISEN1
H_PROCHOT# 5
VR_TT#

2
PR147 PR22 6 PC41
470K_4 NTC 4.02K_4 NTC
+5V_S5 0.22U/X5R-25V_6

2
ED8-B -0623-add 2 1 PC20 7 SOFT PC42 A1A:(10/2) change from +5VSUS to +5V_S5
PC23 1 2 15N/X7R-50V_6 PC134 PC135

5
.01U/X7R-16V_4 31 1 2 10U/X6S-25V_1206 PC133 0.1U/X7R-50V_6
H_VID0 PVCC 10U/X6S-25V_1206
Panasonic 37
VID0
(4) H_VID0 4.7U/X6S-25V_8
ERT-J0EV474J H_VID1 38 27 6262_UG2 4
(4) H_VID1 VID1 UGATE2 PR73 2.2_6
H_VID2 39 26 1 2
(4) H_VID2

1
2
3
VID2 BOOT2 PQ39

1
PSI#_1 H_VID3 40 AOL1414
(4) H_VID3 VID3 PC44
H_VID4 41 0.22U/X5R-25V_8 A1A:(10/20) EMI suggest to add it PL20 0.36uH
(4) H_VID4
2
VID4 6262_PH2
28 1 2
H_VID5 PHASE2
(4) H_VID5 42
VID5

5
PR35 30 6262_LG2 PC130

4
H_VID6 LGATE2 2200P/X7R-50V_4
*0_6 (4) H_VID6 43
VID6

1
29
PR59 0_4 VR_ON PGND2 A1A:(10/2) Remove PD11 for layout space issue
44 4 + +
(24) VRON VR_ON
23 ISEN2
PR148 499_4 DPRSLPVR ISEN2 PQ38
(6,13) PM_DPRSLPVR 45

1
2
3

2
DPRSLPVR

1
DPRSLPVR AOL1412
PR55 0_4 46 PC39
(3,11) ICH_DPRSTP# DPRSTP# 0.22U/X5R-25V_6 PC48 PC49

2
PR53 0_4 CLKEN# 47 PR77 PR78 330u_2V_7343 330u_2V_7343
(2,13) VR_PWRGD_CK410# CLK_EN# PC22
25 2 1 0_6 0_6
PR28 1K_4 NC
1000P/X7R-50V_4
PR25 PC17 8 PR33 13.3K_4
OCSET
B 1 2 13 B
VDIFF
255_4 1000P/X7R-50V_6 19 VSUM
VSUM
PR36 ED8-B -0623-33nf to 68nf
12 PR58
FB2
1

PR57
1K_4 PC33 11K_4 2.7K_4
11
2

FB
1

68N/X7R-25V_6 PR64 3.65K_6


PC18 PC36 VSUM
PR38 97.6K_4 2 1
2

0.22U/X7R-10V_6 PR146 PR63 10K_6


470P/X7R-50V_4 10 Panasonic
PC25 COMP
2 1
ERT-J1VR103J PR66 1_6
18
220P/X7R-50V_4 PR27 6.81K_4 VO
10K _6 NTC
DROOP

9
VW
VSEN

ED8-B -0623-390p to330p ISEN1


RTN

DFB

PC24
1

1 2 PR49 PR65 *0_6


PC32 Close to Phase 1 Inductor
15

14

16

17

1000P/X7R-50V_6 1K_4 0.22U/X5R-25V_6


2

PR47
PC26 2 1 3.48K_4
ED8-B -0623-3.9k to 3.48k
.01U/X7R-16V_4
PC28
180P/NPO-50V_4
2 1 ISL6262_VO
2

PC29 PC21
.01U/X7R-16V_4 .01U/X7R-16V_4
1

Parallel
A PR39 0_4 A
VCCSENSE (4)
PR41 0_4
VSSSENSE (4)

Size Document Number Rev


Custom CPU Core ( ISL6262A) 1D

Date: Thursday, March 22, 2007 Sheet 31 of 38


5 4 3 2 1
1 2 3 4 5

A1A:(10/2) change from +5VSUS to +5V_S5 VIN-1.5V


PL16
VIN
+5V_S5 HI0805R800R-00_8
PR137

10_6
B1C:(11/30) T211 Power sequence issue PC125 PD10

5
6
7
8
(1)change PR134 from 0 ohm to 47k ohm. PR134 RB500V PC126
(2)stuff C448 0.1uF *.1U_6
1M_6 4.7U/X5R-10V_8

2
A 4 PC109 PC114 PC113 A
0.1U/X7R-50V_6 10U/X6S-25V_1206 10U/X6S-25V_1206
A1A:(10/18) Reserve .1UF PU7 PC123
SC411MLTRT .1U/X7R-25V_8 PQ34
PR135 47K_6 15 13 FDS8884
(24,33,34) MAINON EN/PSV BST
3/16 Remove
+3V C425 DH-1.5V PL18
16 12
6A

3
2
1
VIN DH 2.5uH_7.5A
.1U_6 1 11
VOUT LX +1.05V
2 10 PR10 9.1K/F_6
VCCA ILIM

5
6
7
8
PR138

1
*10K_6 3 9
FBK VDDP +
4 8 DL-1.5V 4 PR11
(24) HW PG_1.05V PGOOD DL PC9

2
6 7 11K_6 33P/NPO-50V_6
VSSA PGND
PQ35 1.05V_FB
5 NC TPAD 17 Rds*OCP=RILIM*10uA FDS6690AS
14

GND

GND

GND

GND

3
2
1
NC
1

PC124 PC122 PC119 1 PC128 PC127 PR12


0.1U/X7R-50V_6 560U/2.5V_6X5.7 10U/Y5U-10V_8 10K_6
2

18

19

20

21
1000P/X7R-50V_6 .01U/X7R-50V_6 VOUT=(1+R2/R3)*0.5

B B

B1C:(11/29) Change PR8 from 20K(CS32003F933) to 6.65K ohm (CS26653F911)

C C

D D

PROJECT : ZU1
Quanta Computer Inc.
Size Document Number Rev
VTT 1.05V (SC411) 1D

Date: Thursday, March 22, 2007 Sheet 32 of 38


1 2 3 4 5
5 4 3 2 1

PL11
VIN
HI0805R800R-00_8
PL10
+1.8VSUS

5
6
7
8
PR100 HI0805R800R-00_8 PC79
PC52 0.1U/X7R-50V_6
*2.2_6 PC88
10U/X6S-25V_1206 4 10U/X6S-25V_1206
A1A(10/5):change net name from PU3 PQ15 3/16 Remove
+SMDDR_VTERM to SMDDR_VTERM TPS51116 C2A:(11/22) EMI suggest to add 2.2ohm BST resister in 1.8V power PC85 PC70
3/16 Remove 1 19 FDS8884 PC67 PC66 2200P/X7R-50V_6 PC89 2200P/X7R-50V_6
VLDOIN DRVH PR81 2.2_6 *2200P/50V_6 0.1U/X7R-50V_6 10U/X6S-25V_1206
2 20 1 2 PC54 0.1U/X7R-50V_6
SMDDR_VTERM VTT VBST PL8

3
2
1
PC51 PC53 4 18 +1.8VSUS
VTTSNS LL
D D

5
6
7
8

5
6
7
8
10U/X6S-25V_1206 5 17 1R5UH-3.8mR
10U/X6S-25V_1206 GND DRVL
+
MAX Current 10A
3 VTTGND PGND 16
4 4
DIS_MODE 6 11 S3_1.8V PR92 0_6
MODE S3 MAINON (24,32,34)
PR88
7 12 S5_1.8V PR93 0_6
SMDDR_VREF VTTREF S5 SUSON (24,34)
0_6 5VIN 8 14 5VIN C287 C288
PC57 COMP V5IN PC98 PC132 PC64

3
2
1

3
2
1
0.033U/50V_6 9 13 *.1U_6 *.1U_6 PQ20 PQ21 2200P/50V_6 560U/2.5V_6X5.7 10U/Y5V-10V_8
A1A(10/5):change net name from PR89 VDDSNS PGOOD A1A:(10/18) Reserve .1UF FDS6690AS *FDS6690AS

GND
GND
GND
GND
GND
GND
GND
+SMDDR_VREF to SMDDR_VREF 5VIN 10 15
VDDQSET CS
0_6 PR86 PR90

21
22
23
24
25
26
27
FOR DDR II PC56 13.7K/F_6 +3VPCU +3VPCU
*1000P/50V_6 100K/F_6

PR83 *0_6 DIS_MODE PR87 C2A:(12/28) EMI request: DEL PR120 2.2ohm(CS-2203F911), stuff PC98
5VIN
+5VPCU HWPG_1.8V (24)

1
0_6 PC58

+1.8VSUS PR85 0_6 4.7U/X5R-6.3V_6

2
B1C:(11/29) Change PR86 from 12K (CS31203F911) to 8.25K (CS28253F938)

B1C:(12/11) Change PR86 from 8.25K (CS28253F938) to 14K (CS31403F919)

C C

A1A(10/5):Remove +1.8V circuit

B B

A A

PROJECT : ZU1
Quanta Computer Inc.
Size Document Number Rev
DDR 1.8V(TPS51116) 1D

Date: Thursday, March 22, 2007 Sheet 33 of 38


5 4 3 2 1
5 4 3 2 1

PQ40
AOL1414
+1.8VSUS
3
5 2
1
+ PC60 PC59
PC136
560U/2.5V_6X5.7 0.1U/X7R-50V_6 10U/X5R-6.3V_6

4
9338DRV

D D
PR149
+1.5V
0_6
+3V
+1.5V (4,8,12,13,23,27)
PR99 100K_4

2
REV:3A MODIFY PC137
(24) HWPG_CPUIO 3 PGD DRV 6
.01U/X7R-16V_4 PR108

1
Rg 20K_6
MAINON PR102 0_4 9338EN 4
(24,32,33) MAINON EN +
5
ADJ

GND
+5VPCU 1 Vout1 = (1+Rg/Rh)*0.5
VCC PR105
C304 PC68 10K_6

2
A1A:(10/18) Reserve .1UF PU5 Rh
*.1U_6 0.1U/X7R-50V_6 G9338 ADJ

PC139 PC140
0.1U/X7R-50V_6 PC138 560U/2.5V_6X5.7
10U/X5R-6.3V_6 +5V
3/16 Remove
PC61 PU4
0.1U/X7R-50V_6 G966
4 1
PR94 VPP PGOOD
MAINON 2 6
VEN VO +2.5V

+3VSUS 10K_6 3
VIN 0.5A
8
GND

ADJ
C C
9 GND NC 5
PR82
PC62 C292 PC55

7
21.5K_6 10U/Y5U-10V_8
10U/X5R-6.3V_6 *.1U_6
0.8V
PC63
0.1U/X7R-50V_6 A1A:(10/18) Reserve .1UF
PR84
VIN SMDDR_VREF +1.8VSUS +3VSUS 15V 10K_6

PR91 PR80 PR96


Vout =0.8(1+R1/R2)
PR111
1M_6
22_8 22_8 22_8 PR98
1M_6
=2.5V
SUS_ON_G SUSD
SUSD (30)
3

3
3

2 2 2 2 2
(24,33) SUSON PC65
PR110 PQ10 PQ9 PQ12 PQ11 *2200P/X7R-50V_6
PQ14 1M_6 2N7002E 2N7002E 2N7002E 2N7002E
1

DTC144EU
1

B B

VIN +1.05V +2.5V +3V +5V SMDDR_VTERM +1.5V 15V

PR106 PR23 PR21 PR131 PR130 PR79 PR150


22_8 22_8 22_8 22_8 22_8 22_8 PR132
1M_6 1M_6

RUN_ON_G MAIND
A MAIND (30) A
3

3
3

2 2 2 2 2 2 2 2 PC106
(24,32,33) MAINON *2200P/X7R-50V_6
PR101 PQ5 PQ4 PQ28 PQ25 PQ8 PQ41 PQ30
PQ13 1M_6 2N7002E 2N7002E 2N7002E 2N7002E 2N7002E 2N7002E 2N7002E PROJECT : ZU1
1

DTC144EU
Quanta Computer Inc.
1

Size Document Number Rev


Discharge (1.5V/2.5V) 1D

Date: Thursday, March 22, 2007 Sheet 34 of 38


5 4 3 2 1
5 4 3 2 1
3/16 Modify PD9 Footprint from SBM1040-3P to SBM1040-3P-ZU1
0.02_3720
VA VA2 PR133
PJ1 HI0805R800R-00_8 PQ33 VIN PQ2
SIT_2DC-G026-I06 PL2 2 SUD45P03-15 SUD45P03-15
1 1 2 3 1 2 3 4 3 4
2 1
3 PF1 BUS-7A-1206
PL1 PD9 PC3 PR7

1
1P

2P
PDS1040S 0.1U/X7R-50V_6 PR1 PC110
33K_6
3/16 Add fuse 220K_6 0.1U/X7R-50V_6
5
4

2
HI0805R800R-00_8
PD4
PC2
D 0.1U/X7R-50V_6 SW1010C D
PC1 1 6 PR6

1
0.1U/X7R-50V_6 PC117 PC118 10K_6
0.1U/X7R-50V_6 0.1U/X7R-50V_6 PR2 2 5 PR5 0_6
A1A:(9/27)change CONN (Follow ZH2) D/C# (24)
220K_6
PD5 3 4

3
PR62
ACIN_1 2 1 PQ1
(24) ACIN DCIN
IMD2AT108
10K_6 2
ZD12V CSIN
PR68 PQ3
PR67 2N7002E
6.8K_6 10K_6 CSIP

1
PC35 2.2U/X5R-10V_8 VIN
1 2 PC111 10U/X6S-25V_1206
PR40 PR46 ISL6251_VDD
2.2_6 20_6
PR15 PL15
4.7_6 PC112 0.1U/X7R-50V_6 HI0805R800R-00_8
PC27
0.1U/X7R-50V_6 PC10 4.7U/X5R-10V_8
ISL6251_VDDP 1 2 VA3
CSIN_1

5
6
7
8
PD3

19

20

15
C C

1
RB500V
4

CSIP

VDDP
CSIN

VDD
PR48 20_6 PQ31
CSOP CSOP_1 21 PR20 2.7_6 PC19 0.1U/X7R-50V_6
CSOP 6251B_2 6251B_1 FDS8884
BOOT 16
PC31
PR136
PR51 20_6 47n/X7R-25V_6 17 ISL6251_UGATE PL17 0.03_3720

3
2
1
CSON UGATE 4R7UH(PCMC063T-4R7MN)
22 CSON 6251LR
1 2 BAT-V
18 ISL6251_PHASE
PHASE

5
6
7
8
DRC 18m ohm

1P

2P
14 ISL6251_LGATE + PC116
PC34 LGATE 100U/25V_6X7.7
23 ACPRN 4
0.1U/X7R-50V_6
PGND 13
PQ32
DCIN 24 12 VREF FDS6690AS
DCIN GND PC4 PC115
CSOP 10U/X6S-25V_1206 .01U/X7R-50V_6

3
2
1
11 PR18 PR13 PC5
PR54 6251ACSET VADJ 71.5K_6 *514K_6 CSON 10U/X6S-25V_1206
2 ACSET
*130K_6
ACLIM 10
PC6
3/16 Add fuse 3 EN
VADJ Float = 4.2V / CELL

VCOMP
ICOMP
CELLS

CHLIM
VRFE
PR56 ACLIM
B MTEMP (24) B

ICM
*10K_6
CN23 HI0805R800R-00_8
100P/NPO-50V_4 PL4 PR14

26251ICOMP 5

9
7 MBAT+ BAT-V PU1 PR16 *514K_6
6 1 2
TEMP_MBAT ISL6251A 10K_6
5 PF2 BUS-15A-1206
4 PL3 ISL6251_VDD 6251EN VREF
3

6251VCOMP1
HI0805R800R-00_8
2 CC-SET (24)
1

PC121 PC120 PC8 PR42 10K_6


1 PR8 100K/F_6 LIM = 1/R2(((0.05/VREF=2.39)VACLM)+0.050)
SUY_250133MR007G136ZL 47P/NPO-50V_4 47P/NPO-50V_4 6251CELLS_1
+3VPCU
2

0.1U/X7R-50V_6 6251CELLS_1 PC16 PC11 CURRNT LIMIT POINT = 2.908A


1
PR3 PR37 *10K_6 100P/NPO-50V_4
10mil 100_4 PR26 3.79A=1/0.02((0.05/2.365)Vaclm+0.05)
3

PR4 0_6 PR43 .01U/X7R-16V_4


PR17
100_4 MBDATA (24) *10K_6 Vaclm=0.3899V
26251VCOMP2 ICMNT (24)
MBCLK (24) 6251CELLS_2 2
TEMP_MBAT PR19
*100_4
1

13K_4
1

PQ6
PD1 PD2 PC7 *2N7002E
1

ZD3.6V ZD3.6V PR9 .01U/X7R-50V_6 (24) CELL-SET 2 PR30 PC12


2

*100K/F_6 *100K/F_6 *3300P/X7R-50V_4


2

PQ7
PR50 *2N7002E
1

*100K/F_6
1

A A
PC14 PC13
*100P/NPO-50V_4 6.8n_4

PROJECT : ZU1
Quanta Computer Inc.
CELL-SET = Hi ----> Cells = VDD ---->4S
CELL-SET = Low ----> Cells = GND ---->3S Size Document Number Rev
1D
Charger (ISL6251)
Date: Friday, March 23, 2007 Sheet 35 of 38
5 4 3 2 1
www.s-manuals.com

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