RFD8P05, RFD8P05SM, RFP8P05

Data Sheet July 1999 File Number 2384.2

8A, 50V, 0.300 Ohm, P-Channel Power Features

MOSFETs • 8A, 50V
These products are P-Channel power MOSFETs
• rDS(ON) = 0.300Ω
manufactured using the MegaFET process. This process,
which uses feature sizes approaching those of LSI circuits, • UIS SOA Rating Curve
gives optimum utilization of silicon, resulting in outstanding • SOA is Power Dissipation Limited
performance. They were designed for use in applications
such as switching regulators, switching converters, motor • Nanosecond Switching Speeds
drivers, and relay drivers. These transistors can be operated • Linear Transfer Characteristics
directly from integrated circuits.
• High Input Impedance
Formerly developmental type TA09832.
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Ordering Information Components to PC Boards”
PART NUMBER PACKAGE BRAND

RFD8P05 TO-251AA D8P05

Symbol
D
RFD8P05SM TO-252AA D8P05

RFP8P05 TO-220AB RFP8P05

G
NOTE: When ordering, use the entire part number. Add the suffix 9A
to obtain the TO-252AA variant in tape and reel, i.e.,
RFD8P05SM9A. S

Packaging
JEDEC TO-220AB JEDEC TO-251AA
SOURCE
DRAIN
SOURCE
GATE
DRAIN
GATE
DRAIN (FLANGE) DRAIN (FLANGE)

JEDEC TO-252AA

DRAIN (FLANGE)

GATE
SOURCE

4-112 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999.
 RFD8P05, RFD8P05SM, RFP8P05

Absolute Maximum Ratings TC = 25oC Unless Otherwise Specified

RFD8P05,
RFD8P05SM, RFP8P05 UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS -50 V
Drain to Gate Voltage (RGS = 20KΩ) (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR -50 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID -8 A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM -20 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 48 W
Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.27 W/oC
Single Pulse Avalanche Energy Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS See Figure 6
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ , TSTG -55 to 175 oC

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL 300 oC
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg 260 oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. TJ = 25oC to 150oC.

Electrical Specifications TC = 25oC Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V (Figure 9) -50 - - V
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA (Figure 8) -2 - -4 V
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 1 µA
VDS = 0.8 x Rated BVDSS, TJ = 150oC - - 25 µA
Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA
Drain to Source On Resistance (Note 2) rDS(ON) ID = 8A, VGS = -10V (Figure 7) - - 0.300 Ω
Turn-On Time tON VDD = -25V, ID ≈ 4A, RG = 9.1Ω, RL = 6.25Ω, - - 60 ns
VGS = -10V
Turn-On Delay Time td(ON) - 16 - ns
Rise Time tr - 30 - ns
Turn-Off Delay Time td(OFF) - 42 - ns
Fall Time tf - 20 - ns
Turn-Off Time tOFF - - 100 ns
Total Gate Charge Qg(TOT) VGS = 0 to -20V VDD = -40V, ID = 8A,RL = 5Ω, - - 80 nC
IG(REF) = -0.3mA
Gate Charge at -5V Qg(-10) VGS = 0 to -10V - - 40 nC
Threshold Gate Charge Qg(TH) VGS = 0 to -2V - - 2 nC
Thermal Resistance Junction to Case RθJC - - 3.125 oC/W

Thermal Resistance Junction to Ambient RθJA TO-251AA, TO-252AA - - 100 oC/W

TO-220AB 62.5 oC/W

Source to Drain Diode Specifications TC = 25oC Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Source to Drain Diode Voltage (Note 2) VSD ISD = -8A - - -1.5 V

Reverse Recovery Time trr ISD = -8A, dISD/dt = 100A/µs - - 125 ns

NOTE:
2. Pulse test: pulse width ≤ 300µs, Duty Cycle ≤ 2%.
3. Repetitive rating: pulse width is limited by maximum junction temperature.

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 RFD8P05, RFD8P05SM, RFP8P05

Typical Performance Curves Unless Otherwise Specified

1.2 -10
POWER DISSIPATION MULTIPLIER

1.0
-8

ID, DRAIN CURRENT (A)

0.8
-6
0.6

-4
0.4

-2
0.2

0 0
0 25 50 75 100 125 150 175 25 50 75 100 125 150 175

TC , CASE TEMPERATURE (oC) TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE CASE TEMPERATURE

10 100
If R = 0
IAS , AVALANCHE CURRENT (A) tAV = (L) (IAS) / (1.3 RATED BVDSS - VDD)
DC OPERATION If R ≠ 0
ID , DRAIN CURRENT (A)

tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1]

OPERATION IN THIS IDM
STARTING TJ = 25oC
AREA IS LIMITED BY rDS(ON)
STARTING TJ = 150oC
1 10

TC = 25oC
TJ = 175oC
0.1 1
-1 -10 -100 0.1 1 10 100
VDS , DRAIN TO SOURCE VOLTAGE (V) tAV, TIME IN AVALANCHE (ms)

FIGURE 3. FORWARD BIAS SAFE OPERATING AREA FIGURE 4. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY

-20 20
IDS(ON), DRAIN TO SOURCE CURRENT (A)

PULSE DURATION = 80µs VGS = -10V PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX VGS = -9V DUTY CYCLE = 0.5% MAX 25oC
TC = 25oC VDD = 15V
-16 16 175oC
ID, DRAIN CURRENT (A)

VGS = -8V

-12 12
-55oC
VGS = -7V
-8 8

VGS = -6V
-4 4
VGS = -5V
VGS = -4V
0 0
0 -2 -4 -6 -8 -10 0 -3 -6 -9 -12 -15
VDS, DRAIN TO SOURCE VOLTAGE (V) VGS , GATE TO SOURCE VOLTAGE (V)

FIGURE 5. SATURATION CHARACTERISTICS FIGURE 6. TRANSFER CHARACTERISTICS

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 RFD8P05, RFD8P05SM, RFP8P05

Typical Performance Curves Unless Otherwise Specified

3.0 1.50
PULSE DURATION = 80µs VGS = VDS, ID = -250µA
DUTY CYCLE =0.5% MAX
NORMALIZED ON RESISTANCE

2.5 VGS = -10V, ID = -8A 1.25

THRESHOLD VOLTAGE
NORMALIZED GATE
2.0 1.00

1.5 0.75

1.0 0.50

0.5 0.25

0 0
-50 0 50 100 150 200 -50 0 50 100 150 200
TJ , JUNCTION TEMPERATURE (oC) TJ , JUNCTION TEMPERATURE (oC)

FIGURE 7. NORMALIZED DRAIN TO SOURCE ON FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs

RESISTANCE vs JUNCTION TEMPERATURE JUNCTION TEMPERATURE

2.0 1000
ID = -250µA VGS = 0V, f = 1MHz
CISS = CGS + CGD
NORMALIZED DRAIN TO SOURCE

CRSS = CGD
800
COSS ≈ CDS + CGS
BREAKDOWN VOLTAGE

C, CAPACITANCE (pF)
1.5

600
CISS
1.0
400

COSS
0.5
200

CRSS

0 0
-50 0 50 100 150 200 0 -5 -10 -15 -20 -25
TJ , JUNCTION TEMPERATURE (oC) VDS , DRAIN TO SOURCE VOLTAGE (V)

FIGURE 9. NORMALIZED DRAIN TO SOURCE BREAKDOWN FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
VOLTAGE vs JUNCTION TEMPERATURE

-50 -10
VDS , DRAIN TO SOURCE VOLTAGE (V)

GATE
VGS , GATE TO SOURCE VOLTAGE (V)

VDD = BVDSS VDD = BVDSS

SOURCE
VOLTAGE
-37.5 -8
RL = 6.25Ω
IG(REF) = 0.3mA
VGS = 10V
-25 -6
0.75BVDSS
0.50BVDSS
0.25BVDSS
-12.5 -4
DRAIN TO SOURCE
VOLTAGE -2

0 0
I I
20 G(REF) TIME (µs) 80 G(REF)
IG(ACT) IG(ACT)

NOTE: Refer to Application Notes AN7254 and AN7260.

FIGURE 11. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT

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 RFD8P05, RFD8P05SM, RFP8P05

Test Circuits and Waveforms

VDS
tAV

L 0

VARY tP TO OBTAIN
REQUIRED PEAK IAS RG
-
VDD
+

0V DUT VDD
tP IAS
VGS
IAS VDS
tP
0.01Ω
BVDSS

FIGURE 12. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 13. UNCLAMPED ENERGY WAVEFORMS

tON tOFF

td(ON) td(OFF)

tr tf
0
RL 10% 10%

DUT - VDS
VDD 90% 90%
RG
VGS + VGS
0
10%

50% 50%
PULSE WIDTH
90%

FIGURE 14. SWITCHING TIME TEST CIRCUIT FIGURE 15. RESISTIVE SWITCHING WAVEFORMS

VDS VDS
Qg(TH)
RL 0

VGS= -1V

VGS -VGS VGS= -5V

-
VDD Qg(-5)
+
VGS= -10V
DUT VDD

Ig(REF)
Qg(TOT)

0
Ig(REF)

FIGURE 16. GATE CHARGE TEST CIRCUIT FIGURE 17. GATE CHARGE WAVEFORMS

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 RFD8P05, RFD8P05SM, RFP8P05

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out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
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