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Paradigm shift 20 Paradigm shift 20

- How to survive ICe Age - How to survive ICe Age

Authors Name: Manabu Tsujimura 1 Market Trend in ICe Age


- I would like to show that IC world in ICe Age
Company Name: Ebara Corporation

2 Paradigm Shift 45
-How we overcame 45/40 nm problems
Present Date: Sep. 8, 2010
3 New Paradigm Shift 20
-Now we are facing new challenges!

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What is the Ice Age? How about IC world?


Yes, it is in the ICe Age even in Semiconductor world!
The Ice Age is assumed to be at least four times
in the past 800,000 years. First Ice Age
Second Ice Age
How about now? Is it the Ice Age now!
Semiconductor market

Centre line was up mode


IT bubble(2)
If there are ice on both poles, it is called as the Ice Age. IT bubble(1) + Financial bubble

Then now?
Silicon cycle
Yes, it is in the Ice Age at present.
Do you know that! 1995 2000 2005 2010 2015

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Technology is still boiling in the ICe Age!


Food chain now!
Market was evaporating (gone) in 2009!

Foundary will make


everything Foundry

Retail Set Device Material


We can get 3% profit anytime. Because, No profitable We will
Selling price = Incoming price - profit follow

Tool
From office to consumer electronics.
Technology We have to obey the retail requirement. Tool is not in this chain.
Market

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Good news from DQ Good news from Silicon wafer
2009 is the lowest!
Mil $ Millions of Square Inches

3,000
DQ
Scenario 1 (Most Likely Case)
Scenario 2
Upward from
2,500
Scenario 3 2Q 2009

Set 2,000

10 1,500

Device 1,000

MPU
500
1Q08 2Q08 3Q08 4Q08 1Q09 2Q09 3Q09 4Q09 1Q10 2Q10 3Q10 4Q10
1
Lowest Tool
If Silicon wafer is up, device is up, then material is up.
So, tool?
0.1
2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013
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Technology is still boiling in the ICe Age!


Market was evaporating (gone) in 2009! Good news : More CMP application

Market is again boiling in 2010! Logic


Memory Cu

Inter Layer Dielectric Al


Inter Layer Dielectric
W (Low-k)
W Via

Inter Layer Dielectric W Contact Cu interconnect


(SiO2 ,BPSG)
STI
Poly-Si

For memory Common For Logic

Technology Market Back End Memory Cells FinFET


Market BICs Metal Gate

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Paradigm shift 20
Good news : New challenges of R&D in Semiconductor Families How to survive ICe Age
IC FPD PV LED
IT
1 Market Trend in ICe Age
- I would like to show that IC world in ICe Age
CMP
Plating
CMP & Plating 2 Paradigm Shift 45
for FPD -How we overcame 45/40 nm problems
BT μTAS

3 New Paradigm Shift 20


-Now we are facing new challenges!
CMP for CNT
NT
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Paradigm Shift 45 means
P- 45 nm P-45 cm P-45 μm In Hawaii (ITPC)
No see by light Bigger variation Thinning
Cu resistivity increased
450 mm
SOB
CoC In 2005
SiP
R 300 mm
SOC & 2007
PoP

IMEC

$
$ IMEC

CEO/COO

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Key words of Paradigm Shift 45


Difficulty challenges in Interconnect Now!
No More 3D No! More 3D More Than 3D?
①RC delay ②Power consumption
No More Lager wafer No! More Larger wafer More Than Larger wafer?
【More Scaling】

TR
③Reverse scaling ④RC variation
No More Moore No! More Moore More Than Moore? TR

IMEC

$ ⑤Electron scattering

⑥Lower k
TR TR

TR TR
⑨Co cap ⑪Air gap ⑬RF ⑭Light
⑦Jmax more ⑧Cross talk
⑩Cu alloy ⑫CNT

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【Beyond Cu/Low-k】

Challenges by ITRS interconnect Group Seven See’s challenges

2001 2002 2003 2004 2005 2006 2007 2008 2009 2010
Reverse Scation Direct CMP Low down force Ru liner Non-contact cleaning IPA dry Metal cap Edge control
Electron Scattering
Jmax 22nm @ Back Fill 2 mm
Low k
Mechanical Strength e
2005

Low Power Fre


id
3D interconnect Vo
Contact resistance ECMP
EM

k=2.4? Post CMP Postpone Postpone Adopted Postpone ROA


Resistivity (μΩcm)

2007

100.0
Effective Diel ectric Constant; keff

ITRS2003

ITRS2005
Is CMP.
I TRS2007-2008

10.0
Jmax
ITRS2001

I TRS1999
1.0
Thin and EM Crisis
JEM k=2.5 Conformal Effective 1.5 mm
2009

Year of 1st Shipment Cap again!


Wire width (nm) Hybrid too Again! In 2X
0.1
2009 2021

Reverse Scaring Electron Scattering Low-k trend EM crisis

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3
Now the answers are
P- 45 nm P-45 cm P-45 μm
No see by light Bigger variation Thinning
Cu resistivity increased
450 mm CoC
SOB
SiP
R SOC

Technology is always boiling!


300 mm
PoP

P- 45 nm P-45 cm P-45 μm
Now is the time for 3D
Do you agree?
More Moore until 11 nm Possible if you want
But scaling delayed Last wafer size? And Emerging Device!

45 nm More Than Moore


Equivalent Scaling
Geometrical Scaling
More Moore

Co
mb
in ing
45 -> 45/40 xxx de
450 vic
32 -> 32/28 e
22 -> 22/20 200 300

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In addition, example of special trial Ultra-Low-Down Force is required in Low k CMP

Very week like a cheese!

Ultra low down force of CMP

Magic hand process Low k

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Magic hand process ECP in DI water mechanism


Do you believe me ?
Electrode Cu  Cu++ Etching

Ion Exchange film

DI water DI water ECP


Cu film Wafer
Current

Cu Ion exchange Cathode Anode


material

Just touch No pressure !? => ECP


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In addition, example of special trial Planarization performance, Faster the better

If so, rotate it much faster.


If rotation speed is
faster.

Ultra high speed of CMP

Shikansen Process Planarization performance becomes better.(This is true.)

Initial step height If rotation speed is 30 rpm If rotation speed is 60 rpm


final step height is final step height is
100 nm
30 nm 15 nm

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Magnetic bearing type of carrier Y yP


What is turbo-molecular pump with magnetic bearing ?

xN xP
Gas Inlet

Turbine Rotor Blade Main Shaft X


Turbine Stator Blade Upper
Touchdown Bearing
Upper Radial
Mag Lev Bearing High speed 50,000 rpm Magnetic bearing
yN Target
Groove Rotor
Motor Stator
Displacement sensor
Hermetic Connector
Lower Radial Carrier
Mag Lev Bearing
Axial Mag Lev Bearing Turn table
Gas Outlet Polishing pad Wafer
Lower
Touchdown Bearing
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Paradigm shift 20
Polish profile vs tilt angle
How to survive ICe Age

Rotation of pad
1 Market Trend in ICe Age
- I would like to show that IC world in ICe Age
600
Polish rate (nm/min)

Im = 0.4 (A)
500
2 Paradigm Shift 45
400
-How we overcome 45/40 nm problems
300
200
100
3 New Paradigm Shift 20
0
-Now we are facing new challenges!
-100 -50 0 50 100
Wafer position (mm)
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New Paradigm Shit 20 (From 2010)
Paradigm shift 20
P- 20 nm P-20 cm P-20μm
Lower than Cu? 200 mm wafer is also? How thin ? How to survive ICe Age

1 Market Trend in ICe Age


Resisitivity

?
Cu
450 20μm
200 300

20 50 Width (nm)
- IC world is always in ICe Age
- Technology is boiling, but market is easy to evaporate.
P- 20 nm P-20 cm P-20μm
Aspect ratio of TSV
Material which electron How about this idea?
2 Paradigm Shift 45
Scattering is small. 100-200mm wafer
10 um 10 um
-We overcame difficulty of 45 nm by R&D efforts.
1000 mm

ρCu > ρx 3 New Paradigm Shift 20


20 um D
100 um D
-We are sure that we can again overcome 20 nm challenges.
1000 mm

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