Sistem Digital

http://www.unhas.ac.id/amil/S1TE/SD2018/

L1. Basic Concepts

Amil Ahmad Ilham
Materi Kuliah
• Slides dapat di download di:
http://www.unhas.ac.id/amil/S1TE/SD2018/
• Tools:
• EWB (Electronics Workbench)

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Administrasi Kuliah
 Penilaian
• Quiz, Final, Tugas, Presentasi, dll.
 Perbaikan Nilai:
• Tidak ada (waktu) perbaikan nilai.
• Ujian susulan hanya akan diberikan jika berhalangan hadir pada saat ujian
karena:
• Sakit atau alasan pribadi lain yang dapat diterima.
• Ada pemberitahuan pada saat ujian atau sebelum ujian (Do not hesitate to let me know!)

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Rules!
• Please be aware that:
• No mark (zero) for late assignments
without prior permission or urgent
reasons.
• No mark (zero) for cheated assignments or
exams.
• No talks via mobile phone during class.
• Silent mode is OK
• You can leave class if you have an urgent call.
• No FB, Twitter, SMS, etc, during class.
• No “kaos oblong” and “sandal”.
• No smoking!
• Snack/candy is OK during class.

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Contact info
• HP: 0853-9883-1853 (SMS and URGENT CALL ONLY)
• amil_ai@yahoo.com

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Digital system
Introduction

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Simple Switch Circuit
• Switch open:
• No current through circuit
• Light is off
• Vout is +2.9V

• Switch closed:
• Short circuit across switch
• Current flows
• Light is on
• Vout is 0V

Switch-based circuits can easily represent two states:

on/off, open/closed, voltage/no voltage. 7
Computer is a binary digital system.
Digital system: Binary (base two) system:
• finite number of symbols • has two states: 0 and 1

• Basic unit of information is the binary digit, or bit.

• Values with more than two states require multiple bits.
• A collection of two bits has four possible states:
00, 01, 10, 11
• A collection of three bits has eight possible states:
000, 001, 010, 011, 100, 101, 110, 111
• A collection of n bits has 2n possible states.
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Basic Logic Gates

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N-type MOS Transistor
• MOS = Metal Oxide Semiconductor
• two types: N-type and P-type
• N-type
• when Gate has positive voltage,
short circuit between #1 and #2
(switch closed)
• when Gate has zero voltage,
open circuit between #1 and #2
(switch open)

Terminal #2 must be
connected to GND (0V). 10
P-type MOS Transistor
• P-type is complementary to N-type
• when Gate has positive voltage,
open circuit between #1 and #2
(switch open)
• when Gate has zero voltage,
short circuit between #1 and #2
(switch closed)

Terminal #1 must be
connected to +2.9V. 11
CMOS Circuit
• Complementary MOS
• Uses both N-type and P-type MOS transistors
• P-type
• Attached to + voltage
• N-type
• Attached to GND

• For all inputs, make sure that output is either connected to GND or to +,
but not both!

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Inverter (NOT Gate)
2.9 V

In Out In Out
0 V 2.9 V 0 1
2.9 V 0V 1 0

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NOR Gate

A B C
0 0 1
0 1 0
1 0 0
1 1 0
Note: Serial structure on top, parallel on bottom. 14
OR Gate A B C
0 0 0
0 1 1
1 0 1
1 1 1

Add inverter to NOR.

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Decoder
• n inputs, 2n outputs
• exactly one output is 1 for each possible input pattern

2-bit
decoder
Note the use of the
bubbles (NOT) in the
input.

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Multiplexer (MUX)
• n-bit selector and 2n inputs, one output
• output equals one of the inputs, depending on selector

4-to-1 MUX

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Full Adder
• Add A, B and Cin, produce one-bit S and Cout.

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Four-bit Adder

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 R-S Latch: Simple Storage Element
0 1

0
1 0

• R is used to “reset” or “clear” the element (set it to zero)

• S is used to “set” the element (set it to one)
• If both R and S are one, out could be either zero or one.
• “quiescent” state -- holds its previous value

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Gated D-Latch

• Two inputs: D (data) and WE (write enable)

• when WE = 1, latch is set to value of D
• when WE = 0, latch holds previous value
• S=R=1

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Register

• A register stores a multi-bit value.

• We use a collection of D-latches, all controlled by a common WE.
• When WE=1, n-bit value D is written to register.
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22
x3 address

input bits
Memory
write
enable

output bits 23