Creating an Inverter Layout using L-Edit

To launch L-Edit in one of the LAB PCs, go to START > PROGRAMS > ELECTRICAL >
TANNER > L-EDIT

The following window will open up.

Create a new layout file by going to File > New. The following dialog box will appear.
Under the Copy TDB setup from file area, use the browse button to locate the mamin08.tdb file
(usually P:\Tanner\L-Edit 11.0\samples\tech\mosis\mamin08.tdb on the lab PCs)

Go to Setup > Design. Leave everything on the dialog box as it is. This dialog box shows the
relationship between lambda and microns, specifies the grid settings and shows the type of
technology being use.
Now that we have setup the technology, we will layout a simple CMOS inverter with PMOS
sized W=12 lambda, L = 2 lambda and NMOS sized W=6 lambda, L=2 lambda.

In Tanner, in order to layout either an NMOS or a PMOS, a series of layers must be laid out.
Here are the requirements:

 PMOS: First layout a n-well (n-substrate). Then put a layer of P-select. On area
designated P-select, add an appropriate sized Active layer. Now put a layer of Poly for
gate.
 NMOS: First layout a p-well (p-substrate). Then put a layer of N-select. On area
designated N-select, add an appropriate sized Active layer. Now put a layer of Poly for
gate.
 While each layer must be added, there is no need to layout a p-well or p-substrate when
laying out an NMOS. The empty grid of L-edit represents a p-well or p-substrate.
 The substrate/bulk needs to be connected to Vdd for PMOS and Gnd for NMOS.
For PMOS, place a small N-select (NOT P-select) on the n-well substrate, add a small
Active layer. From this active layer put a contact to a Metal 1 layer that connects to
VDD. For NMOS, on the p-well substrate (i.e. just the background grid) place a small
P-select, followed by an Active layer. From this active layer put a contact to a Metal 1
layer that connects to Gnd.
Now using the shape tool from the top bar and the layer-pallet from the side-bar, and the
requirements mentioned above draw a PMOS. Similarly draw the NMOS (remember you do not
need to draw the P-well). Before you go any further, it is important to note that your design is not
correct until you connect your substrate.

Check your layout using a the design rule check function. Click the DRC button on the top
toolbar. It is a good idea to run DRC at each stage of your design so that you can fix any error
along the way.

Once you have your NMOS and PMOS done, layout an inverter as shown below: Use the
design rules (from Digital Integrated Circuits: A Design Perspective - color leaflet between
pages 10 and 11) to properly space the objects.
Notice how compact the above inverter design is. The goal is to create a minimum physical
implementation of all the layout designs, and to use minimal wires, transistors, contacts, etc.
Not doing so will decrease circuit speed and performance as well as increase circuit size.

Label the Input, Output ports and the Power ports using button on the top-toolbar. On the
final design run DRC. If there is a Design Rule Violation, a dialog box will open pointing out
what the error is. If you click on the error message, it will show exactly where on the design the
problem resides.
Fix any DRC error before proceeding. Keep in mind that passing the DRC test does not
guarantee that your design will work as you expect. A DRC Pass just means that there are NO
DESIGN RULE violations.

Now that we have a complete error free design, it is time to extract the SPICE netlist for the
layout. Click on the button on the toolbar. Browse to the correct Extract Definition File (for
this tutorial we used mamin08 technology. so use the mamin08.ext extract definition file usually
located at P:\Tanner\L-Edit 11.0\samples\tech\mosis\mamin08.ext)
Click on the output tab on the Extract dialog box. Uncheck everything except: Write terminal
names for subcircuits, and Write nodes and devices as Names. Also make sure the SPICE
include statement textbox is empty.
Click Run. You might get an error message similar to:

Ignore all warning messages related to Capacitances.

The SPICE netlist is now generated from your layout. Again this netlist needs some further work
before you can run any kind of analysis on it. Read the tutorial on Simulating your inverter
with SmartSpice to figure out what to do next.

Some quick tricks:

To resize an object, select the object with the left mouse button, hold the ALT key and use the
left mouse button to drag a side of the object.
To move an object, select the object with the left mouse button, hold the ALT key and use the
left mouse button to drag the object.

To duplicate an object, select the object with the left mouse button, hold the CTRL key and use
the left mouse button to place the copied/duplicated object at the right place.