EEEB273 Electronics Analysis and Design II

Answer for Midterm Test

Semester II 2009-2010
Date: 15-01-2010

Question 1 [40 marks]

a) For a BJT Wilson current source shown in Figure 1.1, the transistor parameters are
VBE(on) = 0.7 V, VA = 120 V, and = 100.
(i) Calculate IREF.
[2 marks]
(ii) Determine the output resistance, RO, looking into the collector of Q3.
[4 marks]
(iii) What is the change in IO when output voltage changes by +3 Volts?
[2 marks]

Figure 1.1

Figure 1.1

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b) Figure 1.2 shows a BJT Widlar current source. Study the Figure 1.2 carefully. Assume that
VBE1 = 0.7V and >> 1. For IO = 25 µA, find R1 and VBE2.
[6 marks]

Figure 1.2

c) For the MOSFET current-source circuit in Figure 1.3 the transistor parameters are VTN = 0.5
V, k’n = 80 µA/V2, and = 0. Design the circuit such that VDS2(sat) = 0.25 V, IREF = 50 µA,
and the nominal load current is IO = 100 µA.
[10 marks]

Figure 1.3

Figure 1.3

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d) This question is related to MOSFET Cascode current-source.
(i) Draw a circuit diagram for a MOSFET Cascode current-source. Label the circuit
diagram clearly.
[5 marks]

(ii) Describe how to modify the MOSFET Cascode current-source to get a modified
MOSFET Wilson current-source.
[2 marks]

(iii) Figure 1.4 shows the equivalent circuit of the MOSFET Cascode current-source for
determining the output resistance. Draw the small-signal equivalent circuit for the
Figure 1.4.
[5 marks]

Figure 1.4

(iv) From the small-signal equivalent circuit in the question (iii) above, show that the output
resistance is
RO = ro4 + ro2 (1 + gm ro4)
[4 marks]

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Question 2 [30 marks]

a) What do you understand by the common-mode rejection ratio, CMRR. How it can be
increased and what is the ideal value?
[6 marks]
Common-mode rejection ratio (CMRR) is the ability of a diff-amp to reject a common-
mode signal. CMRR is a figure-of-merit for diff-amp, defined as
Ad
CMRR =
Acm
• Usually, CMRR is expressed in decibels, as follows:
Ad
CMRRdB = 20 log10
Acm
• Common-mode gain decreases as Ro increases. Therefore, CMRR increases as Ro
increases. For an ideal diff-amp, Acm = 0 and CMRR =

b) Consider the circuit shown in Figure 2. The circuit parameters are =100, VA= , IQ=
400µA, VCE1=VCE2=10V, Acm=0.113, VBE(on)=0.7 V, VT=0.026 V.

(i) Determine the value of IC1 and RC for v1=v2=0.

[5 marks]
(ii) Determine the differential voltage gain and the CMRR for two-sided output.
[5 marks]
(iii) Find the differential-mode input resistance.
[4 marks]
(iv) Draw the equivalent ac circuit of the differential amplifier. Label all the signal current
directions clearly.
[6 marks]
(v) Sketch the input and output signals for pure differential-mode signal of 0.1sin t.
[4 marks]
IQ 400
i. I C 1 = = = 200 µ A
2 2

V+ −Vo2
i. Rc = , Ic2 = Ic1 = 200µA
IC2
Vo2 =Vc2 =VCE2 +VE2 =10−0.7 = 9.3V
V+ −Vo2 15−9.3
Rc = = = 28.5kΩ
IC2 200µA
Figure 2

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 β Rc 100 × 28.5 ×103
ii. A d = =
(rπ +R B ) (100 × 0.026 ) + 10 × 103
200 ×10 −6
100 × 28.5 × 103
Ad = = 123.91
(13 × 103 + 10 × 103 )

Ad 123.91
CMRR = = = 1096.55,
Acm 0.113
Ad
CMRRdB = 20 Log = 20 Log1096.55 = 60.8dB
Acm

2β VT
iii. R id =2rπ =
IC2
2 × 100 × 0.026
R id = = 26k Ω
200 × 10−6

iv.

v.

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Question 3 [30 marks]
a) Referring to Figure 3.1. The transistor parameters are: VTN=1V, kn’=80µA/V2, (W/L)=10,
=0. The circuit parameters are: IQ=2mA, V+=10V, V-=-10V.
(i) Calculate RD if it is required that vcm(max) = 4 V.
[3 marks]
Vcm=VG, vcm(max) is the value that puts the transistor in the transition region between
linear and saturation, where VDS=VGS-VTN or VD=VG-VTN

VD=VG-VTN so VG=VD+VTN i.e 4=VD + 1, So VD=3V

where VD=V+ - IDRD

3=10-(1m)(RD)

so RD=7k

(ii) Calculate the minimum common-input voltage, i.e. vcm(min) if the voltage drop across
the current source IQ is 0.5V.
[5 marks]

Vcm(min)=VG= VGS1 + VS

But VS=VIQ + V-= 0.5-10=-9.5V

Finding VGS1 VGS1 = VTN + Sqrt(2ID/(kn’)(W/L))

VGS1 = 1 + Sqrt(2m/(80µ)(10))=2.58V

So vcm(min)=2.58-9.5=-6.92V

Figure 3.1

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b) Referring to Figure 3.2. The circuit parameters are: V+=10V, V-=-10V, R1=50k ,
RD=20k . For all transistors: kn’=60µA/V2, =0 and VTN=0.8V. Let (W/L)1=(W/L)2 and
(W/L)3 =(W/L)4.

(i) Determine the values for the differential input resistance (Rid) and common mode input
resistance (Ricm). Comment on your answer.
[3 marks]
Rid=Ricm=

This is because the input impedance of the gate terminal of MOSFET is infinity i.e. open
circuit at low frequencies.

(ii) You are required to design the circuit such that VDS4(sat)=0.4V, and the differential
gain Ad=10. Calculate the aspect ratios for all transistors.
[13 marks]
VDS4(sat)=VDS3(sat)=VGS3+VTN=0.4

So VGS3=VDS3(sat)+VTN=0.4+0.8=1.2V=VGS4

I1=(V+-VGS4-V-)/R1=(20-1.2)/50k=0.376mA

I1=ID3=0.5kn’(W/L)3(VGS3-VTN)2

0.376m=0.5(60u)(W/L)3(1.2-0.8)2

Hence (W/L)3=78.3=(W/L)4

I1=ID3=ID4=IQ=0.376mA

So ID2=ID1=0.376m/2=0.188mA

Ad=0.5(gm1)(RD) 10=0.5(gm1)(20k)

Hence gm1=1mA/V

Gm1=sqrt(2kn’(W/L)1(ID1))

1m=sqrt(2(60u)(W/L)1(0.188m)

Hence (W/L)1=44.3=(W/L)2

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c) Referring to the dc transfer characteristic curve for a MOSFET differential amplifier in
Figure 3.3, explain the operation of the differential pair circuit as a differential input voltage
is applied.

[6 marks]

Vd=v1-v2
Vd is zero when v1=v2: id1/IQ=id2/IQ=0.5
This means that both currents id1=id2=IQ/2, as shown in the curve for both currents that
crosses at point vd=0
when vd is increased positively: v1>v2 hence id1 >id2
as vd increases, id1 continues to increase while id2 continues to decrease until id1/IQ=1
and id2/IQ=0
this indicates that id1=IQ whereas id2=0. This means that M2 turns off since Vg2 has
dropped so low, hence all current from the tail current source will pass through M1 which
is still on.
Similarly, as vd is decreased, eventually id1/IQ=0 and id2/IQ=1, indicating that M1 is off
and all current IQ flows through M2.
Therefore, |vd| must be set to a certain limit to ensure linear and proper operation of the
differential amplifier.

Can also give (0.5 mark) for each point below

The slope of the curve, gives the forward transconductance gf
At vd=0, slope is maximum ie gf(max)=0.5gm
|Vdmax|=sqrt(IQ/Kn)

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