Lic Lab Manual Final - 2017-2018

IES College of Technology, Bhopal Integrated Circuits and its Applications
IES College of Technology, Bhopal

(Approved By AICTE,New delhi – Affiliated To Rajiv Gandhi Proudyogiki
Vishwavidyalaya, Bhopal M.P)
Integrated Circuits and its Applications

EC – 3003 LAB MANUAL
Department Electronics & Communication Engineering
BE – 4th Semester (CBGS)
Session – Jan., 2017 – June, 2018
Prepared By, Approved By,

Deepak Mishra
AP/ECE/ICOT EC HOD/ECE
Department of Electronics & Communication Engineering 1

(REGULATION 2018)
AS PER R.G.P.V UNIVERSITY SYLLABUS
SYLLABUS
IES College of Technology, Bhopal
Department of Electronics & Communication Engineering
BE – 4th Semester Session – 2017 – 18
Subject:- IC & ITS APPLICATION (EC-4003) Semester:- 4th
S.No List of Experiments:

Study of Function Generator, TL082, MPY634/ASLK Pro, Power
1. Supply, Oscilloscopes, connecting wires, bread board.
To determine voltage gain and frequency response of inverting and non-
2. inverting amplifiers using IC-741.
To measure offset voltages, bias currents, CMRR, Slew Rate of OPAMP

3. using IC-741.
To design an instrumentation amplifier and determine its voltage gain

4. using IC-741.
To design op-amp integrator (low pass filter) and determine its frequency
5. response.
To design op-amp differentiator (high pass filter) and determine its
6. frequency response.
7. To design Analog filters – I and II and analyse its characteristics.

To design Astable,Monostable andBistablemultivibrator using IC-
8. 555and analyse its characteristics.
9. Automatic Gain Control (AGC) Automatic Volume Control (AVC).

COURSE OBJECTIVE:
The focus of this course is to introduce the fundamental concepts and tools of electronic
circuit designing software & let students acquaint with the software being used in the
electronic circuit designing industries.
In this exercise, the performance of the op-amp circuit will be examined. The investigation
will include the effect of Negative feedback on op-amp parameters, Op-Amp circuit’s
behavior & characteristics and difference in ideal values and practical values.
OUTCOMES:
After completion of this course students should be able to,
1. Understand the student will have a complete idea of an Op-Amp and its parameters.
2. Design & simulate various Op-Amp circuits.
3. Analyze the Op-Amp circuit’s behavior & characteristics. Students will know about
the connectivity and biasing of an IC (IC 741) and also the supply and they also learn
the procedure for measurement.
4. They will know about the difference in ideal values and practical values.

EXPERIMENT-1
Objective: To determine voltage gain and frequency response of inverting and non-
inverting amplifiers using IC-741.
Apparatus Required:-
S.No Name of the Apparatus Range Quantity
1 Function Generator 3 MHz 1
2 Oscilloscopes 30 MHz 1
3 Op-Amp IC-741 1
4 0 – 30 V 1
Power Supply (Dual RPS
5 Resistors As required
6 Connecting wires and probes As required
7 Bread Board As required
Theory:
INVERTING AMPLIFIER:
The input signal Vi is applied to the inverting input terminal through R1 and the non-inverting
input terminal of the op-amp is grounded. The output voltage Vo is feedback to the inverting
input terminal through the Rf - R1 network, where Rf is the feedback resistor. The output
voltage is given as,
Vo = - ACL Vi
If Rf = R1 then Vo=Vi
Here the negative sign indicates that the output voltage is 1800 out of phase with the input
signal.
PIN DIAGRAM:

CIRCUIT DIAGRAM OF INVERTING AMPLIFIER:
Fig1.1 Circuit Diagram of Inverting Amplifier

DESIGN:
We know for an inverting Amplifier ACL = Rf / R1
Assume R1 ( approx. 10 KΩ ) and find Rf
Hence Vo = - ACL Vi
PROCEDURE:
1. Connections are made as per the circuit diagram.
2. Set 1v peak to peak in AG and observe the output waveform in CRO.
3. Change the Rf and R1 in to different values and repeat the same procedure
4. Enter the all value in the tabular column.
5. Calculate the Vout by using formula and verify with practical value.
6. The output voltage is obtained in the CRO and the input and output voltage
waveforms are plotted in a graph sheet.
OBSERVATIONS TABLE:
S.No Saturation Input Input Feedback Out Put

Voltage Voltage Resistance Resistance Voltage (Vo)
( Vsat) ( Vin) (R1) (Rf)
1 2sint 5kΩ 5kΩ -2 sint
2 +12,-12 2sint 5kΩ 10kΩ -4 sint
3 2sint 5kΩ 15kΩ -6 sint

MODEL GRAPH:
Fig1.2 Wave form of Inverting Amplifier
RESULT:
The design and testing of the inverting amplifier is done and the input and output waveforms
were drawn.

b. NON- INVERTING AMPLIFIER:

The input signal Vi is applied to the non - inverting input terminal of the op-amp. This circuit
amplifies the signal without inverting the input signal. It is also called negative feedback
system since the output is feedback to the inverting input terminals. The differential voltage
Vd at the inverting input terminal of the op-amp is zero ideally and the output voltage is given
as,
Vo = ACL Vi
Vo / Vi = (Rf / Ri) +1
Here the output voltage is in phase with the input signal.
PIN DIAGRAM:
CIRCUIT DIAGRAM OF NON INVERITNG AMPLIFIER:
Fig1.3 Circuit Diagram of Non-Inverting Amplifier
DESIGN:
We know for a Non-inverting Amplifier ACL = 1 + ( Rf / R1)
Assume R1 ( approx. 10 KΩ ) and find Rf
Hence Vo = ACL Vi
PROCEDURE:
2. Set the 1v peak to peak in AG and observe the output waveform in CRO.
3. Change the Rf and R1 in to different values and repeat the same procedure
4. Enter the all value in the tabular column.
5. Calculate the Vout by using formula. And verify with practical value The output
voltage is obtained in the CRO and the input and output voltage waveforms are plotted
in a graph sheet.

OBSERVATIONS TABLE:
S.No Saturation Input Input Feedback Out Put

Voltage Voltage Resistance Resistance Voltage (Vo)
( Vsat) ( Vin) (R1) (Rf)
1 4sin2t 5kΩ 5kΩ 8 sin2t
2 +12,-12 4sin2t 5kΩ 10kΩ 11.03 sin2t
3 4sin2t 5kΩ 15kΩ 11.10 sin2t
MODEL GRAPH:
Fig1.4 Wave form of Non-Inverting Amplifier
RESULT: The design and testing of the Non-inverting amplifier is done and the input and
output waveforms were drawn.

VIVA QUESTIONS:
1. What is an op-amp?
2. What is an inverting amplifier?
3. What is the difference between inverting and non inverting amplifier?
4. Define CMRR.
5. Write the equation for gain of an inverting amplifier.

Experiment No 2
Objective:- To measure offset voltages, bias currents, CMRR, Slew Rate of OP-AMP using
IC-741.
3 Op-Amp Trainer Kit IC-741 1
4 0 – 30 V 1
8 Multimeter
Theory:
Input Offset Voltage:-Input offset voltage is the voltage that is applied between the two
input terminals of the op-amp to null the output.
Input offset voltage Vio

Vio = Vdc1 – Vdc2
Input Offset Current:- Input Offset Current is the algebraic difference between the currents
into the inverting and non-inverting terminals.
Input Offset Current, Iio = |Ib1 – Ib2|
Where
Ib1 – Non-inverting input current
Ib2 – Inverting input current Input bias current is the average value of the inverting and non-
inverting current. Input Bias Current, Ib = (Ib1 + Ib2)/2

CMRR: - If a signal is applied equally to both inputs of an op amp, so that the differential
input voltage is unaffected, the output should not be affected. In practice, changes in common
mode voltage will produce changes in output. The op amp common-mode rejection ratio
(CMRR) is the ratio of the common-mode gain to differential-mode gain. For example, if a
differential input change of Y volts produces a change of 1 V at the output, and a common-
mode change of X volts produces a similar change of 1 V, then the CMRR is X/Y.
CMRR= Ad / Acm
where Ad is differential gain
Acm is common mode gain
Slew Rate:- Slew rate is defined as the maximum rate of change of the output voltage with
respect to time. It indicates how rapidly the output of an op-amp can change in response to the
changes in the input frequency. It is expressed in Volt/microsecond (V/μs).
SR= dVomax/dt time in micro sec
CIRCUIT DIAGRAM OF AMPLIFIER:
Fig 2.1 Circuit Diagram of Differentiator Amplifier

PROCEDURE:
1. Connections are given as per the circuit diagram.
2. + Vcc and - Vcc supply is given to the power supply terminal of the Op-Amp IC.
3. By adjusting the amplitude and frequency knobs of the function generator, appropriate
input voltage is applied to the input and output terminal of the Op-Amp.
4. The output voltage is obtained in the CRO and the input and output voltage
waveforms are plotted in a graph sheet.
OBSERVATIONS TABLE:
S.No Input Output
Practical Theoretical
1. Amplitude ( No. of div x Volts per div )
2. Time period ( No. of div x Time per div )

MODEL GRAPH:
GRAPH FROM OBSERVATION TABLE:-
RESULT:
VIVA QUESTIONS:
1. What is a Difference amplifier?
2. Define Input Offset Voltage?
3. Define Input Offset Current?
4. Define CMRR.
5. Define Slew Rate.

Experiment No 3
Objective:- To design an instrumentation amplifier and determine its voltage gain using IC-
741.
Apparatus Required:
4 Power Supply (Dual RPS 0 – 30 V 1
5 Resistors - As required
6 Connecting wires and probes - As required
7 Bread Board - As required
8 Multimeter - 1
THEORY:
INSTRUMENTATION AMPLIFIER:
 The output-measuring device required power for their operation. This power is usually
drawn from the measuring circuit itself.
 The electromechanical output device requires power, which typically ranges from a
few micro volts in the case recorder.
 In many applications the measuring circuit cannot supply the power demanded by the
output device.
 Thus if an output device is directly connected to the circuit. Signal gate distorted on
account of the loading effect.
 The instrumentation amplifiers in such cases are required to supply the necessary
power required by the output devices in order that the signal is faithfully measured or
recorded.
 Amplifiers are also used when the quantity under measurement has to be processed or
is to be stored. An instrumentation amplifier should have long operating life and high
degree of reliability.
DESIGN:
V01 = (1+R2/R1) V1− (R2/R1) V2, V02 = (1+ R2/R1) V2 − (R2/R1) V1
V0 = V02 − V01
= (V2−V1) (1+2 R2/R1),
Gain = V0/Vi
= Vo / (V2−V1)
= (1+2 R2/R1)

CIRCUIT DIAGRAM: INSTRUMENTATION AMPLIFIER
Fig3.1 Circuit Diagram of Instrumentation Amplifier

PROCEDURE:
1. The connections are given as per the circuit diagram.
2. Switch on the power supply.
3. The input voltages V1 & V2 are noted for given circuit.
4. The gain is calculated theoretically for the resistance values.
5. Corresponding Vo voltage are Observed.
6. The practical gain is calculated and all the values in the tabular Column.
OBSERVATIONS TABLE:
S.No Input Output Gain
V1 V2 Vo Practical Theoretical gain
gain (dB) (dB)
1.
2.
3.
4.

MODEL GRAPH:
Fig 3.2 Model Graph for Instrumentation Amplifier:
RESULT: Thus the instrumentation amplifier was designed for the given specification.
VIVA QUESTIONS:
1. What are the features of instrumentation amplifier?
2. What are the applications of instrumentation amplifier?
3. What is an instrumentation amplifier?
4. Write the expression for output voltage.
5. What is the use of transducer in an instrumentation amplifier?

Experiment No 4
Objective:- To design op-amp integrator (low pass filter) and determine its frequency
response.
4 0 – 30 V 1
6 Capacitor - As required
9 Multimeter -
THEORY:
Integrator: A circuit in which the output voltage waveform is the integral of the input voltage
waveform is the integrator or the integration amplifier. Such a circuit is obtained by using a
basic inverting amplifier configuration with the feedback resistor RF replaced by a capacitor
CF. The output voltage is given by Integrator is used in signal wave shaping circuits and in
analog computers. If the input is a sine wave, the output is a cosine wave. If the input is a
square wave, the output will be a triangular wave. In the practical integrator, RF is connected
across feedback capacitors CF.
This RF limits the low frequency gain and minimizes the variation in the output voltage. The
input signal will be integrated properly if the time constant T = R1 CF is larger than the time
period T of the input signal

INTEGRATOR DESIGN:
The inverting amplifier’s gain is given by the impedance ratio Zc/ R, so:
G( ) = − 1/ (jRC)= − o/(j)
ThusjVout() = − oVin ( ) and we have an integrator: ideal inverting integrator response
−1
𝑉𝑂 = ∫ 𝑉𝑖 𝑑𝑡
𝑅𝐶
Let fb = 50 Hz; Cf = 0.1μF

fb = 1 / 6.28 R1 Cf
R1 = 10KΩ
Rf = 10R1
Rf = 100 KΩ
CIRCUIT DIAGRAM: INTEGRATOR AMPLIFIER
Fig4.1 Circuit Diagram of Integrator Amplifier

R1= 1kohm, R2=100kohm, C2=0.01microF
PROCEDURE:
2. By using a function generator, a square wave input 4Vp-p is given.
3. The frequency applied is 10 KHz.
4. A perfect triangular wave is obtained. The peak-to-peak voltage and the time period of
input and output waves are measured from CRO.
5. The waveforms are plotted.

OBSERVATIONS TABLE:
S.No Input Vi R1 R2 C2 VO
1.
2.
3.
4.
5.
MODEL GRAPH:
Fig4.2 Waveform of Integrator Amplifier

RESULT:- Thus the Integrator using op-amp was designed and tested.
VIVA QUESTIONS.
1. Define an integrator.
2. State the applications of an integrator.
3. What are the steps to design an integrator?
4. What is effect of feedback resistor and capacitor?

Experiment No 5
Objective:- To design op-amp differentiator (high pass filter) and determine its frequency
response.
4 0 – 30 V 1
6 Capacitor - As required
9 Multimeter - 1
THEORY: An op-amp differentiator simulates mathematical differentiation, which is a

process of determining the instantaneous rate of change of a function. Differentiator performs
the reverse of integration function. The output waveform is derivative of the input waveform.
Here, the input element is a capacitor and the feedback element is a resistor. an ideal
differentiation is shown in fig 5.1.
Fig.5.1 Basic op-amp differentiator

The output voltage is given by
Vo = -RC(dVs/dt)

For proper differentiation, RC has to be much smaller than the time period of the input signal.
It can be seen that at high frequencies a differentiator may become unstable and break into
oscillation. Also, the input impedance of the differentiator decreases with increase in
frequency, thereby making the circuit sensitive to high frequency noise. So, in order to limit
the gain of the differentiator at high frequencies, the input capacitor is connected in series
with a resistance R1 and hence avoiding high frequency noise and stability problems. A
practical differentiator circuit is shown in fig
Fig 5.2Practical op-amp Differentiator

DESIGN:
1. Assemble a differentiator circuit with R=10KΩ and C=0.05µf. Connect a resistor R1
of value 470Ω between the source and the capacitor.
2. Feed + 0.1V, 5 KHz triangular wave input.
3. Observe the input and output voltages on a CRO. Determine the gain of the circuit and
tabulate the readings in table. Model waveform is shown in fig. 5.3.
4. Plot the input and output voltages on the same scale on a linear graph sheet.
PROCEDURE:
1. Connect the circuit as shown in figure5.2.using filter kit
2. Choose the R1 and Rf values depending on the pass band gain of the filter Af
Af=1+(Rf/R1) choose 6.5 K for high Rf and R1 then pass band gain=2
3. Choose a value for high cut off frequency f H
4. Calculate the R using R=1/2ΠfH C where C=0.0047µF.
5. Connect the function generator to the input of the filter of fixed amplitude.of 2 V PP
For different values of input signal frequency F. Note the corresponding output
voltage.
6. Calculate pass band gain Af which is given by Af=Vo/Vin for different frequencies,
note down in the tabular column, record and observe the gain of the filter Integrated
Circuits Lab,
7. Plot the frequency response and compare with Fig (5.3), the frequency response graph
of first order Low pass filter
8. Repeat the above procedure for high pass, band pass& band reject filters with their
respective design steps and plot their frequency responses.

OBSERVATIONS TABLE:
S.No Input R1 Rf C1 Cf VO Frequency Gain=Vo/Vin Gain in
Vi in KHz Db=20log
Vo/Vin
1.
2.
3.
4.
MODEL GRAPH:
Fig5.3 Waveform of Differentiator Amplifier
RESULT:- Thus the differentiation using op-amp was designed and tested.
VIVA QUESTIONS.
1. What is a differentiator?
2. State the applications of a differentiator?
3. What are the steps to design a differentiator?

Experiment No -6
Objective:- To design Analog filters – I and II and analyse its characteristics.
4 0 – 30 V 1
6 Capacitor As required
9 Multimeter
THEORY:
A first order filter consists of a single RC network connected to the non-inverting
input terminal of the op-Amp as shown in the figure. Resistors R1 &Rf determine the gain of
the filter in the pass band. Components R & C determine the cutoff frequency of the filter.
Low-Pass filter: The circuit of 1st order low-pas filter is shown in fig.6.1 & its frequency
response is as shown in the fig3. The dashed curve in the fig.3 indicates the ideal response &
solid curve indicates practical filter response. It is not possible to achieve ideal characteristics.
However with special design techniques (Higher order filters) it is possible to closely
approximate the ideal response. Active filters are typically specified by the voltage transfer
function,
H(s) = V0 (s)/ Vi(s) (under steady state conditions)
i.e s=jω
=>H (jω) = │H(jω)│ eJΦ(w)

Where │H(jω)│ is the magnitude function and eJΦ(w) is the phase function. Magnitude
function is 20 log │H(jω)│dB & phase function is -Φ(ω) * 57.296 degrees.
Fig. 6.1Circuit diagram of 1st order LPF
PROCEDURE:
1st order Low pass Filter
1. Connect the circuit as shown in fig.6.1 on the breadboard.
2. Switch ‘ON’ the power supply and apply +15V to pin no.7 and -15V to pin no.4 of the
IC741.
3. Apply a sine wave input signal of 2V peak-to-peak amplitude from the function generator
(at pin no.3 of the IC741 via RC Low pass network).
4. Connect the C.R.O at (pin no.6) the output terminals.
5. Increase the input signal frequency in steps from 10Hz to 1MHz & Observe the
corresponding output voltage of the filter and tabulate the results.
. Calculate the gain of the filter from the experimental results.
7. Plot the frequency response curve of the low pass filter with the experimental results
obtained &compares it with the expected waveform shown in Fig.6.3.

OBSERVATION TABLE: VIN = 2V p-p
Vin Vout GAIN

Input
Frequency(fin) Input volatage in Output Voltage 20 Log (Vout/ Vin)
Vout/ Vin
in Hz volts in volts Magnitude in dB
High Pass Filter: The circuit of 1st order high pass filter is shown in fig.6.2 & its frequency
response is as shown in the fig4. The dashed curve in the fig.6.4 indicates the ideal response
& solid curve indicates practical filter response. When an input signal is applied to High pass
filter, the signals at high frequencies are passed through circuit and signals at low frequencies
are rejected. That is the signal which are having frequencies less than the lower cutoff
frequency fL are rejected and the signal with frequency greater the lower cut off frequency fL
are passed through the circuit. That is
1. For f >fL, Vo(s) /Vi(s) = Maximum and is called as pass band.

2. For f <fL, Vo(s) /vi(s) = 0 and is called as the stop band.
Fig. 6.2Circuit diagram of 1st order HPF

1st order High pass Filter
1. Connect the circuit as shown in figure.6.2 on the breadboard.
2. Switch ‘ON’ the power supply and apply +15V to pin no.7 and -15V to pin no.4 of the IC741.
3. Apply a sine wave input signal of 2V peak-to-peak amplitude from the function generator (at
pin no.3 of the IC741 via RC High pass network).

5. Increase the input signal frequency in steps from 10Hz to 1MHz & Observe the corresponding
output voltage of the filter and the results.
6. Calculate the gain of the filter from the experimental results.
7. Plot the frequency response curve of the high pass filter with the experimental results obtained
& compares it with the expected waveform shown in Fig.6.4.
OBSERVATION TABLE:
VIN = 2V P-P
Vin Vout GAIN

Input
Frequency(Fin) Input volatage in Output Voltage 20 Log (Vout/ Vin)
Vout/ Vin
in Hz volts in volts Magnitude in dB
PROCEDURE:
Second order Low –Pass Filter
1. Connect the circuit as shown in fig.6.1 on the breadboard with Y1=Y2=1/R & Y3=Y4= jωC.
IC741.
(at pin no.3 of the IC741).
corresponding output voltage of the filter.
6. Measure the gain of the filter from the experimental results.
obtained & compare it with the expected waveform shown in Fig6.5.

OBSERVATION TABLE: Vin=2V p-p
Vout GAIN
Input
Frequency(Fin) Output Voltage(in 20 Log (Vout/ Vin)
Vout/ Vin
in Hz volts) Magnitude in dB
Second order High –Pass Filter
1. Connect the circuit as shown in fig.1 on the breadboard with Y1=Y2= jωC& Y3=Y4=1/R.
IC741.
(at pin no.3 of the IC741).
corresponding output voltage of the filter.
6. Measure the gain of the filter from the experimental results.
obtained & compare it with the expected waveform shown in fig 6.6.
OBSERVATION TABLE: Vin = 2V p-p
Vout GAIN
Input Frequency(Fin) in
Output Voltage 20Log(Vout/ Vin)
Hz Vout/ Vin
(in volts) Magnitude in dB

DESIGN PROCEDURE:
Pass band gain of the active filter VO/Vin = Af= 1 + Rf/R1

Higher cut-off frequency of the low pass filter, fH =1/2ПRC
Lower cut-off frequency of the High pass filter, fL =1/2ПRC
First order LPF
1. The higher cut-off frequency is given as, fH = 5 KHz.

2. Choose the value of C such that the value of C ≤1µF (Typically C= 0.1µF)
3. Calculate the value of R, using the formula
R =1/2ПCfH
= 318.47Ω (320 Ω Approx.)
4. Get the value of damping factor, α from the Butterworth polynomials
Note: For a 1st order Butterworth active filter, the value of damping factor α=1 (from
Butterworth polynomials)
1. Calculate the value of pass-band gain, AF using the formula,

α =3-Af
=> AF = 3- α = 3-1= 2
6. Using the formula AF = 1 + RF/R1, get a relation between RF & R1.
=>RF/R1=AF -1 = 1
=>RF=R1
7. Choose the value of R1=10 KΩ => RF=10 KΩ
First order HPF
1. The lower cut-off frequency is given as, fL = 1 KHz.

2. Choose the value of C such that the value of C ≤1µF (Typically C= 0.01µF)
3. Calculate the value of R, using the formula
R =1/2ПCfL= 15.9 KΩ
4. Get the value of damping factor, α from the Butterworth polynomials
Note: For a 1st order Butterworth active filter, the value of damping factor α=1 (from
Butterworth polynomials)
5. Calculate the value of pass-band gain, AF using the formula, α =3-Af

=> AF = 3- α = 3-1= 2
6. Using the formula AF = 1 + RF/R1, get a relation between RF & R1.
=>RF/R1=AF -1 = 1
=>RF=R1
7. Choose the value of R1=10 KΩ => RF=10 KΩ
EXPECTED WAVEFORMS:
Figure. 6. 3 Frequency response of 1st Order LPF
Figure. 6.4 Frequency response of 1st Order HPF
Figure. 6.5 Frequency response of 2nd Order LPF
Figure. 6.6 Frequency response of 2nd Order HPF

RESULT: The first and second order LPF & HPF are designed for a chosen cutoff frequency
and the frequency response curves were plotted between voltage gain (dB) and frequency
(Hz).
VIVA QUESTIONS:
1. What is the switched capacity filters?
2. What are the common applications of filters?
3. Define a state variable filter.
4. Why do we use higher order filters.
5. What is the roll-off a first order filter?
6. List out the other filters rather than these filters.

Experiment No -7
Objective:- To design Astable, Monostable and Bistable multivibrator using IC-555and
analyse its characteristics.
APPARATUS REQUIRED:-
S.No. APPARATUS / RANGE QUANTITY
EQUIPMENT
1 IC741 - 1
2 Resistors 1KΩ,10KΩ,48.3KΩ,100KΩ 1,2,1,2
3 Capacitors 0.1 μF, 0.01 μF 2
4 AFO 30 MHz 1
5 Power supply (0- 15)v 1
6 CRO 30 MHz 1
7 Connecting wires - As required
CIRCUIT DIAGRAM:-
Fig 7.1 Circuit diagram of Astable multivibrator using 555 timer
Fig 7.2 Circuit diagram of Monostable multivibrator

THEORY:
Astable Multivibrator:
 The Astable multivibrator can produce a square wave outout simply by connecting diode D
across resistor RB.
 Capacitor C charges through diode and RA to approximately to 2/3 Vcc and is charges
through RB and terminal 7 untill the capacitor voltage equals approximately 1/3 Vcc and
then the cycle repeats.
 To obtain Square wave output RA is a combination opf fixed resistor and otentiometer so
that the potentiometer can be adjusted for exact square wave.
Monostable Multivibrator:
 The mono stable multivibrator often called as one shot multivibrator is a pulse generating
circuit in which the duration of the pulse is determined by the RC network connected
externally to 555 timer.
 In a stable (or) standby state, output of the circuit is approximately zero (or) a logic low
level.
 When the external trigger pulse is applied output is formed to go high.
 Output stays low until trigger pulse is again applied.
 Then the cycle repeats the monostable circuit has only one state. Hence it is called so.
PROCEDURE:
Astable Multivibrator:

2. The capacitor voltage waveform is observed and the frequency of the output
waveform is measured
3. Tabulate the reading in tabular column.
Monostable Multivibrator:

2. Tabulate the reading in tabular column.
3. To plot the graph.

OBSERVATIONS TABLE:
Astable multivibrator:
S.No Input Out Time Trigger Theoretical Practical

Vi put (ms) input frequency frequency
VO (Hz) (Hz)
1.
2.
3.
4.
Monostable multivibrator:
S.No Input Out Time Trigger Theoretical Practical
Vi put (ms) input frequency frequency
VO (Hz) (Hz)
1.
2.
3.
4.
MODEL GRAPH:
Fig 7.3 Model Graph for Astable multivibrator
Fig 7.4 Model Graph for Monostable multivibrator

RESULT : Thus an Astable, Monostable multivibrators using NE555 timer its performance
is observed.
VIVA QUESTIONS:
1. What is the use of a monostable multivibrator using NE555?
2. What is the application of astable multivibrator?
3. What are the modes of operation of a timer?
4. Give some applications of timer in monostable mode.
5. How is an astable multivibrator connected to PPM?

Experiment No -8
Objective:- Automatic Gain Control (AGC) Automatic Volume Control (AVC).
APPARATUS REQUIRED:-
S.No. APPARATUS / RANGE QUANTITY
EQUIPMENT
1 IC741 - 1
2 Resistors 1KΩ,10KΩ,48.3KΩ,100KΩ 1,2,1,2
3 Capacitors 0.1 μF, 0.01 μF 2
4 ASLK-PRO TL 082 IC 1
5 Power supply (0- 15)v 1
6 CRO 30 MHz 1
7 Connecting wires - As required
THEORY:
An integrated circuit known as a Voice Operated Gain Adjusting Device
(VOGAD) is chosen for the AGC circuit, see figure 8.1. The IC is the SL6270C
which is able to keep the output amplitude at a constant level of approximately 100
mV over a 50 dB input range. The chip requires only a few external components,
these will determine how fast AGC will respond to a change in input level.
Internally there are two amplifiers, an input amp and an output amp. The output
amp feeds the signal to a detection circuit which produces a DC voltage that
controls the gain of the input stage.
PIN DIAGRAM:

CIRCUIT DIAGRAM:
PROCEDURE:
1. Connections are given as per the circuit diagram in the ASLK-PRO.
2. The output waveform is obtained with the help of CRO.
3. Apply a Sine wave input and observe the amplitude at output.
4. Vary the input amplitude at fixed input frequency; the output amplitude should remain
constant for varying input amplitude within the lock range of the system.
OBSERVATIONS TABLE:
Fixed Input Frequency=1 KHz
s.no input output
MODEL GRAPH:

RESULT:

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IES College of Technology, Bhopal Integrated Circuits and its Applications

IES College of Technology, Bhopal

Integrated Circuits and its Applications

Prepared By, Approved By,

Department of Electronics & Communication Engineering 1

Subject:- IC & ITS APPLICATION (EC-4003) Semester:- 4th

S.No List of Experiments:

To measure offset voltages, bias currents, CMRR, Slew Rate of OPAMP

To design an instrumentation amplifier and determine its voltage gain

7. To design Analog filters – I and II and analyse its characteristics.

9. Automatic Gain Control (AGC) Automatic Volume Control (AVC).

Department of Electronics & Communication Engineering 2

Department of Electronics & Communication Engineering 3

1 Function Generator 3 MHz 1

6 Connecting wires and probes As required

7 Bread Board As required

Department of Electronics & Communication Engineering 4

CIRCUIT DIAGRAM OF INVERTING AMPLIFIER:

Fig1.1 Circuit Diagram of Inverting Amplifier

S.No Saturation Input Input Feedback Out Put

1 2sint 5kΩ 5kΩ -2 sint

2 +12,-12 2sint 5kΩ 10kΩ -4 sint

3 2sint 5kΩ 15kΩ -6 sint

Department of Electronics & Communication Engineering 5

Fig1.2 Wave form of Inverting Amplifier

Department of Electronics & Communication Engineering 1

b. NON- INVERTING AMPLIFIER:

CIRCUIT DIAGRAM OF NON INVERITNG AMPLIFIER:

Fig1.3 Circuit Diagram of Non-Inverting Amplifier

Department of Electronics & Communication Engineering 1

S.No Saturation Input Input Feedback Out Put

1 4sin2t 5kΩ 5kΩ 8 sin2t

2 +12,-12 4sin2t 5kΩ 10kΩ 11.03 sin2t

3 4sin2t 5kΩ 15kΩ 11.10 sin2t

Fig1.4 Wave form of Non-Inverting Amplifier

Department of Electronics & Communication Engineering 2

Department of Electronics & Communication Engineering 3

1 Function Generator 3 MHz 1

3 Op-Amp Trainer Kit IC-741 1

6 Connecting wires and probes As required

7 Bread Board As required

Input offset voltage Vio

Department of Electronics & Communication Engineering 1

Fig 2.1 Circuit Diagram of Differentiator Amplifier

Department of Electronics & Communication Engineering 2

GRAPH FROM OBSERVATION TABLE:-

Department of Electronics & Communication Engineering 3

Department of Electronics & Communication Engineering 1

CIRCUIT DIAGRAM: INSTRUMENTATION AMPLIFIER

Fig3.1 Circuit Diagram of Instrumentation Amplifier

Department of Electronics & Communication Engineering 2

Fig 3.2 Model Graph for Instrumentation Amplifier:

GRAPH FROM OBSERVATION TABLE:-

Department of Electronics & Communication Engineering 3

1 Function Generator 3 MHz 1

3 Op-Amp Trainer Kit IC-741 1

7 Connecting wires and probes - As required

8 Bread Board - As required

Department of Electronics & Communication Engineering 1

Let fb = 50 Hz; Cf = 0.1μF

Fig4.1 Circuit Diagram of Integrator Amplifier

Department of Electronics & Communication Engineering 1

Fig4.2 Waveform of Integrator Amplifier

Department of Electronics & Communication Engineering 2