Report on Mini project 1

AIM:
 To design a circuit that can operate even after some of its switches have failed.
 To implement the designed circuit using logic gates.
 To verify and try to improve the circuit by repeated tests.

HYPOTHESIS:
The assumptions for solving the circuit were:

 Each system is represented by a unique combination of 3 bit codes.

 These combinations are activated by the “ON” and “OFF” combination.
 Each system is on only when that unique combination is giving HIGH.
 Each system is operated individually.
 System operates at active HIGH.

EQUIPMENT REQUIRED:
 4 input AND gates (IC 4082)
 J-K flip-flop (IC 7476)
 Hex inverter (IC 7404)
 Breadboard
 LEDs
 Connecting wires
 DC voltage source

Overview:
The J-K flip-flop will give the unique driver HIGH or LOW output and the AND gates will be
used as decoder. The inverter will invert the inputs where needed.

May 8, 2014
 Report on Mini project 2

TRUTH TABLES:

ON and OFF Switch

ON OFF Q
0 0 No Change
0 1 0
1 0 1
1 1 Toggle

Truth Table 1

A B C Q Y
0 0 0 1 D0 = 1
0 0 1 1 D1 = 1
0 1 0 1 D2 = 1
0 1 1 1 D3 = 1
1 0 0 1 D4 = 1
1 0 1 1 D5= 1
1 1 0 1 D6 = 1
1 1 1 1 D7 = 1

Truth Table 2

A B C Q Y
0 0 0 0 D0 = 0
0 0 1 0 D1 = 0
0 1 0 0 D2 = 0
0 1 1 0 D3 = 0
1 0 0 0 D4 = 0
1 0 1 0 D5= 0
1 1 0 0 D6 = 0

May 8, 2014
 Report on Mini project 3

1 1 1 0 D7 = 0
BOOLEAN EXPRESSION:
D0 = A’B’C’Q

D1 = A’B’CQ

D2 = A’BC’Q

D3 = A’BCQ

D4 = AB’C’Q

D5 = AB’CQ

D6 = ABC’Q

D7 = ABCQ

CIRCUIT IMPLEMENTATIONS:

Fig – 1: J-K flip-flops give output Q in the expression

May 8, 2014
 Report on Mini project 4

Fig – 2: 3 to 8 decoder (Each gate will have additional Q input)

EXPLANATION:
 Q is the output of a J-K flip-flop that gives the output by combination of ON and OFF
switches.
 AND gates are acting as Decoder, whenever a certain combination from table – 1 and 2
are met it gives HIGH to a specific system and the system is on.
 The system works for 8 systems this way.

May 8, 2014
 Report on Mini project 5

DESIGN VERIFICATIONS:
 The design was checked by implementing and it worked under all the conditions of ON
and OFF.
 The No change condition gives us the safety from temporary failure of all the systems
together if any of the master switches are given input otherwise.
 The circuit acts as a predictor, in 1-1 state of FF it toggles at each clock pulse.

SYSTEM ADVANTAGES:
 Can handle any condition of both “ON” and “OFF”.

 The system response can always be predicted.

 System can be directed into safe situation even unwanted combination occurs.

 Can operate the systems individually.

DISADVANTAGES:
 Needs both combinational and sequential circuits.

 As J-K flip-flop is used clock is needed.

 Cannot operate 8 systems simultaneously, can only operate 1 at a time.

SYSTEM REMEDY:
 Can use a combinational circuit instead of sequential circuit.

 A priority checker circuit that would give “ON” switch priority over the other.

May 8, 2014