VARIABLE SUPPLY VOLTAGE

Prof. Kaushik Roy

@ Purdue Univ.
 VSV: L2-Miss-Driven Variable Supply-Voltage
Ready Instr
Unready Instr

• CPU usually end up stalling on

L2 misses

• L2 miss as trigger to transit

from high to low VDD

Source: Intel
Issue Queue
Prof. Kaushik Roy
@ Purdue Univ.
 Implementation of VSV

Alpha 21264 floorplan

Variable VDD
VDDH or VDDL
Fixed VDDH
transition energy
overhead

Source: Intel

Two steady operation modes: high-performance & low-power

Prof. Kaushik Roy
@ Purdue Univ.
 High- to Low-Power Mode Transition

VDDH VDDL
Time (ns)
High-power mode
L2-miss detected
4 control signal & clock
Half clock-speed

12 VDDH →VDDL
transition
Reach VDDL
Low-power mode

• Not so simple: What if high ILP overlaps misses?

Source: Intel

Prof. Kaushik Roy

@ Purdue Univ.
 High- to Low-Power Mode Transition

Time (ns)
VDDH VDDL
High-power mode
L2-miss detected
≤10 Down-FSM: Low ILP?
Low ILP? Yes
4 control signal & clock
Half clock-speed

12 VDDH →VDDL
transition
Reach VDDL
Low-power mode

• Go to low-power mode only if low ILP

Source: Intel

• Down-FSM avoids unnecessary performance loss

Prof. Kaushik Roy
@ Purdue Univ.
 Low- to High-Power Mode Transition
Time (ns)
VDDH VDDL
Low-power mode
L2-miss returns

≤20 UP-FSM: High ILP?

High ILP? Yes 2 control signal

Half clock-speed
12 VDDL →VDDH
transition
clock
2
Full clock-speed
& reach VDDH High-power mode

• Back to high-power mode when LAST L2 miss returns

Source: Intel
• Up-FSM increase power savings
Prof. Kaushik Roy
@ Purdue Univ.
 Effectiveness
Savings (%) Degradation (%) Without FSMs With FSMs
25
CPU Power Performance

20
MR>4.0 >0.4 ≥0.0
15
10
5
0
-5
MR: L2 misses per 1,000 instructions

perlbmk
ammp

gzip
mgrid
applu

bzip2

galgel

fma3d
equake
mcf

gap

mesa
wupwise
swim
lucas

sixtrack
vpr

parser

twolf
eon
apsi

gcc
vortex
art

crafty
facerec
50
40
30
20
10
0
-10
perlbmk
ammp

mgrid

gzip
applu

bzip2

galgel

fma3d
equake
mcf

gap

mesa
wupwise
swim
lucas

sixtrack
vpr

parser

twolf
eon
apsi

gcc
vortex
art

crafty
facerec

• FSMs effectively avoid performance degradation

Source: Intel
• Average CPU power savings : performance loss
7% : 1% for all SPEC2K programs
21% : 2% for programs with MR>4.0
Prof. Kaushik Roy
@ Purdue Univ.