THIRUMALAI ENGINEERING COLLEGE

DEPARTMENT OF EEE
CAT-2
DESIGN OF ELECTRICAL MACHINES
YEAR/SEM: III/VI MAX: 50Marks
FACULTY :S.SRINIVASAN DATE:

PART-A (5*2=10)

1. Distinguish between real and apparent flux densities in a DC machine.

2. What is meant by unbalanced magnetic pull?
3. Define iron stacking factor.
4. Give the main parts of DC machine.
5. Write down the steps involved in determination of number of stator slots in a DC machine?

PART – B ( 5*8=40)

1. Explain the methods of selection of number of poles in a DC machine.

2. A 5KW, 250V, 4 Pole, 1500 rpm DC shunt generator is designed to have a square pole face. The
specific electric and magnetic loadings are 15000AC/m and 0.42 WB/m 2. Find the main dimensions of
the machine. Assume full load efficiency =0.87 and pole arc to pole pitch is 0.66.
3. Derive the output equation of DC machine.
4. Determine the air gap length of DC machine from a following data: Gross length of the core is
0.12m, no. Of. ducts = 1; width of each ducts = 10mm, slot pitch is 25mm ; slot width is 10mm;
carters coefficient for slots and ducts 0.32; gap density at pole center is 0.7Wb/ m 2 field mmf/pole is
3900AT, mmf required for iron parts of magnetic circuit 800AT.
5. Compute the suitable dimensions of armature core of a DC generator which is rated 50kw, 4pole,
600rpm, and full load terminal voltage being 220V, if the maximum gap flux density is 0.83wb / m 2.
And ampere conductors per meter are 30000. Full load armature voltage drop is 3% of rated terminal
voltage, field current is 1%. Ratio of pole arc to pole pitch is 0.67.
 THIRUMALAI ENGINEERING COLLEGE
DEPARTMENT OF EEE
CAT-II
DISCRETE TIME SYSTEM AND SIGNAL PROCESSING
YEAR/SEM: II/IV MAX: 50Marks
FACULTY :S.SRINIVASAN DATE:

PART-A (5*2=10)

1. What is pipelining
2. Give application DSP .
3. Define Z-transform
4. What are the different buses of dsp.
5. List the on chip peripherals in dsp

PART – B(40marks)
1.Explain the architecture of TMS320C50. (16)
2.Explain the various types of addressing modes using DSP. (8)
3. Explain van neumann ,harward and modified harward architecture. (16)

THIRUMALAI ENGINEERING COLLEGE

DEPARTMENT OF EEE
CAT-II
DISCRETE TIME SYSTEM AND SIGNAL PROCESSING
YEAR/SEM: II/IV MAX: 50Marks
FACULTY :S.SRINIVASAN DATE:

PART-A (5*2=10)

1. What is pipelining
2. Give application DSP .
3. Define Z-transform
4. What are the different buses of dsp.
5. List the on chip peripherals in dsp

PART – B(40marks)
1.Explain the architecture of TMS320C50. (16)
2.Explain the various types of addressing modes using DSP. (8)
 3. Explain van neumann ,harward and modified harward architecture. (16)

THIRUMALAI ENGINEERING COLLEGE

DEPARTMENT OF EEE
CAT-I
CIRCUIT THEORY/ CIRCUIT ANALYSIS
YEAR/SEM: I EEE & ECE/II SEM
MAX: 50Marks
FACULTY :S.SRINIVASAN DATE:

PART-A (5*2=10)
1. State ohm’s law..
2. State Krichoffs voltage law.
3. State krichoff’s current law.
4. write the equivalent capacitance formula when connected in series and parallel?
5. write the formulas for voltage and current division rule with diagram?

PART – B(40marks)
1. Determine the current in every loop by mesh analysis.

2. Determine the current in every loop by mesh analysis

3. Determine the voltage in every node by nodal analysis method.

4. find the voltage across a&b in the cicuit given below.