Batangas State University

College of Engineering, Architecture and Fine Arts

ECE/ICE/MeXE Department

Laboratory Experiment No.1

Transistor Characteristics and Bias

Submitted By:
Team Voltorb Electrode:
Arellano, Edilyn
Aviles, Maria Frences
Lumanglas, Anna Monique
Botardo, Joseph Jeremy
Tumambing, Diordan Mike
Noche, Verra Mae

Submitted to:
Engr. Ralph Gerard B. Sangalang
 BJT Output Characteristics

OBJECTIVES
This paper aims to do the following:
1. To gather the required data and plot the IC vs. VCE
2. To effectively vary the needed adjustments.

MATERIALS
DC Supply
DMM
Breadboard
Connecting wires
Transistor BJT (General purpose 2N3904)
Resistors
Potentiometers

PROCEDURES
1. Construct the circuit shown in the figure
2. Vary R1 to fi the base current of 5uA, then vary R2 to change the value of VCE.
3. Record the values of IC for the values of VCE = 0 V up to VCE = 18 V at an increment
of 0.5 V.
4. Plot the collector current versus the collector-to-emitter voltage.
5. Repeat the steps with IB = 5 uA up to IB = 50uA

FIGURE 1

DISCUSSION
For this experiment, the group immediately applied the circuit figure on a breadboard. In
early phase of actual measurements, the team set up and did troubleshooting up until the middle
phase of getting desired results by varying increments.
DATA AND RESULT
@ IB = 5uA (BJT) NPN -General purpose 2N3904
VCE (V) IC (uA)
0.004 4.313
0.638 594.114
1.27 599.73
1.91 604.337
2.57 609.608
3.24 614.99
3.92 620.484
4.62 626.094
5.34 631.823
6.07 637.674
6.81 643.651
7.57 649.757
8.35 655.996
9.14 662.372
9.95 668.889
10.8 675.551
11.6 682.363
12.5 689.329
13.4 696.455
14.3 703.744

@ IB = 10uA (BJT) NPN -General purpose 2N3904

VCE (V) IC (mA)
7.21 mv -7.208 uA
.696 1.28
1.25 1.29
1.84 1.3
2.45 1.31
3.09 1.322
3.77 1.333
4.47 1.345
5.21 1.358
5.98 1.372
6.79 1.385
7.63 1.4
8.51 1.415
9.42 1.431
10.4 1.448
11.4 1.465
12.4 1.483
13.5 1.501

@ IB = 20uA (BJT) NPN -General purpose 2N3904

VCE (V) IC (mA)
0.00118 -11.759 uA
.611 3.082
1.33 3.092
2.13 3.124
 2.99 3.16
3.94 3.2
4.97 3.242
6.08 3.288
7.28 3.338
8.58 3.392
9.98 3.45
11.5 3.512

@ IB = 30uA (BJT) NPN -General purpose 2N3904

VCE (V) IC (mA)
0.00141 -14.146 uA
0.781 4.741
1.92 4.814
3.19 4.895
4.59 4.984
6.13 5.083
7.83 5.191
9.69 5.311

@ IB = 40uA (BJT) NPN -General purpose 2N3904

VCE (V) IC (mA)
0.0015 -15.048 uA
1.72 5.711
3.21 5.824
4.87 5.951
6.71 6.091
8.75 6.246

@ IB = 50uA (BJT) NPN -General purpose 2N3904

VCE IC
0.0016 -16.015 uA
1.41 6.925
3.22 7.092
5.24 7.28
7.49 7.51
PLOT

BJT Output Characteristic Curve

Ic Vs. VCE
6000 Ib = 50 uA

5000

4000 Ib = 40 uA
3000

2000 Ib = 30 uA
1000 Ib = 20 uA
0 Ib = 10 uA
0 2 4 6 8 10 12 14 16
-1000

PROBLEM
 WHAT HAPPENS TO α AND β AS THE CURRENTS VARY?
Theoretically, for BJTs, Ic is approximately equal to IE and their ratio would be always
approximately equal to 1. Wherein in this experiment, the alpha values ranged from 0.90 to 0.998.
In other words, it never approached any number greater than 1. On the other hand, Beta increases
as the variations of IC and IB increases as well.

CONLUSION
Through this experiment, we therefore can conclude that the parameters (Beta and Alpha)
are dependent upon the change in the pin currents. For BJTs, Beta would increase or decrease
through varying values while Alpha would never approach any value greater than 1. In other
words, ideally alpha = 1, for practical devices, however, the level of alpha typically extends from
0.90 to 0.998, with most approaching the high end of the range. For beta, IC and IB are determined
at a particular operating point on the characteristics. For practical devices, the level typically ranges
from about 50 to over 400, with most in the midrange. As for alpha, beta certainly reveals the
relative magnitude of one current to the other.
 Operating Points of a BJT Amplifier
OBJECTIVES
To plot the DC Load Line, perform modelling to the transistor and to identify the quiescent point
of the transistor.

PROCEDURES
1. Construct the circuit shown.
2. Measure the base current.
3. Plot the output characteristics of the transistor using the measured base current.
4. Plot the DC load line, i.e. using RC then model VCE as a voltage supply, in the same plot
as the output characteristics of the transistor. Vary VCE (0.5 increment) and record the
current across RC.
5. Identify the intersection of the two plots, this is the operating point of the circuit.
6. Using DMM, measure the points of the circuit.
7. Record the measurements.

 To perform the Load Line Analysis perform the following circuit

To plot the VCE vs. IC To Plot the Saturation Current ICsat

 To perform DC SWEEP
Analysis Parameters

Output

To obtain the Qpoint of the transistor place the cursor in the grapher view then place it where the
two lines intersect. Then approximate the ICq and VCEq of the transistor.
Using Cursor 1:
VCEq = 8.3475V
ICq = 2.4092mA

CONCLUSION
To obtain accurate results lessen the increment of the source that will be varied when performing
DC Sweep and to zoom in the output characteristic of the transistor and the line current IC when
the supply is varied to obtain the q point of the transistor. This experiment can be useful when
modelling a circuit, to observe its behavior when the voltage or current is varied.
 Transistor Bias Circuits
OBJECTIVES
This paper aims the following:
1. To conduct the experiment given and record the data.
2. To understand the concept of bias circuits
3. To learn the advantages of each bias
MATERIALS
Multimeter
DC Supply
PROCEDURES
1. Construct a fixes bias circuit using a general-purpose transistor. Vcc = 15 V, RB = 1
M-ohms, Rc= 2.7 k-ohms
2. Measure the operating points IB, VBE , Ic , VCE
3. Calculate Beta from the measurement.
𝐼𝑐
𝛽= 𝐼𝐵

4. Record the measurements.

5. Repeat the step from 1-4 for an emitter bias circuit using a general-purpose
transmitter. Vcc = 15 V, RB = 1 M-ohms, Rc = 2.2 k-ohms, RE = 2.2 k-ohms
6. Repeat the steps 1-4 again for a voltage divider bias using a general-purpose
transmitter. V, R1= 33 k-ohms, R2= 6.8 k-ohms, Rc = 1.8 k-ohms and RE = 0.68 k-
ohms
7. Repeat the steps 1-4 again for a common base configuration. Vcc= 15 V, VEE = -15
V, Rc= 2.2 and RE = 2.2 k-ohms.
8. Repeat the step 1-7 using a higher beta transistor.
9. Calculate the difference in measurements for IB, VBE, Ic , VCE and 𝛽.
|𝐼B2−𝐼B1|
% ∆IB = X 100%
𝐼B1
|𝑉BE2−𝑉BE1|
% ∆vBE = X 100%
𝑉BE2
|IC2−𝐼C1|
% ∆IC = X 100%
𝐼C1
|𝑉CE2−𝑉CE1|
% ∆VCE = X 100%
𝑉CE1
|𝛽2−𝛽1|
% ∆𝜷 = X 100%
𝛽1
GENERAL PURPOSE TRANSISTOR HIGHER BETA TRANSISTOR

FIXED BIAS FIXED BIAS

EMITTER BIAS EMITTER BIAS

GENERAL PURPOSE TRANSISTOR HIGHER BETA TRANSISTOR

VOLTAGE DIVIDER BIAS VOLTAGE DIVIDER BIAS

SELF BIAS – COMMON BASE SELF BIAS – COMMON BASE

DISCUSSION
In this experiment, the group build each circuit given in the procedure including a fixed
bias circuit, voltage divider bias, emitter bias, and self-bias, wherein all of those are made up of a
General-purpose Bipolar Junction Transistor (BJT), 2N3904. After the completion of the circuit,
they followed the instruction and measured the operating points needed including IB, VBE, Ic,
VCE. With the used of IB and Ic, the 𝛽 is computed using the formula given. After using general-
purpose BJT, the group replace the transistor by a higher beta transistor, 2N4401. They repeat
the steps used in the general-purpose transistor and then record the measured data. Finally, the
group computed the % difference of the values measured from higher beta and general-purpose
transistor.

DATA AND RESULT

GENERAL PURPOSE TRANSISTOR HIGHER BETA TRANSISTOR

FIXED BIAS FIXED BIAS

IB 14.3𝜇𝐴 IB 14.4𝜇𝐴
VBE 685.077mV VBE 646.766Mv
IC 2.30mA IC 2.04mA
VCE 8.799V VCE 9.492V
𝜷 160.839 𝜷 141.667

EMITTER BIAS EMITTER BIAS

IB 10.7𝜇𝐴 IB 11.1𝜇𝐴
VBE 676.357mV VBE 638.51mV
IC 1.64mA IC 1.47mA
VCE 7.781V VCE 8.493V
𝜷 153.271 𝜷 132.43

VOLTAGE DIVIDER BIAS VOLTAGE DIVIDER BIAS

IB 16.1𝜇𝐴 IB 17.9𝜇𝐴
VBE 688.564mV VBE 653.829mV
IC 2.61mA IC 2.64mA
VCE 8.524V VCE 8.438V
𝜷 162.112 𝜷 165.587

COMMON BASE COMMON BASE

CONFIGURATION CONFIGURATION
IB 40.4 𝜇𝐴 IB 39.9𝜇𝐴
VBE 716.036mV VBE 679.62mV
IC 6.45mA IC 6.47mA
VCE 804.88mV VCE 767.34mV
𝜷 159.653 𝜷 162.155
GENERAL PURPOSE TRANSISTOR HIGHER BETA TRANSISTOR

FIXED BIAS FIXED BIAS

𝐼𝑐 2.30𝑚𝐴 𝐼𝑐 2.04𝑚𝐴
𝛽= 𝐼𝐵 = = 160. 839 𝛽= 𝐼𝐵 = = 141.667
14.3𝜇𝐴 14.4𝜇𝐴

EMITTER BIAS EMITTER BIAS

𝐼𝑐 1.64𝑚𝐴 𝐼𝑐 1.47𝑚𝐴
𝛽= 𝐼𝐵 = = 150.271 𝛽= 𝐼𝐵 = = 132.43
10.7𝜇𝐴 11.1𝜇𝐴

VOLTAGE DIVIDER BIAS VOLTAGE DIVIDER BIAS

𝐼𝑐 2.61𝑚𝐴 𝐼𝑐 2.964𝑚𝐴
𝛽= 𝐼𝐵 = = 162.112 𝛽= 𝐼𝐵 = = 165.587
16.1𝜇𝐴 17.9𝜇𝐴

SELF BIAS COMMON SELF BIAS COMMON

BASE BASE
𝐼𝑐 6.45𝑚𝐴 𝐼𝑐 6.47𝑚𝐴
𝛽= 𝐼𝐵 = = 159.653 𝛽= 𝐼𝐵 = = 162.155
40.4𝜇𝐴 39.9𝜇𝐴
% DIFFERENCE

FIXED BIAS (% DIFFERERENCE)

% ∆IB 0.699%
% ∆VBE 0.796%
% ∆ IC 11.30%
% ∆VCE 7.876%
%∆𝜷 0.818%

EMITTER BIAS (% DIFFERERENCE)

% ∆IB 3.74%
% ∆VBE 5.596%
% ∆ IC 10.37%
% ∆VCE 9.15%
%∆𝜷 11.92%

VOLTAGE DIVIDER BIAS (% DIFFERERENCE)

% ∆IB 11.18%
% ∆VBE 1.30%
% ∆ IC 13.563%
% ∆VCE 1.01%
%∆𝜷 2.14%

SELF BIAS COMMON BASE CONFIGURATION (% DIFFERERENCE)

% ∆IB 1.24%
% ∆VBE 5.09%
% ∆ IC 0.31%
% ∆VCE 4.66%
%∆𝜷 1.57%
COMPUTATION % DIFFERENCE

FIXED BIAS
|(14.4𝜇)−(14.3𝜇)|
% ∆IB = X 100% = 0.699%
14.3𝜇

|(646.766𝑚)−(685.077𝑚)|
% ∆vBE = X 100% = 0.796%
685.077𝑚

|(2.04𝑚)−(2.30𝑚)|
% ∆IC = X 100% = 11.30%
2.30𝑚

|(9.492)−(8.799)|
% ∆VCE = X 100% = 7.876%
8.799

|(141.667)−(160.839)|
% ∆𝜷 = X 100% = 11.92%
160.839

EMITTER BIAS
|(11.1𝜇)−(10.7𝜇)|
% ∆IB = X 100% = 3.738%
10.7𝜇

|(635.511𝑚)−(676.357𝑚)|
% ∆vBE = X 100% = 5.596%
676.357𝑚

|(1.64𝑚)−(1.47𝑚)|
% ∆IC = X 100% = 10.37%
1.47𝑚

|(8.493)−(7.781)|
% ∆VCE = X 100% = 9.15%
7.781

|(132.432)−(153.271)|
% ∆𝜷 = X 100% = 13.596%
153.271

VOLTAGE DIVIDER BIAS

|(17.9𝜇)−(16.1𝜇)|
% ∆IB = X 100% = 11.18%
16.1𝜇

|(653.829𝑚)−(688.564𝑚)|
% ∆vBE = X 100% = 1.299%
688.564𝑚

|(2.64𝑚)−(2.61𝑚)|
% ∆IC = X 100% = 13.563%
2.61𝑚

|(8.438)−(8.524)|
% ∆VCE = X 100% = 1.01%
8.524

|(165.587)−(162.112)|
% ∆𝜷 = X 100% = 2.14%
162.112

SELF BIAS COMMON BASE CONFIGURATION

|(39.9𝜇)−(40.4𝜇)|
% ∆IB = X 100% = 1.24%
40.4𝜇

|(679.621𝑚)−(716.036𝑚)|
% ∆vBE = X 100% = 5.09%
716.036𝑚

|(6.47𝑚)−(6.45𝑚)|
% ∆IC = X 100% = 0.31%
6.45𝑚
 |(767.335𝑚)−(804.88𝑚)|
% ∆VCE = X 100% = 4.66%
804.88𝑚

|(162.1553)−(159.653)|
% ∆𝜷 = X 100% = 1.57%
159.653

PROBLEM
 WHICH BIAS CIRCUIT IS THE MOST STABLE?

Through our experiment, our group found out that the most stable bias circuit is the self-
bias common base configuration. This conclusion is based on the result we have gathered since
that the common base circuit has the lowest percentage difference among the rest of the circuit in
terms of output current and output voltage.

CONCLUSION
We therefore conclude that a transistors steady state of operation depends on its base
current, collector voltage, and collector current and therefore, if a transistor is to operate as a
linear amplifier, it must be properly biased to have a suitable operating point.
Also, we conclude that the goal of transistor bias is to establish a known Q-point for the
transistor to work efficiently and produce an undistorted output signal. This biasing includes
fixed, self, voltage divider bias. Having a correct biasing of the transistor will certainly give the
stability of the circuit itself.
 FET Output and Transfer Characteristics
OBJECTIVES
1. To plot the output characteristics of a FET circuit.
2. To plot the transfer characteristics of a FET circuit.
MATERIALS
DC Supply FET transistors
Potentiometers Resistors
PROCEDURE
1. Construct the circuit shown in Figure 3.
2. Vary R1 so that VGS = 0 V.
3. Measure and record ID at every 0.25 V of VDS, stops measuring once ID becomes
almost constant. This ID is the maximum drain-to-source saturation current, IDSS.
4. Record the values at which ID becomes constant, these are saturation currents for an
input voltage VGS.
5. Repeat steps 2-4 with a decrement in VGS. Stop when ID is almost zero (uA range).
Record VGS, this is now the estimated pinch-off voltage.
6. Plot the saturation currents with respect to VGS.
7. Using Shockley’s equation, plot the transfer relations and compare the plot with the
plot from step 6.
8. Repeat the process for a D-MOSFET. Vary VGS from 0 to 2V at an increment of 0.5
V.
9. Repeat the process for an E-MOSFET, start with VGS = 0V incremented at 0.5 V.
Record the voltage at which the current starts flowing. This is the threshold voltage.
Stop at VGS = 8V. Note: k can be determined by using any point in the transfer curve.

FIGURE 3
DISCUSSION
For this experiment, it is required to do DMM measurements with varying increments and
varying the transistor used as well. The group took the circuits one by one and virtually plotted the
needed graphs referring to the relation of saturation currents and the data gathered using
Shockley’s equation.
DATA AND RESULT

VDS ID (uA)
.404 651.922
.824 762.146
1.30 763.092
1.79 764.069
2.29 765.077
2.81 766.117
3.35 767.188
3.90 768.29
4.47 769.424
5.05 770.589
5.65 771.786
6.26 773.015
6.89 774.276
7.54 775.57
8.20 776.896
8.88 778.254
9.58 779.646
10.3 781.07
11 782.527
11.8 784.018

VGS(V) ID (uA)
- 0.446 77.702
- 0.891 0
 Draft of the plot was initiated at first until the plot above was virtually created. The plot
above shows the parameters and values in relation with the gathered data and from the
computations using Shockey’s equation.
BY SHOCKLEY’S EQUATION:
VGS (V) ID (uA)
0 784.018
0.3Vp = -0.2673 0.5Idss = 392.009
0.5Vp = 0.446 0.25Idss = 196.0045
Vp = -0.891 0

By the principles of Shockley’s

equation, the plot shows 2 Q-points that
is related to the output characteristic
curve. For comparison, it shows that the
transfer characteristic curve focused more
on from the ‘off’ state of the transistor up
until the maximum IDSS. On the other
hand, the plot of the output characteristic
portrayed the saturation currents with
varying Vgs. It can be observed that the
current values became independent of
Vds and Id once it etners the saturation
mode.

Using D-MOSFET
(2N7000)
@ VGS = 0
VDS ID (pA)
1.25uV 0
0.625 0
1.25 11.4
1.87 17
2.50 22.7
3.12 28.3
3.75 33.9
4.37 39.6
5 44.7
5.55 49.1
6.25 53.4
6.87 57.8
7.50 62.2
8.12 66.5
8.75 70.9
9.37 75.3
10 79.7
10.5 84
11.2 88.4
12 92.8
12.5 96.3
 VGS(V) ID
- 0.46 76.9 pA
- 0.9 76.7 pA

BY SHOCKLEY’S EQUATION:
VGS (V) ID (pA)
0 76.7
0.3Vp = -0.27 0.5Idss = 38.35
0.5Vp = -0.45 0.25Idss = 19.175
Vp = -0.9 0

@ VGS = 0.5 V
VDS ID (pA)
0.625 5.16
1.25 V 10.2
1.87 15.2
2.5 20.2
3.12 25.2
3.75 30.2
4.37 28
5 32.1
5.62 35.8
6.25 39.5
6.87 43.2
7.50 46.9
8.12 50.6
8.75 54.3
9.37 65
10 61.8
10.6 65.5
11.2 69.3
11.9 73
12.5 77.1

VGS(V) ID
- 0.46 77.1 pA
- 0.9 76.8 pA
 BY SHOCKEY’S EQUATION:
VGS (V) ID (pA)
0 76.8
0.3Vp = -0.27 0.5Idss = 38.4
0.5Vp = -0.46 0.25Idss = 19.2
Vp = -0.9 0

@ VGS = 1 V
VDS ID (pA)
1.25 uV 0
0.625 5.16
1.25 10.2
1.87 15.2
2.50 20.2
3.12 25.2
3.75 30.2
4.37 34.1
5 31.6
5.62 41.6
6.25 45.4
6.87 49.1
7.50 52.9
8.12 50.4
8.75 60.4
9.37 64.1
10 67.9
10.6 71.6
11.2 75.4
11.9 79.1
12.6 82.9

VGS(V) ID
- 0.5 82.9 pA
- 1.34 82 pA
 BY SHOCKEY’S EQUATION:
VGS (V) ID (pA)
0 82
0.3Vp = -0.402 0.5Idss = 41
0.5Vp = -0.67 0.25Idss = 20.5
Vp = -1.34 0

@VGS = 1.5
VDS ID (pA)
0.625 5.16
1.25 V 10.2
1.87 15.2
2.5 20.2
3.12 25.2
3.75 24
4.37 27.7
5 31.5
5.62 35.2
6.25 39
6.87 42.8
7.50 46.6
8.12 50.3
8.75 54
9.37 57.7
10 61.6
10.6 65.3
11.2 69.1
11.9 72.8
12.5 76.6

VGS(V) ID
- 1.78 81.1 pA
-2.23 80.3 pA
 BY SHOCKEY’S EQUATION:
VGS (V) ID (pA)
0 80.3
0.3Vp = -0.669 0.5Idss = 40.15
0.5Vp = -1.115 0.25Idss = 20.075
Vp = -2.23 0

@ VGS = 2 V
VDS ID (pA)
0.625 5.16
1.25 V 10.2
1.87 15.2
2.5 20.2
3.12 19.8
3.75 23.6
4.37 27.4
5 31.2
5.62 34.9
6.25 38.7
6.87 42.5
7.50 46.3
8.12 50
8.75 53.8
9.37 57.5
10 61.3
10.6 65
11.2 68.8
11.9 72.5
12.5 76.4

VGS(V) ID(pA)
2.67 76.1
3.12 76
 BY SHOCKEY’S EQUATION:
VGS (V) ID (pA)
0 76
0.3Vp = 0.936 0.5Idss = 38
0.5Vp = 1.56 0.25Idss = 19
Vp = 3.12 0

Using E-MOSFET
BSV81
VGS VDS
0 12.5
1 10
2 9.37
3 8.75
4 8.12
5 5.62
6 5
7 3.75
8 2.50

By the gathered data for using an EMOSFET, very little amount of current was observed
through measurements. As the VGS was increased, the flowing current approaches closer and closer
to zero.
 CONCLUSION
The Depletion-mode MOSFET, which is less common than the enhancement mode types
is normally switched “ON” (conducting) without the application of a gate bias voltage. That is the
channel conducts when VGS = 0 making it a “normally-closed” device. The circuit symbol shown
above for a depletion MOS transistor uses a solid channel line to signify a normally closed
conductive channel. For the n-channel depletion MOS transistor, a negative gate-source voltage, -
VGS will deplete the conductive channel of its free electrons switching the transistor “OFF”.
Likewise, for a p-channel depletion MOS transistor a positive gate-source voltage, +VGS will
deplete the channel of its free holes turning it “OFF”.
In other words, for an n-channel depletion mode MOSFET: +VGS means more electrons
and more current. While a -VGS means less electrons and less current. The opposite is also true for
the p-channel types. Then the depletion mode MOSFET is equivalent to a “normally-closed”
switch.
For the JFET, The transfer characteristic can be determined experimentally, keeping drain-
source voltage, VDS constant and determining drain current, ID for various values of gate-source
voltage, VGS.. Comparing with other transistor used, JFET has low voltage gains because of small
transconductance.