An Optimized Dual Inverter Configuration for
Open end Winding Induction Motor Drive with
Common Mode Voltage Elimination
Rohit Chandan, Arpan Hota, Sachin Jain
Department of Electrical Engineering
NIT Warangal
Warangal, India
Abstract— Variable speed drives system are known to bear
Common Mode Voltage which causes shaft voltage, bearing
currents and EMI problems. In this paper a new topology to
realize multilevel operation for a 3-ϕ, dual inverter fed open
ended winding induction motor with Common Mode Voltage
(CMV) elimination is presented. The proposed dual-inverter
configuration makes it easy to facilitate all the space vector
combination which pertains to zero common mode voltage
required for five level operation. Zero sequence voltage is strictly
forced to zero by space vector strategy so this configuration does
not need a sample average zero sequence elimination(SAZE)
technique in space vector modulation. This novel MLI structure
is requires fewer switching power devices compared to the
conventional MLI for CMV elimination. Reduction in number of
power switches results in less number of driver circuits, reduced
installation spare and low cost. A comparison based on above
constraints are given to prove superiority of proposed
configuration. Simulation results are presented to validates the
performance of configuration.
Keywords— Optimized Dual Inverter Configuration, Common
Mode Voltage elimination; 3-ϕ Multilevel Inverter; Reduced
switching power device;
I. INTRODUCTION (HEADING 1)
Multilevel inverters (MLI) are very popular due to their
better power quality performance, reduced switching stress,
lower filter requirement etc. [1-5]. However, high frequency
voltage transitions in Common Mode Voltage (CMV) has
been a major issue in MLIs. Since the presence of CMV with
high frequency voltage transitions causes leakage current,
bearing current, winding insulation failure in electric drives
system [6-8]. This requirement has led to good research for the
solutions to eliminate or reduce the CMV.
Some of the good proposals based on nullifying the CMV
effect on sample average sense has been given with dual
inverter configuration. It eliminates the CMV in average sense
which may not solve the issues of EMI and leakage current
completely. Thus, a solution using dual inverter which
completely eliminates the CMV would be an elegant option.
978-1-4673-8888-7/16/$31.00 ©2016 IEEE
Vivek Agarwal
Department of Electrical Engineering
IIT Bombay
Mumbai, India
One such good proposal for the 5- level MLI is proposed by
Tekwani et.al. However, the number of the power
semiconductors used in this configuration is high. To address
this issue another five-level inverter is proposed for OEWIM
[10] with a reduced number of power semiconductors.
However, the number of the power switches is still high and
requires a further optimization to reduce the switches. This
manuscript proposes a new MLI configuration for OEWIM
with reduced number of power semiconductors with CMV
elimination. The proposed MLI operates at five-level with zero
CMV. This is achieved by using dual T-structure inverter
cascaded with two basic units of multilevel converter.
II. OPERATION OF THE PROPOSED MLI
Fig. 1 shows the configuration of the proposed 3-ϕ dual, 5-
level MLI for open ended winding induction motor (OEWIM)
with complete elimination of common mode voltage. In an
open ended winding induction motor, the neutral point of
induction motor is disconnected and open ends of phase
winding can be feed from dual inverter. Proposed dual inverter
configuration consists of 32 switches to incorporate the
multilevel operation in OEWIM drives. Configuration consists
of three set of blocks, block-1 block-2 and block-3. Block-1
comprises two basic units (BU), top and Bottom BU. Output
of BUs referred as bus -1, bus -2 and bus -3. The BU is
consists of two dc voltage sources with 1:2 voltage ratio and
four switches. Both BUs are identical and capable of
generating four voltage levels. Block-2 and block -3 represents
an identical T-Structure connected to each inverter’s
respective phases to give dual inverter operation. This dual T-
Structure facilitates the operation of phase voltage to achieve
inversion of level generated from blocks-1.
A. Operation of the BU
Each BU consists of two dc voltage sources and pairs of
power switches ((S1, S1') and (S2, S2')) operates in
complementary mode. The two dc voltage sources have the
magnitude of V and 2V as shown in Fig.1. Where V is equal to
one sixth of total DC bus voltage (V1+V2). Each basic unit TABLE II
DIFFERENT MODES OF OPERATION OF T-STRUCTURE
operates in four modes as given in Table I. Each mode
generates distinct four voltage level across the BU. Similar
modes can also be obtained from the bottom BU. Output Mo SA1 SA2 SA3 SA1’ SA2' SA3' Vaa’
de
voltage of the bottom BU is denoted as Vob which is measured
across the buses 2 and 1 as indicated in Fig.1.
1 on off off on off off
Block-I bus-1 Block-II Block-III
Top Basic unit

S1 SA1 SB1 SC1 SA1' SB1' SC1'

2V
2 on off off off on off
S1'
V1 AA’
S2
V S2' SA2 BB’ SA2' 3 on off off off off on
bus-2 bus-2
SB2 CC’
SB2'
S3
Bottom Basic unit

SC2' 4 off on off on off off

2V S3' V2 SC2 Op en End
Win ding
Induction SA3' SB3' SC3'
S4 SA3 SB3 SC3 Motor

V 5 off on off off on off

S4'
bus-3
Fig.1 Circuit schematic for the proposed 5-level MLI.
6 off on off off off on

Y-axis
7 off off on on off off

8 off off on off on off -

9 off off on off off on

The phase voltage of inverter given by Vaa’
X-axis

of freedom. First, it can facilitate seven level inversion by

utilizing switching state combination as shown in Table-II.
Second, it can produce all space vector combination which
pertains to zero common mode voltage. As shown in Fig.2,
FIG.2 Space vector combinations (x-y plot) of proposed configuration has ability to provide all space vector
proposed dual inverter fed MLI with zero CMV
required for five level inversion. Further, it can also
implement six and seven level inversion with missing space
vector as can be seen in Fig. 2.
TABLE I
DIFFERENT MODES OF OPERATION OF TOP BU III. SIMULATION RESULTS
Mode S1 S1’ S2 S2’ Vot
Performance analysis of dual T-structure MLI is carried out in
1 off on off on 0 MATLAB and SIMULINK platform for a 50 H.P., 460V, 3-
2 off on on off Phase open ended winding induction motor drive in open loop
3 on off off on 2 with V/F Control strategy. Sampling frequency for V/f
algorithm is taken as 96 samples per cycles of modulating
4 on off on off 3 reference waveform. DC voltages sources is taken as V, 2V in
The output voltage of the top BU is denoted by ‘Vot’. both top and bottom basic unit. Whereas total DC link is
required as 487.89V to give 230V rms. Simulation results are
B. Operation of the dual T-Structure MLI shown here for three different ma values (ma=1;0.7;0.3).
A dual T-structure MLI has total 3 dual T-structure, one Performance of Dual T structure MLI and OEWIM are shown
for each phase, as shown in block-2 and block-3 of Fig.1. A T- to prove the efficacy of proposed MLI topology.
structure consists of three power switches S1M (S1M’), S2M Fig. 3(a) and (b) shows the phase voltage waveform for dual
(S2M’) or S3M (S3M’), (M can be A, B or C), a phase ‘M’ can T-structure inverter, its FFT spectrum and THD content.
be connected to the buses 1, 2 or 3 respectively. Further, S2A Waveforms and results are taken at |Vsr|=1*Vdc and
(S2A’), S2B (S2B’), and S2C (S2C’), are four quadrant |Vsr|=0.7*Vdc. Result are showing five level in out phase
switches among these nine switches. These four quadrant voltages of dual inverter. FFT analysis shows that percentage
switches are realized with the anti-series connection of two of harmonic content in phase voltages, which is less than 0.2
MOSFETs. Other six switches are two quadrant switches, % at ma=1, and less than 0.3 % at ma=0.7. THD content is
realized using the MOSFETs. Thus, a dual T-structure 13.67% at the edge of linear modulation index show the
requires 24 switches which control its connections with the reduce filter requirement for MLI.
block-I as shown in Fig.1. A dual T-structure has a two degree

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 CMV and pole voltages waveform are shown in Fig 4 and

Vaa' (V) Vaa', Vbb', Vcc'

Fig 5 at ma=1 and ma=0.7 respectively. Fig. 4 (a) shows the 400
200 Vaa’
all three phase voltages waveform, Fig 4 (b) shows phase 0 Vbb’
Vcc’

voltages Vaa' and its pole voltages (Vao and Vao') waveform -200 (a)
-400 1 1.005 1.01 1.015 1.02 1.025 1.03 1.035 1.04
in Fig 4(c, d). Common mode voltage waveform is shown in
400
Fig 4(e). Common mode voltage is strictly zero in complete 200
Vaa’

operation which completely eliminates the triplen harmonics 0

-200 (b)
and zero sequence current from the system. -4001 1.005 1.01 1.015 1.02 1.025 1.03 1.035 1.04
400

Vao(V)
Vao
300
FFT window: 8 of 100 cycles of selected signal 200
300 100 (c)
200 Vaa’ 01 1.005 1.01 1.015 1.02 1.03 1.035 1.04
100 1.025
400

Vao'(V)
0
-100 300 Vao’
-200 200
-300
1.3
100 (d)
1.2 1.25 1.35
Time (s) 01 1.01 1.015 1.02 1.035 1.04
1.005 1.025 1.03
1

CMV (V)
Fundamental (50Hz) = 325.3 , THD= 13.67% 0.5 CMV
110 0
100 Fundamental (50Hz) = 325.3 , THD= 13.67% -0.5 (e)
90 0.3 -1 1 1.005 1.02 1.025 1.04
1.01 1.015 1.03 1.035
Mag (% of Fundamental)

80 0.25 Time(s)
0.2
70
0.15
Fig.4 (a) Phase voltages(Vaa';Vbb';Vcc') waveform, (b) Vaa' (c) pole voltages
60
50
0.1 Vao (d) Vao' (e) Common Mode Voltage waveform for ma=1.
0.05
40
0 0 2 4 6 8 10 12 14 16 18 20

Vaa' (V) Vaa', Vbb', Vcc'

30 Harmonic order
20
Vaa'
10 200 Vbb'
Vcc'
0 0 5 10 15 20 0
Harmonic order -200 (a)
Fig 4(a) 1.01 1.02 1.03 1.04 1.05 1.06 1.07
FFT window: 5 of 70 cycles of selected signal
200 Vaa’ Vaa'
150 200
100
50 0
0
-50 -200 (b)
-100 1.03 1.04 1.05
-150 1.01 1.02 1.06 1.07
-200 1.2 1.3
1.2 1.24 1.26 1.28 1.3 1.32 Vao
Vao(V)

2 Time (s) 4 200

100
Fundamental (35Hz) = 227.7 , THD= 21.30%
(c)
Fundamental (35Hz) = 227.7 , THD= 21.30% 0 1.01 1.02 1.03 1.04 1.05 1.06 1.07
100
3
Fundamental)

2.5 200 Vao'

Vao'(V)
Mag (% of

80 2
Fundamental)

1.5
100
Mag (% of

1
60 0.5 (d)
0 0 10 20 30 40 50 0 1.01 1.02 1.03 1.04 1.05 1.06 1.07
Harmonic order
1 CMV
CMV (V)

40
0
20
(e)
-11.01 1.02 1.03 1.04 1.05 1.06 1.07
0 0 10 20 30 40
Harmonic order
50 Time(s)
Fig 4(b) Fig.5 (a) Phase voltages(Vaa';Vbb';Vcc') waveform, (b) Vaa' (c) pole voltages
Fig. 3 Phase voltage waveform and FFT result for (a) ma=1 and (b) ma=0.7 Vao (d) Vao' (e) Common Mode Voltage waveform for ma=0.7

Inverter structure is significantly improve the performance. ma=0.7. And the torque ripples are observed as 0.91N-m and
Fig. 7 shows the torque and current waveform for the open 1.13N-m at ma=1 and ma=0.7 respectively. Which is quite low
ended winding induction motor. The waveform shows the and indicates the better performance in high modulation range
reduce THD content in current and its effect on torque ripples from ma=0.7 to ma=1. Further, the operation of motor is
of motor. The current THD are 4.28% and 4.74% at ma=1, and carried without consideration of filter at the inverter output.

978-1-4673-8888-7/16/$31.00 ©2016 IEEE

 Vaa'
Vaa' (V)
100
0 (e) TABLE III
-100 COMPARISON OF DIFFERENT DUAL INVERTER FED FIVE LEVEL MLI WITH CMV
1 1.05 1.1 1.15 ELIMINATION
Ias
Ia, Ib, Ic

5 Ibs
Topology No. of No. of No. of No. of switches
(Amps)

Ics
0
-5 Controlled Diodes sources conducting
(d)
switches (maximum)
51
1.05 1.1 1.15
[9] 48 12 2 18
Te (N-m)

Te

0 [10] 36 12 4 18
(c) proposed 32 0 4 12
-5 1 1.05 1.1 1.15
452
speed
Speed

450
(rpm)

448 (b)
V. CONCLUSION
1
1 1.05 1.1 1.15
The proposed MLI topology is optimized with respect to the
CMV
elimination of common mode voltage and the number of
CMV
(V)

0
-1 (a) devices required to facilitate the multilevel operation for dual-
0 0.4 0.8 1.2 1.6 2 inverter. Since, the zero sequence voltage is strictly forced to
Time(s)
Fig.6 (a) Phase voltages(Vaa';Vbb';Vcc') waveform, (b) Vaa' (c) pole voltages
zero which is makes this power circuit configuration suitable
Vao (d) Vao' (e) Common Mode Voltage waveform for ma=1.0. for eliminating EMI and leakage currents issues in PV and
Motor drives applications. This results in the better
5
performance of the system. Further, the number of device
Te(N-m)

0
-5
count in the proposed configuration is less compare to other
(d)
existing topology. This results in reduction of overall cost of
1 1.02 1.04 1.06
the system. The above mentioned points indicate that the
4
proposed MLI configuration is expected to be a good solution
Iabcs(A)

0 THD= 4.28% for drives and grid-tie PV applications.

-4 (c)
1 1.02 1.04 1.06 APPENDIX
5 Open ended induction motor parameters used in MATLAB
Te(N-m)

0
simulation are as follows:
-5 (b) Power rating -50HP,Voltage rating- 230V. Rs = 1.115; Rrp =
1.6 1.62 1.64 1.66 1.68 1.083; Lls = 5.974e-3; Llrp = 5.974e-3; Lm = 203.7e-3; J =
5 0.02; B = 0; P = 4.
Iabcs(A)

0 THD= 4.74%
-5
1.6 1.62 1.64
Time(s)
Fig.7 Torque and Current waveform at (a & b) ma=1; (c & d) ma=0.7
IV. COMPARISON WITH EXISTING TOPOLOGIES
The proposed MLI topology can completely eliminate the
CMV with reduced number of power switches in application
to OEWIM. To prove the advantages of the proposed MLI, it
is compared with the existing five level MLI topologies. The
comparison is done with respect to number of switches
number of sources and number of switches conducting for
CMV elimination with five-level operation. The comparison
results are shown in Table-III.
It can be observed that the proposed topology uses
minimum number of controlled switches among all. This will
result in minimized weight, space and cost of the system with
reduced driver circuit requirement. Further, the proposed MLI
does not use any diode. This again reduces cost, volume and
weight of the system. Moreover, number of switches
conducting is less than the existing topologies resulting in
reduced loss. This will improve the efficiency of the system.
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