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IPC-9252A

Requirements for
Electrical Testing of
Unpopulated
Printed Boards
November 2008
Supersedes IPC-9252
February 2001

A standard developed by IPC

Association Connecting Electronics Industries

®
The Principles of In May 1995 the IPC’s Technical Activities Executive Committee (TAEC) adopted Principles of
Standardization Standardization as a guiding principle of IPC’s standardization efforts.
Standards Should: Standards Should Not:
• Show relationship to Design for Manufacturability • Inhibit innovation
(DFM) and Design for the Environment (DFE) • Increase time-to-market
• Minimize time to market • Keep people out
• Contain simple (simplified) language • Increase cycle time
• Just include spec information • Tell you how to make something
• Focus on end product performance • Contain anything that cannot
• Include a feedback system on use and be defended with data
problems for future improvement

Notice IPC Standards and Publications are designed to serve the public interest through eliminating mis-
understandings between manufacturers and purchasers, facilitating interchangeability and improve-
ment of products, and assisting the purchaser in selecting and obtaining with minimum delay the
proper product for his particular need. Existence of such Standards and Publications shall not in
any respect preclude any member or nonmember of IPC from manufacturing or selling products
not conforming to such Standards and Publication, nor shall the existence of such Standards and
Publications preclude their voluntary use by those other than IPC members, whether the standard
is to be used either domestically or internationally.
Recommended Standards and Publications are adopted by IPC without regard to whether their adop-
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the Recommended Standard or Publication. Users are also wholly responsible for protecting them-
selves against all claims of liabilities for patent infringement.

IPC Position It is the position of IPC’s Technical Activities Executive Committee that the use and implementation
Statement on of IPC publications is voluntary and is part of a relationship entered into by customer and supplier.
Specification When an IPC publication is updated and a new revision is published, it is the opinion of the TAEC
Revision Change that the use of the new revision as part of an existing relationship is not automatic unless required
by the contract. The TAEC recommends the use of the latest revision. Adopted October 6, 1998

Why is there Your purchase of this document contributes to the ongoing development of new and updated indus-
a charge for try standards and publications. Standards allow manufacturers, customers, and suppliers to under-
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©Copyright 2008. IPC, Bannockburn, Illinois, USA. All rights reserved under both international and Pan-American copyright conventions. Any
copying, scanning or other reproduction of these materials without the prior written consent of the copyright holder is strictly prohibited and
constitutes infringement under the Copyright Law of the United States.
IPC-9252A
®

Requirements for
Electrical Testing
of Unpopulated
Printed Boards

Developed by the Electrical Continuity Testing Task Group (7-32c)


of the Product Assurance Committee (7-30) of IPC

Supersedes: Users of this publication are encouraged to participate in the


IPC-9252 - February 2001 development of future revisions.
IPC-ET-652A - October 1990
Contact:

IPC
3000 Lakeside Drive, Suite 309S
Bannockburn, Illinois
60015-1249
Tel 847 615.7100
Fax 847 615.7105
This Page Intentionally Left Blank
November 2008 IPC-9252A

Acknowledgment
Any publication involving a complex technology draws material from a vast number of sources. While the principal mem-
bers of the Electrical Continuity Testing Task Group (7-32c) of the Product Assurance Committee (7-30) are shown below,
it is not possible to include all of those who assisted in the evolution of this standard. To each of them, the members of the
IPC extend their gratitude.

Product Assurance Electrical Continuity Technical Liaisons of the


Committee Testing Task Group IPC Board of Directors
Chair Chair
Mel Parrish Michael E. Hill Peter Bigelow
STI Electronics Colonial Circuits Inc. IMI Inc.
Vice-Chair Sammy Yi
Michael E. Hill Flextronics International
Colonial Circuits Inc.

Electrical Continuity Testing Task Group

Wendi Boger, DDi Corp. Michael Green, Lockheed Martin Roger Miedico, Raytheon Company
Thomas Bresnan, R & D Circuits Space Systems Company Michael Paddack, Boeing Company
Jeffrey Ciesla, Defense Supply Center Philip Henault, Raytheon Company Viktor Romanov, ATG Test Systems
Columbus Rick Kaim, USA Microcraft GmbH
Craig Coffman, Everett Charles Christopher Katzko, Shanghai Lowell Sherman, Defense Supply
Technologies-ECT Meadville Electronics Co. Ltd Center Columbus
David Corbett, Defense Supply Klaus Koziol, Mania Technologie Adelino Sousa, MicroCraft, Inc.
Center Columbus (USA) Inc. Gordon Sullivan, Huntsman
C. Don Dupriest, Lockheed Martin Clifford Maddox, Boeing Company Advanced Technology Center
Missiles and Fire Control Kenneth Manning, Raytheon David Wilkie, Everett Charles
Alan Exley, Raytheon Company Company Technologies
Guy Ferraro, Beamind Matt McQueen, Naval Surface
Warface Center Crane

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IPC-9252A November 2008

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November 2008 IPC-9252A

Table of Contents
1 SCOPE ......................................................................... 1 4.1.2 Indirect Continuity Testing by Signature
1.1 Purpose .................................................................... 1 Comparison.............................................................. 6
1.2 Introduction.............................................................. 1 4.2 Isolation Testing ...................................................... 6
1.3 Selection of the Proper Test Level ......................... 1 4.2.1 Resistive Isolation Testing ...................................... 6
4.2.2 Indirect Isolation Testing by
2 APPLICABLE DOCUMENTS ...................................... 2 Signature Comparison ............................................. 6
2.1 IPC .......................................................................... 2 4.3 Test Parameter Matrix ............................................. 6
2.2 International Organization for Standardization 4.4 Tests Other than Continuity and Isolation.............. 6
(ISO) ....................................................................... 2
4.5 Verification (Retesting)............................................ 6
2.3 American National Standards Institute (ANSI) .... 2
5 TEST PROGRAM GENERATION .............................. 6
3 TERMS AND DEFINITIONS ........................................ 2
5.1 Source Data ............................................................ 7
3.1 AABUS (As Agreed Between User
and Supplier) ........................................................... 2 5.1.1 CAM Data Test........................................................ 7
3.2 Adjacency Terms .................................................... 2 5.1.2 CAD Data Test ........................................................ 7
3.2.1 Adjacency ................................................................ 2 6 ELECTRICAL TEST CERTIFICATION AND
TRACEABILITY .......................................................... 7
3.2.2 Adjacency Distance ................................................. 2
3.2.3 Horizontal Adjacency Distance............................... 3 6.1 Certificate of Conformance (C of C)...................... 7
3.2.4 Vertical Layer Adjacency ........................................ 3 6.1.1 Example of a Test Certificate of
Conformance (C of C) ............................................ 7
3.3 Analyzer................................................................... 4
6.2 Marking and Traceability ........................................ 7
3.4 Computer Automated Design/Manufacturing
(CAD/CAM) Net List ............................................. 4 APPENDIX A Other Tests and Considerations .......... 8
3.5 Contamination.......................................................... 4
3.6 End Points/Midpoints .............................................. 4
Figures
3.7 Moving (Flying) Probe............................................ 4
Figure 1-1 Automatic Test Equipment (ATE) Selection
3.8 Guide Plate Fixture ................................................. 5 Criteria ............................................................... 1
3.9 Impedance Testing................................................... 5 Figure 3-1 Adjacency .......................................................... 2
3.10 Indirect Test by Signature Comparison .................. 5 Figure 3-2 Adjacency Distance Example ............................ 2
3.11 Isolation Resistance ................................................. 5 Figure 3-3 Horizontal Layer Adjacency ............................... 3
3.12 Leakage.................................................................... 5 Figure 3-4 Line of Sight Adjacency ..................................... 3
3.13 Plated Hole .............................................................. 5 Figure 3-5 Vertical Layer Adjacency ................................... 4
3.14 Populated Board ...................................................... 5 Figure 3-6 Test for Midpoint Classification.......................... 4
3.15 Resistance Measuring Method ................................ 5 Figure 4-1 Resistive Continuity Test.................................... 5

3.16 Time Domain Reflectometer (TDR) ....................... 5 Figure 4-2 Resistive Continuity Test.................................... 6

4 TEST METHODOLOGIES .......................................... 5


4.1 Continuity Test ........................................................ 5 Tables
4.1.1 Resistive Continuity Testing ................................... 5 Table 4-1 Requirements by Test Level................................. 5

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IPC-9252A November 2008

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November 2008 IPC-9252A

Requirements for Electrical Testing


of Unpopulated Printed Boards

1 SCOPE order to achieve this purpose. In selecting the appropriate


This document is intended to assist in selecting the test test level, technology, equipment, and associated fixturing,
analyzer, test parameters, test data, and fixturing required a suitable compromise between productivity, features, and
to perform electrical test(s) on all unpopulated printed costs can be found.
boards (PBs). The costs associated with electrical testing can vary dra-
The testing of PBs with embedded components (e.g., resis- matically. Costs alone, however, should never be the only
tors, capacitors, etc.) is not addressed in this document criteria for selecting the appropriate test level and equip-
revision. ment. As shown in Figure 1-1, many other important areas
require consideration. For example, spacing and density of
1.1 Purpose Electrical testing verifies that the conduc- a PB design may be of paramount importance to one user,
tive networks on the PBs are interconnected according to while another may be concerned with testing parameters
the design requirements. and service reliability. A careful examination of all areas of
concern and how they may affect each other, not just how
Electrical test does not ensure that the PB can be
they perform individually, is therefore significant. What-
assembled or that the PB meets all of the customer’s
ever the selection criteria may be, qualifying ‘‘bench-
requirements. Many physical characteristics of the conduc-
marks’’ should be performed on known product.
tors (dimensional accuracy, solder mask, conductor geom-
etry and nomenclature registration, presence of holes, etc.) 1.3 Selection of the Proper Test Level All testing levels
can’t be determined by electrical test. Other checks should (see Table 4-1) defined in this document are intended to
be employed to confirm these characteristics. check electrical functionality of the design. However, the
test level specified will affect test comprehensiveness. For
1.2 Introduction Electrical testing of PBs ensures that example, when selecting test voltages and resistances for
the PB conforms to the electrical design requirements. This the PB, the user must take into account both the final appli-
document defines different levels of testing available in- cation of the PB and the level of defect analysis needed to

COST
DIAGNOSTICS MAINTENANCE

SUPPORT PRODUCT
SERVICES THROUGHPUT

FIXTURING
ATE PROGRAMMING
PURCHASING
CONTINGENCIES

DENSITY DOCUMENTATION
CAPABILITIES

FAULT FUTURE
LOCALIZATION APPLICATIONS
ELECTRICAL
PARAMETERS
IPC-9252a-1-1

Figure 1-1 Automatic Test Equipment (ATE) Selection Criteria

1
IPC-9252A November 2008

ensure acceptable product. Electrical testing parameters on the drawing. Agreements can be used to define test
that allow high productivity could also allow higher defect methods, conditions, frequencies, categories or acceptance
escape rates. criteria within a test, if not already established.
It is the responsibility of the user to select the test level 3.2 Adjacency Terms
desired. If nothing is specified, IPC Class 1, Class 2, and
Class 3 will be tested to Level A, B, and C respectively. 3.2.1 Adjacency An optional process to identify nets for
The user shall determine the test parameters to test for isolation testing based on distance, which will reduce test
continuity (open), isolation (leakage/short), and other spe- time (see Figure 3-1).
cial characteristics (i.e., impedance, hi-pot, capacitance,
current carrying capacity, etc.) that will satisfactorily evalu-
ate the critical electrical characteristics of specific PBs.

2 APPLICABLE DOCUMENTS
The following documents, of the issue currently in effect,
are applicable to the extent specified herein.

2.1 IPC1

IPC-T-50 Terms and Definitions for Interconnecting and IPC-9252a-3-1


Packaging Electronic Circuits
Figure 3-1 Adjacency
IPC-D-356 Bare Board Electrical Test Information in Digi-
tal Form 3.2.2 Adjacency Distance The distance between two
nets used to determine which nets are tested for isolation
IPC-TM-650 Test Methods Manual2 (see Figure 3-2). If vertical layer adjacency is required, it
2.5.5.7 Characteristic Impedance and Time Delay of shall be defined and may be different than horizontal adja-
Lines on Printed boards by TDR cency distance. Adjacency distance is measured between
features, edge to edge.
2.5.7 Dielectric Withstanding Voltage, PWB

IPC-2221 Generic Standard on Printed Board Design


1 1
IPC-6011 Generic Performance Specification for Printed
Boards

2.2 International Organization for Standardization (ISO)3

ISO 10012 Measurement Management Systems - Require-


ments for Measurement Processes and Measuring Equip-
ment

2.3 American National Standards Institute (ANSI)4

ANSI/NCSL Z540.3 Requirements for the Calibration of


Measuring and Test Equipment

3 TERMS AND DEFINITIONS


The definitions of terms used herein shall be in accordance
with IPC-T-50 and in 3.1 through 3.16.
A B C D E
3.1 AABUS (As Agreed Between User and Supplier) IPC-9252a-3-2

Indicates additional or alternate requirements to be decided Figure 3-2 Adjacency Distance Example
between the user and the supplier in the procurement docu- 1. 1.27 mm [0.050 in]
mentation. Examples include contractual requirements, 2. Where horizontal adjacency distance is shown as 1.27
modifications to purchase documentation and information mm [0.050 in], C is tested to B, D, and E, but not to A

1. www.ipc.org
2. Current and revised IPC Test Methods are available on the IPC Web site (www.ipc.org/html/testmethods.htm)
3. www.iso.org
4. www.ansi.org

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November 2008 IPC-9252A

3.2.3 Horizontal Adjacency Distance The distance


between two nets on any single layer used to determine 1 1
which nets are tested for isolation (see Figure 3-3.) Also
referred to as Planar 2D Adjacency (Adjacency applied to
a two dimensional surface).

3.2.3.1 Line of Sight Adjacency A subset of all nets


within the horizontal adjacency distance on any single
layer that are identified for isolation testing. This method
tests nets that lie within the line of sight of each other. That
is, there are no other nets lying between them. The nets
must also lie within the horizontal adjacency distance of
each other. In Figure 3-4, adjacency is being shown for the
black line’s net (C). The Crosshatch traces (B and D) are
found to be adjacent because they lie completely or par-
tially within the line of sight of the black line (C). The
solid gray-shaded traces (A & E) are not found to be adja-
cent because another net blocks the line of sight.

3.2.4 Vertical Layer Adjacency Identified nets from the


layers above and below the specified net to be included in A B C D E
the isolation test. Each net from one layer above and one IPC-9252a-3-4

layer below is considered as if it was on the same layer as Figure 3-4 Line of Sight Adjacency
the specified net and is included in the vertical layer adja- 1. 1.27 mm [0.050 in]
cency list if it lies within the vertical layer adjacency dis- 2. Where line of sight adjacency distance is shown as
tance. This distance can be different than the horizontal 1.27 mm [0.050 in], C is tested to B and D, but not to A
layer adjacency distance (see Figure 3-5 which illustrates or E.
3. A short from C to E should also be reported as a C to
the vertical layer adjacency rule). Also referred to as Layer
D and a D to E short.
to Layer, Z-axis, or 3-D Adjacency.

A-L2
B-L2
2
1

C-L3
D-L3
E-L3

F-L3

G-L3

IPC-9252a-3-3

Figure 3-3 Horizontal Layer Adjacency


1. Segmented Ground/Layer 2 D-L3 is tested to C-L3, E-L3, and F-L3
2. Adjacency Limit is from Edge of D-L3 D-L3 is not tested to G-L3, A-L2, B-L2, or to segmented ground/L2
Conductor B-L2 is tested against A-L2, G-L3, and to segmented ground/L2
3. Adjacency Rules: B-L2 is not tested against C-L3, D-L3, E-L3, or F-L3

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IPC-9252A November 2008

B-L2 I-L4 J-L4


1
A-L2

H-L4

F-L3

G-L3/L4
D-L2/L3
E-L2/L3
IPC-9252a-3-3

Figure 3-5 Vertical Layer Adjacency


1. Grounded plane: C-L2
2. Dotted area denotes vertical layer adjacency area for net F on layer L3
3. Nets to be included in the vertical layer adjacency list for net F: B-L2, C-L2, D-L2/L3, G-L3/L4, H-L4, I-L4

3.3 Analyzer An instrument designed to examine the could cause an electrical test to fail because of high resis-
functions of circuits, components, or test points and their tance.
relationships with each other.
3.6 End Points/Midpoints A midpoint is a node (e.g.,
3.4 Computer Automated Design/Manufacturing (CAD/ SMT pads, component holes, or vias) that is positioned
CAM) Net List A net list derived from the design layout within the network in such a way that its removal has the
system and traceable to the schematic. effect of creating two or more separate networks from the
original network. If a node is not a midpoint, it is classified
3.5 Contamination Foreign metallic and nonmetallic as an endpoint (see Figure 3-6).
materials between circuits, traces, and lands, which may
cause shorts/leakage between the conductors. Alternatively, 3.7 Moving (Flying) Probe Fixtureless robotic ATE test
it may be resistive foreign material on conductors that system utilizing dynamic probes.

Two separate networks: One networks:


midpoint endpoint IPC-9252a-3-6

Figure 3-6 Test for Midpoint Classification

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November 2008 IPC-9252A

3.8 Guide Plate Fixture A translator fixture of three or 3.14 Populated Board A PB with components installed
more plates designed with computer-calculated offsets. The on it (may also be known as a printed wiring assembly
intermediate plates guide the test probes into preselected (PWA) or circuit card assembly (CCA)).
grid locations.
3.15 Resistance Measuring Method A method of test-
3.9 Impedance Testing An electrical test that measures ing continuity where the circuit resistance is directly mea-
the high frequency response characteristic of the PB cir- sured by imposing AC or DC current and measuring the
cuitry. resulting voltage, or by imposing an AC or DC voltage and
measuring the resulting current.
3.10 Indirect Test by Signature Comparison The verifi-
3.16 Time Domain Reflectometer (TDR) An instrument
cation of continuity and isolation by measuring and record-
used to measure the characteristic impedance of a circuit.
ing electrical properties (e.g., capacitance, RF, impedance,
etc.) of a board under test and comparing them to a mea- 4 TEST METHODOLOGIES
sured or calculated reference value which is capable of dis-
tinguishing between manufacturing and design faults. 4.1 Continuity Test Electrical connections of identified
points in a given network shall be verified by 4.1.1 or
3.11 Isolation Resistance The electrical resistance 4.1.2. A continuity test (per Table 4-1) ensures that each
between the PB’s nonconnected traces and/or lands. test point in a network is electrically connected to all other
test points within the network. Faults detected are defined
3.12 Leakage Undesired current flow over or through an as opens.
insulator. It is a condition where current flows between two
isolated conductors. This is caused by a dielectric resis- 4.1.1 Resistive Continuity Testing This type of continu-
tance that is greater than the maximum continuity resis- ity test measures the resistance between all end points in all
tance but less than the minimum isolation resistance. networks. Mid points shall be tested for Level C. If the
resistance is lower than the specified threshold, the network
3.13 Plated Hole For purposes of electrical testing, a under test passes. If resistance is higher than the specified
plated hole must be classified as either an end point or a threshold, the network under test fails and an open is
midpoint. reported (see Figure 4-1). The test current applied during
Table 4-1 Requirements by Test Level
TEST LEVEL A B C
Performance Class 1 2 3
Source Data CAM, CAD CAM, CAD CAD1
TEST METHODS
Resistive Continuity Testing ≤100Ω ≤50Ω ≤10Ω4
Resistive Isolation Testing ≥500kΩ ≥2MΩ ≥10MΩ
Indirect Isolation & Continuity Testing by Signature Comparison Yes Yes AABUS
Adjacency (for isolation testing)2,3 Yes Yes AABUS
Note 1. See 5.1.2.
Note 2. Default minimum of 1.27 mm [0.050 in] or AABUS.
Note 3. Includes horizontal and/or line of sight adjacency; vertical adjacency is not required unless specified.
Note 4. For referee purposes, 0.5Ω maximum for each 25.0 mm [0.984 in] of circuit length shall apply.

Pass Fail (Open)

Maximum Measurement
continuity threshold
0 Ohms resistance

Network Resistance
IPC-9252a-4-1

Figure 4-1 Resistive Continuity Test

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IPC-9252A November 2008

resistive continuity shall not exceed that specified by the trical isolation by measuring and recording electrical prop-
applicable design standard for the smallest conductor in erties (such as capacitance, RF, impedance, etc.) of a PB
that circuit (see IPC-2221). under test and comparing them to a measured or calculated
reference value which is capable of distinguishing between
4.1.2 Indirect Continuity Testing by Signature Compari- manufacturing and design faults. Isolation faults may be
son This type of continuity testing indirectly verifies elec- verified by the resistive method per Table 4-1.
trical continuity by measuring and recording electrical
properties (e.g., capacitance, RF, impedance, etc.) of a 4.3 Test Parameter Matrix Table 4-1 defines the test
board under test and comparing them to a measured or cal- requirement by Test Level (see 1.3) and the Performance
culated reference value which is capable of distinguishing Class as defined in IPC-6011.
between manufacturing and design faults. Should a test
current be applied during indirect continuity testing, it 4.4 Tests Other than Continuity and Isolation Other
shall not exceed that specified by the applicable design parameter tests may be required by PB users to screen for
standard for the smallest conductor in that circuit (see IPC- conditions other than continuity and isolation faults (see
2221). Continuity faults may be verified by the resistive Appendix A). For example, capacitance testing is an elec-
method per Table 4-1. trical test method used to determine whether or not the
nominal area of a conductor or other connection matches
4.2 Isolation Testing Electrical isolation between identi- the design value.
fied networks shall be verified by 4.2.1 or 4.2.2. Faults As required by contract, additional testing may be specified
detected are defined as either shorts or leakages. Adjacency to identify electrical and/or mechanical defects not identi-
is an optional method that can be used to increase produc- fied by continuity and isolation testing. Examples might
tivity when permitted in accordance with Table 4-1. include:
4.2.1 Resistive Isolation Testing This type of testing • AC tests: impedance and effective trace length.
verifies that electrically isolated networks meet the mini- • Reliability and severe environment: barrel integrity, land
mum threshold in accordance with Table 4-1. Faults surface oxide growth.
detected are defined as either shorts or leakages in accor-
dance with Figure 4-2. For automated equipment the test 4.5 Verification (Retesting) Verification of electrical
voltage shall be as specified on the master drawing or, if faults and test failures shall be on the primary test system
this is not specified, it shall be the maximum rated voltage or through the use of calibrated test equipment which is
of the net being tested. If this is not stated, it shall be 40 working to the same electrical test parameters as the pri-
volts minimum applied between each pair of nets under mary system.
test. For manual testing the test voltage shall be 200 volts
5 TEST PROGRAM GENERATION
minimum applied between each pair of nets under test for
a minimum of 5 seconds. If the resistance measured (isola- Test programs can be generated several ways with varying
tion resistance) is higher than the minimum isolation resis- degrees of fault coverage. Some considerations for select-
tance threshold, the network passes. All networks shall be ing a method include PB complexity, production, volume,
tested against all other networks unless adjacency testing is and the desired level of test reliability. More expensive PBs
used in accordance with Table 4-1. require more dependable tests. The following is a descrip-
tion of the two major methods of generating test programs,
4.2.2 Indirect Isolation Testing by Signature Compari- and some pros and cons of each method. They are listed in
son This type of isolation testing indirectly verifies elec- ascending order of test coverage.

Fail (short) Pass

Short Leakage

Leakage minimum Limit


0 Ohms (user determined) (minimum isolation
threshold resistance)
Network Resistance IPC-9252a-4-2

Figure 4-2 Resistive Continuity Test

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November 2008 IPC-9252A

5.1 Source Data provided that includes the following information; the mini-
mum requirements for the electrical test certificate of con-
5.1.1 CAM Data Test CAM data in the form of Gerber formance (C of C) shall include:
data is usually available to the test activity having been
a) Supplier and address
used to generate the PB artwork and other tooling used
during manufacturing. Since this data does not include b) Customer
native network data, a net list must first be ‘‘extracted’’ c) Part Number and Revision
using proprietary software prior to use as electrical test d) PO number
source data. In this process the Gerber graphic layers and
e) Lot Number
drill data are merged to create a net list equivalent. This
‘‘extracted’’ net list is in IPC-D-356 format that is compat- f) Quantity Passed Test
ible with most test systems and is suitable for use for test g) Test Method Used (Resistive or Indirect)1,2
Level A and test Level B. This data can be used for test h) Operator signature or stamp
Level C if the extracted net list has been comprehensively i) Date
compared to and demonstrated to be functionally equiva-
lent to customer furnished CAD data. j) Source data used
k) Test Level
5.1.2 CAD Data Test CAD data in the form of customer
furnished design data or IPC-D-356 netlist data may be Note 1. When resistive method is used resistance and
available to the test activity and is required for test Level voltage thresholds shall be recorded. When indirect meth-
C. Alternately, when the product of Gerber net list extrac- ods are used resistive values shall not be recorded.
tion (see 5.1.1) has been compared to and demonstrated to
be functionally identical to the CAD net list, this data is Note 2. When adjacency method is used, adjacency dis-
also acceptable for test Level C. In instances where a CAD tance shall be recorded.
net list has not been provided and is unavailable, the use of
6.1.1 Example of a Test Certificate of Conformance (C
a net list extracted from the original Gerber data is accept-
of C) The following is a sample electrical test certificate
able for test Level C.
of conformance (C of C) containing the items a) through k)
6 ELECTRICAL TEST CERTIFICATION AND TRACE- as identified in Section 6.
ABILITY
6.2 Marking and Traceability Marking or stamping of
6.1 Certificate of Conformance (C of C) For PBs that electrically tested PBs shall be AABUS to show conform-
require test, a certificate of conformance (C of C) shall be ance to electrical test requirements.

Sample Electrical Test Certificate of Conformance


Customer: Acme Address: Wren, PA
P/N: 123456 Rev: A
PO: 676767 Lot#: 6290-3-1
Test Level: C
Quantity Passed: 117
Test Method (Check One) Resistive H Indirect M (Per IPC-9252)
Resistive Test Parameters (if used)

Isolation (Shorts) 10 Meg Ohms 50 Voltage

Continunity (Opens) 10 Ohms


Adjacency Used (Check One) Yes H No M

Horizontal Distance 1.27 mm [0.050 in]

Vertical Distance NONE


Source Data Used (Check One) Gerber Extracted H IPC-D 356 Compare M

We hereby certify that all printed boards (PBs) have been electrically tested to the requirements of the referenced Purchase
Order and Print.
Test Technician (Signature or Stamp) Printed Name: John Doe Date 12/05/08

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IPC-9252A November 2008

APPENDIX A
Other Tests and Considerations

A.1 PB Technology Considerations A.2.1.2 Resistance The actual material resistance (sur-
A.1.1 Purpose PBs with fine-pitch Surface Mount Tech-
face or volume) between networks is the variable in this
nology (SMT) footprints complicate the testing process. test.
Testing PBs with standard SMT pitch (1.30 mm [0.0512
A.2.1.3 Leakage Current The leakage current flow at
in]) can be accomplished using fixture testing or moving
maximum voltage shall not exceed 10 microamperes
probe testing. However, as testing pitch decreases below
unless otherwise specified.
0.65 mm [0.0256 in], the testing options available become
restricted in many cases to moving probe testing. Test point A.2.1.4 Test Procedure (unless otherwise specified)
sizes and densities will also impact test methods. Addition-
ally, testing of embedded passive devices (resistors/ A.2.1.4.1 The PBs shall be tested in accordance with
capacitors) will require test program modification. IPC-TM-650, Method 2.5.7, Condition A, with the follow-
A.1.2 Considerations Regardless of whether the test
ing exceptions:
point is a through via, an SMT pad, or a capped via, the a) The test specimen is the PB.
following topics must be addressed: b) The test voltage shall be applied across the traces or
• Probe tip style/size planes of interest.
• Target spot (center or off-set) c) Test leads shall be used but not soldered to the traces or
• Probe pressure (ghosting/tool marks issues) planes of interest.

• Test voltage/current for embedded passive devices d) Test voltage shall ramp from zero to the required volt-
age (DC) at a rate that will not cause a false failure due
• Probe aim (positioning accuracy, shaft/hole clearance, to excessive current as the capacitance between the test
lean effects) circuits is charged. A suggested starting point is 200
• Tooling (pin/hole clearance) volts per second.
• Registration (image/tooling hole, product distortion) e) The test duration and maximum voltage shall be speci-
• These issues are equally important for fixture and fixture- fied by customer requirements. Typical test duration is
less testing 10 seconds.
A.2 Characterization Tests The tests described in A.2.1 f) During the test, there shall be no audible, visible spark-
through A.2.2 are not part of a standard electrical test for over, or breakdown in internal or external traces or
PBs and will only be performed when specified by the planes. There shall be no sudden drop in the applied
master drawing/AABUS. voltage. The leakage current at maximum voltage shall
not exceed the specified value. Maximum current leak-
A.2.1 High Potential (Hi-Pot) Testing High potential test age should generally not exceed 10 microamperes, but
(also known as power-to-ground, dielectric withstanding this depends on the test voltage and materials being
voltage, over potential, voltage breakdown, or dielectric tested.
strength test) consists of a voltage application between
g) Discharge (short) the traces/planes tested.
insulated traces or planes of the PB during a specific time
using a high voltage. This test will verify that sufficient A.2.2 Impedance Testing Characteristic impedance test-
resistance exists to prevent electrical discharge between ing, also known as controlled impedance testing or just
adjacent traces or between traces on different planes. impedance testing, determines the reflection signature of a
The typical defects identified by this test are laminate transmission line (two traces or one trace measured with
voids, spacing violations, metallic contamination, and respect to the power and/or ground planes). Typically, the
layer-to-layer misregistration. testing is performed on coupons that are taken from the
CAUTION: A residual charge may remain in the PB. It is fabricated panel and not on the actual PB. Typical imped-
important to drain this charge before removing the PB from ance tolerance is 5% or 10%, although tighter tolerances
the test station in order to prevent operator injury and/or are sometimes specified. It should be noted that tolerances
damage to subsequently installed components. tighter than 5% will result in yield impact. See IPC-TM-
650, Method 2.5.5.7, for additional reference information.
A.2.1.1 Voltage A voltage shall be used to ensure the
designed minimum dielectric is not compromised (electri- A.2.2.1 Test Equipment Impedance values are not
cal arcing). directly measured, but are calculated from measured

8
November 2008 IPC-9252A

parameters, such as reflection coefficient (Γ). Reflection • Install air ionizers in area of point of test.
coefficient is the parameter measured with a Time Domain
Reflectometer (TDR). The TDR should have a bandwidth A.3.2 Calibration Test equipment shall be calibrated in
greater than 12 GHz. accordance with equipment manufacturer procedures and
meet the requirements of ISO 10012 and ANSI/NCSL
A.3 Equipment Concerns Z540.3.
A.3.1 Environmental Considerations In order to mini-
A.3.3 Fixtures Fixtures should be stored in an environ-
mize possible damage to the test equipment, the equipment
should be placed in an environment that is clean (low dust ment to minimize the potential for damage.
/ particulate matter in the air) and minimizes the effects of
A.4 Statistical Process Control (SPC) for Electrical Test
ESD (Electrostatic Discharge). These steps may include:
Operations The electrical test process should do more
• Keep dust generating processes away from test area. than just ensure the product shipped doesn’t have func-
• Product to be tested should be cleaned of dust prior to tional defects. The data from electrical test should be moni-
test. tored to provide a feedback mechanism for improvement to
• Have operators wear wrist or ankle straps to prevent ESD. the fabrication process. There are several software tools
available to assist manufacturers in the establishment of an
• Static dissipative flooring to minimize ESD.
SPC program to accomplish this task.
• Control relative humidity in test area (40% to 60% RH)
to minimize ESD.

9
ANSI/IPC-T-50 Terms and Definitions for
Interconnecting and Packaging Electronic Circuits
Definition Submission/Approval Sheet
The purpose of this form is to keep SUBMITTOR INFORMATION:
current with terms routinely used in
Name:
the industry and their definitions.
Individuals or companies are Company:
invited to comment. Please
City:
complete this form and return to:
IPC State/Zip:
3000 Lakeside Drive, Suite 309S Telephone:
Bannockburn, IL 60015-1249
Fax: 847 615.7105 Date:

❑ This is a NEW term and definition being submitted.


❑ This is an ADDITION to an existing term and definition(s).
❑ This is a CHANGE to an existing definition.

Term Definition

If space not adequate, use reverse side or attach additional sheet(s).

Artwork: ❑ Not Applicable ❑ Required ❑ To be supplied


❑ Included: Electronic File Name:
Document(s) to which this term applies:

Committees affected by this term:

Office Use
IPC Office Committee 2-30
Date Received: Date of Initial Review:
Comments Collated: Comment Resolution:
Returned for Action: Committee Action: ❑ Accepted ❑ Rejected
Revision Inclusion: ❑ Accept Modify

IEC Classification
Classification Code • Serial Number
Terms and Definition Committee Final Approval Authorization:
Committee 2-30 has approved the above term for release in the next revision.
Name: Committee: IPC 2-30 Date:
Technical Questions
The IPC staff will research your technical question and attempt to find an appropriate specification interpretation
or technical response. Please send your technical query to the technical department via:
tel: 847-615-7100 fax: 847-615-7105
www.ipc.org e-mail: answers@ipc.org

IPC World Wide Web Page www.ipc.org


Our home page provides access to information about upcoming events, publications and videos, membership, and
industry activities and services. Visit soon and often.

IPC Technical Forums


IPC technical forums are opportunities to network on the Internet. It’s the best way to get the help you need
today! Over 2,600 people are already taking advantage of the excellent peer networking available through e-mail
forums provided by IPC. Members use them to get timely, relevant answers to their technical questions. Contact
KeachSasamori@ipc.org for details. Here are a few of the forums offered.

TechNet@ipc.org
Tech Net forum is for discussion of issues related to printed circuit board design, assembly, manufacturing,
comments or questions on IPC specifications, or other technical inquiries. IPC also uses Tech Net to announce
meetings, important technical issues, surveys, etc.

IPC_New_Releases@ipc.org
This is an announcement forum where subscribers can receive notice of new IPC publications, updates and
standards.
Benefits of IPC Membership

Administering your subscription status:


All commands (such as subscribe and sign off) must be sent to listserv@ipc.org. Please DO NOT send any
command to the mail list address, (i.e.<mail list>@ipc.org), as it would be distributed to all the subscribers.
Example for subscribing: Example for signing off:
To: LISTSERV@IPC.ORG To: LISTSERV@IPC.ORG
Subject: Subject:
Message: subscribe Tech Net Joseph H. Smith Message: sign off Designer Council
Please note you must send messages to the mail list address ONLY from the e-mail address to which you want to
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or on vacation and to resubscribe when back in the office.

How to post to a forum:


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use the mail list address that you want to reach in place of the <mail list> string in the above instructions.
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Subject: <your subject>
Message: <your message>
The associated e-mail message text will be distributed to everyone on the list, including the sender. Further
information on how to access previous messages sent to the forums will be provided upon subscribing.
For more information, contact Keach Sasamori:
tel: 847-597-2815 fax: 847-615-5615
e-mail: sasako@ipc.org www.ipc.org/emailforums
Education and Training

Benefits of IPC Membership


IPC conducts local educational workshops and national conferences to help you better understand conventional and
emerging technologies. Members receive discounts on registration fees. Visit www.ipc.org to see what programs are
coming to your area.

IPC Certification Programs


IPC provides world-class training and certification programs based on several widely-used IPC standards, including
IPC-A-600, IPC-A-610, IPC/WHMA-A-620, J-STD-001 and IPC-7711A/7721A Rework and Repair. IPC-sponsored
certification gives your company a competitive advantage and your workforce valuable recognition.
For more information on these programs:
tel: 847-597-2802 fax: 847-615-5602
e-mail: certification@ipc.org www.ipc.org/certification

Designer Certification (CID)/Advanced Designer Certification (CID+)


Contact:
tel: 847-597-2822 fax: 847-615-7105
e-mail: Michelle Michelotti@ipc.org http://dc.ipc.org

EMS Program Manager Certification


Contact:
tel: 847-597-2884 fax: 847-615-7105
e-mail: SusanFilz@ipc.org www.ipc.org/emscert

IPC Video Tapes and CD-ROMs


IPC video tapes and CD-ROMs can increase your industry know-how and on-the-job effectiveness. Members receive
discounts on purchases.
For more information on IPC Video/CD Training, contact Mark Pritchard:
tel: 505/758-7937 ext.202 fax: 505/758-7938
e-mail: markp@ipcvideo.org http://training.ipc.org

IPC Printed Circuits Expo, APEX and the Designers Summit


This yearly event is the largest electronics interconnection event in North America. With technical paper presentations,
educational courses, standards development meetings, networking opportunities, and designers certification, there’s
something for everyone in the industry. The premier technical conference draws experts from around the globe. Over
450 exhibitors and over 5,000 attendees typically participate each year. You’ll see the latest in technologies, products
and services and hear about the trends that affect us all. Go to www.GoIPCShows.org or contact shows@ipc.org for
more information.

Exhibitor information:
Mary Mac Kinnon Alicia Balonek
Director, Show Sales Director, Trade Show Operations
847-597-2886 847-597-2898
MaryMacKinnon@ipc.org AliciaBalonek@ipc.org

IPC Midwest
The IPC Midwest Conference & Exhibition brings the resources of our industry to a focused Midwest market!
Scheduled to take place each September in the Chicago area, this event will have the suppliers you need and the
technical interchange you've come to expect from IPC. Learn more at www.IPCMidwestShow.org.

How to Get Involved


The first step is to join IPC. An application for membership can be found in the back of this publication. Once you
become a member, the opportunities to enhance your competitiveness are vast. Join a technical committee and learn
from our industry’s best while you help develop the standards for our industry. Participate in market research programs
which forecast the future of our industry. Participate in Capitol Hill Day and lobby your Congressmen and Senators for
better industry support. Pick from a wide variety of educational opportunities: workshops, tutorials, and conferences.
More up-to-date details on IPC opportunities can be found on our web page: www.ipc.org.
For information on how to get involved, contact:
Neal Bender Susan Storck
Membership Director Membership Manager
847-597-2808 847-597-2872
NealBender@ipc.org SusanStorck@ipc.org
Association Connecting Electronics Indu

® Application for Site Membership


Thank you for your decision to join IPC. Membership is site specific, which means that IPC member benefits are
available to all individuals employed at the site designated on the next page of this application.
To help IPC serve your member site in the most efficient manner possible, please tell us what your facility does by
choosing the most appropriate member category. (Check one box only.)

c Printed Circuit Board Manufacturers


This facility manufactures and sells printed circuit boards (PCBs) or other electronic interconnection products to other
companies. What products do you make for sale?
c One and two-sided rigid, c Flexible printed boards c Other interconnections
multilayer printed boards

_________________________________________________________________________________________________

c Electronic Manufacturing Services (EMS) Companies


This facility manufactures printed circuit assemblies, on a contract basis, and may offer other electronic interconnection
products for sale.

__________________________________________________________________________________________________

c OEM — Original Equipment Manufacturers


This facility purchases, uses and/or manufactures printed circuit boards, or other interconnection products for use in a final
product, which we manufacture and sell.

What is your company's primary product line? _____________________________________________________________

__________________________________________________________________________________________________

c Industry Suppliers
This facility supplies raw materials, equipment or services used in the manufacture or assembly of electronic products.

What industry segment do you supply? c PCB c EMS c Both

What products do you supply? _________________________________________________________________________

c Government, Academic, NonProfit


We are representatives of a government agency, university, college, technical institute or nonprofit organization who are
directly concerned with design, research and utilization of electronic interconnection devices.

c Consultant
What services do you provide? _________________________________________________________________________

__________________________________________________________________________________________________

1
Association Connecting Electronics Indu

® Application for Site Membership


Site Information

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Street Address

City State Zip/Postal Code Country

Main Switchboard Phone No. Main Fax

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(membership will begin the day we receive your application and dues payment, and will continue for one or two
years based on your choice indicated below.) All fees quoted in U.S. dollars.
Please check one:
Primary facility: Government agencies, academic institutions, nonprofit organizations
c One year $1000.00 c One year $250.00
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Additional facility: Membership for a facility of an organization that Consultant (employing less than 6 individuals)
already has a different location with a primary facility membership c One year $600.00
c One year $800.00 c Two years $1080.00 (SAVE 10%)
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Enclosed is our check for $________________


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Mail application with check or money order to:


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Please attach business card
*Fax/Mail application with credit card payment to: of primary contact here
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*Overnight deliveries to this address only.


01/08
2
®

Standard Improvement Form IPC-9252


The purpose of this form is to provide the Individuals or companies are invited to If you can provide input, please complete
Technical Committee of IPC with input submit comments to IPC. All comments this form and return to:
from the industry regarding usage of will be collected and dispersed to the IPC
the subject standard. appropriate committee(s). 3000 Lakeside Drive, Suite 309S
Bannockburn, IL 60015-1249
Fax 847 615.7105
E-mail: answers@ipc.org

1. I recommend changes to the following:


Requirement, paragraph number
Test Method number , paragraph number

The referenced paragraph number has proven to be:


Unclear Too Rigid In Error
Other

2. Recommendations for correction:

3. Other suggestions for document improvement:

Submitted by:

Name Telephone

Company E-mail

Address

City/State/Zip Date
Association Connecting Electronics Industries

3000 Lakeside Drive, Suite 309 S


Bannockburn, IL 60015
847-615-7100 tel
847-615-7105 fax
www.ipc.org