COMPUTER ORGANISATION

UNIT-1
Computer architecture: Means those attributes of a system visible to the
programmer.

Computer organization: Refers to the operational units and their inter

connections that realize the architectural specifications.

Computer: A computer is fast electronic calculating machine that accepts

digitalized information from the user and processes it according to a sequence of
instructions stored in the internal storage and provides the processed information to
the user.

 A sequence of instructions stored in the internal storage is called computer

program.

 An internal storage is called memory.

Computer types:
 According to the size, cost computational power application computers are
classified as:
- Micro computers Mini computers
- Desktop computers
- Personal computers
- Portable notebook computers
- Workstations
- Mainframes or enterprise systems
- Servers
- Super computers

Micro computers: Means smaller computers

 It contains only one CPU

 It is the integration of microprocessor and supporting peripherals(memory &

i/o devices)

 The word length is 8-32 bit

 Used in small industrial control, process control and where storage

requirements are moderate.
Mini computers:
 It is designed to process smaller data words 32-bit words

 These are used for scientific calculations, research, data processing

applications

Desktop computers:
 Commonly used in home or office desk

 It is consists of processing units, storage unit, visual display and audio as

output units, keyboard and mouse as input-output units.

 Storage units consists of hard disks, CD-ROM , desketters.

Personal computers: Like desktop

 Used in homes, schools and business offices.

Portable network computers:

 Compact version of personal computers.
Ex: laptops

Workstations: Have a higher computation power than personal computer.

 Have a higher resolution graphics terminals and improved input/output
capabilities

 Used in engineering applications and in interactive graphics applications.

Mainframe or enterprise systems:

 These are implemented using two or more CPU’s

 Work at very high speeds with large data word length(64bit or more)

 Data storage capacity is very high

 Used in complex scientific calculations, large data processing applications,

military defense control complex graphics applications.

Servers:
 Having large storage unit and fast communication links.

 Large storage allows storing sizable database and fast communication links
allow faster communication of data blocks with computers connected in the
n/w.

 They play major role in internet communication.

Super computers:
 Basically multi processing computers.

 Used in large scale numerical calculations required in applications such as

whether forecasting, robotic engineering, air craft designing and simulations.

Functional units:

Functional Units

Arithm etic
Input and
logic

Mem ory

Output Control

I/O Processor

Figure 1.1. Basic f unctional units of a computer.

 All the above activities are coordinated and controlled by the control unit.

 The arithmetic and logic unit in conjunction with control is commonly called
CPU.

Input unit:
 A computer accepts digitally coded information through i/p unit using input
devices like keyboard and mouse.

 Keyboard take text and numeric information

 Mouse take to position the screen cursor and there by enter the information by
selecting option

 Take ball, space ball, digitizers, scanners(i/p units)

Memory units:
 Used to store programs and data.

 Memory devices are two types

 Primary storage memory device is also called main memory.

 Secondary storage memory device.

  Main memory is fast memory used for the storage of programs and active
data(current process data)

 Main memory is semi conductor memory.

 It consists of a large no of semi conductor storage cells.

 Each cell storing one bit of information

 These cells are read or written by CPU in a group of fixed size called word.

 One word contains n bits.

 Each word has distinct address.

 No of bits in word is word length.

 No of words are the sizes of memory (or) capacity of memory.

 Important characteristics of memory is an access time (required to access one

word)

 It should be as small as possible 10 to 100 nano seconds.

 In rams, fixed time is required to access any word in the memory.

 In sequential access memory this time is not fixed.

 Main memory consists of RAMs

 These are fast but they are small in capacities and expensive.

 Computer uses secondary storage memories such as magnetis taps, magnetic

disk for storage of large amount of data.

Arithmetic and logical unit:

 It performing arithmetic operations such as add, subtracts division, and
multiplication.

 Logical operations such as ending, oring, inverting etc..

 To perform operations operands brought from main memory into the high
speed storage elements called registers of the processors.

 Each register can store one word of data and they are used to store frequently
used operands.

 Access times of registers are typically 5 to 10 times faster than access times to
memory.

 The result is either stored in the register or memory location.

Output unit:
 It sends the proceeded results to the user using o/p devices such as video
monitor, printer, and plotter etc.

 Video monitor display the o/p on the CRT screen

 Printers and plotter give the hardcopy o/p.

 Printers will be classified as

1. Impact printers
2. Non impact printers

 Impact printer’s process formed character faces against inked printers.

 Non impact printers and plotters used laser techniques, inkjet sprays,
xerographically processes, electrostatic methods and electro thermal methods
to get images on the paper.

Control unit:
 Control unit coordinates and controls the activities among the functional unit.

 Basic function of control unit is to fetch the instructions stored in the main
memory.

 Identifying the operations and the devices involved in it.

 Generate control signals to execute the desired operations.

 It controls i/p o/p operations data transfers between the processor memory and
i/p and o/p devices using timing signals.

Basic operational concepts:

 The basic function of a computer is to execute program.

connections between the processor and main memory

 To perform execution of information in addition to the arithmetic logic unit,
and control unit the processor contain a number of registers used for temporary
storage of data and some special function registers include pc, ir, mdr, mar.

Program counter (pc):

 A program is a series of instructions stored in the memory.

 It is important that these instructions must be executed in a proper way to get

the correct result.

 PC contains address of first instruction or next instruction.

 Sequence of instructions execution is monitored by the program counter.

IR (Instruction Registers):
 Is used to hold the instruction that is currently being executed.

 The contents of IR are available to the control unit, which generate timing
signals that control the various processing elements involved in executing the
instruction.

MAR & MDR (memory address and memory data register)

These are used to handle the data transfer b/w the main memory and the
processor.

 MAR holds the address of main memory to or from which data is to be

transferred.

 MDR contains the data to be written into or read from the addressed word of
the main memory.

 When ever you want to service from a device like keyboard,

 The processor can service these devices in one of the two ways polling routine
& interrupt.

 In polling processors s/w checks each of I/O devices every so often.

 Once the service is completed the processor would resume exactly where it
left off. This method is called interrupt method.

 If more than one i/p devices request I/O service simulation sly, i/o provides
service based on priority.

 Interrupt service routine itself can be interrupted by higher priority interrupt.

These interrupt is called nested interrupted.
Ex: 1.state the operations involved in the execution of ADD R1, R0 instruction.
2. Fetch the instruction from the memory into 1R register of the processor.
3. Add the contents of R1 and R0 and store the result in the R0.
Bus structures:
 Paths are connecting the modules together for communicating together.

 The collection of paths connecting the various modules is called the

interconnection structure.

 The designs of this interconnection structure will depend on the exchanges that
must be made between modules.

 A group of wires is called bus.

 Bus provides necessary signals for communication between modules.

 A bus that connects major computer components/modules( cpu, memory, i/o)

is called system bus

 System bus is separated into 3 functional groups

Data bus
Address bus
Control bus

Data bus:
 Data bus consists of 8, 16, 32 or more parallel signal lines.

 These lines are bidirectional

 The communication between peripheral and cpu is activated by giving output

enable pulse to the peripheral.

Address bus:
 It is a unidirectional bus.

 It consists of 16,20,24 or more parallel signal lines

 On these lines the CPU sends out the address of the memory location or i/o
port that is to be written to or read form.

Control bus:
 The control lines regulate the activity on the bus.

 The cpu sends signals on the control bus to enable the outputs of addressed
memory devices or port devices

 Typically control bus signals are:

Memory read (MEMR) Memories write (MEMW)
I/O read (IOR) I/O writes (IOW) Bus request (BR)
 Bus grant (BG) Interrupt request (Int R),
Interrupt acknowledgement () INTA Clock (CLK) Reset
Ready Hold, Hold acknowledgment (HLDA).

Single bus structure:

 Interconnection of bus structure is called signal bus structure.

 In single bus structure all units (address bus, data bus, and control bus) are
connected to common bus called system bus.

 In single bus only two units can communicate with each other at a time.

 Advantage of single bus structure is its low cost and its flexibility for attaching
peripheral devices.
Multi bus structures:
The performance of computer systems suffers when large number of devices
connected to the bus this is because of two major reasons.

 When two or more devices are connected to the common bus we need to share
the bus amongst these devices the sharing mechanisms co ordinates the use of
bus of different devices. This coordination requires finite time called
propagative delay. When control of the bus passes from one device to another
frequently these propagation delays are noticeable and affect the performance
of computer system.

 When the aggregate data transfers demand approaches the capacities of the
bus, the bus may become a bottleneck. In such situations we have to increase
the data rate of the bus.

 For this reason most computer systems use the multiple buses.

Software:
 Is a collection of programs.

 It was 2 types
System software
User software
  System software in micro computer allows one to develop applications/user
programs for micro processor based systems.

 System software includes monitor/os, editors, assamblers, linkers, loaders,

compilers, interpriters and debuggers.

 It is a collection of programs to creation, preparation and execution of other

programs.

 User software consists of programs generated by the various users.

 Basic functions provided by system software are as fallows:

1. Receive and interrupt user commands.
2. Enter and edit user application [programs and store them as files in
secondary storage devices such as hard disk or floppy disk.
3. I/O handling using standard device drivers.
4. Translation of programs from assembly language to machine language
or high-level language to machine language.
5. Link and run user written application programs.
6. Debug the user written application programs.

Editor:
 The editor is programs is used to creat and modify source program/text.

 The editor has commands to change, delete or interest lines or characters.

Assemblers:
 In the 1st pass the assembler performs the fallowing operations:
1. Reading the source program instructions.
2. Creating the symbol table in which all symbols used in the program
together with their attributes are stored.
3. Replacing all mnemonic codes by their binary codes.
4. Detecting any syntax error in the source program
5. Assighning relative address to instructions and data.

Linkers:
 A linker is a program which is used to join several object files into one large
object file.

 When a large program will divide into small modules each module can be
written tested and debugged.

 If all the all modules work, then they can be linked together to form a large
functioning program.
  The linker produces a link file which contains binary codes for all the
combined modules.

 The linker also produces a link map which contains the address information
about the link file.

 The linker does not assigns absolute address, it provides relative address, this
form of program is said to be re locatable as it can be put any where in
memory for execution.

Locator:
a locator is a program used to assigns the specific address, at which the object code is
to be looked in memory.

Interpreter and Compiler:

 Both compiler and interpreter are used for converting high level language to
machine language and these are also used for checking errors.

 Compiler translates entire program at a time and then checks for errors where
as interpreter translates each instruction individually and then check for errors.

 Advantage of using an interpreter is that if an error is found, you can just

correct the source program and immediately return it.

 Disadvantage, interpreted program runs 5 to 25 times slower than the same

program will run after being completed.

 Each statement must be translated to machine code every time the program is
run.

 Disadvantage, when an error is found, it usually must be corrected in the

source program and the entire compile-load sequence repeated.

Debugger:
 A debugger is a program which allows to load adjust code program into
system memory execute the program and debug it.

 The debugger allows you to look at the contents of the registers and memory
locations after your program runs.

 It allows you to change the contents of register and memory locations and
rerun the program.

 Some debuggers allow you to stop execution after each instruction so you can
check or alter memory and register contents.

 A debugger allows setting a breakpoint at any point in the program.

  When you run a program, the system will execute instructions up to this
breakpoint and stop.

 If the results are correct up to that breakpoint, we can move the point to a later
point in our program.

Operating system:
 An OS performs resource management and provides an interface between the
user and program.

 Resource-microprocessor, memory, I/O devices.

 As a collection of system programs that tell the machine what to do under a

verity of conditions.

 DOS, Unix, Windows

Performance:
 The time between start and completion of the program or event is reducing
execution time (or) response time.

 Reduction in response time increases the throughput(the total amount of work

done in a given time)

 The performance of a computer is directly related to throughput and hence it is

reciprocal of execution time.

 The idle performance of a computer system is achieved when we have a

perfect match between the machine capability and the program behavior.

 Factors for projecting the performance of a computer.

Processor clock:
 The processor is driven by a clock with a constant cycle time called processor
clock.

 The time period of processor clock is denoted by P.

 The period ’p’ of clock cycle is an important parameter that effects processor
performance.

 The clock rate is given by R=1/p which measured in cycles per second (cps).

Clock rate:

 Two possibilities for improving clock rate is

1. Improving the IC technology makes logic circuit faster, which reduces time
needed to complete a basic step.
 2. Reducing the amount of processing done in one basic step also make it
possible to reduce clock period P

Basic performance equation:

 To execute a program a processor has to execute number of machine language
instructions. This number is denoted by N.

 The number N is actual number of instructions executed by processor and is

not necessary equal to the number of machine instructions in the machine
language program.

 Each machine instruction takes one or more cycle time for execution. The
average no of basic steps required to execute one machine instruction is
denoted by ‘S’

 Each basic step is completed in one clock cycle.

 The program execution time is given by

T=(N*S)/R.

 R clock rate measured in clocks per second.

 S the average no of steps needed to execute one machine instruction.

 The above equation is known as basic performance equation.

 When machine instruction execution time is measured in terms of cycles per

instruction(cpi) the program execution time is given as T=(N*CPI)/R.

 The CPI of an instruction type can be divided into 2 components terms

corresponding to the total processor cycles and memory cycles need to
complete the execution of the instruction.

 We can rewrite the eq(2)

T=NX (P+M*K)/R.
Where P-no of processor cycles required for the instruction decodes
and executes.
M-no of memory references needed.
K-ratio between memory cycle and processor cycle.
N-machine instruction count.
R-clock rate.
Other performance measure:
 MIPS is an another way to measure the processor speed. The processor speed
can be measured in terms of million instructions per second (MIPS).
MIPS= 1/avg time required for the execution of instruction*106.
MIPS rate=N/T*106.
Referring MIPS eq we can also write,
MIPS rate=N*R/C*106.
Where ‘C’ is the total no of clock cycles required to execute a given program.

Throughput rate:
 It indicates a no of programs a system can execute per unit time.

 Throughput can be measured separately for the system (ws) and for the
processor (wp).

 Wp = no of machine instructions executed per second/no of machine

instructions per program.

Pipelining and superscalar operation:

 Clock cycles are required to perform various steps in the instruction execution.

 S1-fetch(f) S2-decode (d)

S3-execute (e) S4-store(s)

 These stages for several instructions are performed simultaneously to reduce

overall processing time, the processing is called instruction pipeline.

 To improve performance is to achieve high degree of concurrency.

 High degree of concurrency is achieved by implementing multiple instruction

pipelines in the processor.
  To implement multiple instruction pipelines processor has multiple functional
units and they are capable of executing multiple instructions at a time creating
parallel execution paths such a processor.

 Is known as superscalar processor and such an operation is known as

superscalar execution.

Multiprocessor and multicomputer:

 In a large computer systems multiple processor are used. Such systems are
known as multiprocessor systems.

 This system executes a no of different application tasks in parallel, or they

execute sub tasks of a single large task in parallel.

 In this system memory shared between all processors.

 Such multi processor system is known as shared memory multi processor

systems.

 A group of systems or computers inter connected to achieve high total

computational power such systems are called multicomputer.

 In multi computer systems each computer has its own memory unit.

 When the tasks are needed to execute, communication between computers are
used message passing mechanisms’ to exchange information.

 Message passing mechanisms exchanges the messages over a communication

network.such computer system are known as message passing multi
computers.

Data representations:
 Based on the no system 2 basic data types are implemented in the computer
system.
1. Fixed point numbers
2. Float point numbers.

 Representing no’s in such data types is commonly known as fixed point

representation and floating point representation.

Fixed point representation:

 Fixed point \ integer no’s are represented in two forms.
1. Signed integer 2. Unsigned integer.

 Unsigned no’s are positive no’s.

  Signed no’s are both positive and negative

 To represent signed numbers various techniques are used

A).signed to magnitude representation.
b).signed 1’s compliment representation.
c). signed 2’s compliment representation.
Three ways for representing -14 is
-14 = 1 0 0 0 1 1 1 0 (signed to magnitude)
-14 = 1 1 1 1 0 0 0 1 (signed 1’s compliment)
-14 = 1 1 1 1 0 0 1 0 (signed 2’s compliment)

sign magnitude representation:

 In sign magnitude representation the most significant bit
(Leftmost bit) is used to represent sign off the number.

 If the most significant bit is 0, the number is positive, and if the most
significant bit is 1, the number is negative.

 The remaining bits of the number represent magnitude.

fig

Ex: +6 = 00000110
-14 = 10001110
+24 = 00011000

 In unsigned 8-bit binary no’s the decimal range is 0 to 255.

 For sign magnitude 8-bit no’s the large magnitude is reduced from 255 to 127
because we need to represent both positive and negative.
Maximum +ve no’s 0111 1111=+127
Maximum –ve no’s 1111 1111 =-127

 Drawbacks of sign magnitude representation for addition and substraction,it is

necessary to considered signs of both the no’s and their relative magnitudes in
order to carry out the required arithmetic operation.

 There are two representations of zero’s.

 +o10 = 0000 0000
-o10 = 1000 0000

One’s compliment representation:

 In the 1’s compliment representation, negative numbers are obtained by
complementing each bit of corresponding positive number.

 The one’s complement of a number is equalizing to subtracting that number

from 2m-1.
Ex: 1.find 1’s complement of (1101)2

sol: 1101 number

2. 1011 1001 number

0100 0110 1’s complement.

Two’s complement representation:

 The two’s complement representation number is obtained by subtracting
corresponding positive number from 2m.

 The 2’s complement no is obtained by adding 1 to the 1’s complement no.

Ex:1 find 2’s complement of (1001)2
1001 number
0110 1’s complement
---------------------
0111 2’s complement

Advantages:
 There are distinct +0 and –ve representations in both the sign magnitude and
1’s compliment systems, but the 2’s compliment system has only a +0
representation.

 For 4-bit numbers, the value-8 is represntable only in the 2’s complement
system and not in other systems.

Floating point representation:

 The floating point representation is used to represent decimal point integers
Idea the fractional no’s or float values.
 The floating point representation of a number has two parts. The 1st point
represents a signed fixed point number called the mantissa. The second part
designates the position of the decimal point called the exponent.

 The floating point representation has 3 fields: signed, significant digits and
exponents.
Ex: 111101 1000110

 To represent the above no in floating point first we have to convert it into

normalized form.

 Normalized representation is nothing but shifting the decimal point to the right
of the first but and the number is multiplied by the correct scaling factor to get
some values as fallows

 The IEEE standard form of representing the floating point values as below.
Error detection codes:
 When the digital information in the binary form is transmitted from one circuit
or system to another circuit or system an error may occur.

 This means a single corresponding to 0 may change to 1 or vice-versa due to

presence of noise.

 In order to solve this problem, to maintain the data integrity between

transmitter and receiver an extra bit is added to the data.

 The data along with the extra bit or bits forms the code and these codes will
allow only the error detection are called error detecting codes.

Parity bit:
 The extra bit in data is called parity bit.

 A parity bit is used for the purpose of detecting error’s doing transmission of
data binary information.

 A parity bit is an extra bit included with binary message and transmitted
through the media and then checked at the receiving and for errors.

 The circuit which generates the parity bit in the transmitter is called parity bit
generator.

 The circuit that checks the parity in the receiver is called parity checker.

 These parity bits are 2 types.

1. Even parity.
2. Odd parity.

 Even parity is added to make the total no of 1’s an even amount.

 Odd parity is added to make total no of 1’s an odd amount.

 For example, consider the below table which shows that, a 3-bit message with
even parity and odd parity.
 During transferring of information from one location to another, the parity bit
is handled as follows:

 At the sending end, the message is applied to a parity generator.

 When the received parity bit generated, the message including the parity bit is
transmitted to its destination.

 At the receiving end all the incoming bits are applied to the parity checker,
that check’s the proper parity adopted.

 An error is detected if the checked parity does not conform to adopted parity.

 The parity checker & parity generator circuit for a 3 bit message is as fallows
by using the exclusive OR gate

 By using above circuit we can transmit the data with error detection codes,
which consists of parity generator & parity checker.
Multiplication:-
Compared with addition and subtraction, multiplication is a complex
operation, whether performed in hardware or software. A wide variety of algorithms
have been used in various computers. We begin with the simpler problem of
multiplying two unsigned (nonnegative) integers, and then we look at one of the most

common techniques for multiplication of numbers in twos complement

representation.

Unsigned Integers:-

Several important observations can be made:

1. Multiplication involves the generation of partial products, one for each digit in the
multiplier. These partial products are then summed to produce the final product.

2. The partial products are easily defined. When the multiplier bit is 0, the partial
product is 0. When the multiplier is 1. the partial product is the multiplicand.

3. The total product is produced by summing the partial products. For this operation,
each successive partial product is shifted one position to the left relative to the
preceding partial product.

4. The multiplication of two n-bit binary integers results in a product of up to 2n bits

in length.
Hardware:

Description

 Q multiplier
 B multiplicand
 A 0
 SC number of bits in multiplier
 E overflow bit for A
 Do SC times
 If low-order bit of Q is 1
 A←A+B
 Shift right EAQ
 Product is in AQ
Flowchart

Example: 23 x 19 = 437
Multiply Signed-2’s Complement Booth algorithm

 QR multiplier
 Qn least significant bit of QR
 Qn+1 previous least significant bit of QR
 BR multiplicand
 AC 0
 SC number of bits in multiplier
Algorithm:-

1. Do SC + 1 times
2. QnQn+1 = 10
3. AC ← AC + BR + 1
4. QnQn+1 = 01
5. AC ← AC + BR
6. Arithmetic shift right AC & QR
7. SC ← SC – 1
Booth Multiplication Algorithm:-

Zeros in multiplier require no addition

But shifting still required
String of 1s in the multiplier from weight 2k to 2m can be
rewritten as 2k+1 – 2m
Example: 001110 [+14]
String of 1s from 23 to 21: 24 – 21 = 16 – 2 = 14
Multiplicand M: M x 14 = M x 24 – M x 21
Product obtained by M 4 times to the left and subtracting M
shifted left once
One would be to convert both multiplier and multiplicand to positive numbers,
perform the multiplication, and then take the twos complement of the result if and
only if the sign of the two original numbers differed. Implementers have preferred to
use techniques that do not require this final transformation step.

One of the most common of these is Booth's algorithm. This algorithm also has the
benefit of speeding up the multiplication process, relative to a more straightforward
approach.

Hardware
Flowchart

Example: -9 x -13 = 117

Array Multiplier:-

Checking the bits of the multiplier one at a time and forming partial products is a
sequential operation that requires a sequence of add and shift micro-operations. The
multiplication of two binary numbers can be done with one micro-operation by means
of a combinational circuit that forms the product bits all at once. This is a fast way of
multiplying two numbers since all it takes is the time for the signals to propagate
through the

gates that form the multiplication array.

To see how an array multiplier can be implemented with a combinational circuit,

consider the multiplication of two 2-bit numbers as shown in Figure. The multiplicand
bits are b1 and b0, the multiplier bits are a1 and a0, and the product is . The
first partial product is formed by multiplying a0 by b1bo. The multiplication of two
bits such as a0 and b0 produces a 1 if both bits are 1; otherwise, it produces a 0. This

is identical to an AND operation and can be implemented with an AND gate. As

shown in the diagram, the first partial product is formed by means of two AND gates.
The second partial product is formed by multiplying a1 by b1b0 and is shifted one
position to the left. The two partial products are added with

two half-adder (HA) circuits. Usually, there are more bits in the partial products and it
will be necessary to use full-adders to produce the sum. Note that the least significant
bit of the product does not have to go through an adder since it is formed by the
output of the first AND gate.

 Combination circuit
 Product generated in one microoperation
 Requires large number of gates
 Became feasible after integrated circuits developed
 Needed for j multiplier and k multiplicand bits
 j x k AND gates
 j – 1 k-bit adders to produce product of j + k bits

2-bit by 2-bit Array Multiplier:

As a second example, consider a multiplier

circuit that

multiplies a binary number of four bits with a

number of three

bits. Let the multiplicand be represented by

b3 b2 b1 b0 and the

multiplier by a2 a1 a0 . Since k = 4 and j = 3,

we need 12 AND

gates and two 4-bit adders to produce a product of seven bits.

The logic diagram of the multiplier is shown in Figure

4-bit by 3-bit Array Multiplier

4.3 Division:-

Division is somewhat more complex than multiplication but is based on the same
general principles. As before, the basis for the algorithm is the paper-and-pencil
approach, and the operation involves repetitive shifting and addition or subtraction.

The above figure shows an example

of the long division of unsigned
binary integers. It is instructive to
describe the process in detail. First,
the bits of the dividend are examined
from left to right, until the set of bits
examined represents a number
greater than or equal to the divisor; this is referred to as the divisor being able to
divide the number. Until this event occurs, 0s are placed in the quotient from left to
right. When the event occurs, a 1 is placed in the quotient and the divisor is subtracted
from the partial dividend. The result is referred to as a partial remainder. From this
point on, the division follows a cyclic pattern. At each cycle, additional bits from the
dividend are appended to the partial remainder until the result is greater than or equal
to the divisor.

As before, the divisor is subtracted from this number to produce a new partial
remainder. The process continues until all the bits of the dividend are exhausted.
Example: 448 ⁄ 17 = 26 r 6

Initially, AQ dividend

B divisor

At end of operation,

Q quotient

A remainder

DVF divide overflow

Algorithm:-