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MY PROFILE Solution Report For Analog Electronics
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Q.1 If the diode in the circuit shown below is ideal, the current ID will be
a. 0 mA
b. 0.5 mA
c. 1 mA
d. 2 mA
Not Attempt Correct Ans. b
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Q.2
For the circuit shown below the value of is
a. –1
b. –2
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c. +1
d. +2
Not Attempt Correct Ans. d
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a. 0.5 msec
b. 0.55 msec
c. 0.4 msec
d. 0.3 msec
Not Attempt Correct Ans. b
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Q.4 The transistor in the circuit shown below is biased to operate in
Not Attempt Correct Ans. b
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Q.5 Assume an amplifier with input resistance Rin and output resistance Rout . If it is
desired to increase the input resistance and decrease the output resistance, then
the type of negative feedback required is
a. Series Series
b. Shunt Series
c. Series Shunt
d. Shunt Shunt
Not Attempt Correct Ans. c
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Q.6
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A CMOS inverter with a load capacitance ‘C ’ is biased at VDD = 5V. The inverter is
switched at a frequency of 100 kHz. If the power dissipation in CMOS invertor is
10 μW, then the load capacitance C is
a. 1 pF
b. 2 pF
c. 3 pF
d. 4 pF
Not Attempt Correct Ans. d
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Q.7 Consider the figure shown below.
If the closed loop gain of the circuit is Then the open loop gain of the
opamp AOL will be (Assume the opamp is ideal except finite open loop gain)
a. 1
b. 2
c. 3
d. 4
Not Attempt Correct Ans. c
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Q.8 The feedback used in the circuit shown in figure can be classified as
a. shuntseries feedback
b. shuntshunt feedback
c. seriesshunt feedback
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d. seriesseries feedback
Not Attempt Correct Ans. b
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Q.9 Cascading of two amplifiers results in (Assume no loading effect)
a. Reduction in overall gain and increase in overall bandwidth
b. Reduction in overall gain and reduction in overall bandwidth
c. Increase in overall gain and increase in overall bandwidth
d. Increase in overall gain and reduction in overall bandwidth
Not Attempt Correct Ans. d
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Q.10 In the voltage regulator circuit with V I characterstics of zener diode is shown in
the figure given below,
the power dissipation in the zener diode is
a. 0.5 Watts
b. 0 Watts
c. 0.17 Watts
d. Can’t be calculated
Not Attempt Correct Ans. b
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Q.11 10 mV input to an amplifier gives 10 V output without feedback. With negative
feedback, 200 mV input is required to get the same output. The feedback factor
(β) is ______________ %.
Q.12 Consider the tuned amplifier as shown in the figure below.
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The FET is biased at gm = 5 mA/V with rd = 20 kΩ. If the tank circuit is tuned to 1
MHz, then the gain of the circuit at the given input frequency is
___________.
Q.13 Bandwidth of a 3stage tuned amplifier with each stage having bandwidth of 10
MHz is __________ MHz.
Q.14
A npn BJT has Cμ = 10–14 F, Cπ = 4 × 10–14 F and DC current gain β0 = 90. For the
transistor if the unity gain cutoff frequency is given as fT = 1.47 × 1010 Hz, then fβ
= _________ × 107 Hz.
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Q.16 The power input to an amplifier is 2 μW and the output power of the amplifier is 20
m Watts. The power gain of the amplifier is ____________ dB.
Not Attempt Correct Ans. 40
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Q.17 Consider the circuit shown in figure. If the β of the transistor is 30 and ICBO is 20
nA and the input voltage is + 5 V, the transistor would be operating in
a. saturation region
b. active region
c. breakdown region
d. cutoff region
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Not Attempt Correct Ans. b
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Q.18 Consider the circuit shown below.
a. 15
b. 25
c. 35
d. 45
Not Attempt Correct Ans. b
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Q.19 Consider the MOS transistor shown in the figure below. By assuming parameter
VGS versus graph.
a.
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b.
c.
d.
Not Attempt Correct Ans. c
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Q.20 In the circuit shown below opamp ideal. the total current supplied by 20 V voltage
supply is (Assume β of the transistor is to be very large).
a. 50 mA
b. 51 mA
c. 52 mA
d. 53 mA
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Not Attempt Correct Ans. b
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Q.21 Consider the circuit shown in the figure below
Assume all the transistors are matched and VBE = 0.7 V. If β is very large, then
the value of Iout is
a. 1.4 mA
b. 0.7 A
c. 1 mA
d. 70 mA
Not Attempt Correct Ans. c
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Q.22 The voltage gain of the circuit shown in the figure below is,
a.
b.
c.
d.
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Not Attempt Correct Ans. a
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Q.23 In the circuit shown below, assume β = 125. For all the transistors and VBE = 0.7 V
and assume the input current for transistor T3 to be negligible
The value of IC is equal to
1
a. 0.27 mA
b. 0.23 mA
c. 1.17 mA
d. 0.56 mA
Not Attempt Correct Ans. a
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Q.24 If the opamp is ideal, then the below circuit represents
a. Low pass filter
b. High pass filter
c. Band pass filter
d. Band stop filter
Not Attempt Correct Ans. c
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Q.25 Find the value of C that yields an output pulse of 220 μs in the monostable circuit
shown below. Given R = 10 kΩ.
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a. 10 nF
b. 20 nF
c. 30 nF
d. 40 nF
Not Attempt Correct Ans. b
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Q.26 Consider the circuit shwon in the figure below,
the transfer characterstics of the circuit can be represented as (Assume the
diodes and the opamp are ideal)
a.
b.
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c.
d.
Not Attempt Correct Ans. a
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Q.27
Assume the transistors in the above circuit have high value of β and VBE = 0.5
Volts. The current I flowing through 3.5 kΩ resistance is __________ mA
Q.28 Consider the phase shift oscillator as shown in the figure below.
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If the frequency of oscillations of the circuit is 100 kHz, then the value of the
resistance R will be _____ kΩ.
Q.29 The gate to drain capacitance of a MOSFET is 2 pF. By assuming common source
voltage gain of “–20”, the input capacitance due to miller effect is ____________
pF.
Not Attempt Correct Ans. 42
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= 0.2 V. The minimum value of RC for which the transistor remains in saturation is
___________ kΩ.
Q.31 For the circuit shown below, if V i (t) is the input voltage of the circuit, then the
value of output voltage i.e. V0 (t) at t = 16 msec is _________ volts.
(Assume the time constant RC >> T and the diode is ideal)
Q.32
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Consider the circuit shown below
Both the transistors have parameters as follows VTN = 0.8 volts,
The output voltage V0 is ___________ Volts.
Q.33 The circuit shown below is a zener regulated dc power supply. The minimum
value of RL for which the output voltage remains constant is __________ kΩ.
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