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1. Which of the following 5. An ordinary resistor is an b.

Equal to VDS(on)
devices revolutionized the example of
computer industry? c. Greater than VGS(th)
a. A three-terminal device
b. D-MOSFET d. Negative
b. An active load
c. E-MOSFET
c. A passive load
d. Power FET 10. With active-load
d. A switching device switching, the upper E-
MOSFET is a

2. The voltage that turns on a. Two-terminal device


an EMOS device is the 6. An E-MOSFET with its
gate connected to its drain b. Three-terminal device
a. Gate-source cutoff is an example of
voltage c. Switch
a. A three-terminal device
b. Pinch-off voltage d. Small resistance
b. An active load
c. Threshold voltage
c. A passive load
d. Knee voltage 11. CMOS devices use
d. A switching device
a. Bipolar transistors

3. Which of these may b. Complementary E-


appear on the data sheet of 7. An E-MOSFET that MOSFETs
an enhancement-mode operates at cutoff or in the
ohmic region is an example c. Class A operation
MOSFET?
of
d. DMOS devices
a. VGS(th)
a. A current source
b. ID(on)
b. An active load
12. The main advantage of
c. VGS(on)
c. A passive load CMOS is its
d. All of the above
d. A switching device a. High power rating

b. Small-signal operation
4. The VGS(on) of an n-
8. CMOS stands for c. Switching capability
channel E-MOSFET is
a. Common MOS d. Low power consumption
a. Less than the threshold
voltage
b. Active-load switching
b. Equal to the gate-source 13. Power FETs are
c. p-channel and n-channel
cutoff voltage
devices
a. Integrated circuits
c. Greater than VDS(on)
d. Complementary MOS
b. Small-signal devices
d. Greater than VGS(th)
c. Used mostly with analog
9. VGS(on) is always signals

a. Less than VGS(th)


d. Used to switch large d. Depletion layers
currents

18. With CMOS, the upper


14. When the internal MOSFET is
temperature increases in a
power FET, the a. A passive load

a. Threshold voltage b. An active load


increases
c. Nonconducting
b. Gate current decreases
d. Complementary
c. Drain current decreases

d. Saturation current
19. The high output of a
increases
CMOS inverter is

a. VDD/2
15. Most small-signal E-
b. VGS
MOSFETs are found in
c. VDS
a. Heavy-current
applications d. VDD
b. Discrete circuits

c. Disk drives 20. The RDS(on) of a power


FET
d. Integrated circuits
a. Is always large

b. Has a negative
16. Most power FETS are
temperature coefficient
a. Used in high-current
c. Has a positive
applications
temperature coefficient
b. Digital computers
d. Is an active load
c. RF stages Choose the letter of the
best answer in each
d. Integrated circuits questions.

17. An n-channel E-MOSFET 1. FET amplifiers provide


conducts when it has ________.

a. VGS > VP A) excellent voltage gain

b. An N-Type inversion B) high input impedance


layer
C) low power consumption
c. VDS > 0
D) All of the above
6. For what value of ID is gm D) 5 mS
equal to 0.5 gm0?
2. A BJT is a ________-
controlled device. A) 0 mA
10. Referring to the
A) current B) 0.25 IDSS following figure, calculate
gm for VGSQ = –1.25 V.
B) voltage C) 0.5 IDSS
MCQs in FET Amplifiers Fig.
C) power D) IDSS 03
D) resistance A) 2 mS
7. What is the typical value B) 2.5 mS
for the input impedance Zi
3. An FET is a ________- for JFETs? C) 2.75 mS
controlled device.
A) 100 kΩ D) 3.25 mS
A) current
B) 1 MΩ 11. Referring to this figure,
B) voltage obtain gm for ID = 6 mA.
C) 10 MΩ
C) power MCQs in FET Amplifiers Fig.
D) 1000 MΩ 04
D) resistance
8. Referring to the transfer A) 2.83 mS
characteristics shown
below, calculate gm at B) 3.00 mS
4. The E-MOSFET is quite
VGSQ = –1 V.
popular in ________ C) 3.25 mS
applications. MCQs in FET Amplifiers Fig.
01 D) 3.46 mS

A) 2 mS
A) digital circuitry
B) 3 mS 12. Referring to the figure
B) high-frequency below, determine the
C) 4 mS output impedance for VGS =
C) buffering
–3 V at VDS = 5 V.
D) 5 mS
D) All of the above
MCQs in FET Amplifiers Fig.
05
9. Use the following A) 100 kΩ
5. What is the range of gm
equation to calculate gm for
for JFETs?
a JFET having IDSS = 10 mA, B) 80 kΩ
A) 1 µS to 10 µS VP = –5 V, and VGSQ = –2.5
V. C) 25 kΩ
B) 100 µS to 1000 µS
MCQs in FET Amplifiers Fig. D) 5 kΩ
C) 1000 µS to 5000 µS 02

D) 10000 µS to 100000 µS A) 2 mS
13. Calculate gm and rd if
B) 3 mS yfs = 4 mS and yos = 15 ΩS.

C) 4 mS A) 4 mS, 66.7 kΩ
B) 4 mS, 15 kΩ 18. What is (are) the A) –3.48
function(s) of the coupling
C) 66.7 kΩ, 4 mS capacitors C1 and C2 in an B) –3.56
FET circuit?
D) None of the above C) –3.62
A) to create an open circuit
D) –4.02
for dc analysis
14. The steeper the slope of 22. For the fixed-bias
B) to isolate the dc biasing
the ID versus VGS curve, the configuration, if rd < 10 •
arrangement from the
________ the level of gm. RD, then Zo = ________.
applied signal and load
A) less A) RD
C) to create a short-circuit
B) same equivalent for ac analysis B) RD || rd

C) greater D) All of the above C) RG

15. When VGS = 0.5 Vp gm 19. Where do you get the D) -gm • (RD || rd)
is ________ the maximum level of gm and rd for an
value. FET transistor? 23. Which of the following
is a required condition to
A) one-fourth A) from the dc biasing simplify the equations for
arrangement Zo and Av for the self-bias
B) one-half configuration?
B) from the specification
C) three-fourths sheet A) rd ≤ 10RD
D) two-thirds C) from the characteristics B) rd = RD
D) All of the above C) rd ≥ 10RD
16. If ID = IDSS / 2, gm = D) None of the above
___________ gmo.
20. Referring to this figure, 24. Referring to this figure,
A) 1 find Zo if yos = 20 µS. calculate Zo if yos = 40 µS.
B) 0.707 MCQs in FET Amplifiers Fig. MCQs in FET Amplifiers Fig.
06 08
C) 0.5
A) 2.92 kΩ
D) 1.414
A) 1.85 kΩ B) 3.20 kΩ
B) 1.92 kΩ C) 3.25 kΩ
17. The more horizontal the
characteristic curves on the C) 2.05 kΩ D) 3.75 kΩ
drain characteristics, the
________ the output D) 2.15 kΩ 25. On which of the
impedance. following parameters does
21. Referring to this figure,
rd have no or little impact in
A) less calculate Av if yos = 20 µS.
a source-follower
MCQs in FET Amplifiers Fig. configuration?
B) same
07
A) Zi
C) greater
B) Zo
C) Av 29. Referring to this figure, B) –3.26
calculate Av for yos = 58 µS.
D) All of the above C) –2.95
MCQs in FET Amplifiers Fig.
11 D) –3.21

26. Referring to this figure, 33. Determine the value for


calculate Zo for VGSQ = –3.2 RD if the ac gain is 8.
V. A) –7.29
MCQs in FET Amplifiers Fig.
MCQs in FET Amplifiers Fig. B) –7.50 15
09
C) –8.05

D) –8.55 A) 1.51 kΩ
A) 362.52 Ω
30. Referring to this figure, B) 1.65 kΩ
B) 340.5 Ω calculate Zi if rd = 19 kΩ.
C) 1.85 kΩ
C) 420.5 Ω MCQs in FET Amplifiers Fig.
12 D) 2.08 kΩ
D) 480.9 Ω
34. Referring to this figure,
calculate the value of RD if
A) 2.42 MΩ the ac gain is 10. Assume
27. Referring to this figure, VGSQ = ¼Vp.
calculate Zi for yos = 20 µS. B) 2.50 MΩ
Assume VGSQ = −2.2V. MCQs in FET Amplifiers Fig.
C) 2.53 MΩ 16
MCQs in FET Amplifiers Fig.
10 C) 2.59 MΩ

31. Referring to this figure, A) 2.2 kΩ


calculate Zo if rd = 19 kΩ.
A) 300.2 Ω B) 2.42 kΩ
MCQs in FET Amplifiers Fig.
B) 330.4 Ω 13 C) 2.62 kΩ

C) 340.5 Ω D) 2.82 kΩ

D) 350.0 Ω A) 1.75 kΩ 35. For an FET small-signal


amplifier, one could go
28. Which of the following B) 1.81 kΩ about troubleshooting a
is (are) related to depletion- circuit by ________.
type MOSFETs? C) 1.92 kΩ
A) viewing the circuit board
A) VGSQ can be negative, D) 2.00 kΩ
for poor solder joints
zero, or positive.
32. Referring to this figure,
B) using a dc meter
B) gm can be greater or calculate Av if rd = 19 kΩ.
smaller than gm0’. C) applying a test ac signal
MCQs in FET Amplifiers Fig.
C) ID can be larger than 14 D) All of the above
IDSS’.

D) All of the above


A) –2.85
A) JFET D) VGS to VDS

B) BJT 8. The transconductance gm


_____ as the Q-point moves
C) D-type MOSFET from Vp to IDSS
D) E-type MOSFET

4. _____ is the amplification A) decreases


factor in FET transistor
amplifiers. B) remains the same

C) increases

A) Zi D) None of the above

B) gm 9. gm has its maximum


value for a JFET at _____.
C) ID
Fill-in-the-blanks Questions D) IG
A) Vp
5. _____ is an undefined
quantity in a JFET. B) 0.5 Vp
1. A field-effect transistor
amplifier provides excellent A) Ai C) 0.3 Vp
voltage gain with the added
feature of a _____ input B) Av D) IDSS
impedance.
C) Zi 10. The value of gm is at its
A) low maximum gm0 at VGS equal
D) Zo to _____ and zero at VGS
B) medium equal to _____.
C) high A) 0 V, Vp
6. The _____ controls the
D) None of the above _____ of an FET. B) Vp, 0 V
2. The depletion MOSFET C) 0.5Vp, 0.3Vp
circuit has a _____ input
impedance than a similar A) ID’, VGS D) 0.3Vp , 0.5Vp
JFET configuration.
B) VGS’, ID 11. The range of input
A) much higher impedance Zi for MOSFETs
C) IG’, VDS
is _____.
B) much lower
D) IG’, ID
C) lower
7. Transconductance is the
A) 1 kΩ –10 kΩ
D) higher ratio of changes in _____.
B) 100 kΩ –1 MΩ
3. The _____ is quite
popular in digital circuits, C) 10 MΩ –100 MΩ
A) ID to VGS
especially in CMOS circuits
that require very low power D) 1012 Ω to 1015 Ω
B) ID to VDS
consumption.
C) VGS to IG
12. The range of output B) Self-bias D) voltage-divider
admittance yos for FETs is
_____. C) Voltage-divider 21. The isolation between
input and output circuits in
D) All of the above the ac equivalent circuit is
lost in a _____
A) 5 µS –10 µS 17. _____ is the only
configuration.
parameter that is different
B) 10 µS –50 µS between voltage-divider A) common-gate
and fixed-bias
C) 50 µS –100 µS configurations. B) common-source
D) 200 µS –500 µS A) Zi C) common-drain
13. The _____ configuration B) Av D) None of the above
has the distinct
disadvantage of requiring C) Zo 22. The _____ configuration
two dc voltage sources. has an input impedance,
D) None of the above which is other than RG.
A) self-bias
18. The input and output A) common-source
B) voltage-divider signals are in phase in a
_____ configuration. B) common-gate
C) fixed-bias
A) fixed-bias C) common-drain
D) All of the above
B) source-follower D) None of the above
14. _____ is the network-
input impedance for a JFET C) voltage-divider 23. The gate-to-source
fixed-bias configuration. voltage VGS of a(n) _____
D) self-bias must be larger than the
A) RG threshold VGS(Th) for the
19. A _____ configuration
transistor to conduct.
B) RD has a voltage gain less than
1. A) JFET
C) Zero
B) D-type MOSFET
D) None of the above
A) fixed-bias C) E-type MOSFET
15. _____ is a required step
in order to calculate Zo. B) self-bias D) None of the above
C) source-follower 24. rd changes from one
operation region to another
A) Setting IG equal to zero D) voltage-divider
with _____ values typically
B) Setting Vi equal to zero 20. The input and output occurring at _____ levels of
signals are 180º out of VGS (closer to zero).
C) Setting ID equal to IDSS phase in a _____
A) lower, lower
configuration.
D) None of the above
B) lower, higher
A) source-follower
16. _____ configuration(s)
has (have) Zo ≈ RD. C) higher, lower
B) common-gate
D) None of the above
C) common-drain
A) Fixed-bias
25. The _____ does not
support Shockley’s
equation.

A) JFET

B) D-type MOSFET

C) E-type MOSFET

D) None of the above

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