LG Mobile MG230-MG235

Service Manual
Internal Use Only
Service Manual
MG230/MG235
Model : MG230/MG235
Date: May, 2007 / Issue 1.0

REVISED HISTORY
Editor Date Issue Contents of Changes S/W Version
Y. S. Jeong 2007/01/05 A INITIAL RELEASE
J.M. CHUNG 2007/01/07 A.1
* The information in this manual is subject to change without notice and should not be construed as a
commitment by LGE Inc. Furthermore, LGE Inc. reserves the right, without notice, to make changes
to equipment design as advances in engineering and manufacturing methods warrant.
* This manual provides the information necessary to install, program, operate and maintain the
MG230/MG235.
Copyright © 2007 LG Electronics. Inc. All right reserved. -1- LGE Internal Use Only
Only for training and service purposes
LGE Internal Use Only -2- Copyright © 2007 LG Electronics. Inc. All right reserved.
Table Of Contents
1. INTRODUCTION ...............................5 4.13 Vibration Trouble..................................64
1.1 Purpose .................................................. 5 5. DOWNLOAD.......................................66

1.2 Regulatory Information............................ 5
5.1 Download ...............................................66
2. SYSTEM SPECIFICATION................7
6. Circuit Diagram ..............................69
3. TECHNICAL BRIEF ..........................8
7. pcb layout .......................................78
3.1 MG230/MG235 Block diagram.................8
3.2 RF Part Introduction.................................9 8. ENGINEERING MODE ....................83
3.2.1 Receiver Part ....................................9 8.1 BB Test [MENU 1]..................................82
3.2.2 Transmitter Part ..............................11 8.2 RF Test [MENU 2]..................................86
3.2.3 The Crystal Reference System .......13 8.3 MF mode [MENU 3] ...............................86
3.2.4 Power Management........................14 8.4 Trace option [MENU 4] ..........................87
3.3 Baseband Introduction ...........................15 8.5 Call timer [MENU 5] ...............................87
3.3.1 Baseband Processor ......................15 8.6 Fact. Reset [MENU 6] ............................87
3.3.2 Interconnection with 8.7 S/W version............................................87
external devices ..............................16
3.3.3 Battery Charging Block ...................19 9. STAND ALONE TEST .....................88
3.3.4 Display and Interface ......................20 9.1 Introduction ............................................88
3.3.5 Keypad Switches and Scanning .....22 9.2 Setting Method.......................................88
3.3.6 Microphone .....................................23
3.3.7 Soft-midi and Main Speaker ...........23
10. Calibration ....................................91
3.3.8 Headset Interface ...........................25 10.1 Calibration with Hotkimchi....................91
3.3.9 Key Back-light Illumination..............26
12. EXPLODED VIEW &
3.3.10 LCD Back-light Illumination...........27
REPLACEMENT PART LIST ....... 99
3.3.11 VIBRATOR ...................................28
12.1 Exploded View .................................... 99
4. TROUBLE SHOOTING ...................29 12.2 Replacement Parts ............................101
4.1 RF components......................................29 12.3 Accessory ......................................... 116
4.2 RX Trouble.............................................30
4.3 TX Trouble .............................................36
4.4 Power On Trouble..................................44
4.5 Charging Trouble ...................................46
4.6 LCD Trouble...........................................48
4.7 Receiver Trouble....................................51
4.8 Speaker Trouble ....................................53
4.9 MIC Trouble ...........................................55
4.10 Earphone Trouble ................................57
4.11 KEYPAD Backlight LEDS Trouble .......61
4.12 SIM Trouble .........................................62
1. INTRODUCTION
1. INTRODUCTION
1.1 Purpose
This manual provides the information necessary to repair, calibration, description and download the
features of the MG230/MG235.
1.2 Regulatory Information
A. Security
Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for example,
persons other than your company’s employees, agents, subcontractors, or person working on your
company’s behalf) can result in substantial additional charges you’re your telecommunications
services. System users are responsible for the security of own system.
There are may be risks of toll fraud associated with your telecommunications system. System users
are responsible for programming and configuring the equipment to prevent unauthorized use. LGE
does not warrant that this product is immune from the above case but will prevent unauthorized use of
common-carrier telecommunication service of facilities accessed through or connected to it. LGE will
not be responsible for any charges that result from such unauthorized use.
B. Changes in Service
A local telephone company may make changes in its communications facilities or procedure. If these
changes could reasonably be expected to affect the use of the MG230/MG235 or compatibility with the
network, the telephone company is required to give advanced written notice to the user, allowing the
user to take appropriate steps to maintain telephone service.
C. Maintenance Limitations
Maintenance limitations on the MG230/MG235 must be performed only at the LGE or its authorized
agents. The user may not make any changes and/or repairs expect as specifically noted in this
manual. Therefore, note that unauthorized alternations or repair may affect the regulatory status of the
system and may void any remaining warranty.
D. Notice of Radiated Emissions

The MG230/MG235 complies with rules regarding radiation and radio frequency emission as defined
by local regulatory agencies. In accordance with these agencies, you may be required to provide
information such as the following to the end user.
1. INTRODUCTION
E. Pictures
The pictures in this manual are for illustrative purposes only; your actual hardware may look slightly
different.
F. Interference and Attenuation

An MG230/MG235 may interfere with sensitive laboratory equipment, medical equipment, etc.
Interference from unsuppressed engines or electric motors may cause problems.
G. Electrostatic Sensitive Devices
ATTENTION
Boards, which contain Electrostatic Sensitive Device (ESD), are indicated by thesign.
Following information is ESD handling:
• Service personnel should ground themselves by using a wrist strap when exchange system boards.
• When repairs are made to a system board, they should spread the floor with anti-static mat which is
also grounded.
• Use a suitable, grounded soldering iron.
• Keep sensitive parts in these protective packages until these are used.
• When returning system boards or parts like EEPROM to the factory, use the protective package as
described.
2. SYSTEM SPECIFICATION
2. SYSTEM SPECIFICATION
Item Feature Comment

Standard Battery Li-ion, 830mAh
AVG TCVR Current 260 mA typ GSM850@PL5
Standby Current 3.0 mA typ @PP9
Talk time 150 min (GSM850 TX Level 5)
Standby time 200 hours (Paging Period:9, RSSI: -85dBm)
Charging time Under 3 hours
RX Sensitivity GSM850: -105dBm, DCS/PCS : -105dBm
GSM850: 33dBm (@PL 5)

TX Output Power
DCS/PCS: 30dBm (@PL 0)
GPRS compatibility Class 10
SIM card type Yes (SIM Block Type) 3V
Main : 1.51” 128*128 TFT Type

Display
Sub : 96*64 Mono STN
Soft icons, OK, Navigation Key, 0 ~ 9, #,
Status Indicator *,SEND, CLEAR, END/PWR, Volume Up,
Volume Down
ANT Built in antenna
EAR Phone Jack Yes / Jack
PC Synchronization Yes
Speech coding HR/EFR/FR/AMR
Data and Fax Yes
Vibrator Yes
Buzzer No
Voice Recoding Yes
C-Mic Yes
Receiver Yes
Travel Adapter Yes
Options No
Item Feature Comment
3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.1 MG230/MG235 Block diagram.
Figure 3-1 MG230/MG235 Hardware architecture
MG230/MG235 is composed with 3 different PCB part such as main PCB, Key FPCB and LCD FPCB.
The functional component arrangement is mentioned below diagram.
Figure 3-2 MG230/MG235 Functional block diagram
3. TECHNICAL BRIEF
3.2. RF Part Introduction

The RF parts consists of a transmitter part, a receiver part, a voltage supply part, the crystal reference
system. And the main RF Chipset AD6548 is a highly integrated direct conversion radio solution that
combines, on a single chip, Quad Band Radio GSM850,E-GSM,DCS1800 and PCS1900 and power
management functions necessary to build the most compact GSM radio solution possible. This quad-
band GSM transmit module integrates a PA, a low-pass filter, a linear Tx / Rx switch along with PA
and switch control combined with ESD protection circuitry in one module,
3.2.1. Receiver Part

The Receiver part in AD6548 contains all active circuits completely, full receiver chain with the
exception of discrete front-end RF SAW filters. The AD6548 uses direct conversion receiver
architecture of the OthelloTM family. For Quad band applicationsthe front end features four fully
integrated programmable gain differential LNAs. The RF is then downconverted by quadrature mixers
and then fed to the baseband programmable-gain amplifiers and active filters for channel selection.
The Receiver output pins can be directly connected to the baseband analog processor.
The Receive path features automatic calibration and tracking to remove DC offsets. The RF Receiver
block is shown as below.
Figure 3-3 The RF Receiver Block
3. TECHNICAL BRIEF
A. Low Noise Amplifiers

The AD6548 includes four fully integrated Low Noise Amplifiers (LNAs), to support quad band
applications without further external active components. The LNAs have differential inputs which
minimize the effect of unwanted interferers. The inputs are easily matched to industry standard FEMs
or discrete Rx SAW filters. The outputs of the LNAs are directly coupled to the down-converting
mixers. The voltage gain of the LNAs are typically 24 dB. Each LNA can be switch to a low gain mode
when receiving large input signals as part of the AGC system.
B. Down-Converting Mixers
Two quadrature mixers are used to mix down the signals from the LNAs, one for the high bands (1800
and 1900 MHz) and one for the low bands (850 and 900 MHz). The outputs of the mixers are
connected to the baseband section through an integrated single pole filter with nominal cut-off
frequency of 800kHz. This acts as a “roofing filter” for the largest blocking signals (i.e. those _ 3MHz)
and prevents the baseband amplifiers from being overloaded.
C. Baseband Amplifiers / Low Pass Filters

The baseband amplifiers provide the majority of the analog receiver gain. The filtering is provided by
an integrated 5th order Chebyshev filter giving the necessary adjacent channel and blocking filtering, it
is also acting as an anti-alias filtering for Baseband IC’s converters. A final low pass pole is possible at
each of the baseband outputs via internal series resistor along with an external shunt capacitor. The
external capacitor is not required with ADI baseband ICs. The on chip filter has an auto calibration
feature ensuring that the filters are tuned for optimum performance. The baseband amplifiers have
programmable gain for system AGC. A total of 57 dB of gain control is provided in 3dB steps
programmable over the serial interface. This together with the LNA gain control gives a total of 77dB of
gain control range. The receive baseband outputs are routed to the common Rx/Tx I/Q ports for
connection with the baseband converters.
D. Baseband Output D.C. Offset Correction

In order to minimize D.C. offsets inherent in the receiver and maximize dynamic range a D.C offset
correction circuit is integrated. This correction is triggered over the serial bus and then an offset
tracking loop is enabled to minimize residual offsets under all conditions. The tracking loop is fully
hardware integrated, requiring no software intervention.
E. Receiver Local Oscillator (LO) Generator

The Rx LO generator is used to avoid DC offset problems associated with LO leakage into the receiver
RF path. By operating the VCO at a frequency other than the desired receive frequencies, any leakage
of the VCO (e.g. via package) will fall out of band. The LO generator is used to convert the offset
synthesized VCO output to the on-frequency quadrature LO required by the chipset. The LO generator
is implemented as a regenerative frequency divider, performing a 2/3 multiplication of the VCO output
for the high band (DCS1800/PCS1900) and a 1/3 multiplication for low band (E-GSM/GSM850).
LGE Internal Use Only - 10 - Copyright © 2007 LG Electronics. Inc. All right reserved.
3. TECHNICAL BRIEF
3.2.2 Transmitter Part

The Transmitter part contains AD6548 active parts and PAM .The transmit section of the AD6548
radio implements a translation loop modulator. This consists of a quadrature modulator, high speed
phase-frequency detector (PFD) with charge pump output, loop filter, TX VCO and a feedback down
converting mixer. The VCO output (divided by 2 for low band) is fed to the power amplifier with a
portion internally fed back into the down-converting feedback mixer to close the feedback loop.
A. Power Amplifier Module

The advanced quad-band Transmit Module designed for mobile handset applications provides full RF
transmit functionality.The GSM850/900 and DCS/PCS power amplifier blocks including power control
are combined with the low insertion loss quad-band pHEMT switch, Tx harmonics filtering, integrated
switch decoder, four receive ports, and full ESD protection. This architecture eliminates the need for
any PA-to-switch design effort for phone designers. All four Rx ports are frequency independent and
allow flexible routing to the transceiver. Fabricated in high-reliability InGaP HBT / pHEMT technology,
the module supports GPRS class 12 operation and provides 50 Ohms input and output impedances at
all RF input and output ports. The module control inputs are CMOS compatible and has no need for an
external reference voltage. With its excellent efficiency performance in all 4 bands, the power amplifier
and switch module contributes to the overall talk-time targets of next generation mobile handset
designs.
B. Quadrature Modulator
The Quadrature modulator takes the baseband I & Q signals and translates these into a GMSK signal
at the Transmit Intermediate Frequency (TX IF). After band-pass filtering and limiting the TX IF signal
is used as the reference input to the Phase Frequency Detector (PFD) of the transmit PLL.
C. Phase Frequency Detector (PFD)

The PFD ensures that the transmitted signal contains the required modulation and is accurately locked
to the desired GSM channel. The downconverted feedback signal from the TXVCO and the
Quadrature Modulator output are phase compared by the PFD. The PFD charge pump generates a
current pulse proportional to the difference in phase which is applied to the loop filter.
D. Loop filter
To minimize complexity of the external PCB layout the TX loop filter is fully integrated into the IC. At
power up the filter is automatically calibrated as part of the baseband filter cal, eliminating process
tolerances. The calibration is fully integrated and requires no extra programming.
E. TX VCO
The Transmit Voltage Controlled Oscillator (TX VCO) and tank components are a fully integrated
subsystem. The subsystem includes PA drivers so the outputs are used to directly drive the external
PAs. The low noise oscillator design and internal filtering mean that external TX SAW filters are not
required. In Low band operation the TX VCO output is divided by two and filtered. The TX VCO is
automatically calibrated to ensure optimum performance over its operating frequency of 1648 to 1910
MHz.
Copyright © 2007 LG Electronics. Inc. All right reserved. - 11 - LGE Internal Use Only
3. TECHNICAL BRIEF
F. Feedback Down-Converting Mixer

The feedback down converting mixer is used to translate the TX VCO output frequency to the TX IF.
An integrated band pass filter exists between the mixer and the PFD to filter the mixers unwanted side
band and higher order mixing products.
G. Transmit Frequency Plan

Unlike many other translation loop modulators the AD6548 uses only a single VCO source to derive
the local oscillator signal for both the Feedback Down-Converting Mixer and the Quadrature
modulator. Therefore there is a fixed relationship between the Tx IF frequency and the LO VCO
frequency .This ratio was chosen to minimize VCO tuning range, TX IF frequency variation and ensure
excellent transmit spectral mask performance. The Feedback-Down Converting Mixer operates low
side injection for the high bands and high side injection for the low bands. The final relationship
between the transmitted TX frequency and the LO VCO frequency is different between the two bands.
These relationships are taken account of in the synthesizer architecture and programming.
H. Main Frequency Synthesizer

The AD6548/9 has a single fast-locking fractional synthesizer used for VCO control in both receive and
transmit mode. The entire system including VCO, tank, fractional N dividers, sigma delta
compensation, charge pump and loop filters are fully integrated. The only external component is a low
cost crystal for the reference. The synthesizer is controlled via the serial interface. The VCO is fed into
the respective dividers to generate the appropriate LO frequencies for the RX and TX bands.
I. Fractional N Dividers
The fractional N divider allows the PLL system to have a smaller step size than the comparison
frequency which is set by the external reference to 26 MHz. This feature allows all the GSM frequency
band rasters to be achieved, with fast lock times and good phase noise characteristics. The divider
section consists of a dual modulus 8/9 pre-scaler, integer M & A dividers, and fractional N system
based on sigma-delta modulation to generate the required fractional divide ratio. The Denominator of
the fractional divider can be set to 3 different values, (1040, 1170,1235), depending on the mode of
operation. For example a denominator of 1040 with an input fraction F maintains an average value of
F/1040 allowing 25 kHz steps when operated at a reference of 26 MHz.
J. Phase Frequency Detector/Charge Pump

A Phase Frequency Detector (PFD) is used for the PLL phase detector. The charge pump is designed
such that good matching of up and down currents is achieved over a wide output operating range. The
charge pump output is internally routed to the integrated synthesizer loop filter.
K. Synthesizer Loop filter

To minimize complexity of the external PCB layout the Main Synthesizer loop filter is also fully
integrated into the IC. No external components or adjustments are required.
3. TECHNICAL BRIEF
L. Voltage Controlled Oscillator

The integrated voltage controlled oscillator (VCO) is a complete self-calibrating subsystem. This
employs a fully automated digital self-calibration function to ensure optimum phase noise performance
over the entire frequency range. The VCO generates frequencies between 2520MHz and 2985MHz as
required to operate in the four bands for RX and TX.
3.2.3 The Crystal Reference System

The AD6548 requires only an external low cost crystal as the frequency reference. The circuitry to
oscillate the crystal and tune its frequency is fully integrated. The Oscillator is a balanced
implementation requiring the crystal to be connected across 2 pins. There is a programmable capacitor
array included for coarse tuning of fixed offsets (e.g. crystal manufacturing tolerance), and an
integrated varactor for dynamic control. The oscillator is designed for use with a 26MHz crystal. The
crystal is connected as shown in figure.
Figure 3-4 The Crystal Reference System
Dedicated control software ensures excellent frequency stability under all circumstances.
3. TECHNICAL BRIEF
3.2.4 Power Management

For direct battery supply connect, and to reduce external circuitry complexity the AD6548/9 features
three Low Drop Out Regulators (LDOs). The three LDOs provide isolation of the oscillators and
sensitive circuits from unwanted power supply and cross coupled noise. They also ensure the IC
operation is robust over a wide range of power supply voltages. For power management the LDOs are
independently controlled via the 3 wire serial bus.
A.LDO Usage
The following table describes the LDO usage:
LDO1 LDO2 LDO3
Rx and Tx baseband
Main VCO Tx VCO
sections
Table 3-1 Intended LDO Use
The LDO outputs require external connection to the respective pins described in table 3, and each
requires decoupling capacitors.The LDOs are designed to be unconditionally stable regardless of the
capacitor’s ESR.
LDO OP Extemal Connection
VLDO1 VCC_FE, VCC_BBI, VCC_BBQ
VLDO2 No external Connections, except for decoupling
VLDO3 No external Connections, except for decoupling
Table 3-2 LDO Connections
LDO1 derives its input references from the crystal supply voltage (VCC_REF). It is therefore expected
that VCC_REF be supplied from a external LDO of nominal supply voltage 2.75V (e.g. ADP3330 or
Analog Baseband IC: Vout=2.75V_1.4%)
3. TECHNICAL BRIEF
3.3 Baseband Introduction
3.3.1 Baseband Processor (AD6720 , U101)

• AD6720 is an ADI designed processor
• AD6720 consists of
1. Control Processor Subsystem including:
• 32-bit MCU ARM7TDMI Control Processor
• 39 MHz operation at 1.8V
• 1Mb of on-chip System SRAM Memory
2.DSP Subsystem including:
• 16-bit Fixed Point DSP Processor
• 91 MIPS at 1.8V
• Data and Program SRAM
• Program Instruction Cache
• Full Rate, Enhanced Full Rate and Half Rate
• Speech Encoding/Decoding
• Capable of Supporting AMR & PDC Speech Algorithms
3.Peripheral Functions
• Parallel and Serial Display Interface
• Keypad Interface
• Flash Memory Interface
• Page-Mode Flash Support
• 1.8V and 3.0V, 64 kbps SIM Interface
• Universal System Connector Interface
• Data Services Interface
• Battery Interface (e.g. Dallas)
4. Other
• Supports 13 MHz and 26 MHz Input Clocks
• 1.8V Typical Core Operating Voltages
• 289-Ball Package (12x12mm) , 0.65mm Ball pitch
5. The AD6720 baseband transmit section supports the following
• mobile station GMSK modulation power classes:
• GSM 900/850 power classes 4 and 5,
• DCS 1800 power classes 1 and 2, and
• PCS 1900 power classes 1 and 2
3. TECHNICAL BRIEF
3.3.2 Interconnection with external devices
A. RTC block interface

Countered by external X-TAL
The X-TAL oscillates 32.768KHz
B. LCD module interface
Signals Description
L_MAIN_LCD_CS MAIN LCD driver chip enable.
L_SUB_LCD_CS SUB LCD driver chip enable.
LCD_RESET This pin resets LCD module.
LCD_WR Enable writing to LCD Driver.
LCD_RS This pin determines whether the data to LCD module data or control data.
LCD_DATA(0-15) LCD data
Table 3-3 LCD Pin Description
The backlight of LCD module is controlled by AD6720 via AAT3120(U400). The control signals related
to Backlight LED are given bellow.
Signals Description
LCD_DIM_CTL Control LCD backlight level
MLED1,2 Current source for backlight LED
Table 3-4 Description Of LCD Backlight LED Control
3. TECHNICAL BRIEF
C. RF interface
The AD6720 control RF parts through PA_BAND, TX_RAMP, PA_EN, S_EN, S_DATA, S_CLK,
ANT_SW1, ANT_SW2
Signals Description
PA_BAND PAM Band Select
ANT_SW1, 2 Antenna switch Band Select
TX_RAMP TX RAMP Control
PA_EN PAM Enable/Disable
IQ IQ data(IN, IP, QN, QP)
S_EN PLL Enable/Disable
S_DATA Serial Data to PLL
S_CLK Clock to PLL
Table 3-5 RF Control Signals Description
D. SIM interface
The AD6720 provides SIM Interface Module. The AD6720 checks status periodically during
established call mode whether SIM card is inserted or not, but it doesn't check during deep Sleep
mode. In order to communicate with SIM card, 3 signals SIM_DATA, SIM_CLK, SIM_RST are
required. The descriptions about the signals are given by bellow Table 3-6 in detail.
Signals Description
SIM_DATA This pin receives and sends data to SIM card. This model can support only
3.0 volt interface SIM card.
SIM_CLK Clock 3.25MHz frequency.
SIM_RST Reset SIM block
Table 3-6 SIM Control Signals Description
3. TECHNICAL BRIEF
2V85_VSIM
2V85_VSIM
SIM CONNECTOR
R118
20K
SIM_DATA
J100
1 4
VCC GND1
2 5
SIM_RST RST VPP
3 6
SIM_CLK CLK IO
7 10
GND2 GND5
8 9
GND3 GND4
ENSY0016601
HSSC-6p-25
C150 C151 C152 C145
NA NA 220n
1000p
Figure 3-5 SIM Interface of AD6720
E. LDO Block
There are 8 LDOs in the AD6720.
- VCORE : supplies Digital base band Processor core and AD6720 digital core
- VMEM : supplies external memory and the interface to the external memory on the digital base band
processor (1,8V or 2.8V, 150mA)
- VEXT : supplies Radio digital interface and high voltage interface (2.8V, 170mA)
- VSIM : supplies the SIM interface circuitry on the digital processor and SIM card(2.85V, 20mA)
- VRTC : supplies the Real-Time Clock module (1.8 V, 20µA)
- VABB : supplies the analog portions of the AD6720
- VMIC : supplies the microphone interface circuitry (2.5 V, 1 mA)
- VVCXO : supplies the voltage controlled crystal oscillator ( 2.75 V, 10 mA)
3. TECHNICAL BRIEF
3.3.3 Battery Charging Block

1. It can be used to charge Lithium Ion batteries.
Charger initialization, trickle charging, and Li-Ion charging control are implemented in hardware.
2. Charging Process
- Check charger is inserted or not
- If AD6720 detects that Charger is inserted, the CC-CV charging starts.
- Exception : When battery voltage is lower than 3.2V, the precharge(low current charge mode)
starts firstly.
- And the battery voltage reach to 3.2V the CC-CV charging starts.
3. Pins used for charging
- VCHG : charger supply.
- GATEDRIVE : charge DAC output
- ISENSE : charge current sense input
- VBATSENSE : battery voltage sense input.
- BATTYPE : battery type identification input
- REFCHG : voltage reference output
4. TA (Travel Adaptor)
- Input voltage: AC 100V ~ 240V, 50~60Hz
- Output voltage: DC 4.8V
- Output current: Max 800mA
5. Battery
- Li-ion battery (Max 4.2V, Nom 3.7V)
- Standard battery: Capacity - 830mAh
CHARGE LIGHT2
1V8_VRTC J15
LIGHT3
P8
KEY_BACKLIGHT GPO_22
VBAT VCHARGE R5
LCD_DIM_CTL GPO_23
T12
VMEMSEL
C134 1u D17
R117 REF
2.2K C136 1u C15
C139 REFOUT
(2012,10V) 10u C14
(1608,4V) TEMP1
EDSY0012101
C137 A13
C138 TEMP2
C140 10u 4.7u A14
R119 1u D101 AUXADC1
0.2 B14
CUS02 AUXADC2
T13
ERHY0001102 VRTC
C12
R120 330 VCHG
A12
GATEDRIVE
C13
ISENSE
B13
VBATSENSE
Q102 F17
REFCHG
B12
G S BATTYPE
4 5 F5
D3 D4 TCK GPIO_18
3 6 F2
D2 D5 TMS GPIO19_TMS
2 7 F6
D1 D6 TDI GPIO_20
1 8 G3
TDO1 GPIO_21_TDI
TPCF8102-TE85L-F F4
EQFP0004201 JTAGEN JTAGEN
T16
KEY_ROW0 KEYOUT
U17
POWERKEY KEYON
R126 82K M5
USC0 USC0
L3
BATT_TEMP USC1 USC1
M7
USC2 USC2
L2
C158 USC3 USC3
M3
0.1u USC4 USC4
N6
AGND04
AGND06
AGND31
USC5 USC5
N5
FM_32K USC6
N9
N11
F10
3. TECHNICAL BRIEF
PRE-CHARGE
VCHARGE
VBAT
VBAT
C129 R108
0.1u 10
C130
27p LD100
R109 EDLH0007901
1K SSC-FR104-II1
Q101
3
4
3
R110 R112 2
Q100
PRE_CHARGE_R 2SC5585
7.5K
2
EQBN0007101
R111
1.5K R113
10K
1
10K
1
R114
UMX1NTN 270
EQBA0000406
4.2V~3.92V 3.91V~3.78V 3.77V~3.70V 3.69V~3.62V
Figure 3-6 Circuit For Battery Charging and Battery Block Indication
3.3.4 Display and Interface

LCD Controlled by L_MAIN_LCD_CS, L_SUB_LCD_CS, LCD_RESET, LCD_RS, LCD_WR, L_RD,
LCD_ID, L_DATA[00:15] ports, VSYNC_OUT.
• L_MAIN_LCD_CS : MAIN LCD driver chip enable. MAIN LCD driver IC has own CS pin
• L_SUB_LCD_CS : SUB LCD driver chip enable. SUB LCD driver IC has own CS pin
• LCD_RST : This pin resets LCD module. This signal comes from AD6720 directly.
• LLCD_RS: This pin determines whether the data to LCD module are display data or control data.
• L_WR : Write control Signal
• L_RD : Read control Signal. But this pin used only for debugging.
• L_DATA[00:15] : Parallel data lines.
• LCD_ID: LCD type selection signals
• VSYNC_OUT : Vsync Interface
• For using 65K color, data buses should be 16 bits.
3. TECHNICAL BRIEF
2V8_VCAM
LCD CONN
R102
10K
CN102
G1
(L_RD) 1 40
VSYNC_OUT
2 39
L_A(1)_RS L_WR
3 38
VIB L_D(8)
4 37
( VIB_N : GND ) L_D(9)
5 36
( IF_MODE2 : #16 - Low ) L_D(10)
6 35
MLED_2 L_D(11)
7 34
MLED_1 L_D(12)
8 33
(MLED_C) L_D(13)
9 32
L_D(7) L_D(14)
10 31
L_D(6) L_D(15)
11 30
L_D(5) L_MAIN_CS
12 29
L_D(4) LCD_ID
13 28
L_D(3) 2V8_VCAM
14 27 R103 10K
L_D(2)
2V8_VCAM 15 26
L_D(1) SPKREC_L_P
16 25
L_D(0) SPKREC_L_N
17 24
L_SUB_CS
18 23
LCD_RESET ( RCV_P )
19 22
( RCV_N )
20 21
G2
C106 C107 C108
1u 0.1u 27p
Figure 3-7 LCD Interface Circuit
3. TECHNICAL BRIEF
3.3.5 Keypad Switches and Scanning

The key switches are metal domes, which make contact between two concentric pads on the keypad
layer of the PCB when pressed. There are 21 switches, connected in a matrix of 5 rows by 5 columns
as shown in Figure 3-8, except for the power switch, which is connected independently. Functions, the
row and column lines of the keypad are connected to ports of AD6720. The columns are outputs, while
the rows are inputs and have pull-up resistors built in.
When a key is pressed, the corresponding row and column are connected together, causing the row
input to go low and generate an interrupt. The columns/rows are then scanned by AD6720 to identify
the pressed key.
VOL_UP VOL_DOWN
VBAT
CN300
4
3
2
1
R300 END
10K
SW300
POWERKEY
R301 680
ICVS0505481FR
ICVS0505481FR
ICVS0505481FR
CLR FAV
VA300
VA301
VA302
SW301 SW302 SW303
T
R302 680
KEY_ROW0
ICVS0505481FR
SEVY0007901
1 2 3 LEFT
VA303
SW304 SW305 SW306 SW307 SW308 MENU
R303 680
KEY_ROW1
ICVS0505481FR
SW309 SW310 SW311 SW312 SW313

VA304
4 5 6 UP SEL
R316 680
KEY_ROW2
ICVS0505481FR
VA305
SW314 SW315 SW316 SW317 SW318

7 8 9 RIGHT SEND
R319 680
KEY_ROW3
ICVS0505481FR
VA306
SW319 * SW320 0 SW321 # SW322 SW323

DOWN CONF
R322 680
KEY_ROW4
ICVS0505481FR
VA307
R329 680
KEY_COL0
R331 680
KEY_COL1
R332 680
KEY_COL2
R333 680
KEY_COL3
R334 680
KEY_COL4
ICVS0505481FR
ICVS0505481FR
ICVS0505481FR
ICVS0505481FR
ICVS0505481FR
VA309
VA310
VA311
VA312
VA313
Figure 3-8 Keypad Switches and Scanning
3. TECHNICAL BRIEF
3.3.6 Microphone
The microphone is placed to the front cover and contacted to main PCB. The audio signal is passed to
AIN1P and AININ pins of AD6720. The voltage supply VMIC is output from AD6720, and is a biased
voltage for the AIN1P. The AIN1P and AIN1N signals are then A/D converted by the voiceband ADC
part of AD6720.The digitized speech (PCM 8KHz ,16KHz) is then passed to the DSP section of
AD6720 for processing (coding, interleaving etc).
2V5_VMIC
R210
1K
R212 C221 C219

2.2K 120p 10u
R213
100ohm
VINNORP
MIC200
C225 C226 1
39p 2
R215 39p
100ohm OB4-15L42-C33L
VINNORN SUMY0003802
C227
0.1u R218
2.2K
C230 C231 VA203 VA204

39p 39p ICVS0505481FR ICVS0505481FR
SEVY0007901 SEVY0007901
Figure 3-9 Connection Between Microphone And AD6720
3.3.7 Soft-midi and Main Speaker

The TTPCom Embedded MIDI & Polyphonic Orchestra product, “TEMPO”, is a complete MIDI music
player solution offering the following features:
• MIDI-standards compliant
• MIDI files playable as polyphonic ringtones
• Low memory footprint - less than 8 kB internal MCU system RAM
• 40 notes polyphony
• Intelligent note-stealing algorithm ensures optimum use of available synthesizer polyphony
• Open API enabling product differentiation via the addition of MIDI music support to existing and
new customer applications
• MIDI file parser supports Standard MIDI (formats 0, 1 and 2), SMAF-MA3, GM-Lite and SP-MIDI
The main speaker is driven directly by AD6720 AOUT2P and AOUT2N pins and the gain is controlled
by the PGA in an AD6720.
3. TECHNICAL BRIEF
R121 0
AIN3N
H16 R122 4.7
AOUT1P REC_P
K17 R123 4.7
AOUT1N REC_N
P15
AOUT2P2 R124 0 C153
R16
AOUT2P1 C154 C155 39p
R15
AOUT2N1 39p 39p
P14 R125 0
AOUT2N2
H17 C156
AOUT3P
J17 39p
AOUT3N C157 SPK_P
G11
TDO_ABB 39p C159
F13
TMS 39p
E13
TDI_ABB SPK_N
F12
TCK_ABB
R127 0
HEADSET_SPK_OUT_P
R128 0
HEADSET_SPK_OUT_N
C160 C161
39p 39p
VBAT
SPEAKER-RECEIVER SELECTION
C217 C218
2.2u 0.1u
VBAT
R211
10u C222
C223 47K C220 1u U203
220p NLAS5223BMNR2G
1 10 (N)
U202 MAX9716ETA+T VCC NO2
1
_SHDN AMP_SHDN (P)
6 2 9
VCC NO1 COM2 SPK_RCV_N
8
OUT-
2 3 8
BIAS SPK_RCV_P COM1 IN2
C224 R214 5
0.068u OUT+
10K 3 4 7
SPK_P IN+ IN1 NC2 REC_N
7
C228 GND R217
R216 4 100K 5 6
SPK_N 0.068u IN- REC_P NC1 GND
10K 9
PGND
EUSY0300101
SPK_SEL
EUSY0304901
C229
1u
R220
R219
47K 100K
C232
220p
SPEAKER FILTER
R100 0
SPKREC_N SPKREC_L_N
C104 C105
47p 10p
R101 0
SPKREC_P SPKREC_L_P
Figure 3-10 Main Speaker Circuit
3. TECHNICAL BRIEF
3.3.8 Headset Interface

This phone has 5 electrodes such as GND, AUXIP, ACK_DETECT, HOOK_DETECT. This type
supports mono sound.
Switching from Receiver to Headset Jack

If jack is inserted, JACK_DETECT goes from high to low.
Audio path is switched from receiver to earphone by JACK_DETECT interrupt.
Switching from Headset Jack to Receiver

If jack is removed, JACK_DETECT goes from low to high.
Audio path is switched from earphone to receiver by JACK_DETECT interrupt.
Hook detection
If hook-button is pressed, HOOK_DETECT is changed from low to high.
This is detected by AUXADC2.
And then hook is detected.
HEADSET JACK HOOK_DETECT

2V5_JACK
H NORMAL 2V8_VEXT 2V5_JACK
L KEY_PUSH
R200 U200 BH25FB1WHFV
R201 4.7K 1 5
1K STBY NC
2 6
C200 R202 GND BGND
0.1u R203 R204 3 4
20K 1K 0 VIN VOUT
HEADSET_MIC_N HOOK_DETECT
EUSY0223007
C201
NA
C204 C202
39p 33u
ECTH0005201 C205 C203
1u 1u
2V8_VEXT 2V8_VEXT
ELCH0010401
C207 R205
C206 39p
39p L200 2.2uH J200
1M C208 10u R206
AUXOP_FML
C209 0.1u (1608) 4.7 L201 2.2uH
HEADSET_MIC_P
5 4 VIN-
1 VCC
JACK_DETECT L202 2.2uH
OUT GND 3 VIN+ C210 10u R207
AUXON_FMR
U201 2 R209 C212 (1608) 4.7
FM_ANT
NCS2200SQ2T2G 39p C211 15p ENJE0003102
R208 1M
EUSY0250501 KJA-PH-3-0059
C213 39p
C214 15p
39p
330K
8p
L203
C215
C216
270nH
VA201
VA200
VA202
ELCH0001556
1608
JACK_DETECT
EVLC18S02003
L REMOVE CLOSE TO HEADSET JACK
(NA) (270nH)
H INSERT
BOT PLACE(NA)
Figure 3-11 Headset Jack Interface
3. TECHNICAL BRIEF
3.3.9 Key Back-light Illumination

In key back-light illumination, there are 12 White LEDs in Main Board, which are driven by
KEY_BACKLIGHT signal from AD6720.
VBAT VBAT
KEY BACKLIGHT
NA
NA
NA
NA
R338
R339
NA
NA
NA
NA
NA
R337
100ohm
R340
100ohm
R341
100ohm
R342
100ohm
R343
100ohm
R344
100ohm
R345
100ohm
R346
100ohm
R347
100ohm
R348
100ohm
NA
NA
NA
100ohm
100ohm
C307
C318
C311
C312
C313
C314
C308
C309
C310
C315
C316
C317
QSMR-C13B
QSMR-C13B
QSMR-C13B
QSMR-C13B
QSMR-C13B
QSMR-C13B
QSMR-C13B
QSMR-C13B
QSMR-C13B
QSMR-C13B
QSMR-C13B
QSMR-C13B
LD300
LD301
LD302
LD303
LD304
LD305
LD306
LD307
LD308
LD309
LD310
LD311
EDLH0013501
3
R349 2 Q300 VA315
KEY_BACKLIGHT
1K UMT2222A ICVS0505481FR
R350 1
7.5K
Figure 3-12 Key Backlight Illumination
3. TECHNICAL BRIEF
3.3.10 LCD Back-light Illumination

LCD backlight LEDs is controlled by AD6720 via AAT3120, U400.
VBAT
U400
AAT3120ITP-20-T1
10 4
IN C1+
C400
C401 1u
2 3
1u OUT C1-
1
C2+ C402
9 1u
LCD_DIM_CTL EN_SET
12
C2-
R401 8
D1 MLED1
100K 7
D2 MLED2
6
C404 D3 TP401
11 5
1u GND NC
EUSY0253601
Figure 3-13 LCD Backlight Illumination
3. TECHNICAL BRIEF
3.3.11 VIBRATOR
The vibrator is placed in the folder cover and contacted to LCD MODULE. The vibrator is driven from
VIBRATOR (GPIO_0) of AD6720
VBAT
R407
VBAT
47K
R408 R409
Q400
10 220
4
VIBRATOR
3
2
R411
MOTOR
1
4.7u
7.5K
27p
EDSY0009901
KDS160E
EMZ2
D400
EQBA0002701
C421
C422
Figure 3-14 Vibrator Circuit
4. TROUBLE SHOOTING
4. TROUBLE SHOOTING
4.1 RF components
SW500
U500
FL500
U501
X500
REFERENCE PART Description
U500 PAM (Power Ampilifier Module)
X500 OSC (26MHz)
FL500 FEM (Front End Module)
U501 Transceiver
SW500 Mobile Switch
Table 4-1. RF Components
4. TROUBLE SHOOTING
4.2 RX Trouble
3
2
Figure 4-2. Receiver Part
4. TROUBLE SHOOTING
4.2.1 Check Crystal Circuit
Pin 1,3:26MHz
Figure 4-3
4.2.2 Check Control Signal
S DATA
S EN
S CLK
Figure 4-4
4. TROUBLE SHOOTING
Graph 4-1
26M_DBB
10p
QP C514
C515
39p
47p
Check
1000p
C518
QN
2V8_VMEM VBAT 2V75_VVCXO point
C520 R515
0.1u AFC
1K R516
C521 0
C522 C523 C524 0.1u
24
23
22
21
20
19
18
17
27p 39p 0.1u

VCC_BBQ
Q
QB
REF_OP
REFIN
REFINB
VAFC_NC
VCC_REF
RX1900B
25
RX1900 VLDO2
26 16
RX1800B VLDO1
27 15
RX1800 AD6548 VBAT
28 14
RX900B U501 VDD
29 13
RX900 EUSY0280101 VCC_TXVCO C528 C529 C530
30 12
RX850B TXOP_HI C531 C532 C534 0.1u 0.1u 0.1u
31 11
RX850 TXOP_LO 27p 0.1u 220n
VCC_BBI
32 10
VCC_FE
VLDO3
SDATA
9
SCLK
Check
SEN
GND C536
NC
33
IB
0.1u
I
point
1
2
3
4
5
6
7
8
S_DATA
S_EN
Check S_CLK
point C543
IP C540
27p
C541
27p
C542
27p
39p
IN
X500 NX3225DA(W-191-451)
4 3
1 2
26MHz
EXXY0018403
4. TROUBLE SHOOTING
4.2.3 Check Mobile SW & ANT SW
Check Mobile SW
TP500 TP501 TP502
SW500.ANT
IN & OUT
C580 1.2p
SW500.RF
R504
IN & OUT
0
L590
3.9nH
R506
SW500
KMS-512 ENWY0002304
ANT
G1
G2
RF
Figure 4-5
C517
22p
4. TROUBLE SHOOTING
4.2.4 Check ANT SW(SAW filter)
ANT_SW1(VC1)
ANT_SW2(VC2)
Figure 4-6
MODE VC1 VC2
GSM1800/1900 Rx L L
GSM850/900 Rx L L
GSM850/900 Tx H L
GSM1800/1900 Tx L H
Table 4-3
4. TROUBLE SHOOTING
4.2.5 Check I/Q signal
QP
C515
39p
QN
IP
C543
39p
IN
Figure 4-8
RX
I
Graph 4-2
4. TROUBLE SHOOTING
4.3 TX Trouble
Figure 4-9
4. TROUBLE SHOOTING
4.3.1 Check Crystal Circuit
Pin 1,3 :26MHz
Figure 4-10
26M_DBB
10p
QP C514
C515
39p
47p Check
1000p
point
C518
QN
2V8_VMEM VBAT 2V75_VVCXO
C520 R515
0.1u AFC
1K R516
C521 0
C522 C523 C524 0.1u
24
23
22
21
20
19
18
17
27p 39p 0.1u

VCC_BBQ
Q
QB
REF_OP
REFIN
REFINB
VAFC_NC
VCC_REF
RX1900B
25
RX1900 VLDO2
26 16
RX1800B VLDO1
27 15
RX1800 AD6548 VBAT
28 14
RX900B U501 VDD
29 13
RX900 EUSY0280101 VCC_TXVCO C528 C529 C530
30 12
RX850B TXOP_HI C531 C532 C534 0.1u 0.1u 0.1u
31 11
RX850 TXOP_LO 27p 0.1u 220n
VCC_BBI
32 10
VCC_FE
VLDO3
SDATA
9
SCLK
SEN
GND C536
NC
33
IB
0.1u
I
1
2
3
4
5
6
7
8
S_DATA
S_EN
S_CLK
Check IP C540 C541 C542
point C543
39p
27p 27p 27p
IN
Check
point
X500 NX3225DA(W-191-451)
4 3
1 2
26MHz
EXXY0018403
4. TROUBLE SHOOTING
4.3.2 Check Control Signal
S DATA
S EN
S CLK
Figure 4-11
Graph 4-2
4. TROUBLE SHOOTING
4.3.3 Check TX I/Q signal
QP
C515
39p
QN
IP
C543
39p
IN
Figure 4-12
TX
Graph 4-2
4. TROUBLE SHOOTING
4.3.4 Check PAM control signal
PA EN
TX RAMP
Figure 4-13
R501 100ohm
PA_EN
R503 1K
TX_RAMP
C505 C506
39p 27p
C508 C509
0.01u 0.01u
20
17
2
VAPC
VBATT
VCC1B
VCC1A
15 3
DCS_PCS_OUT DCS_PCS_IN
11 U500 4
EGSM_OUT EGSM_IN
SKY77318
19 SMPY0014001 18
RSVD_GND ENABLE
21 1
P_GND BS
GND9
GND8
GND7
GND6
GND5
GND4
GND3
GND2
GND1
16
14
13
12
10
9
8
7
5
4. TROUBLE SHOOTING
Graph 4-3
4. TROUBLE SHOOTING
4.3.5 Check Mobile SW & ANT SW

TP500 TP501 TP502
C580 1.2p
R504
0
L590
R506 3.9nH
SW500
KMS-512 ENWY0002304
ANT
G1
G2
RF
C517
22p
L500 (High Band PAM OUTPUT)
R508 (low Band PAM OUTPUT )
SW500.ANT
IN & OUT
SW500.RF
IN & OUT
ANT SW1(VC1)
ANT_SW2(VC2)
Figure 4-14
4. TROUBLE SHOOTING
MODE VC1 VC2
GSM1800/1900 Rx L L
GSM850/900 Rx L L
GSM850/900 Tx H L
GSM1800/1900 Tx L H
Table 4-3
4. TROUBLE SHOOTING
4.4 Power On Trouble
D100
KDS121E
U101
AD6720
Figure 4-15
4. TROUBLE SHOOTING
Check the Phone with the following process.
4. TROUBLE SHOOTING
4.5 Charging Trouble
Check
Q102
point TPCF8102
Figure 4-16
CHARGE LIGHT2
1V8_VRTC J15
LIGHT3
P8
KEY_BACKLIGHT GPO_22
VBAT VCHARGE R5
LCD_DIM_CTL GPO_23
T12
VMEMSEL
C134 1u D17
R117 REF
2.2K C136 1u C15
C139 REFOUT
(2012,10V) 10u C14
(1608,4V) TEMP1
EDSY0012101
C137 A13
C138 TEMP2
C140 10u 4.7u A14
R119 1u D101 AUXADC1
0.2 B14
CUS02 AUXADC2
T13
ERHY0001102 VRTC
C12
R120 330 VCHG
A12
GATEDRIVE
C13
ISENSE
B13
VBATSENSE
Q102 F17
REFCHG
B12
G S BATTYPE
4 5 F5
D3 D4 TCK GPIO_18
3 6 F2
D2 D5 TMS GPIO19_TMS
2 7 F6
D1 D6 TDI GPIO_20
1 8 G3
TDO1 GPIO_21_TDI
TPCF8102-TE85L-F F4
EQFP0004201 JTAGEN JTAGEN
T16
KEY_ROW0 KEYOUT
U17
POWERKEY KEYON
R126 82K M5
USC0 USC0
L3
BATT_TEMP USC1 USC1
M7
USC2 USC2
L2
C158 USC3 USC3
M3
0.1u USC4 USC4
N6
AGND04
AGND06
AGND31
USC5 USC5
N5
FM_32K USC6
N9
N11
F10
4. TROUBLE SHOOTING
4. TROUBLE SHOOTING
4.6 LCD Trouble
4.6.1 LCD Blue Screen or abnormal display
Check
point Check
point
FL602
FL600
FL601 FL603
FL604
Figure 4-17
Checking Flow
4. TROUBLE SHOOTING
4.6.2 LCD Black Screen
Check
point
U400
AAT3120
ITP-20-T1
U402
AIT701G
(CAMERA IC)
Figure 4-18
Checking Flow
4. TROUBLE SHOOTING
Circuit Diagram
VBAT
U400
AAT3120ITP-20-T1
10 4
IN C1+
C400
C401 1u
2 3
1u OUT C1-
1
C2+ C402
9 1u
LCD_DIM_CTL EN_SET
12
C2-
R401 8
D1 MLED1
100K 7
D2 MLED2
6
C404 D3 TP401
11 5
1u GND NC
EUSY0253601
LCD BACKLIGHT
4. TROUBLE SHOOTING
4.7 Receiver Trouble
Figure 4-19
CIRCUIT DIAGRAM
R121 0
AIN3N
H16 R122 4.7
AOUT1P REC_P
K17 R123 4.7
AOUT1N REC_N
P15
AOUT2P2 C153
R16
AOUT2P1 C154 C155 39p
R15
AOUT2N1 39p 39p
P14
AOUT2N2
H17
AOUT3P
J17
AOUT3N
VBAT
C217 C218
2.2u 0.1u
VBAT
R211
10u C222
C223 47K C220 1u U203
220p NLAS5223BMNR2G
1 10 (N)
1
_SHDN AMP_SHDN (P)
6 2 9
8
OUT-
2 3 8
C224 R214 5
0.068u OUT+
10K 3 4 7
7
C228 GND R217
R216 4 100K 5 6
10K 9
PGND
EUSY0300101
SPK_SEL
EUSY0304901
C229
1u
R220
R219
47K 100K
C232
220p
4. TROUBLE SHOOTING
CHECKING FLOW
4. TROUBLE SHOOTING
4.8 Speaker Trouble
Check
point
U202
MAX9716ETA+T
U203
NLAS5223BMNIR2G
Figure 4-20
CIRCUIT DIAGRAM
VBAT
C217 C218
2.2u 0.1u
VBAT
R211
10u C222
C223 47K C220 1u U203
220p NLAS5223BMNR2G
1 10 (N)
1
_SHDN AMP_SHDN (P)
6 2 9
8
OUT-
2 3 8
C224 R214 5
0.068u OUT+
10K 3 4 7
7
C228 GND R217
R216 4 100K 5 6
10K 9
PGND
EUSY0300101
SPK_SEL
EUSY0304901
C229
1u
R220
R219
47K 100K
C232
220p
AOUT1N
P15
AOUT2P2 R124 0
R16
AOUT2P1 C154 C155
R15
AOUT2N1 39p 39p
P14 R125 0
AOUT2N2
H17 C156
AOUT3P
J17 39p
AOUT3N C157 SPK_P
G11
TDO_ABB 39p C159
F13
TMS 39p
E13
TDI_ABB SPK_N
F12
TCK_ABB
4. TROUBLE SHOOTING
CHECKING FLOW
4. TROUBLE SHOOTING
4.9 MIC Trouble
Check
point
MIC200
OB4-15L42-C33L
Figure 4-21
CIRCUIT DIAGRAM
2V5_VMIC
R210
1K
R212 C221 C219

2.2K 120p 10u
R213
100ohm
VINNORP
MIC200
C225 C226 1
39p 2
R215 39p
100ohm OB4-15L42-C33L
VINNORN SUMY0003802
C227
0.1u R218
2.2K
C230 C231 VA203 VA204

39p 39p ICVS0505481FR ICVS0505481FR
SEVY0007901 SEVY0007901
4. TROUBLE SHOOTING
CHECKING FLOW
4. TROUBLE SHOOTING
4.10 Earphone Trouble
Figure 4-22
CIRCUIT DIAGRAM

2V5_JACK
L KEY_PUSH
R201 4.7K 1 5
1K STBY NC
2 6
C200 R202 GND BGND
0.1u R203 R204 3 4
20K 1K 0 VIN VOUT
EUSY0223007
C201
NA
C204 C202
39p 33u
ECTH0005201 C205 C203
1u 1u
2V8_VEXT 2V8_VEXT
ELCH0010401
C207 R205
C206 39p
39p L200 2.2uH J200
1M C208 10u R206
AUXOP_FML
C209 0.1u (1608) 4.7 L201 2.2uH
HEADSET_MIC_P
5 4 VIN-
1 VCC
AUXON_FMR
U201 2 R209 C212 (1608) 4.7
FM_ANT
NCS2200SQ2T2G 39p C211 15p ENJE0003102
R208 1M
EUSY0250501 KJA-PH-3-0059
C213 39p
C214 15p
39p
330K
8p
L203
C215
C216
270nH
VA201
VA200
VA202
ELCH0001556
1608
JACK_DETECT
EVLC18S02003
(NA) (270nH)
H INSERT
BOT PLACE(NA)
4. TROUBLE SHOOTING
CHECKING FLOW
4. TROUBLE SHOOTING
Earphone receiving path problem
Earphone detect problem
4. TROUBLE SHOOTING
Earphone sending path problem
C307 NA
C308 NA
C309 NA
C310 NA
C311 NA
C312 NA
Checking Flow
LD300 R337
QSMR-C13B

100ohm
KEY_BACKLIGHT
VBAT
LD301 R338
QSMR-C13B
100ohm
LD302 R339
QSMR-C13B
EDLH0013501
100ohm
LD303 R340
1K
QSMR-C13B
R349
100ohm
Copyright © 2007 LG Electronics. Inc. All right reserved.

LD304 R341
QSMR-C13B
100ohm
7.5K
R350
2
LD305 R342
KEY BACKLIGHT
QSMR-C13B
100ohm
1
3
Q300
UMT2222A
- 61 -
LD306
Figure 4-23
R343
QSMR-C13B
100ohm
LD307
VA315
R344
4.11 KEYPAD Backlight LEDS Trouble
QSMR-C13B
100ohm
LD308 R345
ICVS0505481FR
QSMR-C13B
100ohm
LD309 R346
QSMR-C13B
100ohm
LD310 R347
QSMR-C13B
100ohm
LD311 R348
QSMR-C13B
100ohm
VBAT
C313 NA
C314 NA
C315 NA
C316 NA
C317 NA
C318 NA
LGE Internal Use Only

4. TROUBLE SHOOTING
4. TROUBLE SHOOTING
4.12 SIM Trouble
Figure 4-24
Checking Flow
4. TROUBLE SHOOTING
2V85_VSIM
2V85_VSIM
SIM CONNECTOR
R118
20K
SIM_DATA
J100
1 4
VCC GND1
2 5
SIM_RST RST VPP
3 6
SIM_CLK CLK IO
7 10
GND2 GND5
8 9
GND3 GND4
ENSY0016601
HSSC-6p-25
C150 C151 C152 C145
NA NA 220n
1000p
4. TROUBLE SHOOTING
4.13 Vibration Trouble
Q400
EMZ2
Figure 4-25
VBAT
R407
VBAT
47K
R408 R409
Q400
10 220
4
VIBRATOR
3
2
R411
MOTOR
1
4.7u
7.5K
27p
EDSY0009901
KDS160E
EMZ2
D400
EQBA0002701
C421
C422
4. TROUBLE SHOOTING
5. DOWNLOAD
5. DOWNLOAD
5.1 Download
Download with GSMULTI

Firstly, run the “GSMULTI” shown as the following picture.
Then turn the switch on the multidownloader to “ADI”.

Thereafter, you should configure the setting by press the tab “Setting-> Configuration”.
See the following picture for detail:
5. DOWNLOAD
Firstly, for initial download, you should choose the .dll file.
Then choose the .mot file you want to download.
The loader should be set as :Cmd.mo;
According to you equipment configuration, please choose the right Baund rate your equipment
support.
For “Option(ADI)”, “Common” should be chosen.
After confirm by press “OK”, you can download by connect your phone with the cable of
multidownloader
6. CIRCUIT DIAGRAM
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
1V8_VRTC
R100
1K
BACK_BATT
VBAT 2V8_VEXT 2V8_VMEM 2V85_VSIM VBAT
1V8_VCORE
A
URT100
3G 2.5G
MEMORY(Spansion) A
GND GND
1
C105
(1608,4V)
(256 + 64PSRAM)
2 0.1u
RX RX USC1 C101 C102 C103 C104 C107 C108 C109 C110
3
TX TX USC2 0.1u 22p 0.1u 22p C100 C106 0.1u 10u 22p 0.1u
4
UFLS NC1 22u 22p
5 2V8_VMEM 1V8_VCORE 2V75_VVCXO
ON_SW ON_SW RPWRON U102
6
VBAT VBAT S71PL256NC0_TLA084
7
EUSY0288701
U13
U12
A10
E15
B11
PWR
F15
T11
NC2
M1
H1
D1
C1
N1
K1
A4
A6
E6
A9
P1
T9
L1
J1
8 2V8_VEXT 2V75_VABB 2V5_VMIC 2V85_VSIM
URXD NC3
9 G2 J3
UTXD NC4 ADD01 A0 DQ0 DATA00
VEXT02
VEXT1
VEXT2
VEXT3
VMEM1
VMEM2
VMEM3
VMEN4
VSIM_2
VBAT11
VBAT12
VBAT21
VBAT22
VBAT3
VBAT8
VDDRTC
VCORE1
VCORE2
VCORE3
VCORE4
VPEG
3 10 K7 F2 G4
DSR DSR ADD0 ADD02 A1 DQ1 DATA01
11 J6 E2 K4
RTS USC5 ADD01 ADD1 ADD03 A2 DQ2 DATA02
12 K5 D2 H5
CTS USC4 ADD02 ADD2 C111 1u ADD04 A3 DQ3 DATA03
H7 C11 F3 H6
ADD03 ADD3 VEXT01 C112 1u ADD05 A4 DQ4 DATA04
G4 R13 E3 K7
ADD04 ADD4 VMEM C113 2.2u ADD06 A5 DQ5 DATA05
G5 G17 D3 G7
B ADD05 ADD5 VABB C114 1u ADD07 A6 DQ6 DATA06 B
G9 U11 C3 J8
ADD06 ADD6 VCORE C115 2.2u ADD08 A7 DQ7 DATA07
H8 P16 C7 K3
ADD07 ADD7 VMIC C116 1u ADD09 A8 DQ8 DATA08
G8 F16 E7 H4
ADD08 ADD8 VVCXO C117 1u ADD10 A9 DQ9 DATA09
F9 R14 F7 J4
ADD09 ADD9 VSIM ADD11 A10 DQ10 DATA10
F7 C8 K5
ADD10 ADD10 (1608) ADD12 A11 DQ11 DATA11
F8 A11 D8 J7
ADD11 ADD11 DATA0 DATA00 ADD13 A12 DQ12 DATA12
E9 D9 E8 H7 2V8_VMEM
E12 E8 F8 K8 2V8_VMEM
E16 C9 D9 H8
F11 A8 G9
ADD15 ADD15 DATA4 DATA04 ADD17 A16
E11 C8 F4 J5
ADD16 ADD16 DATA5 DATA05 ADD18 A17 F_VCC1
ADD17
ADD18
D16
D14
ADD17
ADD18
DATA6
DATA7
B8
E7
DATA06
DATA07
2V8_VMEM
ADDRESS ADD19
ADD20
E4
D7
A18
A19
F_VCC2
L5
D11 A7 E6 J6
ADD19 ADD19 DATA8 DATA08 ADD21 A20 R_VCC
D12 C7 E9
ADD20 ADD20 DATA9 DATA09 C118 ADD22 A21
D13 B7 F9 G3
C ADD21 ADD21 DATA10 DATA10 0.1uF ADD23 A22 VSS1 C
0.1uF
0.1uF
E10 C6 F6 J9
ADD22 ADD22 DATA11 DATA11 5 ADD24 A23 VSS2
1u
1u
B6
DATA12 DATA12
T6 D6 1 VCC K2 A1
KEY_COL0 KEYPADCOL0 DATA13 DATA13 ADD23_H RFU16 DNU1
C119
C120
C122
C121
U5 A5 4 K6 A10
KEY_COL1 KEYPADCOL1 DATA14 DATA14 ADD23 RFU17 DNU2
U6 C5 3 K9 M1
KEY_COL2 KEYPADCOL2 DATA15 DATA15 ADD23_L GND RFU18 DNU3
T7 L2 M10
KEY_COL3 KEYPADCOL3 2 U100 R101 RFU19 DNU4
U7 D5 L3
KEY_COL4 KEYPADCOL4 NHWR _UBS TC7SH08FS 100K RFU20
D4 L4 B2
NLWR _LBS RFU21 RFU1
T5 C4 WR L6 B3
KEY_ROW0 KEYPADROW0 NWR _WR RFU22 RFU2
U4 B5 RD L7 B4
KEY_ROW1 KEYPADROW1 NRD _RD RFU23 RFU3
R8 D3 ROM_CS100 L8 B5
KEY_ROW2 KEYPADROW2 NROMCS ADD24 RFU24 RFU4
R6 B3 RAM_CS100 L9 B6
C123 KEY_ROW3 KEYPADROW3 NRAMCS RAM_CS RFU25 RFU5
X100
MC-146_7pF
NA KEY_ROW4
R7
KEYPADROW4 NGPCS0
C3
A2
ROM_CS101
GP_CS
2V8_VMEM
ROM_CS H3
RFU6
B7
B8
3 NGPCS1 LCD_CS _RD _OE RFU7
4 T10 C6 B9
OSCIN _WR _WE RFU8
R103 U10 C10 C4 C2
D OSCOUT NDISPLAYCS ADD23_H C125 _LBS R__LB RFU9 D
2 1 10M B1 G2 D4 C9
26M_DBB CLKIN GPO_2 GPO_100 0.1uF _UBS R104 R__UB RFU10
H3 D6 F5
C124 R102 GPO_3 PRE_CHARGE_R 2V8_VMEM 47K R_CE2 RFU11
32.768KHz 100ohm C2 H4 H2 G5
C126 1000p NC1 GPO_4 AMP_SHDN 5 ROM_CS F__CE RFU12
EXXY0004601 NA D8 H2 1 VCC J2 G6
NC2 GPO_7 RADIO_AMP_SHDN GP_CS RAM_CS R105 R__CE1 RFU13
E1 H6 4 C5 G8
NC3 GPO_8 SPK_SEL ROM_CS 2V8_VMEM 47K _WP_ACC RFU14
F1 J3 3 D5 H9
NC4 GPO_9 ANT_SW1 ADD24 GND _RESET F__RST RFU15
F3 J4 R106 E5
NC5 GPO_10 ANT_SW2 2 _WAIT RY__BY
G1 J2 U101 100ohm R107
NC6 GPO_11 HEADSET_RADIO_SEL TC7SH08FS
G7 J5 0
NC7 GPO_16 PA_EN C127
H5 L7
NC8 GPO_17 PA_BAND 1000p
J9 L4
NC9 GPO_18
J12 K3
NC10 GPO_19 S_EN
K12 M6
NC11 GPO_20 S_DATA
L5 K2
NC12 GPO_21 S_CLK
L6 E14
NC13 GPI GPI
L8 P12
E
M8
M9
NC14
NC15 U104 ABBRESET
GPO_24
P11
H10
ABBRESET
LCD_CS 2V8_VMEM PRE-CHARGE
E
NC16 INT ABB_IRQ

P7 H9
P10
R2
NC17
NC18 AD6720 GPIO_4_INT
BSDI1
L10
L9 1
U103
NL27WZ32USG
8
C128
0.1uF
NC19 BSDO1 LCD_CS A1 VCC
R9
NC20 EUSY0280001 CSDO
K14 VCHARGE
T3 K15 2 7
NC21 CSDI1 ADD21 B1 Y1 MAIN_LCD_CS
T4 M16 VBAT
NC22 CSDI2 M_CS
N16 3 6 VBAT
CSDO_2 SUB_LCD_CS Y2 B2 LCD_CS
M2 K11
VIBRATOR GPIO_0 BSDO2 S_CS
N4 K10 4 5
DEBUG_RX GPIO_1 BSDI2 GND A2 ADD22 C129 R108
N3 L12 10
_WAIT GPIO_2 MCLKEN MCLKEN 0.1u
N2 L13
DEBUG_TX GPIO_3 CLKOUT_GATE
N8 K9
FLIP GPIO_5 BSOFS2
P9 K8
HOOK_DETECT GPIO_6 BSIFS2 C130
P2 J11 27p LD100
F RADIO_DETECT GPIO_7 BSIFS1 R109 EDLH0007901 F
P3 J10 1K
JACK_DETECT GPIO_8 BSOFS1 Q101 SSC-FR104-II1
R1 B10
CAM_HOLD GPIO_9 VCXOEN CLKON
T1 B9
AIT_13M GPIO_10 CLKON CLKON
R3 J14
4
ASFS 3
LCD_RESET GPIO_11 ASFS2 R110 Q100
T2 J13 R112 2
2SC5585
C131 ADD23_L GPIO_12 ASFS1 PRE_CHARGE_R
U1 J8 7.5K
5
EQBN0007101
R111
39p CHG_DET GPIO_13 ASDO1 1.5K R113
10K
1
P5 J7 10K
CAM_RST GPIO_14 ASDI1
U2 H12
6
FM_RST GPIO_15 ASDI2 R114
R4 H11 UMX1NTN 270
FM_SDA GPIO_16 ASDO2
P6 U15 D100 EQBA0000406
LCD_ID GPIO_17 DBBON
E5 U14 1
GPIO_22 PWRON
E3 N15 3
SIM_RST GPIO_23 TXON TXON RPWRON
D2 N14 2
FM_SCL GPIO_24 GPO_1_TXON
E2 M12
SIM_DATA SIMDATAOP RXON RXON R115
E4 N12 KDS121E
SIM_CLK SIMCLK GPO_0_RXON EDSY0005701 100K
B2 M11
C DSR GPIO_32 CSFS2 C
R10 M10 2V85_VSIM
2V85_VSIM
GPO_101 GPO_5 CSFS1 R116
F14 R12
CHARGE H13
LIGHT1
LIGHT2
RESET
NRESET
A3 200
_RESET
SIM CONNECTOR
1V8_VRTC J15 M15
LIGHT3 GPO_6_ASM ASM C132 C133
P8 L15 ASM 47n 47n
KEY_BACKLIGHT GPO_22 ASM
VBAT VCHARGE R5 L14
LCD_DIM_CTL GPO_23 MCLK CLKOUT
T12 M14 R118
VMEMSEL CLKOUT_MCLK C135 1u
C134 1u D17 A15 20K
R117 REF REFBB
2.2K C136 1u C15 E17
C139 REFOUT AFCDAC AFC
(2012,10V) 10u C14 C16 2V8_VCAM
(1608,4V) TEMP1 PA TX_RAMP
EDSY0012101
C137 A13 A16

C138 TEMP2 IP IP SIM_DATA
C140 10u 4.7u A14 B16
R119 1u D101 AUXADC1 IN IN C141 C142
0.2 B14 B17 47p 0.068u
CUS02 AUXADC2 QP QP C143
T13 A17 0.1u
ERHY0001102 VRTC QN QN
C12 T15 J100
R120 330 VCHG SPWR2
A12 P13 1 4
D GATEDRIVE SPWR1 VCC GND1 D
C13 M17 2 5
ISENSE AIN1P VINNORP SIM_RST RST VPP
B13 N17 3 6
VBATSENSE AIN1N VINNORN SIM_CLK CLK IO
Q102 F17 P17 7 10
REFCHG AIN2N HEADSET_MIC_N GND2 GND5
B12 R17 8 9
G S BATTYPE AIN2P C144 220n HEADSET_MIC_P GND3 GND4
4 5 F5 L16
D3 D4 TCK GPIO_18 AIN3P FM_SPK
3 6 F2 L17 R121 0 ENSY0016601
D2 D5 TMS GPIO19_TMS AIN3N C146 C147 C148 C149 HSSC-6p-25
2 7 F6 H16 R122 4.7 39p 39p 39p 39p
D1 D6 TDI GPIO_20 AOUT1P REC_P C150 C151 C152 C145
1 8 G3 K17 R123 4.7 NA NA 220n
TDO1 GPIO_21_TDI AOUT1N REC_N 1000p
TPCF8102-TE85L-F F4 P15
EQFP0004201 JTAGEN JTAGEN AOUT2P2 R124 0 C153
T16 R16
KEY_ROW0 KEYOUT AOUT2P1 C154 C155 39p
U17 R15
POWERKEY KEYON AOUT2N1 39p 39p
R126 82K M5 P14 R125 0
USC0 USC0 AOUT2N2
L3 H17 C156
BATT_TEMP USC1 USC1 AOUT3P
M7 J17 39p
USC2 USC2 AOUT3N C157 SPK_P
L2 G11
C158 USC3 USC3 TDO_ABB 39p C159
M3 F13
E 0.1u USC4 USC4 TMS 39p E
VSSRTC
N6 E13
AGND04
AGND06
AGND31
AGND05
AGND36
AGND32
AGND12
AGND01
AGND02
AGND03
AGND33
AGND34
AGND35
AGND11
SGND2
AGND2
AGND4
SGND1
USC5 USC5 TDI_ABB SPK_N

GND54
GND63
GND52
GND61
GND51
GND62
GND10
GND11
GND56
GND55
GND53
DGND
GND4
GND9
GND2
GND7
GND3
GND8
GND1
LGND
N5 F12
FM_32K USC6 TCK_ABB
Section Date Sign & Name Sheet/
N9
N11
F10
R11
N10
N13
G10
T14
H14
H15
T8
D7
G6
P4
C17
K6
D15
A1
M4
K4
D10
B15
B4
N7
U3
U8
K16
T17
U16
U9
J16
G16
L11
M13
K13
G12
G13
G14
G15
R127 0
Sheets
R128 0
HEADSET_SPK_OUT_P
HEADSET_SPK_OUT_N 12/20 MG230/MG235
MG230d
Designer HTEL MODEL
2006 (SPFY0145101)
C160
39p
C161
39p 1/7
Checked
HOLE DRAWING
F OJ100 OJ102 BB
Approved NAME
OJ101 OJ103
DRAWING
Iss. Notice No. Date Name LG Electronics Inc. NO.
REV.1.1
1 2 3 4 5 6 7 8 9
LG(42)-A-5505-10:01 LG Electronics Inc.

LGMC
6. CIRCUIT DIAGRAM
1 2 3 4 5 6 7 8 9 10

2V5_JACK A
A
L KEY_PUSH
R201 4.7K 1 5
1K STBY NC
2 6
C200 R202 GND BGND
0.1u R203 R204 3 4
20K 1K 0 VIN VOUT
EUSY0223007
C201
NA
C204 C202
39p 33u
ECTH0005201 C205 C203
1u 1u
2V8_VEXT 2V8_VEXT
ELCH0010401
C207 R205
C206 39p
39p L200 2.2uH J200
1M C208 10u R206
AUXOP_FML
C209 0.1u (1608) 4.7 L201 2.2uH
HEADSET_MIC_P
5 4 VIN-
1 VCC
AUXON_FMR B
U201 2 R209 C212 (1608) 4.7
FM_ANT
NCS2200SQ2T2G 39p C211 15p ENJE0003102
R208 1M
EUSY0250501 KJA-PH-3-0059
C213 39p
C214 15p
39p
330K
8p
L203
C215
C216
270nH
VA201
VA200
VA202
ELCH0001556
1608
JACK_DETECT
EVLC18S02003
(NA) (270nH)
H INSERT
BOT PLACE(NA)
VBAT
SPEAKER-RECEIVER SELECTION 2V5_VMIC
C
C217 C218 R210

2.2u 0.1u 1K
VBAT
R211 R212 C221 C219

10u C222 2.2K 120p 10u
C223 47K C220 1u U203
220p NLAS5223BMNR2G
1 10 (N)
1 R213
_SHDN AMP_SHDN (P)
6 2 9 100ohm
VCC NO1 COM2 SPK_RCV_N VINNORP
8 MIC200
OUT-
2 3 8
C226 1
BIAS SPK_RCV_P COM1 IN2 C225
C224 R214 5 39p 2
0.068u OUT+
10K 3 4 7
R215 39p
7 100ohm OB4-15L42-C33L
C228 GND R217 VINNORN SUMY0003802
R216 4 100K 5 6 C227
0.1u
D 10K 9 R218 D
PGND 2.2K
EUSY0300101
SPK_SEL
EUSY0304901
C229 C230 C231 VA203 VA204
1u 39p 39p ICVS0505481FR ICVS0505481FR
R220 SEVY0007901 SEVY0007901
R219
47K 100K
C232
220p
CLOSE TO MIC
11/20
MODEL MG230d
MG230/MG235 Sheets
Designer
2006
HTEL (SPFY0145101) 2/7
E Checked
DRAWING
NAME AUDIO
Approved
DRAWING
Iss. Notice No. Date Name
LG Electronics Inc. NO.
REV.1.1
1 2 3 4 5
LGIC(42)-A-5505-10:01 LG Electronics Inc.

LGMC
6. CIRCUIT DIAGRAM
1 2 3 4 5 6 7 8 9 10
VOL_UP VOL_DOWN
VBAT
CN300
I/O CONNECTOR
4
3
2
1
R300 END PIN DAI UART
10K
SW300 USC0 CLOCK -
POWERKEY USC1 RX RXD

R301 680
A USC2 TX TXD A
ICVS0505481FR
ICVS0505481FR
- RTS/CTS(PC)
ICVS0505481FR
CLR FAV USC4
VA300
VA301
VA302
USC5 - CTS/RTS(PC)
SW301 SW302 SW303
T USC6 RESET -
R302 680
KEY_ROW0
ICVS0505481FR
SEVY0007901
1 2 3 LEFT
VA303
SW304 SW305 SW306 SW307 SW308 MENU
2V8_VMEM
VCHARGE
2V8_VEXT
JTAGEN
_RESET
VBAT
TDO1
TMS
TCK
TDI
R303 680
KEY_ROW1
2V8_VEXT
ICVS0505481FR
CN301
SW309 SW310 SW311 SW312 SW313 GT05B-24P-4B-S2-P700
VA304
4 5 6 UP SEL
NA
NA
NA
NA
NA
NA
NA
NA
25
100K
100K
100K
100K
100K
26
R316 680
KEY_ROW2 29
R304
R305
R306
R307
R308
R309
R310
R311
ICVS0505481FR
31
B 1 B
R312
R317
R313
R314
R315
2
VA305
SW314 SW315 SW316 SW317 SW318

7 8 9 RIGHT SEND R318 47 3
DSR
4
(GPIO_32) 5
R319 680 R320 47 6
KEY_ROW3 RPWRON
ICVS0505481FR
7
R321 47 8
VA306
USC0
SW319 SW3200 SW321 SW322 SW323 9
* # DOWN CONF 10
11
12
R322 680 R323 47 13
KEY_ROW4 USC1
ICVS0505481FR
R324 47 14
USC2
15
VA307
16
R325 47 17
USC3
R326 47 18
DEBUG_TX
19
R327 47 20
USC5
21
22
R328 47 23
R329 680 USC4
R330 47 24
C KEY_COL0 DEBUG_RX C
R331 680 32
KEY_COL1 30
R332 680 BATT_TEMP 27
KEY_COL2 C300 28
R333 680
KEY_COL3 VA308 ENRY0003501
1u
ICVS0505481FR
R334 680 ICVS0505481FR
KEY_COL4
Trace32
ICVS0505481FR
ICVS0505481FR
ICVS0505481FR
ICVS0505481FR
ICVS0505481FR
10u
0.1u
PIN DAI
39p
10p
CHG_DET
(GPIO_13) R335
VA309
VA310
VA311
VA312
VA313
47K Pin 1 JTAGEN
C303
C304
C305
R336 Pin 2 _RESET
C302
VA314
C306
47K 1u TMS
Pin 7
Pin 9 TCK
Pin 11 TDI
Pin 18 TDO_1
VBAT VBAT
Pin 24 2V8
KEY BACKLIGHT
D D
NA
NA
NA
NA
R338
R339
NA
NA
NA
NA
NA
R337
100ohm
R340
100ohm
R341
100ohm
R342
100ohm
R343
100ohm
R344
100ohm
R345
100ohm
R346
100ohm
R347
100ohm
R348
100ohm
NA
NA
NA
100ohm
100ohm
C307
C318
C311
C312
C313
C314
C308
C309
C310
C315
C316
C317
QSMR-C13B
QSMR-C13B
QSMR-C13B
QSMR-C13B
QSMR-C13B
QSMR-C13B
QSMR-C13B
QSMR-C13B
QSMR-C13B
QSMR-C13B
QSMR-C13B
QSMR-C13B
LD300
LD301
LD302
LD303
LD304
LD305
LD306
LD307
LD308
LD309
LD310
LD311
EDLH0013501

MG230/MG235
MG230d Sheets
11/20 MODEL
KEY_BACKLIGHT
R349 2
3
Q300 VA315 Designer 2006 HTEL (SPFY0145101) 3/7
1K UMT2222A ICVS0505481FR
R350 1
7.5K
E Checked
DRAWING
NAME
KEY, I/O
Approved
DRAWING
REV.1.1
1 2 3 4 5

LGMC
6. CIRCUIT DIAGRAM
1 2 3 4 5 6 7 8 9 10
VBAT
1V8_VCAM U402 AIT701G U400
A R400 0 A
PGPIO0
E9
VSYNC_OUT
AAT3120ITP-20-T1
D9 10 4
PGPIO1 TP400 IN C1+
C10 C400
PGPIO2
H5 B9 C401 1u
VDD_CORE PGPIO3
C403 A7 2 3
PGPIO4 1u OUT C1-
H6 B7 1
GND_CORE PGPIO5 C2+ C402
0.01u F9
PGPIO6
D10 9 1u
PGPIO7 LCD_DIM_CTL EN_SET
12
C2-
D3 A10 R401 8
PSCAN_EN PLCD0 L_DATA00 D1 MLED1
E10 B10 100K 7
PTEST_EN PLCD1 L_DATA01 D2 MLED2
A9 6
PLCD2 L_DATA02 C404 D3 TP401
C9 11 5
PLCD3 L_DATA03 1u GND NC
D8
PLCD4 L_DATA04
A8 EUSY0253601
PLCD5 L_DATA05
J3 B8
DATA00 PHD0 PLCD6 L_DATA06
H3 C8
DATA01
DATA02
K4
PHD1
PHD2
PLCD7
PLCD8
C7
L_DATA07
L_DATA08
LCD BACKLIGHT
J4 C6
K5 B6
J5 C5
K6 B5
J6 A6
DATA07 PHD7 PLCD13 L_DATA13 B
B K10 C4
J9 A5
H10 B4
DATA10 PHD10 PLCD16
H9 C3 2V8_VCAM 2V8_VEXT VBAT
DATA11 PHD11 PLCD17
G10 2V8_VCAM 1V8_VCAM
DATA12 PHD12
G9 F8
DATA13 PHD13 GND_IO2
G8 E8 U401
DATA14 PHD14 VDD_IO2
F10 A2
R402
100K
DATA15 PHD15 PLCD2_CS_ L_SUB_LCD_CS RT9011-MGPQW
B2 C405
PLCD1_CS_ L_MAIN_LCD_CS
A3
LCD_RD
EUSY0319001
PLCD_RD_ 1u
B3 1 8
PLCD_A0 LCD_RS VIN VOUT1
K7 A4 2 7
CAM_HOLD PHLCD_BY PLCD_WE_ LCD_WR EN1 VOUT2
PGND
3 6
EN2 NC2
K1 E3 4 5
MAIN_LCD_CS PHCS_ PHSYNC C_HS NC1 GND
J1 G1
_RD PHRD_ PVSYNC C_VS R403 C407 C408
9
K2 E2
_WR PHWE_ PD0 C_CD00 NA C406 1u 1u
J7 E1
ADD01 PHLCD_A0 PD1 C_CD01 1u
J8 D1
CAM_INT PHINT PD2 C_CD02
CAM_INT D2
PD3 C_CD03
2V8_VCAM K3 C2
CAM_RST PRST_ PD4 C_CD04
C1
SUB_LCD_CS PD5 C_CD05
K8 A1
C409
PHLCD2_CS_ PD6
PD7
B1
C_CD06
C_CD07
AIT POWER
J10
C 33p PHGPIO_CS_ C
R404 H1
TP402 PSEN CAM_PWR_EN
68K H2
PSDA C_SDA
F2 G2
C_RST PS_RST_ PSCK C_SCK
K9 F3
_WAIT PHWAIT_ PDCLK C_MCLK
C410 1000p J2 F1
AIT_13M PMCLK PPXL_CLK C_PCLK
G3 H8
C411
VBAT
VDD_IO0 VDD_IO1
H4 H7 2V8_VCAM
GND_IO0 GND_IO1 39p
C412 R405
C_PWR_AVDD C_PWR_DVDD
1uF 100K
EUSY0318501 U403
RT9011-MGPQW
C413 1 8
VIN VOUT1
2 7
CAMERA CTL IC 1uF CAM_PWR_EN EN1 VOUT2
PGND
3 6
EN2 NC2
4 5
NC1 GND
C414 C415 C416
R406
9
1u EUSY0319001
100K 1u 1u
D CAM POWER D
VIBRATOR
VBAT
VBAT
R407
FLIP SWITCH
47K
R408 R409
Q400 2V8_VMEM
10 220 Section Date Sign & Name Sheet/
R410
MG230d
MG230/MG235
4
VIBRATOR 51K MODEL Sheets

3
11/20
FLIP Designer 2006
HTEL (SPFY0145101) 4/7
U404
2
R411 VDD
G1
MOTOR
1
4.7u
E 7.5K
27p
EDSY0009901
C417 C418 OUT G2

C419 C420 Checked
KDS160E
EMZ2 A3212EELLT-T 10p 27p DRAWING

27p 0.1u
CAMERA, MMI
D400
EQBA0002701
NAME
C421
C422
Approved
DRAWING
LG Electronics Inc. REV.1.1
NO.
1 2 3 4 5

LGMC
6. CIRCUIT DIAGRAM
1 2 3 4 5 6 7 8 9 10
TP500 TP501 TP502

VBAT
A
R500 100ohm
PA_BAND
R501 100ohm
0.01u
PA_EN
TCTP0J336M8R
33u
12p
33p
18p
ECTH0005201
C580 1.2p R503 1K
TX_RAMP
C501
C502
C500
C503
C504
C505 C506 C507
R504
39p 27p 27p

0
L590
3.9nH
C508 C509
R506
0.01u 0.01u
20
17
0
2
4dB
VAPC
VBATT
VCC1B
VCC1A
15 3 R507 C510 33p
SW500 DCS_PCS_OUT DCS_PCS_IN
KMS-512 ENWY0002304 R508
R509
R510
24
220
220
11 4
ANT
B 1.5nH EGSM_OUT U500 EGSM_IN

SKY77318
G1
G2
19 18
C511 C512 RSVD_GND SMPY0014001 ENABLE 26M_DBB
RF
0.5p NA R513 C513 10p

21 1
P_GND BS
30
R512 R514
GND9
GND8
GND7
GND6
GND5
GND4
GND3
GND2
GND1
180 180 QP C514
C515 47p
39p
16
14
13
12
10
9
8
7
5
1000p
C518
L500 QN
2V8_VMEM VBAT 2V75_VVCXO
39p
C519
5dB
C516
NA NA C520 R515
0.1u AFC
C517 1K R516
22p
C521 0
C522 C523 C524 0.1u
24
23
22
21
20
19
18
17
27p 39p 0.1u
VCC_BBQ
Q
QB
REF_OP
REFIN
REFINB
VAFC_NC
VCC_REF
C525 47p
RX1900B
25
GND7 GSM850_900_TX RX1900 VLDO2
20 12 L501 26 16
C GND6 GSM1800_1900_TX RX1800B VLDO1 C
19 10 6.8nH 27 15
GND5 RX1800 AD6548 VBAT
18 C526 47p ELCH0001408 28 14
GND4 GSM1900_RX_OUT2 RX900B U501 VDD
16 8 29 13
GND3 GSM1900_RX_OUT1 RX900 EUSY0280101 VCC_TXVCO C528 C529 C530
13 7 C527 39p 30 12
GND2 GSM1800_RX_OUT2 RX850B TXOP_HI C531 C532 C534 0.1u 0.1u 0.1u
11 6 31 11
GND1 GSM1800_RX_OUT1 RX850 TXOP_LO 27p 0.1u 220n
VCC_BBI
9 5 L502 32 10
VCC_FE
GSM900_RX_OUT2 VLDO3
SDATA
4 7.5nH 9
SCLK
SEN
GSM900_RX_OUT1 GND C536
NC
3 C535 39p ELCH0003817 33
IB
VC2 GSM850_RX_OUT2 0.1u
ANT
I
15 2
VC1 GSM850_RX_OUT1
1
2
3
4
5
6
7
8
14 1 C537 68p
LSHS-M085FJ
17
FL500 L503
18nH S_DATA
ELCH0001032 S_EN
C538 68p
S_CLK
C539 56p
IP C540 C541 C542
L504 C543 27p 27p 27p
33nH 39p
ELCH0005006 IN
C544 56p
R590 130
ANT_SW1 X500 NX3225DA(W-191-451)
D ANT_SW2 4 3 D
R591 130 1 2
C545 C546 26MHz

39p 39p EXXY0018403
MODE VC1 VC2
GSM1800/1900 RX L L
GSM850/900 RX L L
H L
GSM850/900 TX
MODEL
MG230/MG235
MG230d Sheets
GSM1800/1900 TX L H 11/20 HTEL (SPFY0145101)
Designer 5/7
2006
E Checked
DRAWING
NAME RF_AERO II
Approved
DRAWING
LG Electronics Inc. REV.1.1
NO.
4 5

LGMC
6. CIRCUIT DIAGRAM
1 2 3 4 5 6 7 8 9 10
128x128 Main TFT , 96x64 Mono Sub CONNECTOR

A
VGA CAMERA A
(25p,400,25p) FL600 ICVE21054E250R401FR

1 9
L_DATA00 INOUT_A1 INOUT_B1
2 8
3 7 AXK7L60227J
4 6 ENBY0020402
G4 G3
G1
G2
5
10
SFEY0007102
(25p,400,25p) FL601 ICVE21054E250R401FR 31 30 (25p,400,25p) FL602 ICVE21054E250R401FR

1 9 1 9
L_DATA04 INOUT_A1 INOUT_B1 INOUT_A1 INOUT_B1 L_DATA08
2 8 32 29 2 8
3 7 3 7
4 6 33 28 4 6
G1
G2
G1
G2
34 27
5
10
5
10
SFEY0007102 SFEY0007102
35 26
36 25
R600 100ohm (25p,400,25p) FL603 ICVE21054E250R401FR
LCD_RESET
B R601 10K 37 24 1 9 B
LCD_ID INOUT_A1 INOUT_B1 L_DATA12
2 8
INOUT_A2 INOUT_B2 L_DATA13
38 23 3 7
INOUT_A3 INOUT_B3 L_DATA14
4 6
C600 C601 INOUT_A4 INOUT_B4 L_DATA15
39 22
27p
G1
G2
47p
40 21
5
10
SFEY0007102
MLED1
(15p,100,15p) FL604 ICVE21184E150R101FR 41 20
1 9
L_MAIN_LCD_CS INOUT_A1 INOUT_B1 MLED2
2 8 42 19
L_SUB_LCD_CS INOUT_A2 INOUT_B2
3 7
LCD_WR INOUT_A3 INOUT_B3 C602 C603
4 6 43 18
LCD_RS INOUT_A4 INOUT_B4 27p 27p
VSYNC_OUT
G1
G2
44 17
5
10
SEVY0005501 (IF_MODE2) ELCH0005009

C_PWR_DVDD 45 16
2V8_VCAM L600 100nH
(IF_MODE1) SPK_RCV_N
46 15 C604
47p
SPK_RCV_P
47 14 L601 100nH
ELCH0005009
C606 C605
48 13 27p 27p
L602
C MOTOR (LCD_RD) C
100nH C_PWR_AVDD 49 12
C607
1u BACK_BATT
50 11
51 10 FL605 ICVE21184E150R500FR
R602 (15p,50,15p)
1 9
CAM_PWR_EN INOUT_A1 INOUT_B1 C_CD00
FL606 ICVE21184E150R500FR 1K 52 9 2 8
(15p,50,15p) INOUT_A2 INOUT_B2 C_CD01
1 9 3 7
C_MCLK INOUT_A1 INOUT_B1 INOUT_A3 INOUT_B3 C_CD02
2 8 53 8 4 6
C_PCLK INOUT_A2 INOUT_B2 INOUT_A4 INOUT_B4 C_CD03
3 7
C_HS INOUT_A3 INOUT_B3
G1
G2
4 6 54 7
C_VS INOUT_A4 INOUT_B4
5
10
SFEY0007103
G1
G2
55 6
5
10
SFEY0007103
56 5
FL607 ICVE21184E150R500FR
(15p,50,15p)
FL608 ICVE21184E150R500FR 57 4 1 9
(15p,50,15p) INOUT_A1 INOUT_B1 C_CD04
1 9 2 8
C_SDA INOUT_A1 INOUT_B1 INOUT_A2 INOUT_B2 C_CD05
2 8 58 3 3 7
C_SCK INOUT_A2 INOUT_B2 INOUT_A3 INOUT_B3 C_CD06
3 7 4 6
C_RST INOUT_A3 INOUT_B3 INOUT_A4 INOUT_B4 C_CD07
4 6 59 2
INOUT_A4 INOUT_B4
G1
G2
C608 C609 C610 C611
G1
G2
60 1
5
10
27p 1u 27p 27p SFEY0007103
D D
5
10
SFEY0007103
4.7K
4.7K
C_PWR_AVDD G2 G1
CN600
R603
R604

MODEL MG230/MG235
MG230d Sheets
11/20
Designer 2006 HTEL (SPFY0145101) 6/7
E Checked
DRAWING
NAME
FOLDER
Approved
DRAWING
REV.1.1
1 2 2V8_VCAM 3 4 5

LGMC
6. CIRCUIT DIAGRAM
1 2 3 4 5 6 7 8 9 10
2V8_VMEM RADIO_DETECT MG230 : R710, R706 is 0ohm

H KP200
A
A L MG230
Other Componant NA
R700
51K
RADIO_DETECT
R701
NA
KP200 : Only R710, R706 is NA
2V8_VEXT
FM TUNER R702
0
B
TP700
EAR-MIC MUX
21
20
19
18
17
16
PGND
NC2
GPIO1
GPIO2
GPIO3
VA
1 15
EAR-MIC AMP
C700 100p NC1 GND3 C701 1u (L)
VARISTER_NA_1005
2 14 2V8_VEXT
FM_ANT FMIP U700 LOUT C702 1u 2V8_VEXT
3 13
RFGND
4
GND1
SI4702-B16 ROUT
GND2
12 (R)
5 EUSY0320801 11
FM_RST _RST VD
varistor
RCLK
_SEN
SCLK
SDIO
C703 C704 C705

VIO
V700
1u 1u C706 0.1u
1u U701
6
7
8
9
10
NLAS5223BMNR2G
2V8_VEXT 2V8_VEXT U702 1 10
VCC NO2 RADIO_SPK_L
D1
A3
LM4926ATLX
R703 2 9
RADIO_SPK_R AUXOP_FML
AVDD+
CPVDD
NO1 COM2
10K C1 D2 R704 18
L_IN L_OUT RADIO_SPK_L 3 8 R706 C
R707 R708 1K R705 AUXON_FMR COM1 IN2
NA
B2
0.1u
4.7K 4.7K RADIO_AMP_SHDN B1

SD_LC
C2 R709 18
R710
4 7
R712
SD_RC R_OUT RADIO_SPK_R NA IN1 NC2 HEADSET_SPK_OUT_N
C707
C708 2.2u A4 D4 R711 0 5 6

FM_SCL 100K CCP+ VCP_OUT FM_SPK HEADSET_SPK_OUT_P NC1 GND
D3 C709
FM_SDA C4
AVDD-
EUSY0300101
CCP- 2.2u
B4
FM_32K A1
PGND
A2
HEADSET_RADIO_SEL
R_IN SGND TP701
C710
27p
D D

MG230/MG235
MG230d Sheets
MODEL
10/25
Designer
2006
HTEL (SPFY0145101) 7/7
E Checked
DRAWING
NAME FM_TUNER+AMP
Approved
DRAWING
REV.1.1
1 2 3 4 5

LGMC
6. CIRCUIT DIAGRAM
CAMERA CONN
C_PWR_AVDD C_PWR_DVDD
C100 C101
1u 1u
CN100
G1
CN101
1 60 1 20
C_PWDN
2 19
C_MCLK
2 59 3 18
L_D(0) L_D(8) C_RST
4 17
C_PCLK C_SCK
3 58 5 16
L_D(1) L_D(9) C_CD0 C_SDA
6 15
C_CD1
4 57 7 14
L_D(2) L_D(10) C_CD2 C_HS
8 13
C_CD3 C_VS
5 56 9 12
L_D(3) L_D(11) C_CD4 C_CD7
10 11
C_CD5 C_CD6
6 55
L_D(4) L_D(12)
7 54
L_D(5) L_D(13) C102 C103
8 53 NA NA
L_D(6) L_D(14)
9 52
L_D(7) L_D(15)
ENBY0019501 AXK720145G
10 51
LCD_RESET
11 50
LCD_ID MLED_1
12 49
L_MAIN_CS MLED_2
L_SUB_CS
13 48
SPEAKER FILTER
14 47
L_WR VSYNC_OUT
15 46
L_A(1)_RS ( IF_MODE2 : #16 - Low )
R100 0
SPKREC_N SPKREC_L_N
( IF_MODE1 : #33 ) 16 45
SPKREC_N
C104 C105
17 44
2V8_VCAM SPKREC_P 47p 10p
18 43 R101 0
C_PWR_DVDD SPKREC_P SPKREC_L_P
2V8_VCAM MAKER ID NEODIS LGIT
19 42 (42, L_RD)
VIB
LCD_ID HIGH LOW
20 41 LCD CONN
21 40 BAT1
C_PWR_AVDD
R102
10K
CN102
22 39 G1
C_PWDN C_CD0
(L_RD) 1 40
VSYNC_OUT
23 38 2 39
C_MCLK C_CD1 L_A(1)_RS L_WR
3 38
VIB L_D(8)
24 37 4 37
C_PCLK C_CD2 ( VIB_N : GND ) L_D(9)
5 36
( IF_MODE2 : #16 - Low ) L_D(10)
C_HS
25 36
C_CD3 VISION MARK MLED_2
6
7
35
34
L_D(11)
MLED_1 L_D(12)
26 35 8 33
C_VS C_CD4 (MLED_C) L_D(13)
9 32
L_D(7) L_D(14)
27 34 10 31
C_SDA C_CD5 L_D(6) L_D(15)
TP1 TP2 TP3 TP4 11 30
L_D(5) L_MAIN_CS
28 33 12 29
C_SCK C_CD6 L_D(4) LCD_ID
13 28
L_D(3) 2V8_VCAM ( IF_MODE1 : #33 - HIGH)
29 32 14 27 R103 10K
C_RST C_CD7 L_D(2)
2V8_VCAM 15 26
L_D(1) SPKREC_L_P
30 31 16 25
L_D(0) SPKREC_L_N
17 24
L_SUB_CS
18 23
G2 LCD_RESET ( RCV_P )
19 22
( RCV_N )
20 21
G2
C106 C107 C108
1u 0.1u 27p
ENBY0020201 AXK8L40125G
FPCB CONN ENBY0020202 AXK8L60125J

MODEL MG230/MG235
MG230d Sheets
Designer 061123 1/1
Checked
DRAWING
NAME LCD_FPCB
Approved
DRAWING
Rev.1.0
5
LG Electronics Inc.
LGMC
6. CIRCUIT DIAGRAM
1 2 3 4 5 6 7 8 9 10
A AA
B VOLUME SIDEKREY BB
KB2
CN1
4
KB1
3
2
1
TP1
C C
D D

MODEL Sheets
Designer 060614
MG1 SideKey
1/1
E Checked
DRAWING
NAME VOLUME_SIDEKEY_FPCB
Approved
DRAWING
Rev.1.0
1 2 3 4 5

LGMC
7. pcb layout
MG230/MG235
7. pcb layout
MG230/MG235
7. pcb layout
MG230/MG235
7. pcb layout
MG230/MG235
8. ENGINEERING MODE
8. ENGINEERING MODE
A. About Engineering Mode

Engineering mode is designed to allow a service man/engineer to view and test the basic functions
provided by a handset.
B. Access Codes
The key sequence for switching the engineering mode on is 2945#*#. Pressing END will switch back to
non-engineering mode operation.
C. Key Operation
Use Up and Down key to select a menu and press ‘select’ key to progress the test. Pressing ‘back’ key
will switch back to the original test menu.
D. Engineering Mode Menu Tree
Engineering Mode
BB Test RF Test MF Mode Trace Call Timer Fact. S/W

option Reset Version
CAMERA SAR Test All Auto Test UART On All Calls

LCD Backlight UART Off Reset
Backlight Buzzer Bluetooth on
Buzzer Vibrator Bluetooth off
Vibrator LCD
ADC Key PAD
Battery MicSpkTest
Audio Camera
DAI
Bluetooth
8. ENGINEERING MODE
8.1 BB Test [MENU 1]
8.1.1 CAMERA
This menu is to test the Camera.
1) Main LCD preview : It shows the picture on Main LCD.
8.1.2 LCD
Brightness : This controls brightness of Backlight. When entering into the menu, the present backlight-
value in the phone is displayed. Use Left/Right key to adjust the level of brightness. The
value of the brightness set at last will be saved in the NVRAM.
2) COLOUR : WHITE, RED, GREEN, BLUE, BLACK
8.1.3 Backlight
1) Backlight on : LCD Backlight light on.
2) Backlight off : LCD Backlight light goes to dimming state.
3) Backlight value : This controls brightness of Backlight. When entering into the menu, the present
backlight-value in the phone is displayed. Use Left/Right key to adjust the level of
brightness. The value of the brightness set at last will be saved in the NVRAM.
8.1.4 Buzzer
This menu is to test the melody sound.
1) Melody on : Melody sound is played through the speaker.
2) Melody off : Melody sound is off.
8.1.5 Vibrator
This menu is to test the vibration mode.
1) Vibrator on : Vibration mode is on.
2) Vibrator off : Vibration mode is off.
8. ENGINEERING MODE
8.1.6 ADC (Analog to Digital Converter)

This displays the value of each ADC.
1) MVBAT ADC : Main Voltage Battery ADC
2) AUX ADC : Auxiliary ADC
3) TEMPER ADC : Temperature ADC
8.1.7 BATTERY
1) Bat Cal : This displays the value of Battery Calibration. The following menus are displayed in order :
BAT_LEV_4V, BAT_LEV_3_LIMIT, BAT_LEV_2_LIMIT, BAT_LEV_1_LIMIT,
BAT_IDLE_LI MIT, BAT_INCALL_LIMIT, SHUT_DOWN_VOLTAGE,
BAT_RECHARGE_LMT
2) TEMP Cal : This displays the value of Temperature Calibration. The following menus are displayed
in order : TEMP_HIGH_LIMIT, TEMP_HIGH_RECHARGE_LMT,
TEMP_LOW_RECHARGE_LMT, TEMP_LOW_LIMIT
8.1.8 Audio
This is a menu for setting the control register of Voiceband Baseband Codec chip.
Although the actual value can be written over, it returns to default value after switching off and on the
phone.
1) VbControl1 : VbControl1 bit Register Value Setting
8.1.9 DAI (Digital Audio Interface)

This menu is to set the Digital Audio Interface Mode for Speech Transcoder and Acoustic testing.
1) DAI AUDIO : DAI audio mode
2) DAI UPLINK : Speech encoder test
3) DAI DOWNLINK : Speech decoder test
4) DAI OFF : DAI mode off
8.1.10 Bluetooth
This menu can’t use in this phone.
8. ENGINEERING MODE
8.2 RF Test [MENU 2]
8.2.1 SAR test

This menu is to test the Specific Absorption Rate.
1) SAR test on : Phone continuously process TX only. Call-setup equipment is not required.
2) SAR test off : TX process off
8.3 MF mode [MENU 3]

This manufacturing mode is designed to do the baseband test automatically. Selecting this menu will
process the test automatically, and phone displays the previous menu after completing the test.
8.3.1 All auto test

LCD, Backlight, Vibrator, Buzzer, Key Pad, Mic. & Speaker, Camera
8.3.2 Backlight
LCD Backlight is on for about 1.5 seconds, then dimming state.
8.3.3 Buzzer
This menu is to test the volume of Melody. It rings in the following sequence. Volume 1, Volume 2,
Volume 3, Volume 0 (mute), Volume 4, Volume 5.
8.3.4 Vibrator
Vibrator is on for about 1.5 seconds, then off.
8.3.5 LCD
Main LCD screen resolution tests horizontally and vertically one by one and fills the screen.
8.3.6 Key pad

When a pop-up message shows ‘Press Any Key’, you may press any keys including side keys, but not
[Soft2 Key]. If the key is working properly, name of the key is displayed on the screen. Test will be
completed in 15 seconds automatically.
8. ENGINEERING MODE
8.3.7 MicSpk Test

The sound from MIC is recorded for about 3 seconds, then it is replayed on the speaker automatically.
8.3.8 Camera Test

This menu is to test camera(preview and capture automatically.)
8.4 Trace option [MENU 4]

This is NOT a necessary menu to be used by neither engineers nor users.
8.5 Call timer [MENU 5]

This menu is to set the Digital Audio Interface Mode for Speech Transcoder and Acoustic testing.
1) All calls : This displays total conversation time. User cannot reset this value.
2) Reset settings : This resets total conversation time to this, [00:00:00].
8.6 Fact. Reset [MENU 6]

This Factory Reset menu is to format data block in the flash memory and this procedure set up the
default value in data block.
Attention
1 Fact. Reset (i.e.Factory Reset) should be only used during the Manufacturing process.
2 Servicemen should NOT progress this menu, otherwise some of valuable data such as Setting
value, RF Calibration data, etc. cannot be restored again.
8.7 S/W version

This displays software version stored in the phone.
9. STAND ALONE TEST
9. STAND ALONE TEST
9.1 Introduction
This manual explains how to examine the status of RX and TX of the model.
A. Tx Test
TX test - this is to see if the transmitter of the phones is activating normally.
B. Rx Test
RX test - this is to see if the receiver of the phones is activating normally.
9.2 Setting Method
A. COM port
a. Move your mouse on the “Connect” button, then click the right button of the mouse and select
“Com setting”.
b. In the “Dialog Menu”, select the values as explained below.
- Port : select a correct COM port
- Baud rate : 38400
- Leave the rest as default values
B. Tx
1. Selecting Channel
- Select one of GSM or DCS Band and input appropriate channel.
2. Selecting APC
a. Select either Power level or Scaling Factor.
b. Power level
- Input appropriate value GSM (between 5~19) or DCS (between 0~15)
c. Scaling Factor
- A ‘Ramp Factor’ appears on the screen.
- You may adjust the shape of the Ramp or directly input the values.
C. Rx
1. Selecting Channel
- Select one of GSM or DCS Band and input appropriate channel.
2. Gain Control Index (0~ 26) and RSSI level
- See if the value of RSSI is close to -16dBm when setting the value between 0 ~ 26 in Gain
Control Index.
- Normal phone should indicate the value of RSSI close to -16dBm.
9. STAND ALONE TEST
[How to Set program]

1. Select the Option Menu
- Setting :Mon Port, Baudrate (38400)
2. Input the Band, CH.
* Tester Setting
-. Operate mode: GSM BCH + TCH
-. TCH : Setting BAND & CH
3. click the connect button -> Start button click
4. change the Power level -> measuring
** 2.5G Tri band
5. Measured Power
-> Look at your Tester
Figure 9-1. HW test program
9. STAND ALONE TEST
Figure 10-2. Ramping profile
10. Calibration
10. Calibration
10.1 Calibration with Hotkimchi
10.1.1 Equipment Setup
No. Equipment Quantity
1 RF Text Set(Agilent E5515C) 1EA

2 Power Supply(Agilent 66311B) 1EA
3 GPIB Card 1EA
4 GPIB Cable 2EA
5 PC (Win2000, English) 1EA
6 Com Port Cable 1EA
7 I/O Cable 1EA
8 RF Cable 1EA
9 PIF JIG 1EA
10. Calibration
10.1.2 Program Set up

1) How to Program Set
Step1.
CM_GSM Folder set C:\
✻ The route can be changed.
■ Tester by Folder Name

i) Agilent : CM_GSM
ii) CMU200 : CM_GSM_CMU200
iii) WILLTEK : CM_GSM_WILLTEK
Step2.
Double click on the “_New_HK_0808.reg”
10. Calibration
Step3.
i) Double click on the “bat” file in dll,ocx folder
- Windows 98 : (Window 98)MFCD DLL COPY.bat
- Windows 2000 : (Window 2000)MFCD DLL COPY.bat
- Windows XP : (Windows XP)MFCD DLL COPY.bat
ii) Double click on the
“vaflex7l_ocx_regist.bat” file in dll,ocx folder
Step4.
How to add Model
i) Unzip the Model Folder in CM_GSM\Model
➀ Model Folder → MG230/MG235
➁ RF TEST DLL
When Update the RF TEST Program, add in CM_GSM\Model
10. Calibration
Step5.
Double click on the “HK_XX.exe” file Hot_Kimchi folder
➀ select the Model name (ex:MG230/MG235)
➁ Click the “Start” Button
■ Test result leave “CM_GSM\Debug\Model name\Date_Pass/Fail Folder”
10. Calibration
2). Preparing Process Before Launching Program
■ How to set the munu in Hot Kimchi Main Frame
I. Ezlooks
i) a definition of ezLooks
- Manufacturing management system
➀ select the EzLooks Mode.
* Off-Line : If you could not use ezlooks system, you use off-line mode
* On-Line
* Online Rework
10. Calibration
II. Line System

➀ select the Run mode.
* If you use manual line, you select the Manual -> select the line system.
➁ When you select repeat mode in RUN MODE tabs, you set up the number of repeat
➂ When you use automation Controller system, you set the controller port number
(Our Factory Line use Comport1 overall in automatic line)
III. Logic Operation

➀ Select whether you use DLL file
* Except for special case, It selects all Normal unconditional.
➁ Some model use to execute the calibration the Monitor Port. (use 2.5G Model)
You Set the Monitor Port
➂ It needs to execute the RF TEST.
You Set the UART Port.
➃ Logic Mode : 1 - Calibration Only
2 - RF TEST Only
3 - Calibration + RF TEST
➄ You set up the result file name.
➅ The result file creates this path.(non available)
10. Calibration
Result file is stored in the following location.

-. CM_GSM\Debug
10. Calibration
11. EXPLODED VIEW & REPLACEMENT PART LIST
11.1 EXPLODED VIEW
17 5
11
8 9
1
10
24 37
36
2 3
31 29 25
30 7
27
1 26 28
23 19
38
32
35
40 41
4 6 39
33 34
20 22
18 55
19 21
51
42
16
13
12
14 15 56
1
50 1
43
52 54
49 47
53
48
1
44 46
45 1
1
11.2 Replacement Parts Note: This Chapter is used for reference, Part order
<Mechanic component> is ordered by SBOM standard on GCSC
Location
Level Part Name Part Number Spec Color Remark
No.
1 GSM(FOLDER) TGFF0053007 Titan Silver
2 AAAY00 ADDITION AAAY0195601 Titan Silver
2 APEY00 PHONE APEY0383001 Titan Silver
3 ACGG00 COVER ASSY,FOLDER ACGG0079401 Titan Silver
COVER
4 ACGH00 ACGH0046701 Titan Silver
ASSY,FOLDER(LOWER)
5 MCJH00 COVER,FOLDER(LOWER) MCJH0037301 MOLD, PC LUPOY SC-1004A, , , , , Titan Silver 8
5 MFBC00 FILTER,SPEAKER MFBC0028501 COMPLEX, (empty), , , , , Black 39
5 MMAA00 MAGNET,SWITCH MMAA0001601 7100 magnetic Silver 37
5 MPBG00 PAD,LCD MPBG0055701 COMPLEX, (empty), , , , , Black
5 MTAD00 TAPE,WINDOW MTAD0063801 COMPLEX, (empty), , , , , Transparent 41
5 MTAF00 TAPE,MOTOR MTAF0011101 CUTTING, NS, , , , , Black 40
5 MTAZ00 TAPE MTAZ0177001 COMPLEX, (empty), , , , , Transparent 36
COVER
4 ACGJ00 ACGJ0060701 Titan Silver
ASSY,FOLDER(UPPER)
5 AWAB00 WINDOW ASSY,LCD AWAB0025201 Black 26
6 BFAA00 FILM,INMOLD BFAA0060601 ; ,[empty] , , , Without Color
6 MWAF00 WINDOW,LCD(SUB) MWAF0036201 MOLD, PMMA IF850, , , , , Titan Silver
5 MCJJ00 COVER,FOLDER(UPPER) MCJJ0046601 MOLD, PC LUPOY SC-1004A, , , , , Titan Silver 2
5 MGAD00 GASKET,SHIELD FORM MGAD0134101 COMPLEX, (empty), , , , , Gold 32
5 MPBJ00 PAD,MOTOR MPBJ0040201 COMPLEX, (empty), , , , , Black 34
5 MPBN00 PAD,SPEAKER MPBN0037701 COMPLEX, (empty), , , , , Black 33
5 MPBQ00 PAD,LCD(SUB) MPBQ0030701 COMPLEX, (empty), , , , , Black 35
5 MPBT00 PAD,CAMERA MPBT0037401 COMPLEX, (empty), , , , , Black 29
5 MPBZ00 PAD MPBZ0169001 COMPLEX, (empty), , , , , Black
5 MPBZ01 PAD MPBZ0169101 COMPLEX, (empty), , , , , Black 3 1,30
5 MTAE00 TAPE,WINDOW(SUB) MTAE0029901 COMPLEX, (empty), , , , , Transparent 27
5 MTAZ00 TAPE MTAZ0177101 COMPLEX, (empty), , , , , Transparent 28
4 ACGK00 COVER ASSY,FRONT ACGK0083601 Titan Silver
5 MBHY00 BUMPER MBHY0003512 MOLD, Urethane Rubber S190A, , , , , Dark Gray 44
5 MBJL00 BUTTON,SIDE MBJL0038001 MOLD, PC LUPOY SC-1004A, , , , , Titan Silver 43
5 MCCE00 CAP,RECEPTACLE MCCE0034901 MOLD, Urethane Rubber S195A, , , , , Titan Silver 45
5 MCJK00 COVER,FRONT MCJK0067101 MOLD, PC LUPOY SC-1004A, , , , , Titan Silver 12
5 MFBD00 FILTER,MIKE MFBD0020701 COMPLEX, (empty), , , , , Black 47
Location
No.
5 MIAA00 INDICATOR,LED MIAA0020601 MOLD, PC LUPOY SC-1004A, , , , , Without Color 46
5 MIDZ00 INSULATOR MIDZ0127601 COMPLEX, (empty), , , , , Blue 48
5 MPBZ00 PAD MPBZ0172501 COMPLEX, (empty), , , , , Black 49
5 MSGY00 STOPPER MSGY0019801 MOLD, Urethane Rubber S195A, , , , , Titan Silver 42
4 GMZZ00 SCREW MACHINE GMZZ0015101 1.4 mm,3.0 mm,MSWR3(FN) ,N ,+ ,- , Silver 19
4 MBFZ00 BRACKET MBFZ0027401 MOLD, PC LUPOY SC-1004A, , , , , Gray 13
4 MCCH00 CAP,SCREW MCCH0099901 COMPLEX, (empty), , , , , Titan Silver 9
4 MGAD00 GASKET,SHIELD FORM MGAD0134201 COMPLEX, (empty), , , , , Gold 17
4 MHFD00 HINGE,FOLDER MHFD0013702 COMPLEX, (empty), , , , , Without Color 14
4 MPBG00 PAD,LCD MPBG0061001 COMPLEX, (empty), , , , , Black 25
4 MTAB00 TAPE,PROTECTION MTAB0151201 COMPLEX, (empty), , , , , Transparent 11
4 MWAC00 WINDOW,LCD MWAC0074901 CUTTING, PMMA MR 200, , , , , Titan Silver 10
4 MWAE00 WINDOW,CAMERA MWAE0023201 CUTTING, PMMA MR 200, , , , , Without Color 1
4 MCCC00 CAP,EARPHONE JACK MCCC0042101 MOLD, Urethane Rubber S195A, , , , , Titan Silver 49
4 MCJN00 COVER,REAR MCJN0062901 MOLD, PC LUPOY SC-1004A, , , , , Black 18
5 MLAZ00 LABEL MLAZ0038301 PID Label 4 Array Without Color
<Main component> Note: This Chapter is used for reference, Part order
is ordered by SBOM standard on GCSC
Location
No.
4 SACY00 PCB ASSY,FLEXIBLE SACY0056801
5 SACE00 PCB ASSY,FLEXIBLE,SMT SACE0051301
PCB ASSY,FLEXIBLE,SMT
6 SACC00 SACC0031101
BOTTOM
CONNECTOR,BOARD TO 60 PIN,0.4 mm,STRAIGHT ,AU ,STACKING HEIGHT 0.9

7 CN100 ENBY0020202
BOARD / HEADDER FOR KEYPAD TO MAIN
CONNECTOR,BOARD TO
7 CN101 ENBY0019501 20 PIN,.4 mm,ETC , ,H=1.5, Socket
BOARD
PCB ASSY,FLEXIBLE,SMT
6 SACD00 SACD0042201
TOP
7 C100 CAP,CERAMIC,CHIP ECCH0004904 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP
7 C104 CAP,CERAMIC,CHIP ECCH0000122 47 pF,50V,J,NP0,TC,1005,R/TP
7 C105 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP
7 C107 CAP,CERAMIC,CHIP ECCH0000182 0.1 uF,10V ,K ,X5R ,HD ,1005 ,R/TP
7 C108 CAP,CHIP,MAKER ECZH0000826 27 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP
CONNECTOR,BOARD TO
7 CN102 ENBY0020201 40 PIN,0.4 mm,ETC , ,H=0.9, Header
BOARD
7 R100 RES,CHIP,MAKER ERHZ0000401 0 ohm,1/16W ,J ,1005 ,R/TP
7 R102 RES,CHIP,MAKER ERHZ0000405 10 Kohm,1/16W ,J ,1005 ,R/TP
6 SPCY00 PCB,FLEXIBLE SPCY0097601 POLYI ,0.45 mm,MULTI-5 , ,; , , , , , , , , , 5
4 SBCL00 BATTERY,CELL,LITHIUM SBCL0001303 2 V,1 mAh,COIN ,SOLDER TYPE BACKUP BATTERY 24
4 SJMY00 VIBRATOR,MOTOR SJMY0006508 3 V,.08 A,10*3.45 ,17mm , ,3V , , ,12500 , , , ,38 6
4 SUSY00 SPEAKER SUSY0023501 ASSY ,8 ohm,90 dB,17 mm, ,; , , , , , , ,WIRE 4
4 SVCY00 CAMERA SVCY0012601 CMOS ,VGA ,MAGNACHIP 1/7.4" 3
MAIN ,1.52"(128*128)_Sub 0.91"(96*64) Mono

4 SVLM00 LCD MODULE SVLM0022801 ,35.78*39.9*4.0 ,262k ,TFT ,TM ,M_NT39113, S_NT7539 7
,Sub Normally Black Panel
3 ACGM00 COVER ASSY,REAR ACGM0085301 Titan Silver
4 MCCC00 CAP,EARPHONE JACK MCCC0042101 MOLD, Urethane Rubber S195A, , , , , Titan Silver 49
4 MCJN00 COVER,REAR MCJN0062901 MOLD, PC LUPOY SC-1004A, , , , , Black 18
4 MIDZ00 INSULATOR MIDZ0131501 COMPLEX, (empty), , , , , Blue 52
4 MLAB00 LABEL,A/S MLAB0001102 C2000 USASV DIA 4.0 White 51
4 MSAZ00 SHEET MSAZ0047501 COMPLEX, (empty), , , , , Titan Silver 53
Location
No.
3.0 ,-2.0 dBd,, ,internal, GSM850/1800/1900 ,; ,TRIPLE ,-

4 SNGF00 ANTENNA,GSM,FIXED SNGF0021703 50
2.0 ,50 ,3.0
3 AKAB00 KEYPAD ASSY,FOLDER AKAB0007902 MG230d VIVO Titan Silver 15
3 GMZZ00 SCREW MACHINE GMZZ0015101 1.4 mm,3.0 mm,MSWR3(FN) ,N ,+ ,- , Silver
3 MCCH00 CAP,SCREW MCCH0099501 COMPLEX, (empty), , , , , Titan Silver 20
3 MLAK00 LABEL,MODEL MLAK0006901
3 SAFY00 PCB ASSY,MAIN SAFY0191902
4 SAFB00 PCB ASSY,MAIN,INSERT SAFB0070801
5 ADCA00 DOME ASSY,METAL ADCA0065501 White 55
5 MGAD00 GASKET,SHIELD FORM MGAD0134102 MG230d Front Assy Gold
5 MPBH00 PAD,MIKE MPBH0028301 COMPLEX, (empty), , , , , Black
5 SPKY00 PCB,SIDEKEY SPKY0044001 POLYI ,0.2 mm,DOUBLE , ,; , , , , , , , , ,
5 SUMY00 MICROPHONE SUMY0003802 FPCB ,-42 dB,4*1.5 ,
4 SAFF00 PCB ASSY,MAIN,SMT SAFF0113102
5 MLAZ00 LABEL MLAZ0038301 PID Label 4 Array Without Color
PCB ASSY,MAIN,SMT
5 SAFC00 SAFC0086501
BOTTOM
6 C100 CAP,CERAMIC,CHIP ECCH0000393 22 uF,6.3V ,M ,X5R ,HD ,2012 ,R/TP
6 C108 CAP,CERAMIC,CHIP ECCH0007901 10 uF,4V ,M ,X5R ,TC ,1608 ,R/TP
6 C118 CAP,CHIP,MAKER ECZH0004402 0.1 uF,16V ,Z ,NP0 ,TC ,1005 ,R/TP
Location
No.
6 C124 CAP,CERAMIC,CHIP ECCH0000143 1 nF,50V,K,X7R,HD,1005,R/TP
6 C132 CAP,CERAMIC,CHIP ECCH0002002 47000 pF,10V ,K ,B ,HD ,1005 ,R/TP
6 C133 CAP,CERAMIC,CHIP ECCH0002002 47000 pF,10V ,K ,B ,HD ,1005 ,R/TP
6 C137 CAP,CERAMIC,CHIP ECCH0003002 10 uF,10V ,Z ,Y5V ,HD ,2012 ,R/TP
6 C138 CAP,CERAMIC,CHIP ECCH0006201 4.7 uF,6.3V ,K ,X5R ,TC ,1608 ,R/TP
6 C142 CAP,CERAMIC,CHIP ECCH0000165 68 nF,6.3V,K,X5R,HD,1005,R/TP
6 C144 CAP,CHIP,MAKER ECZH0001216 220 nF,10V ,K ,X5R ,TC ,1005 ,R/TP
6 C145 CAP,CHIP,MAKER ECZH0001211 220 nF,10V ,Z ,Y5V ,HD ,1005 ,R/TP
Location
No.
33 uF,6.3V ,M ,L_ESR ,2012 ,R/TP , , ,[empty] ,[empty] ,

6 C202 CAP,TANTAL,CHIP ECTH0005201
,[empty] , ,2.2X1.1X1.1MM ,[empty] ,[empty] ,[empty]
6 C217 CAP,CERAMIC,CHIP ECCH0000198 2.2 uF,6.3V ,M ,X5R ,TC ,1005 ,R/TP
6 C219 CAP,TANTAL,CHIP ECTH0003701 10 uF,6.3V ,M ,L_ESR ,1608 ,R/TP
6 C220 CAP,CERAMIC,CHIP ECCH0005604 10 uF,6.3V ,M ,X5R ,TC ,1608 ,R/TP
6 C223 CAP,CERAMIC,CHIP ECCH0000133 220 pF,50V ,K ,X7R ,HD ,1005 ,R/TP
6 C232 CAP,CERAMIC,CHIP ECCH0000133 220 pF,50V ,K ,X7R ,HD ,1005 ,R/TP
6 C302 CAP,TANTAL,CHIP ECTH0002001 10 uF,10V ,M ,STD ,2012 ,R/TP
6 C306 CAP,CHIP,MAKER ECZH0001215 1 uF,10V ,K ,X5R ,TC ,1005 ,R/TP
6 C401 CAP,CHIP,MAKER ECZH0001420 1 uF,10V ,K ,X5R ,HD ,1608 ,R/TP
Location
No.
6 C404 CAP,CHIP,MAKER ECZH0001420 1 uF,10V ,K ,X5R ,HD ,1608 ,R/TP
6 C412 CAP,CHIP,MAKER ECZH0003202 1 uF,6.3V ,Z ,Y5V ,HD ,1005 ,R/TP
6 C413 CAP,CHIP,MAKER ECZH0003202 1 uF,6.3V ,Z ,Y5V ,HD ,1005 ,R/TP
6 C421 CAP,CERAMIC,CHIP ECCH0006201 4.7 uF,6.3V ,K ,X5R ,TC ,1608 ,R/TP
33 uF,6.3V ,M ,L_ESR ,2012 ,R/TP , , ,[empty] ,[empty] ,

6 C500 CAP,TANTAL,CHIP ECTH0005201
,[empty] , ,2.2X1.1X1.1MM ,[empty] ,[empty] ,[empty]
6 C511 CAP,CERAMIC,CHIP ECCH0000101 .5 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP
Location
No.
6 C534 CAP,CHIP,MAKER ECZH0001216 220 nF,10V ,K ,X5R ,TC ,1005 ,R/TP
6 C580 CAP,CERAMIC,CHIP ECCH0000701 1.2 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP
Location
No.
6 CN301 CONNECTOR,I/O ENRY0003501 24 PIN,0.5 mm,ANGLE , ,
CONNECTOR,BOARD TO 60 PIN,0.4 mm,STRAIGHT ,AU ,STACKING HEIGHT 0.9

6 CN600 ENBY0020402
BOARD / SOCKET FOR KEYPAD TO MAIN
6 D100 DIODE,SWITCHING EDSY0005701 EMT3 ,80 V,4 A,R/TP ,
6 D101 DIODE,SWITCHING EDSY0012101 US-FLAT ,30 V,1 A,R/TP ,2.5*1.25*0.6(t)
6 D400 DIODE,SWITCHING EDSY0009901 ESC ,80 V,300 A,R/TP ,1.6*0.8*0.6(t)
850. 900 ,1800. 1900 ,2.7 dB,3.0 dB,30 dB,30 dB,ETC

6 FL500 FILTER,SEPERATOR SFAY0009004
,5.4*4.0*1.2, Quard FEM
6 FL600 FILTER,EMI/POWER SFEY0007102 SMD ,5.6 V,SMD ,4ch. R-Varistor Array(400Ohm,25pF)
6 FL604 VARISTOR SEVY0005501 18 V, ,SMD ,4ch. R-Varistor Array(100Ohm,15pF)
SMD ,18 V, ,SMD ,4ch. R-Varistor Array(50Ohm,15pF),

6 FL605 FILTER,EMI/POWER SFEY0007103
Pb-free

Pb-free

Pb-free

Pb-free
6 J100 CONN,SOCKET ENSY0016601 6 PIN,ETC , ,2.54 mm,H=2.5
CONN,JACK/PLUG,EARPH
6 J200 ENJE0003102 4 ,4 PIN,BOSS-2
ONE
6 L200 INDUCTOR,CHIP ELCH0010401 2.2 uH,M ,1005 ,R/TP ,
6 L203 RES,CHIP,MAKER ERHZ0000701 0 ohm,1/10W ,J ,1608 ,R/TP
6 L500 CAP,CERAMIC,CHIP ECCH0000120 39 pF,50V,J,NP0,TC,1005,R/TP
6 L501 INDUCTOR,CHIP ELCH0001408 6.8 nH,J ,1005 ,R/TP ,Pb Free
6 L502 INDUCTOR,CHIP ELCH0003817 7.5 nH,J ,1005 ,R/TP ,
6 L503 INDUCTOR,CHIP ELCH0001032 18 nH,J ,1005 ,R/TP ,PBFREE
6 L504 INDUCTOR,CHIP ELCH0005006 33 nH,J ,1005 ,R/TP ,
6 L590 INDUCTOR,CHIP ELCH0001420 3.9 nH,S ,1005 ,R/TP ,PBFREE
Location
No.
6 Q100 TR,BJT,NPN EQBN0007101 EMT3 ,0.15 W,R/TP ,LOW FREQUENCY
6 Q101 TR,BJT,ARRAY EQBA0000406 SC-70 ,0.2 W,R/TP ,CDMA,Common use
2.9*1.9*0.8(t) ,.7 W,20 V,-6 A,R/TP ,NDC652P

6 Q102 TR,FET,P-CHANNEL EQFP0004201
upgrade(substitution) item, Pb free
6 Q300 TR,BJT,NPN EQBN0005301 EMT3 ,0.15 W,R/TP ,
6 Q400 TR,BJT,ARRAY EQBA0002701 EMT6 ,150 mW,R/TP ,NPN, PNP, 150 mA
6 R102 RES,CHIP ERHY0003301 100 ohm,1/16W ,J ,1005 ,R/TP
6 R103 RES,CHIP ERHY0000512 10M ohm,1/16W,J,1608,R/TP
6 R110 RES,CHIP,MAKER ERHZ0000529 1.5 Kohm,1/16W ,J ,1005 ,R/TP
6 R119 RES,CHIP ERHY0001102 0.2 ohm,1/4W ,F ,2012 ,R/TP
6 R122 RES,CHIP,MAKER ERHZ0000488 4.7 ohm,1/16W ,J ,1005 ,R/TP
6 R126 RES,CHIP ERHY0000278 82K ohm,1/16W,J,1005,R/TP
Location
No.
6 R312 RES,CHIP,MAKER ERHZ0000360 100 Kohm,1/16W ,D ,1005 ,R/TP
Location
No.
6 R508 INDUCTOR,CHIP ELCH0001404 1.5 nH,S,1005,R/TP
6 R509 RES,CHIP,MAKER ERHZ0000242 220 ohm,1/16W ,F ,1005 ,R/TP
Location
No.
6 SW500 CONN,RF SWITCH ENWY0002304 STRAIGHT ,SMD ,0.8 dB,MUSE MODEL
SON5-P-0.35(fSV) ,5 PIN,R/TP ,2-INPUT AND GATE, Pb

6 U100 IC EUSY0227901
Free
SON5-P-0.35(fSV) ,5 PIN,R/TP ,2-INPUT AND GATE, Pb

6 U101 IC EUSY0227901
Free
BGA ,84 PIN,ETC ,256(1die flash)*64(PSRAM), 3V,

6 U102 IC EUSY0288701
8x11.6x1.2mm, 84ball, Pb-Free
6 U103 IC EUSY0154001 US8 ,8 PIN,R/TP ,Dual 2-Input OR Gate, Pb Free
6 U104 IC EUSY0280001 CSP_BGA ,289 PIN,R/TP ,GSM Onechip Baseband
6 U200 IC EUSY0223007 HVSOF5 ,5 PIN,R/TP ,2.5V, 150mA,LDO
SC70 ,5 PIN,R/TP ,Comparator, pin compatible to

6 U201 IC EUSY0250501
EUSY0077701
TDFN ,8 PIN,R/TP ,1.4W Mono AB-Class Audio AMP ,8

6 U202 IC EUSY0304901
PIN,R/TP ,SPK Audio AMP
WQFN ,10 PIN,R/TP ,Small package Dual SPDT analog

6 U203 IC EUSY0300101
Switch, PB-Free
TSSPJW12 ,12 PIN,R/TP ,BACKLIGHT CHARGE

6 U400 IC EUSY0253601
PUMP20mAX3
WDFN-8L ,8 PIN,R/TP ,300mA/300mA 2.8V/1.8V Dual

6 U401 IC EUSY0319001
LDO
6 U402 IC EUSY0318501 BGA ,84 PIN,R/TP ,7x7, VGA Camera Backend IC
WDFN-8L ,8 PIN,R/TP ,300mA/300mA 2.8V/1.8V Dual

6 U403 IC EUSY0319001
LDO
6 U500 PAM SMPY0014001 35.5 dBm,56 %, A, dBc, dB,6x6x1.15 ,SMD ,Tri Band
LFCSP-32 ,32 PIN,R/TP ,GSM QUAD BAND

6 U501 IC EUSY0280101
TRANSCEIVER, Othello G.
6 VA200 VARISTOR SEVY0004001 18 V, ,SMD ,3pF, 1005
6 VA300 VARISTOR SEVY0007901 5.6 V,20% ,SMD ,PB-FREE(480pF)
Location
No.
.032768 MHz,20 PPM,7 pF,65000 ohm,SMD ,6.9*1.4*1.3
6 X100 X-TAL EXXY0004601
,
26 MHz,10 PPM, pF, ohm,SMD ,3.2*2.5*0.7 ,temporary

6 X500 X-TAL EXXY0018403
spec, W-191-451 ,; ,26 ,10PPM , , , ,SMD ,R/TP
5 SAFD00 PCB ASSY,MAIN,SMT TOP SAFD0085501
6 LD100 DIODE,LED,CHIP EDLH0007901 RED ,1608 ,R/TP ,Indicator,0.4T Red LED
BLUE ,1608 ,R/TP ,0.35T ,; ,BLUE ,3~3.15 ,5 ,18~28mcd

6 LD300 DIODE,LED,CHIP EDLH0013501
, , ,[empty] ,[empty] ,[empty]











Location
No.
6 SPFY00 PCB,MAIN SPFY0145101 FR-4 ,0.8 mm,BUILD-UP 8 , ,; , , , , , , , , , 16
6 U404 IC EUSY0129503 2x2 mm MLPD ,3 PIN,R/TP ,Hall Effect Switch, Pb Free
12.3 Accessory Note: This Chapter is used for reference, Part order
is ordered by SBOM standard on GCSC
Location
No.
3 MCJA00 COVER,BATTERY MCJA0038901 MOLD, PC LUPOY SC-1004A, , , , , Titan Silver 22
3.7 V,830 mAh,1 CELL,PRISMATIC ,KG120 BATT, Latin

3 SBPL00 BATTERY PACK,LI-ION SBPL0086002 American Label, Pb-Free ,; ,3.7 ,830 ,0.2C ,PRISMATIC 21
,50x34x42 , ,BLACK ,Innerpack ,Latin American Label
3 SSAD00 ADAPTOR,AC-DC SSAD0007839 FREE ,50 Hz,5.2 V,800 mA,CE,CB ,
Note
Note

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Service Manual

Internal Use Only

Date: May, 2007 / Issue 1.0

Y. S. Jeong 2007/01/05 A INITIAL RELEASE

J.M. CHUNG 2007/01/07 A.1

1.1 Purpose .................................................. 5 5. DOWNLOAD.......................................66

1.2 Regulatory Information

D. Notice of Radiated Emissions

F. Interference and Attenuation

G. Electrostatic Sensitive Devices

Item Feature Comment

AVG TCVR Current 260 mA typ GSM850@PL5

Standby Current 3.0 mA typ @PP9

Talk time 150 min (GSM850 TX Level 5)

Standby time 200 hours (Paging Period:9, RSSI: -85dBm)

Charging time Under 3 hours

RX Sensitivity GSM850: -105dBm, DCS/PCS : -105dBm

GSM850: 33dBm (@PL 5)

GPRS compatibility Class 10

SIM card type Yes (SIM Block Type) 3V

Main : 1.51” 128*128 TFT Type

Soft icons, OK, Navigation Key, 0 ~ 9, #,

Status Indicator *,SEND, CLEAR, END/PWR, Volume Up,

ANT Built in antenna

EAR Phone Jack Yes / Jack

Speech coding HR/EFR/FR/AMR

Data and Fax Yes

Voice Recoding Yes

Travel Adapter Yes

Item Feature Comment

3.1 MG230/MG235 Block diagram.

Figure 3-1 MG230/MG235 Hardware architecture

Figure 3-2 MG230/MG235 Functional block diagram

3.2. RF Part Introduction

3.2.1. Receiver Part

Figure 3-3 The RF Receiver Block

A. Low Noise Amplifiers

C. Baseband Amplifiers / Low Pass Filters

D. Baseband Output D.C. Offset Correction

E. Receiver Local Oscillator (LO) Generator

3.2.2 Transmitter Part

A. Power Amplifier Module

C. Phase Frequency Detector (PFD)

F. Feedback Down-Converting Mixer

G. Transmit Frequency Plan

H. Main Frequency Synthesizer

J. Phase Frequency Detector/Charge Pump

K. Synthesizer Loop filter

L. Voltage Controlled Oscillator

3.2.3 The Crystal Reference System

Figure 3-4 The Crystal Reference System

3.2.4 Power Management

LDO1 LDO2 LDO3

Table 3-1 Intended LDO Use

LDO OP Extemal Connection

VLDO1 VCC_FE, VCC_BBI, VCC_BBQ

VLDO2 No external Connections, except for decoupling

VLDO3 No external Connections, except for decoupling

Table 3-2 LDO Connections

3.3 Baseband Introduction

3.3.1 Baseband Processor (AD6720 , U101)

3.3.2 Interconnection with external devices

A. RTC block interface

B. LCD module interface